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NAU8501YG
NAU8501YG is a low power, high quality audio input system for portable applications. In addition to precision 24-bit stereo ADCs, this device integrates a broad range of additional functions to simplify implementation of complete audio systems. NAU8501YG includes low-noise stereo differential high gain microphone inputs with wide range programmable amplifiers, separate line inputs, and an analog bypass/side tone line level stereo output.
Advanced on-chip digital signal processing includes a limiter/ALC (Automatic Level Control), 5-band equalizer, notch filter, and a high-pass filter for speech optimization and wind noise reduction. The digital interface can operate as either a master or a slave. Additionally, an internal Fractional-N PLL is available to accurately generate any audio sample rate clock for the ADCs derived using any available system clock from 8MHz through 33MHz.
NAU8501YG operates with analog supply voltages from 2.5V to 3.6V, while the digital core can operate as low as 1.7V to conserve power. Internal control registers enable flexible power conserving modes, shutting down or reducing power in sub-sections of the chip under software control.
Key Features:
• | ADC Feature | |
- | Integrated programmable gain microphone amplifier | |
- | Microphone bias supplies for low noise microphone biasing | |
- | Sample rates: 8~48 kHz at 24-bit resolution | |
- | SNR (A-weighted): 90dB @ 0dB gain | |
- | THD+N: -80dB @ 0dB gain | |
• | Data Output | |
- | Standard audio data bus interfaces:
|
|
• | Advance / Control Feature | |
- | On-chip PLL | |
- | I2C Serial control interface with read/write capability | |
• | Operating Characteristics | |
- | Voltage range(VDDC): 1.65V ~ 3.60V | |
- | Voltage range(VDDB): 1.65V ~ 3.60V | |
Voltage range(VDDA): 2.50V ~ 3.60V | ||
- | Temperature range: -40°C ~ 85°C | |
• | Package | |
- | QFN-32 (4x4mm) | |