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Häufig gestellte Fragen
When the RLS (Receive Line Status) interrupt occurs during UART data transmission, how to handle PEF, FEF and BIF flags that may cause interrupt? Datum:2016-07-01
Since the three flags are saved with UART data in the FIFO, these flags must be cleared by writing 1 to them before the data is read out. This can avoid FIFO level changes, causing the PEF, FEF and BIF saved in the upper layer of FIFO unable to be cleared.
If the data has been read out but the three flags are not cleared, these flags will remain in the FIFO. The next time the same level FIFO data is read out, the RLS interrupt may inadvertently occur due to these old flags.
| Produkte: | Mikrocontroller ,Arm Cortex-M0-MCUs ,M051-Base-Serie ,M0518-Serie ,M0519-Serie ,Mini51-Base-Serie ,Nano100/102-Base-Serie ,Nano110/112-LCD-Serie ,Nano120-USB-Serie ,Nano130-Advanced-Serie ,NUC029-Serie ,NUC100/200-Advanced-Serie ,NUC120/122/123/220-USB-Serie ,NUC130/230-CAN-Serie ,NUC131-NUC1311-CAN-Serie ,NUC140/240-Konnektivität-Serie ,Arm Cortex-M4-MCUs ,M451-Base-Serie ,M451M-Serie ,M452-USB-Serie ,M453-CAN-Serie ,M4TK-Touch-Key-Serie ,NUC442/472-Serie ,NUC505-Serie |
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| Applikationen: | |
| Funktion: | Peripherals,Connectivity,UART |