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NANO103ZD3AE

The NANO103ZD3AE ultra low power microcontroller based on the Arm® Cortex® -M0 core operates at up to 36 MHz with < 1μA standby current and independent RTC VBAT power source. It supports up to 64 Kbytes Flash memory, 16 Kbytes SRAM and 4 Kbytes ISP ( In-System Programming ) ROM in 33-pin package. The integrated HIRC supports multiple frequencies of 4/12/36 MHz with 1 % accuracy to meet diversified requirements, and to save power consumption without applying PLL ( Phase-lock Loop ) .
The exceptionally low power consumption makes it widely used in battery-powered devices, especially the OLED display applications such as the automatic door locks, healthcare products, and meters.
The NANO103ZD3AE operates at 2.2V to 3.6V and from - 40 ℃ to 105 ℃ . The integrated HIRC supports multiple frequencies of 4/12/36 MHz with <1 % deviation to meet diversified requirements. It supports rich peripherals such as Timer, WDT/WWDT ( Watchdog Timer/Window Watchdog Timer ) , RTC, PDMA, UART , SPI , I²C , PWM , ISO-7816, and a high-speed 1.8 MSPS 12-bit SAR ADC , temperature sensor, LVR ( Low Voltage Reset ) , BOD ( Brown-out Detector ) , 96-bit UID ( Unique Identification ) , and 128-bit UCID ( Unique Customer Identification ) to provide multiple protection for program development.
Target Application:
Smart Door Lock, Wearable Devices, Portable Healthcare Devices, LPWAN Connectivity Module, Smart Remote Controller, Smart Home, Card Reader, GPS Tracker, Payment Device, etc.
Key Features:
| • | Core | |
| - | Arm® Cortex®-M0 core running up to 36 MHz | |
| - | Operating voltage: 2.2V to 3.6V | |
| - | Operating temperature: - 40 ℃ to 105 ℃ | |
| • | Memory | |
| - | 64 KB application ROM ( APROM ) | |
| - | 16 KB SRAM | |
| - | Configurable Data Flash | |
| - | Supports program update by:
|
|
| • | Ultra-Low Power Consumption | |
| - | 180μA/ MHz in operating mode | |
| - | 75μA/ MHz in idle mode | |
| - | 2 μA under Power-down mode with RTC and RAM retention | |
| - | 1 μA independent RTC power source | |
| - | < 7uS fast CPU wake-up | |
| • | ADC | |
| - | Supports 12-bit SAR ADC | |
| - | Up to 6 single-end analog input channels | |
| - | Up to 1.8 MSPS conversion rate | |
| • | PWM | |
| - | 2-ch PWM /Capture or 1 complementary paired output channel | |
| - | Supports brake protection | |
| - | Supports trigger ADC |
|
| • | Connectivity | |
| - | Up to four SPI ( max. 32 MHz ) | |
| - | Up to two I²C ( max.1 MHz ) | |
| - | Up to four UART ( max. 3.6 Mbps ) | |
| - | Up to two ISO-7816-3 | |
| • | Clock Control | |
| - | 4/12/16/36 MHz internal RC ( HIRC ) | |
| - | 10 kHz internal RC ( LIRC ) | |
| - | 4-24 MHz external crystal ( HXT ) | |
| - | 32.768 kHz external crystal ( LXT ) | |
| • | Package | |
| - | QFN33 | |