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M467J2JHAE
The NuMicro® M467J2JHAE is a 32-bit microcontroller based on Arm Cortex-M4F core, with DSP instruction set and single-precision floating-point unit (FPU), targeted for IoT gateway, industrial control, telecom, and data center applications. The M467J2JHAE runs up to 200 MHz, and features 1.7 V to 3.6 V wide operating voltage, -40 °C to 105 °C wide operating temperature, a variety of package choices, and excellent high immunity characteristics by ESD HBM 2 KV and EFT 4.4 KV.
As the new smart function added on home appliances, the M467J2JHAE provides up to 1024 KB dual bank of Flash memory for code storage and 512 KB SRAM for run time operation. The dual bank design of 1024 KB Flash memory supports Firmware Over-The-Air (FOTA) process. Additionally, in response to the code security requirements, the M467J2JHAE supports Execute-Only-Memory (XOM) function to protect confidential code information from stealing in the run-time. In order to reduce the data access overhead of CPU core to peripherals, up to 2 sets (up to 32 channels) of peripheral direct memory access (PDMA) is provided.
The M467J2JHAE supports plenty of peripherals, including Ethernet 10/100 MAC, hardware crypto engine, key store, true random number generator (TRNG), programmable audio PLL, HyperBus interface (HBI), 4 sets of CAN FD, USB HS OTG, USB FS OTG, up to 24 channels of 16-bit PWM, 10 sets of UART, 4 sets of SPI/I2S, 2 set of Quad-SPI, 5 sets of I²C, and a real-time clock (RTC).
The M467J2JHAE also provides rich analog peripherals including 4 sets of analog comparators, up to 28 channels of 12-bit SAR ADC, and 2 channel of 12-bit DAC.
For the development, Nuvoton provides the NuMaker-M467HJ evaluation board and Nuvoton Nu-Link debugger. The 3rd Party IDE such as Keil MDK, IAR EWARM, Eclipse IDE with GNU GCC compilers are also supported.
The M467J2JHAE is suitable for a wide range of applications such as:
- IoT Gateway
- Industrial Control
- Telecom
- Data Center
Features:
• | Operating Characteristics | |
- | Voltage range: 1.7 V to 3.6 V | |
- | Temperature range: -40 °C to +105 °C | |
- | EFT 4.4 KV | |
- | ESD HBM 2 KV | |
• | Core | |
- | Up to 200 MHz ARM Cortex-M4F | |
- | DSP instruction set | |
- | Single-precision floating point instructions (FPU) | |
- | Memory Protection Unit (MPU) with eight memory regions | |
• | Memory | |
- | Up to 1024 KB Flash memory with dual bank structure supporting Firmware Over-The-Air (FOTA) | |
- | Flash memory supporting up to four regions of Execute-Only-Memory (XOM) | |
- | 8 KB user-defined loader (LDROM) | |
- | 3 KB One-Time-Programmable ROM | |
- | Up to 512 KB SRAM including hardware parity check 64 KB | |
- | 16 KB Cache for Execute-In-Place (XIP) in external SPI Flash memory | |
• | External Memory Interface | |
- | External bus interface (EBI), i80 mode | |
- | HyperBus interface (HBI), up to 90 MHz | |
• | Clocks | |
- | 4 to 24 MHz crystal oscillator | |
- | 32.768 kHz crystal oscillator for RTC | |
- | Internal 48 MHz RC oscillator | |
- | Internal 12 MHz RC oscillator | |
- | Internal 10 kHz RC oscillator | |
- | Internal PLL up to 200 MHz | |
- | Programmable Audio PLL | |
• | Power Management | |
- | Active: 175 μA/MHz at 25°C/3.3V (peripheral off) | |
- | Low leakage power-down (LLPD): 340 μA | |
- | Standby power-down (SPD) w/o RAM retention: 1.2 μA | |
- | Deep power-down (DPD): 0.2 μA (RTC off) | |
- | RTC with VBAT supply: 1 μA | |
- | Supports wake up from Normal Power-down mode by: RTC, WDT, I²C, Timer, UART, GPIO, EINT, ACMP, SDH, USB FS, USB HS, EMAC, and BOD | |
• | Timer & PWM | |
- | Four 32-bit timers | |
- | Up to 12 Enhanced PWM with twelve 16-bit counters | |
- | Up to 12 Basic PWM with two 16-bit counters | |
- | One 24-bit count-down SysTick timer | |
- | One watchdog timer | |
- | One window watchdog timer | |
• | Peripheral Direct Memory Access (PDMA) | |
- | 2 set of PDMA, each with 16 channels | |
- | Channel can be operated by software trigger, UART, SPI, EPWM, TIMER, ADC, DAC, ACMP and I²C | |
• | Analog Peripheral | |
- | 3 set of 12-bit, up to 28-ch, 5 MSPS SAR ADC | |
- | 2 set of 12-bit, 1 MSPS DAC | |
- | 4 sets of analog comparators | |
- | Built-in internal reference voltage | |
• | Communication Interface | |
- | Up to 10 sets of UART interfaces with IrDA (Support LIN in UART0 and UART1) | |
- | Up to 3 set of ISO-7816-3 interfaces, which support full duplex UART mode | |
- | Up to 5 sets of I²C interfaces with SMBus/PMBus (Up to 3.4 Mbps) | |
- | Up to 4 sets of SPI/I²S interfaces (SPI up to 100 MHz in Master mode) | |
- | Up to 2 set of Quad-SPI interface (Up to 100 MHz in Master mode) | |
- | 2 set of I²S interface | |
- | 4 set of CAN FD interfaces | |
- | 2 set of Secure Digital Host Controllers (Up to 50 MHz) | |
- | 1 set of SPI Flash interface supports quad mode and Execute-In-Place (XIP) | |
- | Up to 1 set of USCI interfaces | |
- | Up to 1 set of PSIO interfaces | |
- | Support 6x8 Keypad Interface (KPI) | |
- | Up to 4 set of enhanced quadrature encoder interfaces (EQEI) | |
- | Up to 4 set of 24-bit, 3-ch enhanced input capture timer units (ECAP) | |
• | Camera Capture Interface | |
• | Advanced Connectivity | |
- | USB 2.0 high speed device/host/OTG controller with on-chip PHY | |
- | USB 2.0 full speed device/host/OTG controller with on-chip PHY | |
- | 10/100 Ethernet MAC with RMII (IEEE1588v2) | |
• | Cryptography Accelerator | |
- | ECC-571 | |
- | AES-256 | |
- | SHA-512 | |
- | HMAC-512 | |
- | RSA-4096 | |
- | SM2 | |
• | Pseudo Random Number Generator (PRNG) | |
• | True Random Number Generator (TRNG) | |
• | Key Store | |
• | Secure Boot | |
• | Voltage Adjustable Interface (VAI) | |
• | Cyclic Redundancy Calculation (CRC) | |
• | Real Time Clock (RTC) with Vbat | |
• | Up to 114 I/O pins with interrupt capability | |
• | IEC60730-1 Class B | |
- | Supports certified IEC60730-1 Class B Software Test Library (STL) | |
• | Development Platform Support | |
- | Arm Keil RVMDK and IAR EWARM IDE | |
- | Free GNU compiler with Eclipse IDE support | |
- | ICP (In Circuit Programmer) support for updating internal code via Nu-Link debugger | |
- | ISP (In System Programmer) support for updating code through UART, SPI, I2C, RS-485 peripheral interfaces | |
- | Pin Viewer for real time monitoring the status of all I/O pins | |
- | PinConfigure tool for pin assignment, initial code generation and OrCAD/Protel part generation | |
• | 96-bit Unique ID (UID) | |
• | 128-bit Unique Customer ID (UCID) | |
• | Package | |
- | LQFP144: Body Size 20 mm x 20 mm, Load Pitch 0.5 mm with exposed thermal pad (EPAD) |