The NPCM7xxR iBMC family of products is the third generation of Nuvoton’s BMC products that combine Baseboard Management Controller (BMC), VGA-compatible Graphics core with PCI-Express (PCIe) Gen-2 interface, Virtual Media and Keyboard, Video and Mouse Redirection (KVMR). It supports a variety of chipsets and integrates SuperI/O functionality sufficient for a legacy-reduced server.

The NPCM7xxR family offers four pin-compatible products.

• The NPCM750R and NPCM710R are targeted for Enterprise segment.
• The NPCM730R and NPCM705R are optimized for Data Center and Hyperscale applications.

To support upcoming BMC computing and processing requirements, the NPCM7xxR offers a scalable computing subsystem ranging from a single-core to a dual-core ARM^® Cortex A9, at 800 MHz with L1/L2 caches.

The NPCM7xxR family supports a “Secure BMC” mode of operation. In this mode, the BMC is the Root of Trust and it executes only an authenticated software that was cryptographically signed. In case of a security breach, the BMC will halt operation.

To increase system performance and for real time applications handling, the NPCM7xxR integrates a dedicated 200 MHz 32-bit RISC Co-Processor. 

For Server and NVMexpress manageability applications, the NPCM7xxR implements an MCTP node over PCIe, which enables the BMC to receive and transmit MCTP packets over the PCIe fabric.

The NPCM7xxR PCIe Root-Complex (RC) function can be used for control of devices in Storage and Network platforms.

Nuvoton provides software manageability developers with Linux SDK, Co-Processor SDK and production utilities. NPCM7xxR is supported by OpenBMC.

• Diagram:

The Nuvoton NPCM8mnx (code name Arbel) family of devices is the fourth-generation of Baseboard Management Controller (BMC).

A BMC typical application is to manage data center and edge gear such as servers, network and storage platforms.
The NPCM8mnx architecture is designed to address  the upcoming challenges in platform management for the upcoming years.

Computing Power:

To address high compute demand for telemetry and AI applications, the Arbel integrates a quad A35 CPU with FPU and Neon SMID accelerators per CPU, running at 1 GHz. The A35 CPU is ARM v8 64-bit architecture to ease on customers to maintain a similar Linux SW stack for both the compute Host and the BMC. 

Security:

The Arbel security architecture was designed from the ground up to meet constantly changing cybersecurity challenges.

The anchor of the BMC security architecture is based on a TIP (Trusted Integrated Processor), a dedicated security processor “enclave” that provides security services for the BMC and for the platform. TIP security services include:

• Secure Boot 
• DICE Attestation 
• Flash monitoring and protection
• Firmware Resilience (NIST SP800-193: Detection, Recovery and Update RoT) 
• Platform pRoT application based on Cerberus SW
• Etc.

To protect against cyberattacks and attacks the TIP HW and FW integrates security counter measures to alerts the system on attacks. Customers can define their own recovery policies to handle such events.

The BMC CPUs and its peripherals supports ARM® TrustZone® technology. This allows the implementation of TEE (Trusted Execution Environment) and security applications on the BMC.  

Nuvoton Controlled Manufacturing:

Nuvoton extends its experience and infrastructure of secure TPM manufacturing flow to

support Arbel provisioning during IC manufacturing.

Nuvoton device manufacturing identity as well as customer specific configurations are provisioned during manufacturing. This provides a cryptographic mechanism to affirm that the IC and OEM configuration are genuine protecting against supply chain attacks.

BMC Peripherals:

The Arbel provides a mixture of peripherals required for BMC applications. These include network interfaces, USB Hosts and Devices, remote access via KVM or SOL and the baseboard board management interfaces such as I2C, I3C, PECI, PWM, Tacho, timers, UARTS, GPIOs, etc.

HOST interfaces includes: KCS, UARTS, mailboxes and Mailboxes.

PCIe RC and SPIx can be used for system expansion and FPGA/CPLD connectivity.

An integrated Cortex M4 coprocessor (IO Processor) is available to program for real-time operation tasks or to perform off-load functions from the CPUs. 

SW Deliveries:

Nuvoton will continue to deliver optimized Linux and OpenBMC solutions for its BMC devices.
An open source reference solution and collaterals can be found on Nuvoton’s BMC GitHub: https://github.com/Nuvoton-Israel.

• Diagram:

• OpenBMC Repository: https://github.com/Nuvoton-Israel/openbmc

     For more product questions, please contact us at:  bmc_marketing@nuvoton.com