44#define FMC_APROM_BASE 0x00000000UL
45#define FMC_LDROM_BASE 0x00100000UL
46#define FMC_SPROM_BASE 0x00200000UL
47#define FMC_CONFIG_BASE 0x00300000UL
49#define FMC_CONFIG0_ADDR (FMC_CONFIG_BASE)
50#define FMC_CONFIG1_ADDR (FMC_CONFIG_BASE + 4)
53#define FMC_FLASH_PAGE_SIZE 0x800
54#define FMC_LDROM_SIZE 0x1000
59#define FMC_ISPCTL_BS_LDROM 0x2
60#define FMC_ISPCTL_BS_APROM 0x0
65#define FMC_ISPCMD_READ 0x00
66#define FMC_ISPCMD_PROGRAM 0x21
67#define FMC_ISPCMD_WRITE_8 0x61
68#define FMC_ISPCMD_PAGE_ERASE 0x22
69#define FMC_ISPCMD_READ_CID 0x0B
70#define FMC_ISPCMD_READ_UID 0x04
71#define FMC_ISPCMD_READ_DID 0x0C
72#define FMC_ISPCMD_VECMAP 0x2E
73#define FMC_ISPCMD_CHECKSUM 0x0D
74#define FMC_ISPCMD_CAL_CHECKSUM 0x2D
75#define FMC_ISPCMD_MULTI_PROG 0x27
80#define FMC_FTCTL_OPTIMIZE_DISABLE 0x00
81#define FMC_FTCTL_OPTIMIZE_12MHZ 0x01
82#define FMC_FTCTL_OPTIMIZE_36MHZ 0x02
83#define FMC_FTCTL_OPTIMIZE_60MHZ 0x04
84#define FMC_FTCTL_OPTIMIZE_72MHZ 0x05
86#define FMC_TIMEOUT_READ ((SystemCoreClock/10)*2)
87#define FMC_TIMEOUT_WRITE ((SystemCoreClock/10)*2)
88#define FMC_TIMEOUT_ERASE ((SystemCoreClock/10)*4)
89#define FMC_TIMEOUT_CHKSUM (SystemCoreClock*2)
90#define FMC_TIMEOUT_CHKALLONE (SystemCoreClock*2)
111#define FMC_ENABLE_ISP() (FMC->ISPCTL |= FMC_ISPCTL_ISPEN_Msk)
123#define FMC_DISABLE_ISP() (FMC->ISPCTL &= ~FMC_ISPCTL_ISPEN_Msk)
136#define FMC_ENABLE_LD_UPDATE() (FMC->ISPCTL |= FMC_ISPCTL_LDUEN_Msk)
148#define FMC_DISABLE_LD_UPDATE() (FMC->ISPCTL &= ~FMC_ISPCTL_LDUEN_Msk)
161#define FMC_ENABLE_CFG_UPDATE() (FMC->ISPCTL |= FMC_ISPCTL_CFGUEN_Msk)
173#define FMC_DISABLE_CFG_UPDATE() (FMC->ISPCTL &= ~FMC_ISPCTL_CFGUEN_Msk)
187#define FMC_ENABLE_AP_UPDATE() (FMC->ISPCTL |= FMC_ISPCTL_APUEN_Msk)
199#define FMC_DISABLE_AP_UPDATE() (FMC->ISPCTL &= ~FMC_ISPCTL_APUEN_Msk)
213#define FMC_SELECT_NEXT_BOOT(x) (FMC->ISPCTL = (FMC->ISPCTL & ~FMC_ISPCTL_BS_Msk) | ((x) << FMC_ISPCTL_BS_Pos))
225#define FMC_GET_BOOT_STATUS() ((FMC->ISPCTL & FMC_ISPCTL_BS_Msk)?1:0)
242static __INLINE
void FMC_Write(uint32_t u32Addr, uint32_t u32Data)
248 FMC->ISPADDR = u32Addr;
249 FMC->ISPDAT = u32Data;
255 while((--tout > 0) &&
FMC->ISPTRG);
273static __INLINE
void FMC_Write8(uint32_t u32Addr, uint32_t u32Data0, uint32_t u32Data1)
279 FMC->ISPADDR = u32Addr;
280 FMC->MPDAT0 = u32Data0;
281 FMC->MPDAT1 = u32Data1;
287 while((--tout > 0) &&
FMC->ISPTRG);
309 FMC->ISPADDR = u32Addr;
316 while((--tout > 0) &&
FMC->ISPTRG);
341 FMC->ISPADDR = u32Addr;
347 while ((--tout > 0) &&
FMC->ISPTRG);
379 FMC->ISPADDR = (u8Index << 2);
476 FMC->ISPADDR = (0x04 * u32Index) + 0x10;
511 FMC->ISPADDR = u32PageAddr;
517 while ((--tout > 0) &&
FMC->ISPTRG);
557 FMC->ISPADDR = u32Addr;
558 FMC->ISPDAT = i32Size;
564 while ((--tout > 0) &&
FMC->ISPTRG);
568 while ((--tout > 0) &&
FMC->ISPTRG);
591 volatile uint32_t *pu32IspData;
598 FMC->ISPADDR = u32Addr;
605 FMC->MPDAT0 = pu32Buf[idx + 0];
606 FMC->MPDAT1 = pu32Buf[idx + 1];
607 FMC->MPDAT2 = pu32Buf[idx + 2];
608 FMC->MPDAT3 = pu32Buf[idx + 3];
614 pu32IspData = &
FMC->MPDAT0;
617 for(i = idx; i < 256 / 4; i += 4)
627 FMC->ISPADDR =
FMC->MPADDR & (~0xful);
628 idx = (
FMC->ISPADDR - u32Addr) / 4;
636 pu32IspData[0] = pu32Buf[i ];
637 pu32IspData[1] = pu32Buf[i + 1];
645 FMC->ISPADDR =
FMC->MPADDR & (~0xful);
646 idx = (
FMC->ISPADDR - u32Addr) / 4;
659 pu32IspData[2] = pu32Buf[i + 2];
660 pu32IspData[3] = pu32Buf[i + 3];
#define FMC_ISPSTS_VECMAP_Msk
#define FMC_ISPSTS_ISPBUSY_Msk
#define FMC_ISPCTL_ISPFF_Msk
#define FMC_ISPTRG_ISPGO_Msk
#define FMC_MPSTS_MPBUSY_Msk
NuMicro peripheral access layer header file.
#define FMC_TIMEOUT_ERASE
#define FMC_ISPCMD_PROGRAM
#define FMC_ISPCMD_WRITE_8
#define FMC_ISPCMD_CAL_CHECKSUM
#define FMC_ISPCMD_READ_DID
#define FMC_ISPCMD_CHECKSUM
#define FMC_ISPCMD_READ_CID
#define FMC_ISPCMD_VECMAP
#define FMC_ISPCMD_MULTI_PROG
#define FMC_TIMEOUT_WRITE
#define FMC_ISPCMD_READ_UID
#define FMC_ISPCMD_PAGE_ERASE
void FMC_DisableLDUpdate(void)
Disable LDROM update function.
void FMC_Close(void)
Disable ISP Functions.
void FMC_EnableLDUpdate(void)
Enable LDROM update function.
int32_t FMC_ReadConfig(uint32_t *u32Config, uint32_t u32Count)
Read the User Configuration words.
static __INLINE uint32_t FMC_ReadUCID(uint32_t u32Index)
To read UCID.
void FMC_DisableFreqOptimizeMode(void)
Disable Flash Access Frequency Optimization Mode.
void FMC_EnableAPUpdate(void)
Enable APROM update function.
static __INLINE uint32_t FMC_GetVECMAP(void)
Get current vector mapping address.
static __INLINE void FMC_Write(uint32_t u32Addr, uint32_t u32Data)
Program 32-bit data into specified address of flash.
static __INLINE void FMC_Write256(uint32_t u32Addr, uint32_t *pu32Buf)
Program Multi-Word data into specified address of flash.
uint32_t FMC_ReadDataFlashBaseAddr(void)
Get the base address of Data Flash if enabled.
void FMC_EnableFreqOptimizeMode(uint32_t u32Mode)
Enable Flash Access Frequency Optimization Mode.
void FMC_SetBootSource(int32_t i32BootSrc)
Set boot source from LDROM or APROM after next software reset.
void FMC_DisableAPUpdate(void)
Disable APROM update function.
static __INLINE uint32_t FMC_ReadUID(uint8_t u8Index)
Read Unique ID.
static __INLINE void FMC_SetVectorPageAddr(uint32_t u32PageAddr)
Set vector mapping address.
int32_t FMC_GetBootSource(void)
Get the current boot source.
int32_t FMC_WriteConfig(uint32_t *u32Config, uint32_t u32Count)
Write User Configuration.
static __INLINE uint32_t FMC_ReadCID(void)
Read company ID.
void FMC_DisableConfigUpdate(void)
Disable User Configuration update function.
void FMC_Open(void)
Enable FMC ISP function.
static __INLINE int32_t FMC_Erase(uint32_t u32Addr)
Flash page erase.
void FMC_EnableConfigUpdate(void)
Enable User Configuration update function.
static __INLINE void FMC_Write8(uint32_t u32Addr, uint32_t u32Data0, uint32_t u32Data1)
Program 64-bit data into specified address of flash.
static __INLINE uint32_t FMC_ReadPID(void)
Read product ID.
static __INLINE uint32_t FMC_GetCheckSum(uint32_t u32Addr, int32_t i32Size)
Get Flash Checksum.
static __INLINE uint32_t FMC_Read(uint32_t u32Addr)
Read 32-bit Data from specified address of flash.