M471M/R1/S BSP V3.01.000
The Board Support Package for M4521
Data Fields
CLK_T Struct Reference

#include <M471M_R1_S.h>

Data Fields

__IO uint32_t PWRCTL
 
__IO uint32_t AHBCLK
 
__IO uint32_t APBCLK0
 
__IO uint32_t APBCLK1
 
__IO uint32_t CLKSEL0
 
__IO uint32_t CLKSEL1
 
__IO uint32_t CLKSEL2
 
__IO uint32_t CLKSEL3
 
__IO uint32_t CLKDIV0
 
__IO uint32_t CLKDIV1
 
__I uint32_t RESERVE0 [6]
 
__IO uint32_t PLLCTL
 
__I uint32_t RESERVE1 [3]
 
__I uint32_t STATUS
 
__I uint32_t RESERVE2 [3]
 
__IO uint32_t CLKOCTL
 
__I uint32_t RESERVE3 [3]
 
__IO uint32_t CLKDCTL
 
__IO uint32_t CLKDSTS
 
__IO uint32_t CDUPB
 
__IO uint32_t CDLOWB
 

Detailed Description

@addtogroup CLK System Clock Controller(CLK)
Memory Mapped Structure for CLK Controller

Definition at line 952 of file M471M_R1_S.h.


The documentation for this struct was generated from the following file: