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M471M/R1/S BSP V3.01.000
The Board Support Package for M4521
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Macros | |
#define | SPI_CLR_UNIT_TRANS_INT_FLAG(spi) ((spi)->STATUS = SPI_STATUS_UNITIF_Msk) |
Clear the unit transfer interrupt flag. More... | |
#define | SPI_DISABLE_2BIT_MODE(spi) ((spi)->CTL &= ~SPI_CTL_TWOBIT_Msk) |
Disable 2-bit Transfer mode. More... | |
#define | SPI_DISABLE_3WIRE_MODE(spi) ((spi)->SSCTL &= ~SPI_SSCTL_SLV3WIRE_Msk) |
Disable Slave 3-wire mode. More... | |
#define | SPI_DISABLE_DUAL_MODE(spi) ((spi)->CTL &= ~SPI_CTL_DUALIOEN_Msk) |
Disable Dual I/O mode. More... | |
#define | SPI_DISABLE_QUAD_MODE(spi) ((spi)->CTL &= ~SPI_CTL_QUADIOEN_Msk) |
Disable Quad I/O mode. More... | |
#define | SPI_ENABLE_2BIT_MODE(spi) ((spi)->CTL |= SPI_CTL_TWOBIT_Msk) |
Enable 2-bit Transfer mode. More... | |
#define | SPI_ENABLE_3WIRE_MODE(spi) ((spi)->SSCTL |= SPI_SSCTL_SLV3WIRE_Msk) |
Enable Slave 3-wire mode. More... | |
#define | SPI_ENABLE_DUAL_INPUT_MODE(spi) ((spi)->CTL = ((spi)->CTL & (~SPI_CTL_QDIODIR_Msk)) | SPI_CTL_DUALIOEN_Msk) |
Enable Dual input mode. More... | |
#define | SPI_ENABLE_DUAL_OUTPUT_MODE(spi) ((spi)->CTL |= (SPI_CTL_QDIODIR_Msk | SPI_CTL_DUALIOEN_Msk)) |
Enable Dual output mode. More... | |
#define | SPI_ENABLE_QUAD_INPUT_MODE(spi) ((spi)->CTL = ((spi)->CTL & (~SPI_CTL_QDIODIR_Msk)) | SPI_CTL_QUADIOEN_Msk) |
Enable Quad input mode. More... | |
#define | SPI_ENABLE_QUAD_OUTPUT_MODE(spi) ((spi)->CTL |= (SPI_CTL_QDIODIR_Msk | SPI_CTL_QUADIOEN_Msk)) |
Enable Quad output mode. More... | |
#define | SPI_TRIGGER_RX_PDMA(spi) ((spi)->PDMACTL |= SPI_PDMACTL_RXPDMAEN_Msk) |
Trigger RX PDMA function. More... | |
#define | SPI_TRIGGER_TX_PDMA(spi) ((spi)->PDMACTL |= SPI_PDMACTL_TXPDMAEN_Msk) |
Trigger TX PDMA function. More... | |
#define | SPI_DISABLE_RX_PDMA(spi) ( (spi)->PDMACTL &= ~SPI_PDMACTL_RXPDMAEN_Msk ) |
Disable RX PDMA transfer. More... | |
#define | SPI_DISABLE_TX_PDMA(spi) ( (spi)->PDMACTL &= ~SPI_PDMACTL_TXPDMAEN_Msk ) |
Disable TX PDMA transfer. More... | |
#define | SPI_GET_RX_FIFO_COUNT(spi) (((spi)->STATUS & SPI_STATUS_RXCNT_Msk) >> SPI_STATUS_RXCNT_Pos) |
Get the count of available data in RX FIFO. More... | |
#define | SPI_GET_RX_FIFO_EMPTY_FLAG(spi) (((spi)->STATUS & SPI_STATUS_RXEMPTY_Msk)>>SPI_STATUS_RXEMPTY_Pos) |
Get the RX FIFO empty flag. More... | |
#define | SPI_GET_TX_FIFO_EMPTY_FLAG(spi) (((spi)->STATUS & SPI_STATUS_TXEMPTY_Msk)>>SPI_STATUS_TXEMPTY_Pos) |
Get the TX FIFO empty flag. More... | |
#define | SPI_GET_TX_FIFO_FULL_FLAG(spi) (((spi)->STATUS & SPI_STATUS_TXFULL_Msk)>>SPI_STATUS_TXFULL_Pos) |
Get the TX FIFO full flag. More... | |
#define | SPI_READ_RX(spi) ((spi)->RX) |
Get the datum read from RX register. More... | |
#define | SPI_WRITE_TX(spi, u32TxData) ((spi)->TX = (u32TxData)) |
Write datum to TX register. More... | |
#define | SPI_SET_SS_HIGH(spi) ((spi)->SSCTL = ((spi)->SSCTL & (~SPI_SSCTL_AUTOSS_Msk)) | (SPI_SSCTL_SSACTPOL_Msk | SPI_SSCTL_SS_Msk)) |
Set SPIn_SS pin to high state. More... | |
#define | SPI_SET_SS_LOW(spi) ((spi)->SSCTL = ((spi)->SSCTL & (~(SPI_SSCTL_AUTOSS_Msk | SPI_SSCTL_SSACTPOL_Msk))) | SPI_SSCTL_SS_Msk) |
Set SPIn_SS pin to low state. More... | |
#define | SPI_ENABLE_BYTE_REORDER(spi) ((spi)->CTL |= SPI_CTL_REORDER_Msk) |
Enable Byte Reorder function. More... | |
#define | SPI_DISABLE_BYTE_REORDER(spi) ((spi)->CTL &= ~SPI_CTL_REORDER_Msk) |
Disable Byte Reorder function. More... | |
#define | SPI_SET_SUSPEND_CYCLE(spi, u32SuspCycle) ((spi)->CTL = ((spi)->CTL & ~SPI_CTL_SUSPITV_Msk) | ((u32SuspCycle) << SPI_CTL_SUSPITV_Pos)) |
Set the length of suspend interval. More... | |
#define | SPI_SET_LSB_FIRST(spi) ((spi)->CTL |= SPI_CTL_LSB_Msk) |
Set the SPI transfer sequence with LSB first. More... | |
#define | SPI_SET_MSB_FIRST(spi) ((spi)->CTL &= ~SPI_CTL_LSB_Msk) |
Set the SPI transfer sequence with MSB first. More... | |
#define | SPI_SET_DATA_WIDTH(spi, u32Width) ((spi)->CTL = ((spi)->CTL & ~SPI_CTL_DWIDTH_Msk) | (((u32Width)&0x1F) << SPI_CTL_DWIDTH_Pos)) |
Set the data width of a SPI transaction. More... | |
#define | SPI_IS_BUSY(spi) ( ((spi)->STATUS & SPI_STATUS_BUSY_Msk)>>SPI_STATUS_BUSY_Pos ) |
Get the SPI busy state. More... | |
#define | SPI_ENABLE(spi) ((spi)->CTL |= SPI_CTL_SPIEN_Msk) |
Enable SPI controller. More... | |
#define | SPI_DISABLE(spi) ((spi)->CTL &= ~SPI_CTL_SPIEN_Msk) |
Disable SPI controller. More... | |
Functions | |
uint32_t | SPI_Open (SPI_T *spi, uint32_t u32MasterSlave, uint32_t u32SPIMode, uint32_t u32DataWidth, uint32_t u32BusClock) |
This function make SPI module be ready to transfer. More... | |
void | SPI_Close (SPI_T *spi) |
Disable SPI controller. More... | |
void | SPI_ClearRxFIFO (SPI_T *spi) |
Clear RX FIFO buffer. More... | |
void | SPI_ClearTxFIFO (SPI_T *spi) |
Clear TX FIFO buffer. More... | |
void | SPI_DisableAutoSS (SPI_T *spi) |
Disable the automatic slave selection function. More... | |
void | SPI_EnableAutoSS (SPI_T *spi, uint32_t u32SSPinMask, uint32_t u32ActiveLevel) |
Enable the automatic slave selection function. More... | |
uint32_t | SPI_SetBusClock (SPI_T *spi, uint32_t u32BusClock) |
Set the SPI bus clock. More... | |
void | SPI_SetFIFO (SPI_T *spi, uint32_t u32TxThreshold, uint32_t u32RxThreshold) |
Configure FIFO threshold setting. More... | |
uint32_t | SPI_GetBusClock (SPI_T *spi) |
Get the actual frequency of SPI bus clock. Only available in Master mode. More... | |
void | SPI_EnableInt (SPI_T *spi, uint32_t u32Mask) |
Enable interrupt function. More... | |
void | SPI_DisableInt (SPI_T *spi, uint32_t u32Mask) |
Disable interrupt function. More... | |
uint32_t | SPI_GetIntFlag (SPI_T *spi, uint32_t u32Mask) |
Get interrupt flag. More... | |
void | SPI_ClearIntFlag (SPI_T *spi, uint32_t u32Mask) |
Clear interrupt flag. More... | |
uint32_t | SPI_GetStatus (SPI_T *spi, uint32_t u32Mask) |
Get SPI status. More... | |
#define SPI_CLR_UNIT_TRANS_INT_FLAG | ( | spi | ) | ((spi)->STATUS = SPI_STATUS_UNITIF_Msk) |
#define SPI_DISABLE | ( | spi | ) | ((spi)->CTL &= ~SPI_CTL_SPIEN_Msk) |
#define SPI_DISABLE_2BIT_MODE | ( | spi | ) | ((spi)->CTL &= ~SPI_CTL_TWOBIT_Msk) |
#define SPI_DISABLE_3WIRE_MODE | ( | spi | ) | ((spi)->SSCTL &= ~SPI_SSCTL_SLV3WIRE_Msk) |
#define SPI_DISABLE_BYTE_REORDER | ( | spi | ) | ((spi)->CTL &= ~SPI_CTL_REORDER_Msk) |
#define SPI_DISABLE_DUAL_MODE | ( | spi | ) | ((spi)->CTL &= ~SPI_CTL_DUALIOEN_Msk) |
#define SPI_DISABLE_QUAD_MODE | ( | spi | ) | ((spi)->CTL &= ~SPI_CTL_QUADIOEN_Msk) |
#define SPI_DISABLE_RX_PDMA | ( | spi | ) | ( (spi)->PDMACTL &= ~SPI_PDMACTL_RXPDMAEN_Msk ) |
#define SPI_DISABLE_TX_PDMA | ( | spi | ) | ( (spi)->PDMACTL &= ~SPI_PDMACTL_TXPDMAEN_Msk ) |
#define SPI_ENABLE | ( | spi | ) | ((spi)->CTL |= SPI_CTL_SPIEN_Msk) |
#define SPI_ENABLE_2BIT_MODE | ( | spi | ) | ((spi)->CTL |= SPI_CTL_TWOBIT_Msk) |
#define SPI_ENABLE_3WIRE_MODE | ( | spi | ) | ((spi)->SSCTL |= SPI_SSCTL_SLV3WIRE_Msk) |
#define SPI_ENABLE_BYTE_REORDER | ( | spi | ) | ((spi)->CTL |= SPI_CTL_REORDER_Msk) |
#define SPI_ENABLE_DUAL_INPUT_MODE | ( | spi | ) | ((spi)->CTL = ((spi)->CTL & (~SPI_CTL_QDIODIR_Msk)) | SPI_CTL_DUALIOEN_Msk) |
#define SPI_ENABLE_DUAL_OUTPUT_MODE | ( | spi | ) | ((spi)->CTL |= (SPI_CTL_QDIODIR_Msk | SPI_CTL_DUALIOEN_Msk)) |
#define SPI_ENABLE_QUAD_INPUT_MODE | ( | spi | ) | ((spi)->CTL = ((spi)->CTL & (~SPI_CTL_QDIODIR_Msk)) | SPI_CTL_QUADIOEN_Msk) |
#define SPI_ENABLE_QUAD_OUTPUT_MODE | ( | spi | ) | ((spi)->CTL |= (SPI_CTL_QDIODIR_Msk | SPI_CTL_QUADIOEN_Msk)) |
#define SPI_GET_RX_FIFO_COUNT | ( | spi | ) | (((spi)->STATUS & SPI_STATUS_RXCNT_Msk) >> SPI_STATUS_RXCNT_Pos) |
#define SPI_GET_RX_FIFO_EMPTY_FLAG | ( | spi | ) | (((spi)->STATUS & SPI_STATUS_RXEMPTY_Msk)>>SPI_STATUS_RXEMPTY_Pos) |
#define SPI_GET_TX_FIFO_EMPTY_FLAG | ( | spi | ) | (((spi)->STATUS & SPI_STATUS_TXEMPTY_Msk)>>SPI_STATUS_TXEMPTY_Pos) |
#define SPI_GET_TX_FIFO_FULL_FLAG | ( | spi | ) | (((spi)->STATUS & SPI_STATUS_TXFULL_Msk)>>SPI_STATUS_TXFULL_Pos) |
#define SPI_IS_BUSY | ( | spi | ) | ( ((spi)->STATUS & SPI_STATUS_BUSY_Msk)>>SPI_STATUS_BUSY_Pos ) |
#define SPI_READ_RX | ( | spi | ) | ((spi)->RX) |
#define SPI_SET_DATA_WIDTH | ( | spi, | |
u32Width | |||
) | ((spi)->CTL = ((spi)->CTL & ~SPI_CTL_DWIDTH_Msk) | (((u32Width)&0x1F) << SPI_CTL_DWIDTH_Pos)) |
#define SPI_SET_LSB_FIRST | ( | spi | ) | ((spi)->CTL |= SPI_CTL_LSB_Msk) |
#define SPI_SET_MSB_FIRST | ( | spi | ) | ((spi)->CTL &= ~SPI_CTL_LSB_Msk) |
#define SPI_SET_SS_HIGH | ( | spi | ) | ((spi)->SSCTL = ((spi)->SSCTL & (~SPI_SSCTL_AUTOSS_Msk)) | (SPI_SSCTL_SSACTPOL_Msk | SPI_SSCTL_SS_Msk)) |
#define SPI_SET_SS_LOW | ( | spi | ) | ((spi)->SSCTL = ((spi)->SSCTL & (~(SPI_SSCTL_AUTOSS_Msk | SPI_SSCTL_SSACTPOL_Msk))) | SPI_SSCTL_SS_Msk) |
#define SPI_SET_SUSPEND_CYCLE | ( | spi, | |
u32SuspCycle | |||
) | ((spi)->CTL = ((spi)->CTL & ~SPI_CTL_SUSPITV_Msk) | ((u32SuspCycle) << SPI_CTL_SUSPITV_Pos)) |
Set the length of suspend interval.
[in] | spi | The pointer of the specified SPI module. |
[in] | u32SuspCycle | Decides the length of suspend interval. It could be 0 ~ 15. |
Set the length of suspend interval according to u32SuspCycle. The length of suspend interval is ((u32SuspCycle + 0.5) * the length of one SPI bus clock cycle).
#define SPI_TRIGGER_RX_PDMA | ( | spi | ) | ((spi)->PDMACTL |= SPI_PDMACTL_RXPDMAEN_Msk) |
#define SPI_TRIGGER_TX_PDMA | ( | spi | ) | ((spi)->PDMACTL |= SPI_PDMACTL_TXPDMAEN_Msk) |
#define SPI_WRITE_TX | ( | spi, | |
u32TxData | |||
) | ((spi)->TX = (u32TxData)) |
void SPI_ClearIntFlag | ( | SPI_T * | spi, |
uint32_t | u32Mask | ||
) |
Clear interrupt flag.
[in] | spi | The pointer of the specified SPI module. |
[in] | u32Mask | The combination of all related interrupt sources. Each bit corresponds to a interrupt source. This parameter decides which interrupt flags will be cleared. It could be the combination of: |
Clear SPI related interrupt flags specified by u32Mask parameter.
void SPI_ClearRxFIFO | ( | SPI_T * | spi | ) |
void SPI_ClearTxFIFO | ( | SPI_T * | spi | ) |
void SPI_Close | ( | SPI_T * | spi | ) |
void SPI_DisableAutoSS | ( | SPI_T * | spi | ) |
void SPI_DisableInt | ( | SPI_T * | spi, |
uint32_t | u32Mask | ||
) |
Disable interrupt function.
[in] | spi | The pointer of the specified SPI module. |
[in] | u32Mask | The combination of all related interrupt enable bits. Each bit corresponds to a interrupt bit. This parameter decides which interrupts will be disabled. It is combination of: |
Disable SPI related interrupts specified by u32Mask parameter.
void SPI_EnableAutoSS | ( | SPI_T * | spi, |
uint32_t | u32SSPinMask, | ||
uint32_t | u32ActiveLevel | ||
) |
Enable the automatic slave selection function.
[in] | spi | The pointer of the specified SPI module. |
[in] | u32SSPinMask | Specifies slave selection pins. (SPI_SS) |
[in] | u32ActiveLevel | Specifies the active level of slave selection signal. (SPI_SS_ACTIVE_HIGH, SPI_SS_ACTIVE_LOW) |
This function will enable the automatic slave selection function. Only available in Master mode. The slave selection pin and the active level will be set in this function.
void SPI_EnableInt | ( | SPI_T * | spi, |
uint32_t | u32Mask | ||
) |
Enable interrupt function.
[in] | spi | The pointer of the specified SPI module. |
[in] | u32Mask | The combination of all related interrupt enable bits. Each bit corresponds to a interrupt enable bit. This parameter decides which interrupts will be enabled. It is combination of: |
Enable SPI related interrupts specified by u32Mask parameter.
uint32_t SPI_GetBusClock | ( | SPI_T * | spi | ) |
Get the actual frequency of SPI bus clock. Only available in Master mode.
[in] | spi | The pointer of the specified SPI module. |
This function will calculate the actual SPI bus clock rate according to the SPInSEL and DIVIDER settings. Only available in Master mode.
Definition at line 380 of file spi.c.
uint32_t SPI_GetIntFlag | ( | SPI_T * | spi, |
uint32_t | u32Mask | ||
) |
Get interrupt flag.
[in] | spi | The pointer of the specified SPI module. |
[in] | u32Mask | The combination of all related interrupt sources. Each bit corresponds to a interrupt source. This parameter decides which interrupt flags will be read. It is combination of: |
Get SPI related interrupt flags specified by u32Mask parameter.
uint32_t SPI_GetStatus | ( | SPI_T * | spi, |
uint32_t | u32Mask | ||
) |
Get SPI status.
[in] | spi | The pointer of the specified SPI module. |
[in] | u32Mask | The combination of all related sources. Each bit corresponds to a source. This parameter decides which flags will be read. It is combination of: |
Get SPI related status specified by u32Mask parameter.
uint32_t SPI_Open | ( | SPI_T * | spi, |
uint32_t | u32MasterSlave, | ||
uint32_t | u32SPIMode, | ||
uint32_t | u32DataWidth, | ||
uint32_t | u32BusClock | ||
) |
This function make SPI module be ready to transfer.
[in] | spi | The pointer of the specified SPI module. |
[in] | u32MasterSlave | Decides the SPI module is operating in master mode or in slave mode. (SPI_SLAVE, SPI_MASTER) |
[in] | u32SPIMode | Decides the transfer timing. (SPI_MODE_0, SPI_MODE_1, SPI_MODE_2, SPI_MODE_3) |
[in] | u32DataWidth | Decides the data width of a SPI transaction. |
[in] | u32BusClock | The expected frequency of SPI bus clock in Hz. |
By default, the SPI transfer sequence is MSB first, the slave selection signal is active low and the automatic slave selection function is disabled. In Slave mode, the u32BusClock shall be NULL and the SPI clock divider setting will be 0. The actual clock rate may be different from the target SPI clock rate. For example, if the SPI source clock rate is 12MHz and the target SPI bus clock rate is 7MHz, the actual SPI clock rate will be 6MHz.
Definition at line 41 of file spi.c.
uint32_t SPI_SetBusClock | ( | SPI_T * | spi, |
uint32_t | u32BusClock | ||
) |
Set the SPI bus clock.
[in] | spi | The pointer of the specified SPI module. |
[in] | u32BusClock | The expected frequency of SPI bus clock in Hz. |
This function is only available in Master mode. The actual clock rate may be different from the target SPI bus clock rate. For example, if the SPI source clock rate is 12MHz and the target SPI bus clock rate is 7MHz, the actual SPI bus clock rate will be 6MHz.
Definition at line 266 of file spi.c.
void SPI_SetFIFO | ( | SPI_T * | spi, |
uint32_t | u32TxThreshold, | ||
uint32_t | u32RxThreshold | ||
) |
Configure FIFO threshold setting.
[in] | spi | The pointer of the specified SPI module. |
[in] | u32TxThreshold | Decides the TX FIFO threshold. For SPI0, it could be 0 ~ 7. For SPI1, it could be 0 ~ 3. |
[in] | u32RxThreshold | Decides the RX FIFO threshold. For SPI0, it could be 0 ~ 7. For SPI1, it could be 0 ~ 3. |
Set TX FIFO threshold and RX FIFO threshold configurations.