M471M/R1/S BSP V3.01.000
The Board Support Package for M4521
Macros | Functions
eadc.h File Reference

M471M/R1/S EADC driver header file. More...

#include "NuMicro.h"
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Macros

#define EADC_CTL_DIFFEN_SINGLE_END   (0UL<<EADC_CTL_DIFFEN_Pos)
 
#define EADC_CTL_DIFFEN_DIFFERENTIAL   (1UL<<EADC_CTL_DIFFEN_Pos)
 
#define EADC_CTL_DMOF_STRAIGHT_BINARY   (0UL<<EADC_CTL_DMOF_Pos)
 
#define EADC_CTL_DMOF_TWOS_COMPLEMENT   (1UL<<EADC_CTL_DMOF_Pos)
 
#define EADC_CTL_SMPTSEL1   (0UL<<EADC_CTL_SMPTSEL_Pos)
 
#define EADC_CTL_SMPTSEL2   (1UL<<EADC_CTL_SMPTSEL_Pos)
 
#define EADC_CTL_SMPTSEL3   (2UL<<EADC_CTL_SMPTSEL_Pos)
 
#define EADC_CTL_SMPTSEL4   (3UL<<EADC_CTL_SMPTSEL_Pos)
 
#define EADC_CTL_SMPTSEL5   (4UL<<EADC_CTL_SMPTSEL_Pos)
 
#define EADC_CTL_SMPTSEL6   (5UL<<EADC_CTL_SMPTSEL_Pos)
 
#define EADC_CTL_SMPTSEL7   (6UL<<EADC_CTL_SMPTSEL_Pos)
 
#define EADC_CTL_SMPTSEL8   (7UL<<EADC_CTL_SMPTSEL_Pos)
 
#define EADC_SCTL_CHSEL(x)   ((x) << EADC_SCTL_CHSEL_Pos)
 
#define EADC_SCTL_TRGDLYDIV(x)   ((x) << EADC_SCTL_TRGDLYDIV_Pos)
 
#define EADC_SCTL_TRGDLYCNT(x)   ((x) << EADC_SCTL_TRGDLYCNT_Pos)
 
#define EADC_SOFTWARE_TRIGGER   (0UL<<EADC_SCTL_TRGSEL_Pos)
 
#define EADC_FALLING_EDGE_TRIGGER   (EADC_SCTL_EXTFEN_Msk | (1UL<<EADC_SCTL_TRGSEL_Pos))
 
#define EADC_RISING_EDGE_TRIGGER   (EADC_SCTL_EXTREN_Msk | (1UL<<EADC_SCTL_TRGSEL_Pos))
 
#define EADC_FALLING_RISING_EDGE_TRIGGER   (EADC_SCTL_EXTFEN_Msk | EADC_SCTL_EXTREN_Msk | (1UL<<EADC_SCTL_TRGSEL_Pos))
 
#define EADC_ADINT0_TRIGGER   (2UL<<EADC_SCTL_TRGSEL_Pos)
 
#define EADC_ADINT1_TRIGGER   (3UL<<EADC_SCTL_TRGSEL_Pos)
 
#define EADC_TIMER0_TRIGGER   (4UL<<EADC_SCTL_TRGSEL_Pos)
 
#define EADC_TIMER1_TRIGGER   (5UL<<EADC_SCTL_TRGSEL_Pos)
 
#define EADC_TIMER2_TRIGGER   (6UL<<EADC_SCTL_TRGSEL_Pos)
 
#define EADC_TIMER3_TRIGGER   (7UL<<EADC_SCTL_TRGSEL_Pos)
 
#define EADC_PWM0TG0_TRIGGER   (8UL<<EADC_SCTL_TRGSEL_Pos)
 
#define EADC_PWM0TG1_TRIGGER   (9UL<<EADC_SCTL_TRGSEL_Pos)
 
#define EADC_PWM0TG2_TRIGGER   (0xAUL<<EADC_SCTL_TRGSEL_Pos)
 
#define EADC_PWM0TG3_TRIGGER   (0xBUL<<EADC_SCTL_TRGSEL_Pos)
 
#define EADC_PWM0TG4_TRIGGER   (0xCUL<<EADC_SCTL_TRGSEL_Pos)
 
#define EADC_PWM0TG5_TRIGGER   (0xDUL<<EADC_SCTL_TRGSEL_Pos)
 
#define EADC_PWM1TG0_TRIGGER   (0xEUL<<EADC_SCTL_TRGSEL_Pos)
 
#define EADC_PWM1TG1_TRIGGER   (0xFUL<<EADC_SCTL_TRGSEL_Pos)
 
#define EADC_PWM1TG2_TRIGGER   (0x10UL<<EADC_SCTL_TRGSEL_Pos)
 
#define EADC_PWM1TG3_TRIGGER   (0x11UL<<EADC_SCTL_TRGSEL_Pos)
 
#define EADC_PWM1TG4_TRIGGER   (0x12UL<<EADC_SCTL_TRGSEL_Pos)
 
#define EADC_PWM1TG5_TRIGGER   (0x13UL<<EADC_SCTL_TRGSEL_Pos)
 
#define EADC_SCTL_TRGDLYDIV_DIVIDER_1   (0<<EADC_SCTL_TRGDLYDIV_Pos)
 
#define EADC_SCTL_TRGDLYDIV_DIVIDER_2   (0x1UL<<EADC_SCTL_TRGDLYDIV_Pos)
 
#define EADC_SCTL_TRGDLYDIV_DIVIDER_4   (0x2UL<<EADC_SCTL_TRGDLYDIV_Pos)
 
#define EADC_SCTL_TRGDLYDIV_DIVIDER_16   (0x3UL<<EADC_SCTL_TRGDLYDIV_Pos)
 
#define EADC_CMP_CMPCOND_LESS_THAN   (0UL<<EADC_CMP_CMPCOND_Pos)
 
#define EADC_CMP_CMPCOND_GREATER_OR_EQUAL   (1UL<<EADC_CMP_CMPCOND_Pos)
 
#define EADC_CMP_CMPWEN_ENABLE   (EADC_CMP_CMPWEN_Msk)
 
#define EADC_CMP_CMPWEN_DISABLE   (~EADC_CMP_CMPWEN_Msk)
 
#define EADC_CMP_ADCMPIE_ENABLE   (EADC_CMP_ADCMPIE_Msk)
 
#define EADC_CMP_ADCMPIE_DISABLE   (~EADC_CMP_ADCMPIE_Msk)
 
#define EADC_CONV_RESET(eadc)   ((eadc)->CTL |= EADC_CTL_ADRST_Msk)
 A/D Converter Control Circuits Reset. More...
 
#define EADC_ENABLE_PDMA(eadc)   ((eadc)->CTL |= EADC_CTL_PDMAEN_Msk)
 Enable PDMA transfer. More...
 
#define EADC_DISABLE_PDMA(eadc)   ((eadc)->CTL &= (~EADC_CTL_PDMAEN_Msk))
 Disable PDMA transfer. More...
 
#define EADC_ENABLE_DOUBLE_BUFFER(eadc, u32ModuleNum)   ((eadc)->SCTL[(u32ModuleNum)] |= EADC_SCTL_DBMEN_Msk)
 Enable double buffer mode. More...
 
#define EADC_DISABLE_DOUBLE_BUFFER(eadc, u32ModuleNum)   ((eadc)->SCTL[(u32ModuleNum)] &= ~EADC_SCTL_DBMEN_Msk)
 Disable double buffer mode. More...
 
#define EADC_ENABLE_INT_POSITION(eadc, u32ModuleNum)   ((eadc)->SCTL[(u32ModuleNum)] |= EADC_SCTL_INTPOS_Msk)
 Set ADIFn at A/D end of conversion. More...
 
#define EADC_DISABLE_INT_POSITION(eadc, u32ModuleNum)   ((eadc)->SCTL[(u32ModuleNum)] &= ~EADC_SCTL_INTPOS_Msk)
 Set ADIFn at A/D start of conversion. More...
 
#define EADC_ENABLE_INT(eadc, u32Mask)   ((eadc)->CTL |= ((u32Mask) << EADC_CTL_ADCIEN0_Pos))
 Enable the interrupt. More...
 
#define EADC_DISABLE_INT(eadc, u32Mask)   ((eadc)->CTL &= ~((u32Mask) << EADC_CTL_ADCIEN0_Pos))
 Disable the interrupt. More...
 
#define EADC_ENABLE_SAMPLE_MODULE_INT(eadc, u32IntSel, u32ModuleMask)   ((eadc)->INTSRC[(u32IntSel)] |= (u32ModuleMask))
 Enable the sample module interrupt. More...
 
#define EADC_DISABLE_SAMPLE_MODULE_INT(eadc, u32IntSel, u32ModuleMask)   ((eadc)->INTSRC[(u32IntSel)] &= ~(u32ModuleMask))
 Disable the sample module interrupt. More...
 
#define EADC_SET_DMOF(eadc, u32Format)   ((eadc)->CTL = ((eadc)->CTL & ~EADC_CTL_DMOF_Msk) | (u32Format))
 Set the input mode output format. More...
 
#define EADC_START_CONV(eadc, u32ModuleMask)   ((eadc)->SWTRG = (u32ModuleMask))
 Start the A/D conversion. More...
 
#define EADC_STOP_CONV(eadc, u32ModuleMask)   ((eadc)->PENDSTS = (u32ModuleMask))
 Cancel the conversion for sample module. More...
 
#define EADC_GET_PENDING_CONV(eadc)   ((eadc)->PENDSTS)
 Get the conversion pending flag. More...
 
#define EADC_GET_CONV_DATA(eadc, u32ModuleNum)   ((eadc)->DAT[(u32ModuleNum)] & EADC_DAT_RESULT_Msk)
 Get the conversion data of the user-specified sample module. More...
 
#define EADC_GET_DATA_OVERRUN_FLAG(eadc, u32ModuleMask)   ((((eadc)->STATUS0 >> EADC_STATUS0_OV_Pos) | ((eadc)->STATUS1 & EADC_STATUS1_OV_Msk)) & (u32ModuleMask))
 Get the data overrun flag of the user-specified sample module. More...
 
#define EADC_GET_DATA_VALID_FLAG(eadc, u32ModuleMask)   ((((eadc)->STATUS0 & EADC_STATUS0_VALID_Msk) | (((eadc)->STATUS1 & EADC_STATUS1_VALID_Msk) << 16)) & (u32ModuleMask))
 Get the data valid flag of the user-specified sample module. More...
 
#define EADC_GET_DOUBLE_DATA(eadc, u32ModuleNum)   ((eadc)->DDAT[(u32ModuleNum)] & EADC_DDAT_RESULT_Msk)
 Get the double data of the user-specified sample module. More...
 
#define EADC_GET_INT_FLAG(eadc, u32Mask)   ((eadc)->STATUS2 & (u32Mask))
 Get the user-specified interrupt flags. More...
 
#define EADC_GET_SAMPLE_MODULE_OV_FLAG(eadc, u32ModuleMask)   ((eadc)->OVSTS & (u32ModuleMask))
 Get the user-specified sample module overrun flags. More...
 
#define EADC_CLR_INT_FLAG(eadc, u32Mask)   ((eadc)->STATUS2 = (u32Mask))
 Clear the selected interrupt status bits. More...
 
#define EADC_CLR_SAMPLE_MODULE_OV_FLAG(eadc, u32ModuleMask)   ((eadc)->OVSTS = (u32ModuleMask))
 Clear the selected sample module overrun status bits. More...
 
#define EADC_IS_DATA_OV(eadc)   (((eadc)->STATUS2 & EADC_STATUS2_AOV_Msk) >> EADC_STATUS2_AOV_Pos)
 Check all sample module A/D result data register overrun flags. More...
 
#define EADC_IS_DATA_VALID(eadc)   (((eadc)->STATUS2 & EADC_STATUS2_AVALID_Msk) >> EADC_STATUS2_AVALID_Pos)
 Check all sample module A/D result data register valid flags. More...
 
#define EADC_IS_SAMPLE_MODULE_OV(eadc)   (((eadc)->STATUS2 & EADC_STATUS2_STOVF_Msk) >> EADC_STATUS2_STOVF_Pos)
 Check all A/D sample module start of conversion overrun flags. More...
 
#define EADC_IS_INT_FLAG_OV(eadc)   (((eadc)->STATUS2 & EADC_STATUS2_ADOVIF_Msk) >> EADC_STATUS2_ADOVIF_Pos)
 Check all A/D interrupt flag overrun bits. More...
 
#define EADC_IS_BUSY(eadc)   (((eadc)->STATUS2 & EADC_STATUS2_BUSY_Msk) >> EADC_STATUS2_BUSY_Pos)
 Get the busy state of EADC. More...
 
#define EADC_ENABLE_CMP0(eadc, u32ModuleNum, u32Condition, u16CMPData, u32MatchCount)
 Configure the comparator 0 and enable it. More...
 
#define EADC_ENABLE_CMP1(eadc, u32ModuleNum, u32Condition, u16CMPData, u32MatchCount)
 Configure the comparator 1 and enable it. More...
 
#define EADC_ENABLE_CMP2(eadc, u32ModuleNum, u32Condition, u16CMPData, u32MatchCount)
 Configure the comparator 2 and enable it. More...
 
#define EADC_ENABLE_CMP3(eadc, u32ModuleNum, u32Condition, u16CMPData, u32MatchCount)
 Configure the comparator 3 and enable it. More...
 
#define EADC_ENABLE_CMP_WINDOW_MODE(eadc, u32CMP)   ((eadc)->CMP[(u32CMP)] |= EADC_CMP_CMPWEN_Msk)
 Enable the compare window mode. More...
 
#define EADC_DISABLE_CMP_WINDOW_MODE(eadc, u32CMP)   ((eadc)->CMP[(u32CMP)] &= ~EADC_CMP_CMPWEN_Msk)
 Disable the compare window mode. More...
 
#define EADC_ENABLE_CMP_INT(eadc, u32CMP)   ((eadc)->CMP[(u32CMP)] |= EADC_CMP_ADCMPIE_Msk)
 Enable the compare interrupt. More...
 
#define EADC_DISABLE_CMP_INT(eadc, u32CMP)   ((eadc)->CMP[(u32CMP)] &= ~EADC_CMP_ADCMPIE_Msk)
 Disable the compare interrupt. More...
 
#define EADC_DISABLE_CMP0(eadc)   ((eadc)->CMP[0] = 0)
 Disable comparator 0. More...
 
#define EADC_DISABLE_CMP1(eadc)   ((eadc)->CMP[1] = 0)
 Disable comparator 1. More...
 
#define EADC_DISABLE_CMP2(eadc)   ((eadc)->CMP[2] = 0)
 Disable comparator 2. More...
 
#define EADC_DISABLE_CMP3(eadc)   ((eadc)->CMP[3] = 0)
 Disable comparator 3. More...
 

Functions

void EADC_Open (EADC_T *eadc, uint32_t u32InputMode)
 This function make EADC_module be ready to convert. More...
 
void EADC_Close (EADC_T *eadc)
 Disable EADC_module. More...
 
void EADC_ConfigSampleModule (EADC_T *eadc, uint32_t u32ModuleNum, uint32_t u32TriggerSrc, uint32_t u32Channel)
 Configure the sample control logic module. More...
 
void EADC_SetTriggerDelayTime (EADC_T *eadc, uint32_t u32ModuleNum, uint32_t u32TriggerDelayTime, uint32_t u32DelayClockDivider)
 Set trigger delay time. More...
 
void EADC_SetInternalSampleTime (EADC_T *eadc, uint32_t u32SampleTime)
 Set ADC internal sample time. More...
 
void EADC_SetExtendSampleTime (EADC_T *eadc, uint32_t u32ModuleNum, uint32_t u32ExtendSampleTime)
 Set ADC extend sample time. More...
 

Detailed Description

M471M/R1/S EADC driver header file.

SPDX-License-Identifier: Apache-2.0

Definition in file eadc.h.