52void CLK_EnableCKO(uint32_t u32ClkSrc, uint32_t u32ClkDiv, uint32_t u32ClkDivBy1En)
74 SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
93 SCB->SCR &= ~SCB_SCR_SLEEPDEEP_Msk;
96 CLK->PWRCTL &= ~CLK_PWRCTL_PDEN_Msk;
215 CLK->CLKDIV0 &= (~CLK_CLKDIV0_HCLKDIV_Msk);
238 CLK->PWRCTL &= ~CLK_PWRCTL_HIRCEN_Msk;
271 CLK->CLKDIV0 = (
CLK->CLKDIV0 & (~CLK_CLKDIV0_HCLKDIV_Msk)) | u32ClkDiv;
274 CLK->CLKSEL0 = (
CLK->CLKSEL0 & (~CLK_CLKSEL0_HCLKSEL_Msk)) | u32ClkSrc;
281 CLK->PWRCTL &= ~CLK_PWRCTL_HIRCEN_Msk;
366 uint32_t u32sel = 0, u32div = 0;
400 CLK->CLKSEL0 = (
CLK->CLKSEL0 & ~CLK_CLKSEL0_STCLKSEL_Msk) | u32ClkSrc;
417 CLK->PWRCTL |= u32ClkMask;
433 CLK->PWRCTL &= ~u32ClkMask;
521 uint32_t u32PllSrcClk, u32NR, u32NF, u32NO, u32CLK_SRC;
522 uint32_t u32Tmp, u32Tmp2, u32Tmp3, u32Min, u32MinNF, u32MinNR;
538 u32PllSrcClk =
__HXT;
569 u32PllFreq = u32PllFreq << 1;
574 u32PllFreq = u32PllFreq << 2;
583 u32Min = (uint32_t) - 1;
586 for(; u32NR <= 33; u32NR++)
588 u32Tmp = u32PllSrcClk / u32NR;
589 if((u32Tmp > 1600000) && (u32Tmp < 16000000))
591 for(u32NF = 2; u32NF <= 513; u32NF++)
593 u32Tmp2 = u32Tmp * u32NF;
594 if((u32Tmp2 >= 200000000) && (u32Tmp2 <= 500000000))
596 u32Tmp3 = (u32Tmp2 > u32PllFreq) ? u32Tmp2 - u32PllFreq : u32PllFreq - u32Tmp2;
613 CLK->PLLCTL = u32CLK_SRC | (u32NO << 14) | ((u32MinNR - 2) << 9) | (u32MinNF - 2);
619 return u32PllSrcClk / ((u32NO + 1) * u32MinNR) * u32MinNF;
663 int32_t i32TimeOutCnt = 2160000;
665 while((
CLK->STATUS & u32ClkMask) != u32ClkMask)
667 if(i32TimeOutCnt-- <= 0)
695 SysTick->CTRL |= SysTick_CTRL_CLKSOURCE_Msk;
697 CLK->CLKSEL0 = (
CLK->CLKSEL0 & ~CLK_CLKSEL0_STCLKSEL_Msk) | u32ClkSrc;
700 SysTick->LOAD = u32Count;
706 SysTick->CTRL |= SysTick_CTRL_TICKINT_Msk | SysTick_CTRL_ENABLE_Msk;
NuMicro peripheral access layer header file.
#define CLK_CLKSEL0_STCLKSEL_HCLK
#define CLK_PLLCTL_PLLSRC_HXT
#define CLK_PLLCTL_72MHz_HXT
#define MODULE_CLKSEL_Msk(x)
#define CLK_CLKDIV0_HCLK(x)
#define CLK_CLKSEL0_HCLKSEL_HIRC
#define CLK_CLKSEL0_HCLKSEL_PLL
#define CLK_PLLCTL_PLLSRC_HIRC
#define MODULE_CLKSEL_Pos(x)
#define MODULE_CLKDIV_Pos(x)
#define MODULE_IP_EN_Pos(x)
#define MODULE_CLKDIV_Msk(x)
#define CLK_PLLCTL_72MHz_HIRC
void CLK_Idle(void)
Enter to Idle mode.
void CLK_SetSysTickClockSrc(uint32_t u32ClkSrc)
Set SysTick clock source.
uint32_t CLK_GetHCLKFreq(void)
Get HCLK frequency.
uint32_t CLK_EnablePLL(uint32_t u32PllClkSrc, uint32_t u32PllFreq)
Set PLL frequency.
void CLK_DisableCKO(void)
Disable clock divider output function.
void CLK_EnableModuleClock(uint32_t u32ModuleIdx)
Enable module clock.
void CLK_EnableCKO(uint32_t u32ClkSrc, uint32_t u32ClkDiv, uint32_t u32ClkDivBy1En)
This function enable clock divider output module clock, enable clock divider output function and set ...
void CLK_DisableModuleClock(uint32_t u32ModuleIdx)
Disable module clock.
uint32_t CLK_WaitClockReady(uint32_t u32ClkMask)
This function check selected clock source status.
uint32_t CLK_GetLXTFreq(void)
Get external low speed crystal clock frequency.
uint32_t CLK_GetPCLK1Freq(void)
Get PCLK1 frequency.
void CLK_PowerDown(void)
Enter to Power-down mode.
uint32_t CLK_GetPCLK0Freq(void)
Get PCLK0 frequency.
void CLK_DisablePLL(void)
Disable PLL.
uint32_t CLK_GetCPUFreq(void)
Get CPU frequency.
void CLK_SetHCLK(uint32_t u32ClkSrc, uint32_t u32ClkDiv)
This function set HCLK clock source and HCLK clock divider.
__STATIC_INLINE uint32_t CLK_GetPLLClockFreq(void)
Get PLL clock frequency.
void CLK_DisableXtalRC(uint32_t u32ClkMask)
Disable clock source.
void CLK_DisableSysTick(void)
Disable System Tick counter.
void CLK_SetModuleClock(uint32_t u32ModuleIdx, uint32_t u32ClkSrc, uint32_t u32ClkDiv)
This function set selected module clock source and module clock divider.
void CLK_EnableXtalRC(uint32_t u32ClkMask)
Enable clock source.
void CLK_EnableSysTick(uint32_t u32ClkSrc, uint32_t u32Count)
Enable System Tick counter.
uint32_t CLK_SetCoreClock(uint32_t u32Hclk)
Set HCLK frequency.
uint32_t CLK_GetHXTFreq(void)
Get external high speed crystal clock frequency.
#define CLK_PWRCTL_LXTEN_Msk
#define CLK_STATUS_PLLSTB_Msk
#define CLK_PWRCTL_PDEN_Msk
#define CLK_CLKOCTL_CLKOEN_Msk
#define CLK_CLKSEL0_PCLK1SEL_Msk
#define CLK_CLKSEL0_HCLKSEL_Msk
#define CLK_PLLCTL_PD_Msk
#define CLK_PWRCTL_HIRCEN_Msk
#define CLK_CLKSEL0_PCLK0SEL_Msk
#define CLK_PWRCTL_HXTEN_Msk
#define CLK_STATUS_HXTSTB_Msk
#define CLK_STATUS_HIRCSTB_Msk
#define CLK_CLKOCTL_DIV1EN_Pos
#define CLK_PWRCTL_PDWTCPU_Msk
void SystemCoreClockUpdate(void)
Updates the SystemCoreClock with current core Clock retrieved from cpu registers.