M471M/R1/S BSP V3.01.000
The Board Support Package for M4521
Modules | Data Structures | Macros | Typedefs | Enumerations
Device CMSIS Definitions
Collaboration diagram for Device CMSIS Definitions:

Modules

 Control Register
 

Data Structures

struct  CLK_T
 

Macros

#define __CM4_REV   0x0201
 
#define __NVIC_PRIO_BITS   4
 
#define __Vendor_SysTickConfig   0
 
#define __MPU_PRESENT   1
 
#define __FPU_PRESENT   1
 

Typedefs

typedef enum IRQn IRQn_Type
 

Enumerations

enum  IRQn {
  NonMaskableInt_IRQn = -14 ,
  MemoryManagement_IRQn = -12 ,
  BusFault_IRQn = -11 ,
  UsageFault_IRQn = -10 ,
  SVCall_IRQn = -5 ,
  DebugMonitor_IRQn = -4 ,
  PendSV_IRQn = -2 ,
  SysTick_IRQn = -1 ,
  BOD_IRQn = 0 ,
  IRC_IRQn = 1 ,
  PWRWU_IRQn = 2 ,
  CKFAIL_IRQn = 4 ,
  RTC_IRQn = 6 ,
  TAMPER_IRQn = 7 ,
  WDT_IRQn = 8 ,
  WWDT_IRQn = 9 ,
  EINT0_IRQn = 10 ,
  EINT1_IRQn = 11 ,
  EINT2_IRQn = 12 ,
  EINT3_IRQn = 13 ,
  EINT4_IRQn = 14 ,
  EINT5_IRQn = 15 ,
  GPA_IRQn = 16 ,
  GPB_IRQn = 17 ,
  GPC_IRQn = 18 ,
  GPD_IRQn = 19 ,
  GPE_IRQn = 20 ,
  GPF_IRQn = 21 ,
  SPI0_IRQn = 22 ,
  SPI1_IRQn = 23 ,
  BRAKE0_IRQn = 24 ,
  PWM0P0_IRQn = 25 ,
  PWM0P1_IRQn = 26 ,
  PWM0P2_IRQn = 27 ,
  BRAKE1_IRQn = 28 ,
  PWM1P0_IRQn = 29 ,
  PWM1P1_IRQn = 30 ,
  PWM1P2_IRQn = 31 ,
  TMR0_IRQn = 32 ,
  TMR1_IRQn = 33 ,
  TMR2_IRQn = 34 ,
  TMR3_IRQn = 35 ,
  UART0_IRQn = 36 ,
  UART1_IRQn = 37 ,
  I2C0_IRQn = 38 ,
  I2C1_IRQn = 39 ,
  PDMA_IRQn = 40 ,
  ADC00_IRQn = 42 ,
  ADC01_IRQn = 43 ,
  ADC02_IRQn = 46 ,
  ADC03_IRQn = 47 ,
  UART2_IRQn = 48 ,
  UART3_IRQn = 49 ,
  USBD_IRQn = 53 ,
  USBH_IRQn = 54 ,
  SC0_IRQn = 58
}
 
#define CLK_PWRCTL_HXTEN_Pos   (0)
 
#define CLK_PWRCTL_HXTEN_Msk   (0x1ul << CLK_PWRCTL_HXTEN_Pos)
 
#define CLK_PWRCTL_LXTEN_Pos   (1)
 
#define CLK_PWRCTL_LXTEN_Msk   (0x1ul << CLK_PWRCTL_LXTEN_Pos)
 
#define CLK_PWRCTL_HIRCEN_Pos   (2)
 
#define CLK_PWRCTL_HIRCEN_Msk   (0x1ul << CLK_PWRCTL_HIRCEN_Pos)
 
#define CLK_PWRCTL_LIRCEN_Pos   (3)
 
#define CLK_PWRCTL_LIRCEN_Msk   (0x1ul << CLK_PWRCTL_LIRCEN_Pos)
 
#define CLK_PWRCTL_PDWKDLY_Pos   (4)
 
#define CLK_PWRCTL_PDWKDLY_Msk   (0x1ul << CLK_PWRCTL_PDWKDLY_Pos)
 
#define CLK_PWRCTL_PDWKIEN_Pos   (5)
 
#define CLK_PWRCTL_PDWKIEN_Msk   (0x1ul << CLK_PWRCTL_PDWKIEN_Pos)
 
#define CLK_PWRCTL_PDWKIF_Pos   (6)
 
#define CLK_PWRCTL_PDWKIF_Msk   (0x1ul << CLK_PWRCTL_PDWKIF_Pos)
 
#define CLK_PWRCTL_PDEN_Pos   (7)
 
#define CLK_PWRCTL_PDEN_Msk   (0x1ul << CLK_PWRCTL_PDEN_Pos)
 
#define CLK_PWRCTL_PDWTCPU_Pos   (8)
 
#define CLK_PWRCTL_PDWTCPU_Msk   (0x1ul << CLK_PWRCTL_PDWTCPU_Pos)
 
#define CLK_PWRCTL_HXTGAIN_Pos   (10)
 
#define CLK_PWRCTL_HXTGAIN_Msk   (0x3ul << CLK_PWRCTL_HXTGAIN_Pos)
 
#define CLK_PWRCTL_HXTSELTYP_Pos   (12)
 
#define CLK_PWRCTL_HXTSELTYP_Msk   (0x1ul << CLK_PWRCTL_HXTSELTYP_Pos)
 
#define CLK_PWRCTL_HIRC48MEN_Pos   (24)
 
#define CLK_PWRCTL_HIRC48MEN_Msk   (0x1ul << CLK_PWRCTL_HIRC48MEN_Pos)
 
#define CLK_AHBCLK_PDMACKEN_Pos   (1)
 
#define CLK_AHBCLK_PDMACKEN_Msk   (0x1ul << CLK_AHBCLK_PDMACKEN_Pos)
 
#define CLK_AHBCLK_ISPCKEN_Pos   (2)
 
#define CLK_AHBCLK_ISPCKEN_Msk   (0x1ul << CLK_AHBCLK_ISPCKEN_Pos)
 
#define CLK_AHBCLK_EBICKEN_Pos   (3)
 
#define CLK_AHBCLK_EBICKEN_Msk   (0x1ul << CLK_AHBCLK_EBICKEN_Pos)
 
#define CLK_AHBCLK_USBHCKEN_Pos   (4)
 
#define CLK_AHBCLK_USBHCKEN_Msk   (0x1ul << CLK_AHBCLK_USBHCKEN_Pos)
 
#define CLK_AHBCLK_CRCCKEN_Pos   (7)
 
#define CLK_AHBCLK_CRCCKEN_Msk   (0x1ul << CLK_AHBCLK_CRCCKEN_Pos)
 
#define CLK_AHBCLK_FMCIDLE_Pos   (15)
 
#define CLK_AHBCLK_FMCIDLE_Msk   (0x1ul << CLK_AHBCLK_FMCIDLE_Pos)
 
#define CLK_APBCLK0_WDTCKEN_Pos   (0)
 
#define CLK_APBCLK0_WDTCKEN_Msk   (0x1ul << CLK_APBCLK0_WDTCKEN_Pos)
 
#define CLK_APBCLK0_RTCCKEN_Pos   (1)
 
#define CLK_APBCLK0_RTCCKEN_Msk   (0x1ul << CLK_APBCLK0_RTCCKEN_Pos)
 
#define CLK_APBCLK0_TMR0CKEN_Pos   (2)
 
#define CLK_APBCLK0_TMR0CKEN_Msk   (0x1ul << CLK_APBCLK0_TMR0CKEN_Pos)
 
#define CLK_APBCLK0_TMR1CKEN_Pos   (3)
 
#define CLK_APBCLK0_TMR1CKEN_Msk   (0x1ul << CLK_APBCLK0_TMR1CKEN_Pos)
 
#define CLK_APBCLK0_TMR2CKEN_Pos   (4)
 
#define CLK_APBCLK0_TMR2CKEN_Msk   (0x1ul << CLK_APBCLK0_TMR2CKEN_Pos)
 
#define CLK_APBCLK0_TMR3CKEN_Pos   (5)
 
#define CLK_APBCLK0_TMR3CKEN_Msk   (0x1ul << CLK_APBCLK0_TMR3CKEN_Pos)
 
#define CLK_APBCLK0_CLKOCKEN_Pos   (6)
 
#define CLK_APBCLK0_CLKOCKEN_Msk   (0x1ul << CLK_APBCLK0_CLKOCKEN_Pos)
 
#define CLK_APBCLK0_I2C0CKEN_Pos   (8)
 
#define CLK_APBCLK0_I2C0CKEN_Msk   (0x1ul << CLK_APBCLK0_I2C0CKEN_Pos)
 
#define CLK_APBCLK0_I2C1CKEN_Pos   (9)
 
#define CLK_APBCLK0_I2C1CKEN_Msk   (0x1ul << CLK_APBCLK0_I2C1CKEN_Pos)
 
#define CLK_APBCLK0_SPI0CKEN_Pos   (12)
 
#define CLK_APBCLK0_SPI0CKEN_Msk   (0x1ul << CLK_APBCLK0_SPI0CKEN_Pos)
 
#define CLK_APBCLK0_SPI1CKEN_Pos   (13)
 
#define CLK_APBCLK0_SPI1CKEN_Msk   (0x1ul << CLK_APBCLK0_SPI1CKEN_Pos)
 
#define CLK_APBCLK0_UART0CKEN_Pos   (16)
 
#define CLK_APBCLK0_UART0CKEN_Msk   (0x1ul << CLK_APBCLK0_UART0CKEN_Pos)
 
#define CLK_APBCLK0_UART1CKEN_Pos   (17)
 
#define CLK_APBCLK0_UART1CKEN_Msk   (0x1ul << CLK_APBCLK0_UART1CKEN_Pos)
 
#define CLK_APBCLK0_UART2CKEN_Pos   (18)
 
#define CLK_APBCLK0_UART2CKEN_Msk   (0x1ul << CLK_APBCLK0_UART2CKEN_Pos)
 
#define CLK_APBCLK0_UART3CKEN_Pos   (19)
 
#define CLK_APBCLK0_UART3CKEN_Msk   (0x1ul << CLK_APBCLK0_UART3CKEN_Pos)
 
#define CLK_APBCLK0_USBDCKEN_Pos   (27)
 
#define CLK_APBCLK0_USBDCKEN_Msk   (0x1ul << CLK_APBCLK0_USBDCKEN_Pos)
 
#define CLK_APBCLK0_EADCCKEN_Pos   (28)
 
#define CLK_APBCLK0_EADCCKEN_Msk   (0x1ul << CLK_APBCLK0_EADCCKEN_Pos)
 
#define CLK_APBCLK1_SC0CKEN_Pos   (0)
 
#define CLK_APBCLK1_SC0CKEN_Msk   (0x1ul << CLK_APBCLK1_SC0CKEN_Pos)
 
#define CLK_APBCLK1_PWM0CKEN_Pos   (16)
 
#define CLK_APBCLK1_PWM0CKEN_Msk   (0x1ul << CLK_APBCLK1_PWM0CKEN_Pos)
 
#define CLK_APBCLK1_PWM1CKEN_Pos   (17)
 
#define CLK_APBCLK1_PWM1CKEN_Msk   (0x1ul << CLK_APBCLK1_PWM1CKEN_Pos)
 
#define CLK_APBCLK1_TKCKEN_Pos   (25)
 
#define CLK_APBCLK1_TKCKEN_Msk   (0x1ul << CLK_APBCLK1_TKCKEN_Pos)
 
#define CLK_CLKSEL0_HCLKSEL_Pos   (0)
 
#define CLK_CLKSEL0_HCLKSEL_Msk   (0x7ul << CLK_CLKSEL0_HCLKSEL_Pos)
 
#define CLK_CLKSEL0_STCLKSEL_Pos   (3)
 
#define CLK_CLKSEL0_STCLKSEL_Msk   (0x7ul << CLK_CLKSEL0_STCLKSEL_Pos)
 
#define CLK_CLKSEL0_PCLK0SEL_Pos   (6)
 
#define CLK_CLKSEL0_PCLK0SEL_Msk   (0x1ul << CLK_CLKSEL0_PCLK0SEL_Pos)
 
#define CLK_CLKSEL0_PCLK1SEL_Pos   (7)
 
#define CLK_CLKSEL0_PCLK1SEL_Msk   (0x1ul << CLK_CLKSEL0_PCLK1SEL_Pos)
 
#define CLK_CLKSEL0_USBCKSEL_Pos   (8)
 
#define CLK_CLKSEL0_USBCKSEL_Msk   (0x1ul << CLK_CLKSEL0_USBCKSEL_Pos)
 
#define CLK_CLKSEL1_WDTSEL_Pos   (0)
 
#define CLK_CLKSEL1_WDTSEL_Msk   (0x3ul << CLK_CLKSEL1_WDTSEL_Pos)
 
#define CLK_CLKSEL1_TMR0SEL_Pos   (8)
 
#define CLK_CLKSEL1_TMR0SEL_Msk   (0x7ul << CLK_CLKSEL1_TMR0SEL_Pos)
 
#define CLK_CLKSEL1_TMR1SEL_Pos   (12)
 
#define CLK_CLKSEL1_TMR1SEL_Msk   (0x7ul << CLK_CLKSEL1_TMR1SEL_Pos)
 
#define CLK_CLKSEL1_TMR2SEL_Pos   (16)
 
#define CLK_CLKSEL1_TMR2SEL_Msk   (0x7ul << CLK_CLKSEL1_TMR2SEL_Pos)
 
#define CLK_CLKSEL1_TMR3SEL_Pos   (20)
 
#define CLK_CLKSEL1_TMR3SEL_Msk   (0x7ul << CLK_CLKSEL1_TMR3SEL_Pos)
 
#define CLK_CLKSEL1_UARTSEL_Pos   (24)
 
#define CLK_CLKSEL1_UARTSEL_Msk   (0x3ul << CLK_CLKSEL1_UARTSEL_Pos)
 
#define CLK_CLKSEL1_CLKOSEL_Pos   (28)
 
#define CLK_CLKSEL1_CLKOSEL_Msk   (0x3ul << CLK_CLKSEL1_CLKOSEL_Pos)
 
#define CLK_CLKSEL1_WWDTSEL_Pos   (30)
 
#define CLK_CLKSEL1_WWDTSEL_Msk   (0x3ul << CLK_CLKSEL1_WWDTSEL_Pos)
 
#define CLK_CLKSEL2_PWM0SEL_Pos   (0)
 
#define CLK_CLKSEL2_PWM0SEL_Msk   (0x1ul << CLK_CLKSEL2_PWM0SEL_Pos)
 
#define CLK_CLKSEL2_PWM1SEL_Pos   (1)
 
#define CLK_CLKSEL2_PWM1SEL_Msk   (0x1ul << CLK_CLKSEL2_PWM1SEL_Pos)
 
#define CLK_CLKSEL2_SPI0SEL_Pos   (2)
 
#define CLK_CLKSEL2_SPI0SEL_Msk   (0x3ul << CLK_CLKSEL2_SPI0SEL_Pos)
 
#define CLK_CLKSEL2_SPI1SEL_Pos   (4)
 
#define CLK_CLKSEL2_SPI1SEL_Msk   (0x3ul << CLK_CLKSEL2_SPI1SEL_Pos)
 
#define CLK_CLKSEL3_SC0SEL_Pos   (0)
 
#define CLK_CLKSEL3_SC0SEL_Msk   (0x3ul << CLK_CLKSEL3_SC0SEL_Pos)
 
#define CLK_CLKSEL3_RTCSEL_Pos   (8)
 
#define CLK_CLKSEL3_RTCSEL_Msk   (0x1ul << CLK_CLKSEL3_RTCSEL_Pos)
 
#define CLK_CLKDIV0_HCLKDIV_Pos   (0)
 
#define CLK_CLKDIV0_HCLKDIV_Msk   (0xful << CLK_CLKDIV0_HCLKDIV_Pos)
 
#define CLK_CLKDIV0_USBDIV_Pos   (4)
 
#define CLK_CLKDIV0_USBDIV_Msk   (0xful << CLK_CLKDIV0_USBDIV_Pos)
 
#define CLK_CLKDIV0_UARTDIV_Pos   (8)
 
#define CLK_CLKDIV0_UARTDIV_Msk   (0xful << CLK_CLKDIV0_UARTDIV_Pos)
 
#define CLK_CLKDIV0_EADCDIV_Pos   (16)
 
#define CLK_CLKDIV0_EADCDIV_Msk   (0xfful << CLK_CLKDIV0_EADCDIV_Pos)
 
#define CLK_CLKDIV1_SC0DIV_Pos   (0)
 
#define CLK_CLKDIV1_SC0DIV_Msk   (0xfful << CLK_CLKDIV1_SC0DIV_Pos)
 
#define CLK_PLLCTL_FBDIV_Pos   (0)
 
#define CLK_PLLCTL_FBDIV_Msk   (0x1fful << CLK_PLLCTL_FBDIV_Pos)
 
#define CLK_PLLCTL_INDIV_Pos   (9)
 
#define CLK_PLLCTL_INDIV_Msk   (0x1ful << CLK_PLLCTL_INDIV_Pos)
 
#define CLK_PLLCTL_OUTDIV_Pos   (14)
 
#define CLK_PLLCTL_OUTDIV_Msk   (0x3ul << CLK_PLLCTL_OUTDIV_Pos)
 
#define CLK_PLLCTL_PD_Pos   (16)
 
#define CLK_PLLCTL_PD_Msk   (0x1ul << CLK_PLLCTL_PD_Pos)
 
#define CLK_PLLCTL_BP_Pos   (17)
 
#define CLK_PLLCTL_BP_Msk   (0x1ul << CLK_PLLCTL_BP_Pos)
 
#define CLK_PLLCTL_OE_Pos   (18)
 
#define CLK_PLLCTL_OE_Msk   (0x1ul << CLK_PLLCTL_OE_Pos)
 
#define CLK_PLLCTL_PLLSRC_Pos   (19)
 
#define CLK_PLLCTL_PLLSRC_Msk   (0x1ul << CLK_PLLCTL_PLLSRC_Pos)
 
#define CLK_PLLCTL_STBSEL_Pos   (23)
 
#define CLK_PLLCTL_STBSEL_Msk   (0x1ul << CLK_PLLCTL_STBSEL_Pos)
 
#define CLK_STATUS_HXTSTB_Pos   (0)
 
#define CLK_STATUS_HXTSTB_Msk   (0x1ul << CLK_STATUS_HXTSTB_Pos)
 
#define CLK_STATUS_LXTSTB_Pos   (1)
 
#define CLK_STATUS_LXTSTB_Msk   (0x1ul << CLK_STATUS_LXTSTB_Pos)
 
#define CLK_STATUS_PLLSTB_Pos   (2)
 
#define CLK_STATUS_PLLSTB_Msk   (0x1ul << CLK_STATUS_PLLSTB_Pos)
 
#define CLK_STATUS_LIRCSTB_Pos   (3)
 
#define CLK_STATUS_LIRCSTB_Msk   (0x1ul << CLK_STATUS_LIRCSTB_Pos)
 
#define CLK_STATUS_HIRCSTB_Pos   (4)
 
#define CLK_STATUS_HIRCSTB_Msk   (0x1ul << CLK_STATUS_HIRCSTB_Pos)
 
#define CLK_STATUS_CLKSFAIL_Pos   (7)
 
#define CLK_STATUS_CLKSFAIL_Msk   (0x1ul << CLK_STATUS_CLKSFAIL_Pos)
 
#define CLK_CLKOCTL_FREQSEL_Pos   (0)
 
#define CLK_CLKOCTL_FREQSEL_Msk   (0xful << CLK_CLKOCTL_FREQSEL_Pos)
 
#define CLK_CLKOCTL_CLKOEN_Pos   (4)
 
#define CLK_CLKOCTL_CLKOEN_Msk   (0x1ul << CLK_CLKOCTL_CLKOEN_Pos)
 
#define CLK_CLKOCTL_DIV1EN_Pos   (5)
 
#define CLK_CLKOCTL_DIV1EN_Msk   (0x1ul << CLK_CLKOCTL_DIV1EN_Pos)
 
#define CLK_CLKOCTL_CLK1HZEN_Pos   (6)
 
#define CLK_CLKOCTL_CLK1HZEN_Msk   (0x1ul << CLK_CLKOCTL_CLK1HZEN_Pos)
 
#define CLK_CLKDCTL_HXTFDEN_Pos   (4)
 
#define CLK_CLKDCTL_HXTFDEN_Msk   (0x1ul << CLK_CLKDCTL_HXTFDEN_Pos)
 
#define CLK_CLKDCTL_HXTFIEN_Pos   (5)
 
#define CLK_CLKDCTL_HXTFIEN_Msk   (0x1ul << CLK_CLKDCTL_HXTFIEN_Pos)
 
#define CLK_CLKDCTL_LXTFDEN_Pos   (12)
 
#define CLK_CLKDCTL_LXTFDEN_Msk   (0x1ul << CLK_CLKDCTL_LXTFDEN_Pos)
 
#define CLK_CLKDCTL_LXTFIEN_Pos   (13)
 
#define CLK_CLKDCTL_LXTFIEN_Msk   (0x1ul << CLK_CLKDCTL_LXTFIEN_Pos)
 
#define CLK_CLKDCTL_HXTFQDEN_Pos   (16)
 
#define CLK_CLKDCTL_HXTFQDEN_Msk   (0x1ul << CLK_CLKDCTL_HXTFQDEN_Pos)
 
#define CLK_CLKDCTL_HXTFQIEN_Pos   (17)
 
#define CLK_CLKDCTL_HXTFQIEN_Msk   (0x1ul << CLK_CLKDCTL_HXTFQIEN_Pos)
 
#define CLK_CLKDSTS_HXTFIF_Pos   (0)
 
#define CLK_CLKDSTS_HXTFIF_Msk   (0x1ul << CLK_CLKDSTS_HXTFIF_Pos)
 
#define CLK_CLKDSTS_LXTFIF_Pos   (1)
 
#define CLK_CLKDSTS_LXTFIF_Msk   (0x1ul << CLK_CLKDSTS_LXTFIF_Pos)
 
#define CLK_CLKDSTS_HXTFQIF_Pos   (8)
 
#define CLK_CLKDSTS_HXTFQIF_Msk   (0x1ul << CLK_CLKDSTS_HXTFQIF_Pos)
 
#define CLK_CDUPB_UPERBD_Pos   (0)
 
#define CLK_CDUPB_UPERBD_Msk   (0x3fful << CLK_CDUPB_UPERBD_Pos)
 
#define CLK_CDLOWB_LOWERBD_Pos   (0)
 
#define CLK_CDLOWB_LOWERBD_Msk   (0x3fful << CLK_CDLOWB_LOWERBD_Pos)
 

Detailed Description

Configuration of the Cortex-M4 Processor and Core Peripherals

Macro Definition Documentation

◆ __CM4_REV

#define __CM4_REV   0x0201

Core Revision r2p1

Definition at line 140 of file M471M_R1_S.h.

◆ __FPU_PRESENT

#define __FPU_PRESENT   1

FPU present or not

Definition at line 144 of file M471M_R1_S.h.

◆ __MPU_PRESENT

#define __MPU_PRESENT   1

MPU present or not

Definition at line 143 of file M471M_R1_S.h.

◆ __NVIC_PRIO_BITS

#define __NVIC_PRIO_BITS   4

Number of Bits used for Priority Levels

Definition at line 141 of file M471M_R1_S.h.

◆ __Vendor_SysTickConfig

#define __Vendor_SysTickConfig   0

Set to 1 if different SysTick Config is used

Definition at line 142 of file M471M_R1_S.h.

◆ CLK_AHBCLK_CRCCKEN_Msk

#define CLK_AHBCLK_CRCCKEN_Msk   (0x1ul << CLK_AHBCLK_CRCCKEN_Pos)

CLK_T::AHBCLK: CRCCKEN Mask

Definition at line 1493 of file M471M_R1_S.h.

◆ CLK_AHBCLK_CRCCKEN_Pos

#define CLK_AHBCLK_CRCCKEN_Pos   (7)

CLK_T::AHBCLK: CRCCKEN Position

Definition at line 1492 of file M471M_R1_S.h.

◆ CLK_AHBCLK_EBICKEN_Msk

#define CLK_AHBCLK_EBICKEN_Msk   (0x1ul << CLK_AHBCLK_EBICKEN_Pos)

CLK_T::AHBCLK: EBICKEN Mask

Definition at line 1487 of file M471M_R1_S.h.

◆ CLK_AHBCLK_EBICKEN_Pos

#define CLK_AHBCLK_EBICKEN_Pos   (3)

CLK_T::AHBCLK: EBICKEN Position

Definition at line 1486 of file M471M_R1_S.h.

◆ CLK_AHBCLK_FMCIDLE_Msk

#define CLK_AHBCLK_FMCIDLE_Msk   (0x1ul << CLK_AHBCLK_FMCIDLE_Pos)

CLK_T::AHBCLK: FMCIDLE Mask

Definition at line 1496 of file M471M_R1_S.h.

◆ CLK_AHBCLK_FMCIDLE_Pos

#define CLK_AHBCLK_FMCIDLE_Pos   (15)

CLK_T::AHBCLK: FMCIDLE Position

Definition at line 1495 of file M471M_R1_S.h.

◆ CLK_AHBCLK_ISPCKEN_Msk

#define CLK_AHBCLK_ISPCKEN_Msk   (0x1ul << CLK_AHBCLK_ISPCKEN_Pos)

CLK_T::AHBCLK: ISPCKEN Mask

Definition at line 1484 of file M471M_R1_S.h.

◆ CLK_AHBCLK_ISPCKEN_Pos

#define CLK_AHBCLK_ISPCKEN_Pos   (2)

CLK_T::AHBCLK: ISPCKEN Position

Definition at line 1483 of file M471M_R1_S.h.

◆ CLK_AHBCLK_PDMACKEN_Msk

#define CLK_AHBCLK_PDMACKEN_Msk   (0x1ul << CLK_AHBCLK_PDMACKEN_Pos)

CLK_T::AHBCLK: PDMACKEN Mask

Definition at line 1481 of file M471M_R1_S.h.

◆ CLK_AHBCLK_PDMACKEN_Pos

#define CLK_AHBCLK_PDMACKEN_Pos   (1)

CLK_T::AHBCLK: PDMACKEN Position

Definition at line 1480 of file M471M_R1_S.h.

◆ CLK_AHBCLK_USBHCKEN_Msk

#define CLK_AHBCLK_USBHCKEN_Msk   (0x1ul << CLK_AHBCLK_USBHCKEN_Pos)

CLK_T::AHBCLK: USBHCKEN Mask

Definition at line 1490 of file M471M_R1_S.h.

◆ CLK_AHBCLK_USBHCKEN_Pos

#define CLK_AHBCLK_USBHCKEN_Pos   (4)

CLK_T::AHBCLK: USBHCKEN Position

Definition at line 1489 of file M471M_R1_S.h.

◆ CLK_APBCLK0_CLKOCKEN_Msk

#define CLK_APBCLK0_CLKOCKEN_Msk   (0x1ul << CLK_APBCLK0_CLKOCKEN_Pos)

CLK_T::APBCLK0: CLKOCKEN Mask

Definition at line 1517 of file M471M_R1_S.h.

◆ CLK_APBCLK0_CLKOCKEN_Pos

#define CLK_APBCLK0_CLKOCKEN_Pos   (6)

CLK_T::APBCLK0: CLKOCKEN Position

Definition at line 1516 of file M471M_R1_S.h.

◆ CLK_APBCLK0_EADCCKEN_Msk

#define CLK_APBCLK0_EADCCKEN_Msk   (0x1ul << CLK_APBCLK0_EADCCKEN_Pos)

CLK_T::APBCLK0: EADCCKEN Mask

Definition at line 1547 of file M471M_R1_S.h.

◆ CLK_APBCLK0_EADCCKEN_Pos

#define CLK_APBCLK0_EADCCKEN_Pos   (28)

CLK_T::APBCLK0: EADCCKEN Position

Definition at line 1546 of file M471M_R1_S.h.

◆ CLK_APBCLK0_I2C0CKEN_Msk

#define CLK_APBCLK0_I2C0CKEN_Msk   (0x1ul << CLK_APBCLK0_I2C0CKEN_Pos)

CLK_T::APBCLK0: I2C0CKEN Mask

Definition at line 1520 of file M471M_R1_S.h.

◆ CLK_APBCLK0_I2C0CKEN_Pos

#define CLK_APBCLK0_I2C0CKEN_Pos   (8)

CLK_T::APBCLK0: I2C0CKEN Position

Definition at line 1519 of file M471M_R1_S.h.

◆ CLK_APBCLK0_I2C1CKEN_Msk

#define CLK_APBCLK0_I2C1CKEN_Msk   (0x1ul << CLK_APBCLK0_I2C1CKEN_Pos)

CLK_T::APBCLK0: I2C1CKEN Mask

Definition at line 1523 of file M471M_R1_S.h.

◆ CLK_APBCLK0_I2C1CKEN_Pos

#define CLK_APBCLK0_I2C1CKEN_Pos   (9)

CLK_T::APBCLK0: I2C1CKEN Position

Definition at line 1522 of file M471M_R1_S.h.

◆ CLK_APBCLK0_RTCCKEN_Msk

#define CLK_APBCLK0_RTCCKEN_Msk   (0x1ul << CLK_APBCLK0_RTCCKEN_Pos)

CLK_T::APBCLK0: RTCCKEN Mask

Definition at line 1502 of file M471M_R1_S.h.

◆ CLK_APBCLK0_RTCCKEN_Pos

#define CLK_APBCLK0_RTCCKEN_Pos   (1)

CLK_T::APBCLK0: RTCCKEN Position

Definition at line 1501 of file M471M_R1_S.h.

◆ CLK_APBCLK0_SPI0CKEN_Msk

#define CLK_APBCLK0_SPI0CKEN_Msk   (0x1ul << CLK_APBCLK0_SPI0CKEN_Pos)

CLK_T::APBCLK0: SPI0CKEN Mask

Definition at line 1526 of file M471M_R1_S.h.

◆ CLK_APBCLK0_SPI0CKEN_Pos

#define CLK_APBCLK0_SPI0CKEN_Pos   (12)

CLK_T::APBCLK0: SPI0CKEN Position

Definition at line 1525 of file M471M_R1_S.h.

◆ CLK_APBCLK0_SPI1CKEN_Msk

#define CLK_APBCLK0_SPI1CKEN_Msk   (0x1ul << CLK_APBCLK0_SPI1CKEN_Pos)

CLK_T::APBCLK0: SPI1CKEN Mask

Definition at line 1529 of file M471M_R1_S.h.

◆ CLK_APBCLK0_SPI1CKEN_Pos

#define CLK_APBCLK0_SPI1CKEN_Pos   (13)

CLK_T::APBCLK0: SPI1CKEN Position

Definition at line 1528 of file M471M_R1_S.h.

◆ CLK_APBCLK0_TMR0CKEN_Msk

#define CLK_APBCLK0_TMR0CKEN_Msk   (0x1ul << CLK_APBCLK0_TMR0CKEN_Pos)

CLK_T::APBCLK0: TMR0CKEN Mask

Definition at line 1505 of file M471M_R1_S.h.

◆ CLK_APBCLK0_TMR0CKEN_Pos

#define CLK_APBCLK0_TMR0CKEN_Pos   (2)

CLK_T::APBCLK0: TMR0CKEN Position

Definition at line 1504 of file M471M_R1_S.h.

◆ CLK_APBCLK0_TMR1CKEN_Msk

#define CLK_APBCLK0_TMR1CKEN_Msk   (0x1ul << CLK_APBCLK0_TMR1CKEN_Pos)

CLK_T::APBCLK0: TMR1CKEN Mask

Definition at line 1508 of file M471M_R1_S.h.

◆ CLK_APBCLK0_TMR1CKEN_Pos

#define CLK_APBCLK0_TMR1CKEN_Pos   (3)

CLK_T::APBCLK0: TMR1CKEN Position

Definition at line 1507 of file M471M_R1_S.h.

◆ CLK_APBCLK0_TMR2CKEN_Msk

#define CLK_APBCLK0_TMR2CKEN_Msk   (0x1ul << CLK_APBCLK0_TMR2CKEN_Pos)

CLK_T::APBCLK0: TMR2CKEN Mask

Definition at line 1511 of file M471M_R1_S.h.

◆ CLK_APBCLK0_TMR2CKEN_Pos

#define CLK_APBCLK0_TMR2CKEN_Pos   (4)

CLK_T::APBCLK0: TMR2CKEN Position

Definition at line 1510 of file M471M_R1_S.h.

◆ CLK_APBCLK0_TMR3CKEN_Msk

#define CLK_APBCLK0_TMR3CKEN_Msk   (0x1ul << CLK_APBCLK0_TMR3CKEN_Pos)

CLK_T::APBCLK0: TMR3CKEN Mask

Definition at line 1514 of file M471M_R1_S.h.

◆ CLK_APBCLK0_TMR3CKEN_Pos

#define CLK_APBCLK0_TMR3CKEN_Pos   (5)

CLK_T::APBCLK0: TMR3CKEN Position

Definition at line 1513 of file M471M_R1_S.h.

◆ CLK_APBCLK0_UART0CKEN_Msk

#define CLK_APBCLK0_UART0CKEN_Msk   (0x1ul << CLK_APBCLK0_UART0CKEN_Pos)

CLK_T::APBCLK0: UART0CKEN Mask

Definition at line 1532 of file M471M_R1_S.h.

◆ CLK_APBCLK0_UART0CKEN_Pos

#define CLK_APBCLK0_UART0CKEN_Pos   (16)

CLK_T::APBCLK0: UART0CKEN Position

Definition at line 1531 of file M471M_R1_S.h.

◆ CLK_APBCLK0_UART1CKEN_Msk

#define CLK_APBCLK0_UART1CKEN_Msk   (0x1ul << CLK_APBCLK0_UART1CKEN_Pos)

CLK_T::APBCLK0: UART1CKEN Mask

Definition at line 1535 of file M471M_R1_S.h.

◆ CLK_APBCLK0_UART1CKEN_Pos

#define CLK_APBCLK0_UART1CKEN_Pos   (17)

CLK_T::APBCLK0: UART1CKEN Position

Definition at line 1534 of file M471M_R1_S.h.

◆ CLK_APBCLK0_UART2CKEN_Msk

#define CLK_APBCLK0_UART2CKEN_Msk   (0x1ul << CLK_APBCLK0_UART2CKEN_Pos)

CLK_T::APBCLK0: UART2CKEN Mask

Definition at line 1538 of file M471M_R1_S.h.

◆ CLK_APBCLK0_UART2CKEN_Pos

#define CLK_APBCLK0_UART2CKEN_Pos   (18)

CLK_T::APBCLK0: UART2CKEN Position

Definition at line 1537 of file M471M_R1_S.h.

◆ CLK_APBCLK0_UART3CKEN_Msk

#define CLK_APBCLK0_UART3CKEN_Msk   (0x1ul << CLK_APBCLK0_UART3CKEN_Pos)

CLK_T::APBCLK0: UART3CKEN Mask

Definition at line 1541 of file M471M_R1_S.h.

◆ CLK_APBCLK0_UART3CKEN_Pos

#define CLK_APBCLK0_UART3CKEN_Pos   (19)

CLK_T::APBCLK0: UART3CKEN Position

Definition at line 1540 of file M471M_R1_S.h.

◆ CLK_APBCLK0_USBDCKEN_Msk

#define CLK_APBCLK0_USBDCKEN_Msk   (0x1ul << CLK_APBCLK0_USBDCKEN_Pos)

CLK_T::APBCLK0: USBDCKEN Mask

Definition at line 1544 of file M471M_R1_S.h.

◆ CLK_APBCLK0_USBDCKEN_Pos

#define CLK_APBCLK0_USBDCKEN_Pos   (27)

CLK_T::APBCLK0: USBDCKEN Position

Definition at line 1543 of file M471M_R1_S.h.

◆ CLK_APBCLK0_WDTCKEN_Msk

#define CLK_APBCLK0_WDTCKEN_Msk   (0x1ul << CLK_APBCLK0_WDTCKEN_Pos)

CLK_T::APBCLK0: WDTCKEN Mask

Definition at line 1499 of file M471M_R1_S.h.

◆ CLK_APBCLK0_WDTCKEN_Pos

#define CLK_APBCLK0_WDTCKEN_Pos   (0)

CLK_T::APBCLK0: WDTCKEN Position

Definition at line 1498 of file M471M_R1_S.h.

◆ CLK_APBCLK1_PWM0CKEN_Msk

#define CLK_APBCLK1_PWM0CKEN_Msk   (0x1ul << CLK_APBCLK1_PWM0CKEN_Pos)

CLK_T::APBCLK1: PWM0CKEN Mask

Definition at line 1553 of file M471M_R1_S.h.

◆ CLK_APBCLK1_PWM0CKEN_Pos

#define CLK_APBCLK1_PWM0CKEN_Pos   (16)

CLK_T::APBCLK1: PWM0CKEN Position

Definition at line 1552 of file M471M_R1_S.h.

◆ CLK_APBCLK1_PWM1CKEN_Msk

#define CLK_APBCLK1_PWM1CKEN_Msk   (0x1ul << CLK_APBCLK1_PWM1CKEN_Pos)

CLK_T::APBCLK1: PWM1CKEN Mask

Definition at line 1556 of file M471M_R1_S.h.

◆ CLK_APBCLK1_PWM1CKEN_Pos

#define CLK_APBCLK1_PWM1CKEN_Pos   (17)

CLK_T::APBCLK1: PWM1CKEN Position

Definition at line 1555 of file M471M_R1_S.h.

◆ CLK_APBCLK1_SC0CKEN_Msk

#define CLK_APBCLK1_SC0CKEN_Msk   (0x1ul << CLK_APBCLK1_SC0CKEN_Pos)

CLK_T::APBCLK1: SC0CKEN Mask

Definition at line 1550 of file M471M_R1_S.h.

◆ CLK_APBCLK1_SC0CKEN_Pos

#define CLK_APBCLK1_SC0CKEN_Pos   (0)

CLK_T::APBCLK1: SC0CKEN Position

Definition at line 1549 of file M471M_R1_S.h.

◆ CLK_APBCLK1_TKCKEN_Msk

#define CLK_APBCLK1_TKCKEN_Msk   (0x1ul << CLK_APBCLK1_TKCKEN_Pos)

CLK_T::APBCLK1: TKCKEN Mask

Definition at line 1559 of file M471M_R1_S.h.

◆ CLK_APBCLK1_TKCKEN_Pos

#define CLK_APBCLK1_TKCKEN_Pos   (25)

CLK_T::APBCLK1: TKCKEN Position

Definition at line 1558 of file M471M_R1_S.h.

◆ CLK_CDLOWB_LOWERBD_Msk

#define CLK_CDLOWB_LOWERBD_Msk   (0x3fful << CLK_CDLOWB_LOWERBD_Pos)

CLK_T::CDLOWB: LOWERBD Mask

Definition at line 1718 of file M471M_R1_S.h.

◆ CLK_CDLOWB_LOWERBD_Pos

#define CLK_CDLOWB_LOWERBD_Pos   (0)

CLK_T::CDLOWB: LOWERBD Position

Definition at line 1717 of file M471M_R1_S.h.

◆ CLK_CDUPB_UPERBD_Msk

#define CLK_CDUPB_UPERBD_Msk   (0x3fful << CLK_CDUPB_UPERBD_Pos)

CLK_T::CDUPB: UPERBD Mask

Definition at line 1715 of file M471M_R1_S.h.

◆ CLK_CDUPB_UPERBD_Pos

#define CLK_CDUPB_UPERBD_Pos   (0)

CLK_T::CDUPB: UPERBD Position

Definition at line 1714 of file M471M_R1_S.h.

◆ CLK_CLKDCTL_HXTFDEN_Msk

#define CLK_CLKDCTL_HXTFDEN_Msk   (0x1ul << CLK_CLKDCTL_HXTFDEN_Pos)

CLK_T::CLKDCTL: HXTFDEN Mask

Definition at line 1688 of file M471M_R1_S.h.

◆ CLK_CLKDCTL_HXTFDEN_Pos

#define CLK_CLKDCTL_HXTFDEN_Pos   (4)

CLK_T::CLKDCTL: HXTFDEN Position

Definition at line 1687 of file M471M_R1_S.h.

◆ CLK_CLKDCTL_HXTFIEN_Msk

#define CLK_CLKDCTL_HXTFIEN_Msk   (0x1ul << CLK_CLKDCTL_HXTFIEN_Pos)

CLK_T::CLKDCTL: HXTFIEN Mask

Definition at line 1691 of file M471M_R1_S.h.

◆ CLK_CLKDCTL_HXTFIEN_Pos

#define CLK_CLKDCTL_HXTFIEN_Pos   (5)

CLK_T::CLKDCTL: HXTFIEN Position

Definition at line 1690 of file M471M_R1_S.h.

◆ CLK_CLKDCTL_HXTFQDEN_Msk

#define CLK_CLKDCTL_HXTFQDEN_Msk   (0x1ul << CLK_CLKDCTL_HXTFQDEN_Pos)

CLK_T::CLKDCTL: HXTFQDEN Mask

Definition at line 1700 of file M471M_R1_S.h.

◆ CLK_CLKDCTL_HXTFQDEN_Pos

#define CLK_CLKDCTL_HXTFQDEN_Pos   (16)

CLK_T::CLKDCTL: HXTFQDEN Position

Definition at line 1699 of file M471M_R1_S.h.

◆ CLK_CLKDCTL_HXTFQIEN_Msk

#define CLK_CLKDCTL_HXTFQIEN_Msk   (0x1ul << CLK_CLKDCTL_HXTFQIEN_Pos)

CLK_T::CLKDCTL: HXTFQIEN Mask

Definition at line 1703 of file M471M_R1_S.h.

◆ CLK_CLKDCTL_HXTFQIEN_Pos

#define CLK_CLKDCTL_HXTFQIEN_Pos   (17)

CLK_T::CLKDCTL: HXTFQIEN Position

Definition at line 1702 of file M471M_R1_S.h.

◆ CLK_CLKDCTL_LXTFDEN_Msk

#define CLK_CLKDCTL_LXTFDEN_Msk   (0x1ul << CLK_CLKDCTL_LXTFDEN_Pos)

CLK_T::CLKDCTL: LXTFDEN Mask

Definition at line 1694 of file M471M_R1_S.h.

◆ CLK_CLKDCTL_LXTFDEN_Pos

#define CLK_CLKDCTL_LXTFDEN_Pos   (12)

CLK_T::CLKDCTL: LXTFDEN Position

Definition at line 1693 of file M471M_R1_S.h.

◆ CLK_CLKDCTL_LXTFIEN_Msk

#define CLK_CLKDCTL_LXTFIEN_Msk   (0x1ul << CLK_CLKDCTL_LXTFIEN_Pos)

CLK_T::CLKDCTL: LXTFIEN Mask

Definition at line 1697 of file M471M_R1_S.h.

◆ CLK_CLKDCTL_LXTFIEN_Pos

#define CLK_CLKDCTL_LXTFIEN_Pos   (13)

CLK_T::CLKDCTL: LXTFIEN Position

Definition at line 1696 of file M471M_R1_S.h.

◆ CLK_CLKDIV0_EADCDIV_Msk

#define CLK_CLKDIV0_EADCDIV_Msk   (0xfful << CLK_CLKDIV0_EADCDIV_Pos)

CLK_T::CLKDIV0: EADCDIV Mask

Definition at line 1628 of file M471M_R1_S.h.

◆ CLK_CLKDIV0_EADCDIV_Pos

#define CLK_CLKDIV0_EADCDIV_Pos   (16)

CLK_T::CLKDIV0: EADCDIV Position

Definition at line 1627 of file M471M_R1_S.h.

◆ CLK_CLKDIV0_HCLKDIV_Msk

#define CLK_CLKDIV0_HCLKDIV_Msk   (0xful << CLK_CLKDIV0_HCLKDIV_Pos)

CLK_T::CLKDIV0: HCLKDIV Mask

Definition at line 1619 of file M471M_R1_S.h.

◆ CLK_CLKDIV0_HCLKDIV_Pos

#define CLK_CLKDIV0_HCLKDIV_Pos   (0)

CLK_T::CLKDIV0: HCLKDIV Position

Definition at line 1618 of file M471M_R1_S.h.

◆ CLK_CLKDIV0_UARTDIV_Msk

#define CLK_CLKDIV0_UARTDIV_Msk   (0xful << CLK_CLKDIV0_UARTDIV_Pos)

CLK_T::CLKDIV0: UARTDIV Mask

Definition at line 1625 of file M471M_R1_S.h.

◆ CLK_CLKDIV0_UARTDIV_Pos

#define CLK_CLKDIV0_UARTDIV_Pos   (8)

CLK_T::CLKDIV0: UARTDIV Position

Definition at line 1624 of file M471M_R1_S.h.

◆ CLK_CLKDIV0_USBDIV_Msk

#define CLK_CLKDIV0_USBDIV_Msk   (0xful << CLK_CLKDIV0_USBDIV_Pos)

CLK_T::CLKDIV0: USBDIV Mask

Definition at line 1622 of file M471M_R1_S.h.

◆ CLK_CLKDIV0_USBDIV_Pos

#define CLK_CLKDIV0_USBDIV_Pos   (4)

CLK_T::CLKDIV0: USBDIV Position

Definition at line 1621 of file M471M_R1_S.h.

◆ CLK_CLKDIV1_SC0DIV_Msk

#define CLK_CLKDIV1_SC0DIV_Msk   (0xfful << CLK_CLKDIV1_SC0DIV_Pos)

CLK_T::CLKDIV1: SC0DIV Mask

Definition at line 1631 of file M471M_R1_S.h.

◆ CLK_CLKDIV1_SC0DIV_Pos

#define CLK_CLKDIV1_SC0DIV_Pos   (0)

CLK_T::CLKDIV1: SC0DIV Position

Definition at line 1630 of file M471M_R1_S.h.

◆ CLK_CLKDSTS_HXTFIF_Msk

#define CLK_CLKDSTS_HXTFIF_Msk   (0x1ul << CLK_CLKDSTS_HXTFIF_Pos)

CLK_T::CLKDSTS: HXTFIF Mask

Definition at line 1706 of file M471M_R1_S.h.

◆ CLK_CLKDSTS_HXTFIF_Pos

#define CLK_CLKDSTS_HXTFIF_Pos   (0)

CLK_T::CLKDSTS: HXTFIF Position

Definition at line 1705 of file M471M_R1_S.h.

◆ CLK_CLKDSTS_HXTFQIF_Msk

#define CLK_CLKDSTS_HXTFQIF_Msk   (0x1ul << CLK_CLKDSTS_HXTFQIF_Pos)

CLK_T::CLKDSTS: HXTFQIF Mask

Definition at line 1712 of file M471M_R1_S.h.

◆ CLK_CLKDSTS_HXTFQIF_Pos

#define CLK_CLKDSTS_HXTFQIF_Pos   (8)

CLK_T::CLKDSTS: HXTFQIF Position

Definition at line 1711 of file M471M_R1_S.h.

◆ CLK_CLKDSTS_LXTFIF_Msk

#define CLK_CLKDSTS_LXTFIF_Msk   (0x1ul << CLK_CLKDSTS_LXTFIF_Pos)

CLK_T::CLKDSTS: LXTFIF Mask

Definition at line 1709 of file M471M_R1_S.h.

◆ CLK_CLKDSTS_LXTFIF_Pos

#define CLK_CLKDSTS_LXTFIF_Pos   (1)

CLK_T::CLKDSTS: LXTFIF Position

Definition at line 1708 of file M471M_R1_S.h.

◆ CLK_CLKOCTL_CLK1HZEN_Msk

#define CLK_CLKOCTL_CLK1HZEN_Msk   (0x1ul << CLK_CLKOCTL_CLK1HZEN_Pos)

CLK_T::CLKOCTL: CLK1HZEN Mask

Definition at line 1685 of file M471M_R1_S.h.

◆ CLK_CLKOCTL_CLK1HZEN_Pos

#define CLK_CLKOCTL_CLK1HZEN_Pos   (6)

CLK_T::CLKOCTL: CLK1HZEN Position

Definition at line 1684 of file M471M_R1_S.h.

◆ CLK_CLKOCTL_CLKOEN_Msk

#define CLK_CLKOCTL_CLKOEN_Msk   (0x1ul << CLK_CLKOCTL_CLKOEN_Pos)

CLK_T::CLKOCTL: CLKOEN Mask

Definition at line 1679 of file M471M_R1_S.h.

◆ CLK_CLKOCTL_CLKOEN_Pos

#define CLK_CLKOCTL_CLKOEN_Pos   (4)

CLK_T::CLKOCTL: CLKOEN Position

Definition at line 1678 of file M471M_R1_S.h.

◆ CLK_CLKOCTL_DIV1EN_Msk

#define CLK_CLKOCTL_DIV1EN_Msk   (0x1ul << CLK_CLKOCTL_DIV1EN_Pos)

CLK_T::CLKOCTL: DIV1EN Mask

Definition at line 1682 of file M471M_R1_S.h.

◆ CLK_CLKOCTL_DIV1EN_Pos

#define CLK_CLKOCTL_DIV1EN_Pos   (5)

CLK_T::CLKOCTL: DIV1EN Position

Definition at line 1681 of file M471M_R1_S.h.

◆ CLK_CLKOCTL_FREQSEL_Msk

#define CLK_CLKOCTL_FREQSEL_Msk   (0xful << CLK_CLKOCTL_FREQSEL_Pos)

CLK_T::CLKOCTL: FREQSEL Mask

Definition at line 1676 of file M471M_R1_S.h.

◆ CLK_CLKOCTL_FREQSEL_Pos

#define CLK_CLKOCTL_FREQSEL_Pos   (0)

CLK_T::CLKOCTL: FREQSEL Position

Definition at line 1675 of file M471M_R1_S.h.

◆ CLK_CLKSEL0_HCLKSEL_Msk

#define CLK_CLKSEL0_HCLKSEL_Msk   (0x7ul << CLK_CLKSEL0_HCLKSEL_Pos)

CLK_T::CLKSEL0: HCLKSEL Mask

Definition at line 1562 of file M471M_R1_S.h.

◆ CLK_CLKSEL0_HCLKSEL_Pos

#define CLK_CLKSEL0_HCLKSEL_Pos   (0)

CLK_T::CLKSEL0: HCLKSEL Position

Definition at line 1561 of file M471M_R1_S.h.

◆ CLK_CLKSEL0_PCLK0SEL_Msk

#define CLK_CLKSEL0_PCLK0SEL_Msk   (0x1ul << CLK_CLKSEL0_PCLK0SEL_Pos)

CLK_T::CLKSEL0: PCLK0SEL Mask

Definition at line 1568 of file M471M_R1_S.h.

◆ CLK_CLKSEL0_PCLK0SEL_Pos

#define CLK_CLKSEL0_PCLK0SEL_Pos   (6)

CLK_T::CLKSEL0: PCLK0SEL Position

Definition at line 1567 of file M471M_R1_S.h.

◆ CLK_CLKSEL0_PCLK1SEL_Msk

#define CLK_CLKSEL0_PCLK1SEL_Msk   (0x1ul << CLK_CLKSEL0_PCLK1SEL_Pos)

CLK_T::CLKSEL0: PCLK1SEL Mask

Definition at line 1571 of file M471M_R1_S.h.

◆ CLK_CLKSEL0_PCLK1SEL_Pos

#define CLK_CLKSEL0_PCLK1SEL_Pos   (7)

CLK_T::CLKSEL0: PCLK1SEL Position

Definition at line 1570 of file M471M_R1_S.h.

◆ CLK_CLKSEL0_STCLKSEL_Msk

#define CLK_CLKSEL0_STCLKSEL_Msk   (0x7ul << CLK_CLKSEL0_STCLKSEL_Pos)

CLK_T::CLKSEL0: STCLKSEL Mask

Definition at line 1565 of file M471M_R1_S.h.

◆ CLK_CLKSEL0_STCLKSEL_Pos

#define CLK_CLKSEL0_STCLKSEL_Pos   (3)

CLK_T::CLKSEL0: STCLKSEL Position

Definition at line 1564 of file M471M_R1_S.h.

◆ CLK_CLKSEL0_USBCKSEL_Msk

#define CLK_CLKSEL0_USBCKSEL_Msk   (0x1ul << CLK_CLKSEL0_USBCKSEL_Pos)

CLK_T::CLKSEL0: USBCKSEL Mask

Definition at line 1574 of file M471M_R1_S.h.

◆ CLK_CLKSEL0_USBCKSEL_Pos

#define CLK_CLKSEL0_USBCKSEL_Pos   (8)

CLK_T::CLKSEL0: USBCKSEL Position

Definition at line 1573 of file M471M_R1_S.h.

◆ CLK_CLKSEL1_CLKOSEL_Msk

#define CLK_CLKSEL1_CLKOSEL_Msk   (0x3ul << CLK_CLKSEL1_CLKOSEL_Pos)

CLK_T::CLKSEL1: CLKOSEL Mask

Definition at line 1595 of file M471M_R1_S.h.

◆ CLK_CLKSEL1_CLKOSEL_Pos

#define CLK_CLKSEL1_CLKOSEL_Pos   (28)

CLK_T::CLKSEL1: CLKOSEL Position

Definition at line 1594 of file M471M_R1_S.h.

◆ CLK_CLKSEL1_TMR0SEL_Msk

#define CLK_CLKSEL1_TMR0SEL_Msk   (0x7ul << CLK_CLKSEL1_TMR0SEL_Pos)

CLK_T::CLKSEL1: TMR0SEL Mask

Definition at line 1580 of file M471M_R1_S.h.

◆ CLK_CLKSEL1_TMR0SEL_Pos

#define CLK_CLKSEL1_TMR0SEL_Pos   (8)

CLK_T::CLKSEL1: TMR0SEL Position

Definition at line 1579 of file M471M_R1_S.h.

◆ CLK_CLKSEL1_TMR1SEL_Msk

#define CLK_CLKSEL1_TMR1SEL_Msk   (0x7ul << CLK_CLKSEL1_TMR1SEL_Pos)

CLK_T::CLKSEL1: TMR1SEL Mask

Definition at line 1583 of file M471M_R1_S.h.

◆ CLK_CLKSEL1_TMR1SEL_Pos

#define CLK_CLKSEL1_TMR1SEL_Pos   (12)

CLK_T::CLKSEL1: TMR1SEL Position

Definition at line 1582 of file M471M_R1_S.h.

◆ CLK_CLKSEL1_TMR2SEL_Msk

#define CLK_CLKSEL1_TMR2SEL_Msk   (0x7ul << CLK_CLKSEL1_TMR2SEL_Pos)

CLK_T::CLKSEL1: TMR2SEL Mask

Definition at line 1586 of file M471M_R1_S.h.

◆ CLK_CLKSEL1_TMR2SEL_Pos

#define CLK_CLKSEL1_TMR2SEL_Pos   (16)

CLK_T::CLKSEL1: TMR2SEL Position

Definition at line 1585 of file M471M_R1_S.h.

◆ CLK_CLKSEL1_TMR3SEL_Msk

#define CLK_CLKSEL1_TMR3SEL_Msk   (0x7ul << CLK_CLKSEL1_TMR3SEL_Pos)

CLK_T::CLKSEL1: TMR3SEL Mask

Definition at line 1589 of file M471M_R1_S.h.

◆ CLK_CLKSEL1_TMR3SEL_Pos

#define CLK_CLKSEL1_TMR3SEL_Pos   (20)

CLK_T::CLKSEL1: TMR3SEL Position

Definition at line 1588 of file M471M_R1_S.h.

◆ CLK_CLKSEL1_UARTSEL_Msk

#define CLK_CLKSEL1_UARTSEL_Msk   (0x3ul << CLK_CLKSEL1_UARTSEL_Pos)

CLK_T::CLKSEL1: UARTSEL Mask

Definition at line 1592 of file M471M_R1_S.h.

◆ CLK_CLKSEL1_UARTSEL_Pos

#define CLK_CLKSEL1_UARTSEL_Pos   (24)

CLK_T::CLKSEL1: UARTSEL Position

Definition at line 1591 of file M471M_R1_S.h.

◆ CLK_CLKSEL1_WDTSEL_Msk

#define CLK_CLKSEL1_WDTSEL_Msk   (0x3ul << CLK_CLKSEL1_WDTSEL_Pos)

CLK_T::CLKSEL1: WDTSEL Mask

Definition at line 1577 of file M471M_R1_S.h.

◆ CLK_CLKSEL1_WDTSEL_Pos

#define CLK_CLKSEL1_WDTSEL_Pos   (0)

CLK_T::CLKSEL1: WDTSEL Position

Definition at line 1576 of file M471M_R1_S.h.

◆ CLK_CLKSEL1_WWDTSEL_Msk

#define CLK_CLKSEL1_WWDTSEL_Msk   (0x3ul << CLK_CLKSEL1_WWDTSEL_Pos)

CLK_T::CLKSEL1: WWDTSEL Mask

Definition at line 1598 of file M471M_R1_S.h.

◆ CLK_CLKSEL1_WWDTSEL_Pos

#define CLK_CLKSEL1_WWDTSEL_Pos   (30)

CLK_T::CLKSEL1: WWDTSEL Position

Definition at line 1597 of file M471M_R1_S.h.

◆ CLK_CLKSEL2_PWM0SEL_Msk

#define CLK_CLKSEL2_PWM0SEL_Msk   (0x1ul << CLK_CLKSEL2_PWM0SEL_Pos)

CLK_T::CLKSEL2: PWM0SEL Mask

Definition at line 1601 of file M471M_R1_S.h.

◆ CLK_CLKSEL2_PWM0SEL_Pos

#define CLK_CLKSEL2_PWM0SEL_Pos   (0)

CLK_T::CLKSEL2: PWM0SEL Position

Definition at line 1600 of file M471M_R1_S.h.

◆ CLK_CLKSEL2_PWM1SEL_Msk

#define CLK_CLKSEL2_PWM1SEL_Msk   (0x1ul << CLK_CLKSEL2_PWM1SEL_Pos)

CLK_T::CLKSEL2: PWM1SEL Mask

Definition at line 1604 of file M471M_R1_S.h.

◆ CLK_CLKSEL2_PWM1SEL_Pos

#define CLK_CLKSEL2_PWM1SEL_Pos   (1)

CLK_T::CLKSEL2: PWM1SEL Position

Definition at line 1603 of file M471M_R1_S.h.

◆ CLK_CLKSEL2_SPI0SEL_Msk

#define CLK_CLKSEL2_SPI0SEL_Msk   (0x3ul << CLK_CLKSEL2_SPI0SEL_Pos)

CLK_T::CLKSEL2: SPI0SEL Mask

Definition at line 1607 of file M471M_R1_S.h.

◆ CLK_CLKSEL2_SPI0SEL_Pos

#define CLK_CLKSEL2_SPI0SEL_Pos   (2)

CLK_T::CLKSEL2: SPI0SEL Position

Definition at line 1606 of file M471M_R1_S.h.

◆ CLK_CLKSEL2_SPI1SEL_Msk

#define CLK_CLKSEL2_SPI1SEL_Msk   (0x3ul << CLK_CLKSEL2_SPI1SEL_Pos)

CLK_T::CLKSEL2: SPI1SEL Mask

Definition at line 1610 of file M471M_R1_S.h.

◆ CLK_CLKSEL2_SPI1SEL_Pos

#define CLK_CLKSEL2_SPI1SEL_Pos   (4)

CLK_T::CLKSEL2: SPI1SEL Position

Definition at line 1609 of file M471M_R1_S.h.

◆ CLK_CLKSEL3_RTCSEL_Msk

#define CLK_CLKSEL3_RTCSEL_Msk   (0x1ul << CLK_CLKSEL3_RTCSEL_Pos)

CLK_T::CLKSEL3: RTCSEL Mask

Definition at line 1616 of file M471M_R1_S.h.

◆ CLK_CLKSEL3_RTCSEL_Pos

#define CLK_CLKSEL3_RTCSEL_Pos   (8)

CLK_T::CLKSEL3: RTCSEL Position

Definition at line 1615 of file M471M_R1_S.h.

◆ CLK_CLKSEL3_SC0SEL_Msk

#define CLK_CLKSEL3_SC0SEL_Msk   (0x3ul << CLK_CLKSEL3_SC0SEL_Pos)

CLK_T::CLKSEL3: SC0SEL Mask

Definition at line 1613 of file M471M_R1_S.h.

◆ CLK_CLKSEL3_SC0SEL_Pos

#define CLK_CLKSEL3_SC0SEL_Pos   (0)

CLK_T::CLKSEL3: SC0SEL Position

Definition at line 1612 of file M471M_R1_S.h.

◆ CLK_PLLCTL_BP_Msk

#define CLK_PLLCTL_BP_Msk   (0x1ul << CLK_PLLCTL_BP_Pos)

CLK_T::PLLCTL: BP Mask

Definition at line 1646 of file M471M_R1_S.h.

◆ CLK_PLLCTL_BP_Pos

#define CLK_PLLCTL_BP_Pos   (17)

CLK_T::PLLCTL: BP Position

Definition at line 1645 of file M471M_R1_S.h.

◆ CLK_PLLCTL_FBDIV_Msk

#define CLK_PLLCTL_FBDIV_Msk   (0x1fful << CLK_PLLCTL_FBDIV_Pos)

CLK_T::PLLCTL: FBDIV Mask

Definition at line 1634 of file M471M_R1_S.h.

◆ CLK_PLLCTL_FBDIV_Pos

#define CLK_PLLCTL_FBDIV_Pos   (0)

CLK_T::PLLCTL: FBDIV Position

Definition at line 1633 of file M471M_R1_S.h.

◆ CLK_PLLCTL_INDIV_Msk

#define CLK_PLLCTL_INDIV_Msk   (0x1ful << CLK_PLLCTL_INDIV_Pos)

CLK_T::PLLCTL: INDIV Mask

Definition at line 1637 of file M471M_R1_S.h.

◆ CLK_PLLCTL_INDIV_Pos

#define CLK_PLLCTL_INDIV_Pos   (9)

CLK_T::PLLCTL: INDIV Position

Definition at line 1636 of file M471M_R1_S.h.

◆ CLK_PLLCTL_OE_Msk

#define CLK_PLLCTL_OE_Msk   (0x1ul << CLK_PLLCTL_OE_Pos)

CLK_T::PLLCTL: OE Mask

Definition at line 1649 of file M471M_R1_S.h.

◆ CLK_PLLCTL_OE_Pos

#define CLK_PLLCTL_OE_Pos   (18)

CLK_T::PLLCTL: OE Position

Definition at line 1648 of file M471M_R1_S.h.

◆ CLK_PLLCTL_OUTDIV_Msk

#define CLK_PLLCTL_OUTDIV_Msk   (0x3ul << CLK_PLLCTL_OUTDIV_Pos)

CLK_T::PLLCTL: OUTDIV Mask

Definition at line 1640 of file M471M_R1_S.h.

◆ CLK_PLLCTL_OUTDIV_Pos

#define CLK_PLLCTL_OUTDIV_Pos   (14)

CLK_T::PLLCTL: OUTDIV Position

Definition at line 1639 of file M471M_R1_S.h.

◆ CLK_PLLCTL_PD_Msk

#define CLK_PLLCTL_PD_Msk   (0x1ul << CLK_PLLCTL_PD_Pos)

CLK_T::PLLCTL: PD Mask

Definition at line 1643 of file M471M_R1_S.h.

◆ CLK_PLLCTL_PD_Pos

#define CLK_PLLCTL_PD_Pos   (16)

CLK_T::PLLCTL: PD Position

Definition at line 1642 of file M471M_R1_S.h.

◆ CLK_PLLCTL_PLLSRC_Msk

#define CLK_PLLCTL_PLLSRC_Msk   (0x1ul << CLK_PLLCTL_PLLSRC_Pos)

CLK_T::PLLCTL: PLLSRC Mask

Definition at line 1652 of file M471M_R1_S.h.

◆ CLK_PLLCTL_PLLSRC_Pos

#define CLK_PLLCTL_PLLSRC_Pos   (19)

CLK_T::PLLCTL: PLLSRC Position

Definition at line 1651 of file M471M_R1_S.h.

◆ CLK_PLLCTL_STBSEL_Msk

#define CLK_PLLCTL_STBSEL_Msk   (0x1ul << CLK_PLLCTL_STBSEL_Pos)

CLK_T::PLLCTL: STBSEL Mask

Definition at line 1655 of file M471M_R1_S.h.

◆ CLK_PLLCTL_STBSEL_Pos

#define CLK_PLLCTL_STBSEL_Pos   (23)

CLK_T::PLLCTL: STBSEL Position

Definition at line 1654 of file M471M_R1_S.h.

◆ CLK_PWRCTL_HIRC48MEN_Msk

#define CLK_PWRCTL_HIRC48MEN_Msk   (0x1ul << CLK_PWRCTL_HIRC48MEN_Pos)

CLK_T::PWRCTL: HIRC48MEN Mask

Definition at line 1478 of file M471M_R1_S.h.

◆ CLK_PWRCTL_HIRC48MEN_Pos

#define CLK_PWRCTL_HIRC48MEN_Pos   (24)

CLK_T::PWRCTL: HIRC48MEN Position

Definition at line 1477 of file M471M_R1_S.h.

◆ CLK_PWRCTL_HIRCEN_Msk

#define CLK_PWRCTL_HIRCEN_Msk   (0x1ul << CLK_PWRCTL_HIRCEN_Pos)

CLK_T::PWRCTL: HIRCEN Mask

Definition at line 1451 of file M471M_R1_S.h.

◆ CLK_PWRCTL_HIRCEN_Pos

#define CLK_PWRCTL_HIRCEN_Pos   (2)

CLK_T::PWRCTL: HIRCEN Position

Definition at line 1450 of file M471M_R1_S.h.

◆ CLK_PWRCTL_HXTEN_Msk

#define CLK_PWRCTL_HXTEN_Msk   (0x1ul << CLK_PWRCTL_HXTEN_Pos)

CLK_T::PWRCTL: HXTEN Mask

Definition at line 1445 of file M471M_R1_S.h.

◆ CLK_PWRCTL_HXTEN_Pos

#define CLK_PWRCTL_HXTEN_Pos   (0)
@addtogroup CLK_CONST CLK Bit Field Definition
Constant Definitions for CLK Controller

CLK_T::PWRCTL: HXTEN Position

Definition at line 1444 of file M471M_R1_S.h.

◆ CLK_PWRCTL_HXTGAIN_Msk

#define CLK_PWRCTL_HXTGAIN_Msk   (0x3ul << CLK_PWRCTL_HXTGAIN_Pos)

CLK_T::PWRCTL: HXTGAIN Mask

Definition at line 1472 of file M471M_R1_S.h.

◆ CLK_PWRCTL_HXTGAIN_Pos

#define CLK_PWRCTL_HXTGAIN_Pos   (10)

CLK_T::PWRCTL: HXTGAIN Position

Definition at line 1471 of file M471M_R1_S.h.

◆ CLK_PWRCTL_HXTSELTYP_Msk

#define CLK_PWRCTL_HXTSELTYP_Msk   (0x1ul << CLK_PWRCTL_HXTSELTYP_Pos)

CLK_T::PWRCTL: HXTSELTYP Mask

Definition at line 1475 of file M471M_R1_S.h.

◆ CLK_PWRCTL_HXTSELTYP_Pos

#define CLK_PWRCTL_HXTSELTYP_Pos   (12)

CLK_T::PWRCTL: HXTSELTYP Position

Definition at line 1474 of file M471M_R1_S.h.

◆ CLK_PWRCTL_LIRCEN_Msk

#define CLK_PWRCTL_LIRCEN_Msk   (0x1ul << CLK_PWRCTL_LIRCEN_Pos)

CLK_T::PWRCTL: LIRCEN Mask

Definition at line 1454 of file M471M_R1_S.h.

◆ CLK_PWRCTL_LIRCEN_Pos

#define CLK_PWRCTL_LIRCEN_Pos   (3)

CLK_T::PWRCTL: LIRCEN Position

Definition at line 1453 of file M471M_R1_S.h.

◆ CLK_PWRCTL_LXTEN_Msk

#define CLK_PWRCTL_LXTEN_Msk   (0x1ul << CLK_PWRCTL_LXTEN_Pos)

CLK_T::PWRCTL: LXTEN Mask

Definition at line 1448 of file M471M_R1_S.h.

◆ CLK_PWRCTL_LXTEN_Pos

#define CLK_PWRCTL_LXTEN_Pos   (1)

CLK_T::PWRCTL: LXTEN Position

Definition at line 1447 of file M471M_R1_S.h.

◆ CLK_PWRCTL_PDEN_Msk

#define CLK_PWRCTL_PDEN_Msk   (0x1ul << CLK_PWRCTL_PDEN_Pos)

CLK_T::PWRCTL: PDEN Mask

Definition at line 1466 of file M471M_R1_S.h.

◆ CLK_PWRCTL_PDEN_Pos

#define CLK_PWRCTL_PDEN_Pos   (7)

CLK_T::PWRCTL: PDEN Position

Definition at line 1465 of file M471M_R1_S.h.

◆ CLK_PWRCTL_PDWKDLY_Msk

#define CLK_PWRCTL_PDWKDLY_Msk   (0x1ul << CLK_PWRCTL_PDWKDLY_Pos)

CLK_T::PWRCTL: PDWKDLY Mask

Definition at line 1457 of file M471M_R1_S.h.

◆ CLK_PWRCTL_PDWKDLY_Pos

#define CLK_PWRCTL_PDWKDLY_Pos   (4)

CLK_T::PWRCTL: PDWKDLY Position

Definition at line 1456 of file M471M_R1_S.h.

◆ CLK_PWRCTL_PDWKIEN_Msk

#define CLK_PWRCTL_PDWKIEN_Msk   (0x1ul << CLK_PWRCTL_PDWKIEN_Pos)

CLK_T::PWRCTL: PDWKIEN Mask

Definition at line 1460 of file M471M_R1_S.h.

◆ CLK_PWRCTL_PDWKIEN_Pos

#define CLK_PWRCTL_PDWKIEN_Pos   (5)

CLK_T::PWRCTL: PDWKIEN Position

Definition at line 1459 of file M471M_R1_S.h.

◆ CLK_PWRCTL_PDWKIF_Msk

#define CLK_PWRCTL_PDWKIF_Msk   (0x1ul << CLK_PWRCTL_PDWKIF_Pos)

CLK_T::PWRCTL: PDWKIF Mask

Definition at line 1463 of file M471M_R1_S.h.

◆ CLK_PWRCTL_PDWKIF_Pos

#define CLK_PWRCTL_PDWKIF_Pos   (6)

CLK_T::PWRCTL: PDWKIF Position

Definition at line 1462 of file M471M_R1_S.h.

◆ CLK_PWRCTL_PDWTCPU_Msk

#define CLK_PWRCTL_PDWTCPU_Msk   (0x1ul << CLK_PWRCTL_PDWTCPU_Pos)

CLK_T::PWRCTL: PDWTCPU Mask

Definition at line 1469 of file M471M_R1_S.h.

◆ CLK_PWRCTL_PDWTCPU_Pos

#define CLK_PWRCTL_PDWTCPU_Pos   (8)

CLK_T::PWRCTL: PDWTCPU Position

Definition at line 1468 of file M471M_R1_S.h.

◆ CLK_STATUS_CLKSFAIL_Msk

#define CLK_STATUS_CLKSFAIL_Msk   (0x1ul << CLK_STATUS_CLKSFAIL_Pos)

CLK_T::STATUS: CLKSFAIL Mask

Definition at line 1673 of file M471M_R1_S.h.

◆ CLK_STATUS_CLKSFAIL_Pos

#define CLK_STATUS_CLKSFAIL_Pos   (7)

CLK_T::STATUS: CLKSFAIL Position

Definition at line 1672 of file M471M_R1_S.h.

◆ CLK_STATUS_HIRCSTB_Msk

#define CLK_STATUS_HIRCSTB_Msk   (0x1ul << CLK_STATUS_HIRCSTB_Pos)

CLK_T::STATUS: HIRCSTB Mask

Definition at line 1670 of file M471M_R1_S.h.

◆ CLK_STATUS_HIRCSTB_Pos

#define CLK_STATUS_HIRCSTB_Pos   (4)

CLK_T::STATUS: HIRCSTB Position

Definition at line 1669 of file M471M_R1_S.h.

◆ CLK_STATUS_HXTSTB_Msk

#define CLK_STATUS_HXTSTB_Msk   (0x1ul << CLK_STATUS_HXTSTB_Pos)

CLK_T::STATUS: HXTSTB Mask

Definition at line 1658 of file M471M_R1_S.h.

◆ CLK_STATUS_HXTSTB_Pos

#define CLK_STATUS_HXTSTB_Pos   (0)

CLK_T::STATUS: HXTSTB Position

Definition at line 1657 of file M471M_R1_S.h.

◆ CLK_STATUS_LIRCSTB_Msk

#define CLK_STATUS_LIRCSTB_Msk   (0x1ul << CLK_STATUS_LIRCSTB_Pos)

CLK_T::STATUS: LIRCSTB Mask

Definition at line 1667 of file M471M_R1_S.h.

◆ CLK_STATUS_LIRCSTB_Pos

#define CLK_STATUS_LIRCSTB_Pos   (3)

CLK_T::STATUS: LIRCSTB Position

Definition at line 1666 of file M471M_R1_S.h.

◆ CLK_STATUS_LXTSTB_Msk

#define CLK_STATUS_LXTSTB_Msk   (0x1ul << CLK_STATUS_LXTSTB_Pos)

CLK_T::STATUS: LXTSTB Mask

Definition at line 1661 of file M471M_R1_S.h.

◆ CLK_STATUS_LXTSTB_Pos

#define CLK_STATUS_LXTSTB_Pos   (1)

CLK_T::STATUS: LXTSTB Position

Definition at line 1660 of file M471M_R1_S.h.

◆ CLK_STATUS_PLLSTB_Msk

#define CLK_STATUS_PLLSTB_Msk   (0x1ul << CLK_STATUS_PLLSTB_Pos)

CLK_T::STATUS: PLLSTB Mask

Definition at line 1664 of file M471M_R1_S.h.

◆ CLK_STATUS_PLLSTB_Pos

#define CLK_STATUS_PLLSTB_Pos   (2)

CLK_T::STATUS: PLLSTB Position

Definition at line 1663 of file M471M_R1_S.h.

Typedef Documentation

◆ IRQn_Type

typedef enum IRQn IRQn_Type

Enumeration Type Documentation

◆ IRQn

enum IRQn
Enumerator
NonMaskableInt_IRQn 

2 Non Maskable Interrupt

MemoryManagement_IRQn 

4 Memory Management Interrupt

BusFault_IRQn 

5 Bus Fault Interrupt

UsageFault_IRQn 

6 Usage Fault Interrupt

SVCall_IRQn 

11 SV Call Interrupt

DebugMonitor_IRQn 

12 Debug Monitor Interrupt

PendSV_IRQn 

14 Pend SV Interrupt

SysTick_IRQn 

15 System Tick Interrupt

BOD_IRQn 

Brown Out detection Interrupt

IRC_IRQn 

Internal RC Interrupt

PWRWU_IRQn 

Power Down Wake Up Interrupt

CKFAIL_IRQn 

Clock failed Interrupt

RTC_IRQn 

Real Time Clock Interrupt

TAMPER_IRQn 

Tamper detection Interrupt

WDT_IRQn 

Watchdog Timer Interrupt

WWDT_IRQn 

Window Watchdog Timer Interrupt

EINT0_IRQn 

External Input 0 Interrupt

EINT1_IRQn 

External Input 1 Interrupt

EINT2_IRQn 

External Input 2 Interrupt

EINT3_IRQn 

External Input 3 Interrupt

EINT4_IRQn 

External Input 4 Interrupt

EINT5_IRQn 

External Input 5 Interrupt

GPA_IRQn 

GPIO Port A Interrupt

GPB_IRQn 

GPIO Port B Interrupt

GPC_IRQn 

GPIO Port C Interrupt

GPD_IRQn 

GPIO Port D Interrupt

GPE_IRQn 

GPIO Port E Interrupt

GPF_IRQn 

GPIO Port F Interrupt

SPI0_IRQn 

SPI0 Interrupt

SPI1_IRQn 

SPI1 Interrupt

BRAKE0_IRQn 

BRAKE0 Interrupt

PWM0P0_IRQn 

PWM0P0 Interrupt

PWM0P1_IRQn 

PWM0P1 Interrupt

PWM0P2_IRQn 

PWM0P2 Interrupt

BRAKE1_IRQn 

BRAKE1 Interrupt

PWM1P0_IRQn 

PWM1P0 Interrupt

PWM1P1_IRQn 

PWM1P1 Interrupt

PWM1P2_IRQn 

PWM1P2 Interrupt

TMR0_IRQn 

Timer 0 Interrupt

TMR1_IRQn 

Timer 1 Interrupt

TMR2_IRQn 

Timer 2 Interrupt

TMR3_IRQn 

Timer 3 Interrupt

UART0_IRQn 

UART 0 Interrupt

UART1_IRQn 

UART 1 Interrupt

I2C0_IRQn 

I2C 0 Interrupt

I2C1_IRQn 

I2C 1 Interrupt

PDMA_IRQn 

Peripheral DMA Interrupt

ADC00_IRQn 

ADC0 Source 0 Interrupt

ADC01_IRQn 

ADC0 Source 1 Interrupt

ADC02_IRQn 

ADC0 Source 2 Interrupt

ADC03_IRQn 

ADC0 Source 3 Interrupt

UART2_IRQn 

UART2 Interrupt

UART3_IRQn 

UART3 Interrupt

USBD_IRQn 

USB device Interrupt

USBH_IRQn 

USB host Interrupt

SC0_IRQn 

Smart Card 0 Interrupt

Definition at line 68 of file M471M_R1_S.h.