M471M/R1/S BSP V3.01.000
The Board Support Package for M4521
Modules | Macros
UART Exported Constants
Collaboration diagram for UART Exported Constants:

Modules

 UART Exported Functions
 

Macros

#define UART0_FIFO_SIZE   16
 
#define UART1_FIFO_SIZE   16
 
#define UART2_FIFO_SIZE   16
 
#define UART3_FIFO_SIZE   16
 
#define UART_FIFO_RFITL_1BYTE   (0x0 << UART_FIFO_RFITL_Pos)
 
#define UART_FIFO_RFITL_4BYTES   (0x1 << UART_FIFO_RFITL_Pos)
 
#define UART_FIFO_RFITL_8BYTES   (0x2 << UART_FIFO_RFITL_Pos)
 
#define UART_FIFO_RFITL_14BYTES   (0x3 << UART_FIFO_RFITL_Pos)
 
#define UART_FIFO_RTSTRGLV_1BYTE   (0x0 << UART_FIFO_RTSTRGLV_Pos)
 
#define UART_FIFO_RTSTRGLV_4BYTES   (0x1 << UART_FIFO_RTSTRGLV_Pos)
 
#define UART_FIFO_RTSTRGLV_8BYTES   (0x2 << UART_FIFO_RTSTRGLV_Pos)
 
#define UART_FIFO_RTSTRGLV_14BYTES   (0x3 << UART_FIFO_RTSTRGLV_Pos)
 
#define UART_WORD_LEN_5   (0)
 
#define UART_WORD_LEN_6   (1)
 
#define UART_WORD_LEN_7   (2)
 
#define UART_WORD_LEN_8   (3)
 
#define UART_PARITY_NONE   (0x0 << UART_LINE_PBE_Pos)
 
#define UART_PARITY_ODD   (0x1 << UART_LINE_PBE_Pos)
 
#define UART_PARITY_EVEN   (0x3 << UART_LINE_PBE_Pos)
 
#define UART_PARITY_MARK   (0x5 << UART_LINE_PBE_Pos)
 
#define UART_PARITY_SPACE   (0x7 << UART_LINE_PBE_Pos)
 
#define UART_STOP_BIT_1   (0x0 << UART_LINE_NSB_Pos)
 
#define UART_STOP_BIT_1_5   (0x1 << UART_LINE_NSB_Pos)
 
#define UART_STOP_BIT_2   (0x1 << UART_LINE_NSB_Pos)
 
#define UART_RTS_IS_LOW_LEV_ACTIVE   (0x1 << UART_MODEM_RTSACTLV_Pos)
 
#define UART_RTS_IS_HIGH_LEV_ACTIVE   (0x0 << UART_MODEM_RTSACTLV_Pos)
 
#define UART_IRDA_TXEN   (0x1 << UART_IRDA_TXEN_Pos)
 
#define UART_IRDA_RXEN   (0x0 << UART_IRDA_TXEN_Pos)
 
#define UART_FUNCSEL_UART   (0x0 << UART_FUNCSEL_FUNCSEL_Pos)
 
#define UART_FUNCSEL_IrDA   (0x2 << UART_FUNCSEL_FUNCSEL_Pos)
 
#define UART_FUNCSEL_RS485   (0x3 << UART_FUNCSEL_FUNCSEL_Pos)
 
#define UART_BAUD_MODE0   (0)
 
#define UART_BAUD_MODE2   (UART_BAUD_BAUDM1_Msk | UART_BAUD_BAUDM0_Msk)
 

Detailed Description

Macro Definition Documentation

◆ UART0_FIFO_SIZE

#define UART0_FIFO_SIZE   16

UART0 supports separated receive/transmit 16/16 bytes entry FIFO

Definition at line 34 of file uart.h.

◆ UART1_FIFO_SIZE

#define UART1_FIFO_SIZE   16

UART1 supports separated receive/transmit 16/16 bytes entry FIFO

Definition at line 35 of file uart.h.

◆ UART2_FIFO_SIZE

#define UART2_FIFO_SIZE   16

UART2 supports separated receive/transmit 16/16 bytes entry FIFO

Definition at line 36 of file uart.h.

◆ UART3_FIFO_SIZE

#define UART3_FIFO_SIZE   16

UART3 supports separated receive/transmit 16/16 bytes entry FIFO

Definition at line 37 of file uart.h.

◆ UART_BAUD_MODE0

#define UART_BAUD_MODE0   (0)

Set UART Baudrate Mode is Mode0

Definition at line 97 of file uart.h.

◆ UART_BAUD_MODE2

#define UART_BAUD_MODE2   (UART_BAUD_BAUDM1_Msk | UART_BAUD_BAUDM0_Msk)

Set UART Baudrate Mode is Mode2

Definition at line 98 of file uart.h.

◆ UART_FIFO_RFITL_14BYTES

#define UART_FIFO_RFITL_14BYTES   (0x3 << UART_FIFO_RFITL_Pos)

UART_FIFO setting to set RX FIFO Trigger Level to 14 bytes

Definition at line 46 of file uart.h.

◆ UART_FIFO_RFITL_1BYTE

#define UART_FIFO_RFITL_1BYTE   (0x0 << UART_FIFO_RFITL_Pos)

UART_FIFO setting to set RX FIFO Trigger Level to 1 byte

Definition at line 43 of file uart.h.

◆ UART_FIFO_RFITL_4BYTES

#define UART_FIFO_RFITL_4BYTES   (0x1 << UART_FIFO_RFITL_Pos)

UART_FIFO setting to set RX FIFO Trigger Level to 4 bytes

Definition at line 44 of file uart.h.

◆ UART_FIFO_RFITL_8BYTES

#define UART_FIFO_RFITL_8BYTES   (0x2 << UART_FIFO_RFITL_Pos)

UART_FIFO setting to set RX FIFO Trigger Level to 8 bytes

Definition at line 45 of file uart.h.

◆ UART_FIFO_RTSTRGLV_14BYTES

#define UART_FIFO_RTSTRGLV_14BYTES   (0x3 << UART_FIFO_RTSTRGLV_Pos)

UART_FIFO setting to set RTS Trigger Level to 14 bytes

Definition at line 51 of file uart.h.

◆ UART_FIFO_RTSTRGLV_1BYTE

#define UART_FIFO_RTSTRGLV_1BYTE   (0x0 << UART_FIFO_RTSTRGLV_Pos)

UART_FIFO setting to set RTS Trigger Level to 1 byte

Definition at line 48 of file uart.h.

◆ UART_FIFO_RTSTRGLV_4BYTES

#define UART_FIFO_RTSTRGLV_4BYTES   (0x1 << UART_FIFO_RTSTRGLV_Pos)

UART_FIFO setting to set RTS Trigger Level to 4 bytes

Definition at line 49 of file uart.h.

◆ UART_FIFO_RTSTRGLV_8BYTES

#define UART_FIFO_RTSTRGLV_8BYTES   (0x2 << UART_FIFO_RTSTRGLV_Pos)

UART_FIFO setting to set RTS Trigger Level to 8 bytes

Definition at line 50 of file uart.h.

◆ UART_FUNCSEL_IrDA

#define UART_FUNCSEL_IrDA   (0x2 << UART_FUNCSEL_FUNCSEL_Pos)

UART_FUNCSEL setting to set IrDA Function

Definition at line 90 of file uart.h.

◆ UART_FUNCSEL_RS485

#define UART_FUNCSEL_RS485   (0x3 << UART_FUNCSEL_FUNCSEL_Pos)

UART_FUNCSEL setting to set RS485 Function

Definition at line 91 of file uart.h.

◆ UART_FUNCSEL_UART

#define UART_FUNCSEL_UART   (0x0 << UART_FUNCSEL_FUNCSEL_Pos)

UART_FUNCSEL setting to set UART Function (Default)

Definition at line 89 of file uart.h.

◆ UART_IRDA_RXEN

#define UART_IRDA_RXEN   (0x0 << UART_IRDA_TXEN_Pos)

Set IrDA function Rx mode

Definition at line 83 of file uart.h.

◆ UART_IRDA_TXEN

#define UART_IRDA_TXEN   (0x1 << UART_IRDA_TXEN_Pos)

Set IrDA function Tx mode

Definition at line 82 of file uart.h.

◆ UART_PARITY_EVEN

#define UART_PARITY_EVEN   (0x3 << UART_LINE_PBE_Pos)

UART_LINE setting to set UART as even parity

Definition at line 63 of file uart.h.

◆ UART_PARITY_MARK

#define UART_PARITY_MARK   (0x5 << UART_LINE_PBE_Pos)

UART_LINE setting to keep parity bit as '1'

Definition at line 64 of file uart.h.

◆ UART_PARITY_NONE

#define UART_PARITY_NONE   (0x0 << UART_LINE_PBE_Pos)

UART_LINE setting to set UART as no parity

Definition at line 61 of file uart.h.

◆ UART_PARITY_ODD

#define UART_PARITY_ODD   (0x1 << UART_LINE_PBE_Pos)

UART_LINE setting to set UART as odd parity

Definition at line 62 of file uart.h.

◆ UART_PARITY_SPACE

#define UART_PARITY_SPACE   (0x7 << UART_LINE_PBE_Pos)

UART_LINE setting to keep parity bit as '0'

Definition at line 65 of file uart.h.

◆ UART_RTS_IS_HIGH_LEV_ACTIVE

#define UART_RTS_IS_HIGH_LEV_ACTIVE   (0x0 << UART_MODEM_RTSACTLV_Pos)

Set RTS is High Level Active

Definition at line 76 of file uart.h.

◆ UART_RTS_IS_LOW_LEV_ACTIVE

#define UART_RTS_IS_LOW_LEV_ACTIVE   (0x1 << UART_MODEM_RTSACTLV_Pos)

Set RTS is Low Level Active

Definition at line 75 of file uart.h.

◆ UART_STOP_BIT_1

#define UART_STOP_BIT_1   (0x0 << UART_LINE_NSB_Pos)

UART_LINE setting for one stop bit

Definition at line 67 of file uart.h.

◆ UART_STOP_BIT_1_5

#define UART_STOP_BIT_1_5   (0x1 << UART_LINE_NSB_Pos)

UART_LINE setting for 1.5 stop bit when 5-bit word length

Definition at line 68 of file uart.h.

◆ UART_STOP_BIT_2

#define UART_STOP_BIT_2   (0x1 << UART_LINE_NSB_Pos)

UART_LINE setting for two stop bit when 6, 7, 8-bit word length

Definition at line 69 of file uart.h.

◆ UART_WORD_LEN_5

#define UART_WORD_LEN_5   (0)

UART_LINE setting to set UART word length to 5 bits

Definition at line 56 of file uart.h.

◆ UART_WORD_LEN_6

#define UART_WORD_LEN_6   (1)

UART_LINE setting to set UART word length to 6 bits

Definition at line 57 of file uart.h.

◆ UART_WORD_LEN_7

#define UART_WORD_LEN_7   (2)

UART_LINE setting to set UART word length to 7 bits

Definition at line 58 of file uart.h.

◆ UART_WORD_LEN_8

#define UART_WORD_LEN_8   (3)

UART_LINE setting to set UART word length to 8 bits

Definition at line 59 of file uart.h.