M471M/R1/S BSP V3.01.000
The Board Support Package for M4521
pdma.c
Go to the documentation of this file.
1/**************************************************************************/
8#include "NuMicro.h"
9
10
11static uint8_t u32ChSelect[PDMA_CH_MAX];
12
35void PDMA_Open(uint32_t u32Mask)
36{
37 int volatile i;
38
39 for(i = 0; i < PDMA_CH_MAX; i++)
40 {
41 PDMA->DSCT[i].CTL = 0;
42 u32ChSelect[i] = 0x1f;
43 }
44
45 PDMA->CHCTL |= u32Mask;
46}
47
57void PDMA_Close(void)
58{
59 PDMA->CHCTL = 0;
60}
61
76void PDMA_SetTransferCnt(uint32_t u32Ch, uint32_t u32Width, uint32_t u32TransCount)
77{
79 PDMA->DSCT[u32Ch].CTL |= (u32Width | ((u32TransCount - 1) << PDMA_DSCT_CTL_TXCNT_Pos));
80}
81
99void PDMA_SetTransferAddr(uint32_t u32Ch, uint32_t u32SrcAddr, uint32_t u32SrcCtrl, uint32_t u32DstAddr, uint32_t u32DstCtrl)
100{
101 PDMA->DSCT[u32Ch].SA = u32SrcAddr;
102 PDMA->DSCT[u32Ch].DA = u32DstAddr;
104 PDMA->DSCT[u32Ch].CTL |= (u32SrcCtrl | u32DstCtrl);
105}
106
139void PDMA_SetTransferMode(uint32_t u32Ch, uint32_t u32Peripheral, uint32_t u32ScatterEn, uint32_t u32DescAddr)
140{
141 u32ChSelect[u32Ch] = u32Peripheral;
142 switch(u32Ch)
143 {
144 case 0:
145 PDMA->REQSEL0_3 = (PDMA->REQSEL0_3 & ~PDMA_REQSEL0_3_REQSRC0_Msk) | u32Peripheral;
146 break;
147 case 1:
148 PDMA->REQSEL0_3 = (PDMA->REQSEL0_3 & ~PDMA_REQSEL0_3_REQSRC1_Msk) | (u32Peripheral << PDMA_REQSEL0_3_REQSRC1_Pos);
149 break;
150 case 2:
151 PDMA->REQSEL0_3 = (PDMA->REQSEL0_3 & ~PDMA_REQSEL0_3_REQSRC2_Msk) | (u32Peripheral << PDMA_REQSEL0_3_REQSRC2_Pos);
152 break;
153 case 3:
154 PDMA->REQSEL0_3 = (PDMA->REQSEL0_3 & ~PDMA_REQSEL0_3_REQSRC3_Msk) | (u32Peripheral << PDMA_REQSEL0_3_REQSRC3_Pos);
155 break;
156 case 4:
157 PDMA->REQSEL4_7 = (PDMA->REQSEL4_7 & ~PDMA_REQSEL4_7_REQSRC4_Msk) | u32Peripheral;
158 break;
159 case 5:
160 PDMA->REQSEL4_7 = (PDMA->REQSEL4_7 & ~PDMA_REQSEL4_7_REQSRC5_Msk) | (u32Peripheral << PDMA_REQSEL4_7_REQSRC5_Pos);
161 break;
162 case 6:
163 PDMA->REQSEL4_7 = (PDMA->REQSEL4_7 & ~PDMA_REQSEL4_7_REQSRC6_Msk) | (u32Peripheral << PDMA_REQSEL4_7_REQSRC6_Pos);
164 break;
165 case 7:
166 PDMA->REQSEL4_7 = (PDMA->REQSEL4_7 & ~PDMA_REQSEL4_7_REQSRC7_Msk) | (u32Peripheral << PDMA_REQSEL4_7_REQSRC7_Pos);
167 break;
168 default:
169 break;
170 }
171
172 if(u32ScatterEn)
173 {
174 PDMA->DSCT[u32Ch].CTL = (PDMA->DSCT[u32Ch].CTL & ~PDMA_DSCT_CTL_OPMODE_Msk) | PDMA_OP_SCATTER;
175 PDMA->DSCT[u32Ch].NEXT = u32DescAddr - (PDMA->SCATBA);
176 }
177 else
178 PDMA->DSCT[u32Ch].CTL = (PDMA->DSCT[u32Ch].CTL & ~PDMA_DSCT_CTL_OPMODE_Msk) | PDMA_OP_BASIC;
179}
180
202void PDMA_SetBurstType(uint32_t u32Ch, uint32_t u32BurstType, uint32_t u32BurstSize)
203{
205 PDMA->DSCT[u32Ch].CTL |= (u32BurstType | u32BurstSize);
206}
207
217void PDMA_EnableTimeout(uint32_t u32Mask)
218{
219 PDMA->TOUTEN |= u32Mask;
220}
221
231void PDMA_DisableTimeout(uint32_t u32Mask)
232{
233 PDMA->TOUTEN &= ~u32Mask;
234}
235
247void PDMA_SetTimeOut(uint32_t u32Ch, uint32_t u32OnOff, uint32_t u32TimeOutCnt)
248{
249 switch(u32Ch)
250 {
251 case 0:
252 PDMA->TOC0_1 = (PDMA->TOC0_1 & ~PDMA_TOC0_1_TOC0_Msk) | u32TimeOutCnt;
253 break;
254 case 1:
255 PDMA->TOC0_1 = (PDMA->TOC0_1 & ~PDMA_TOC0_1_TOC1_Msk) | (u32TimeOutCnt << PDMA_TOC0_1_TOC1_Pos);
256 break;
257 case 2:
258 PDMA->TOC2_3 = (PDMA->TOC2_3 & ~PDMA_TOC2_3_TOC2_Msk) | u32TimeOutCnt;
259 break;
260 case 3:
261 PDMA->TOC2_3 = (PDMA->TOC2_3 & ~PDMA_TOC2_3_TOC3_Msk) | (u32TimeOutCnt << PDMA_TOC2_3_TOC3_Pos);
262 break;
263 case 4:
264 PDMA->TOC4_5 = (PDMA->TOC4_5 & ~PDMA_TOC4_5_TOC4_Msk) | u32TimeOutCnt;
265 break;
266 case 5:
267 PDMA->TOC4_5 = (PDMA->TOC4_5 & ~PDMA_TOC4_5_TOC5_Msk) | (u32TimeOutCnt << PDMA_TOC4_5_TOC5_Pos);
268 break;
269 case 6:
270 PDMA->TOC6_7 = (PDMA->TOC6_7 & ~PDMA_TOC6_7_TOC6_Msk) | u32TimeOutCnt;
271 break;
272 case 7:
273 PDMA->TOC6_7 = (PDMA->TOC6_7 & ~PDMA_TOC6_7_TOC7_Msk) | (u32TimeOutCnt << PDMA_TOC6_7_TOC7_Pos);
274 break;
275
276 default:
277 break;
278 }
279
280 if (u32OnOff)
281 PDMA->TOUTEN |= (1ul << u32Ch);
282 else
283 PDMA->TOUTEN &= ~(1ul << u32Ch);
284}
285
295void PDMA_Trigger(uint32_t u32Ch)
296{
297 if(u32ChSelect[u32Ch] == PDMA_MEM)
298 PDMA->SWREQ = (1 << u32Ch);
299}
300
314void PDMA_EnableInt(uint32_t u32Ch, uint32_t u32Mask)
315{
316 switch(u32Mask)
317 {
319 PDMA->INTEN |= (1 << u32Ch);
320 break;
321 case PDMA_INT_TEMPTY:
322 PDMA->DSCT[u32Ch].CTL &= ~PDMA_DSCT_CTL_TBINTDIS_Msk;
323 break;
324 case PDMA_INT_TIMEOUT:
325 PDMA->TOUTIEN |= (1 << u32Ch);
326 break;
327
328 default:
329 break;
330 }
331}
332
346void PDMA_DisableInt(uint32_t u32Ch, uint32_t u32Mask)
347{
348 switch(u32Mask)
349 {
351 PDMA->INTEN &= ~(1 << u32Ch);
352 break;
353 case PDMA_INT_TEMPTY:
354 PDMA->DSCT[u32Ch].CTL |= PDMA_DSCT_CTL_TBINTDIS_Msk;
355 break;
356 case PDMA_INT_TIMEOUT:
357 PDMA->TOUTIEN &= ~(1 << u32Ch);
358 break;
359
360 default:
361 break;
362 }
363}
364 /* end of group PDMA_EXPORTED_FUNCTIONS */
366 /* end of group PDMA_Driver */
368 /* end of group Standard_Driver */
370
371
#define PDMA_TOC6_7_TOC7_Pos
Definition: M471M_R1_S.h:4470
#define PDMA_REQSEL4_7_REQSRC5_Pos
Definition: M471M_R1_S.h:4488
#define PDMA_REQSEL4_7_REQSRC7_Pos
Definition: M471M_R1_S.h:4494
#define PDMA_REQSEL4_7_REQSRC6_Pos
Definition: M471M_R1_S.h:4491
#define PDMA_REQSEL0_3_REQSRC2_Pos
Definition: M471M_R1_S.h:4479
#define PDMA_DSCT_CTL_TXCNT_Pos
Definition: M471M_R1_S.h:4380
#define PDMA_TOC2_3_TOC3_Pos
Definition: M471M_R1_S.h:4458
#define PDMA_REQSEL0_3_REQSRC1_Pos
Definition: M471M_R1_S.h:4476
#define PDMA_DSCT_CTL_TXTYPE_Msk
Definition: M471M_R1_S.h:4363
#define PDMA_TOC0_1_TOC1_Pos
Definition: M471M_R1_S.h:4452
#define PDMA_DSCT_CTL_TXCNT_Msk
Definition: M471M_R1_S.h:4381
#define PDMA_DSCT_CTL_TBINTDIS_Msk
Definition: M471M_R1_S.h:4369
#define PDMA_DSCT_CTL_DAINC_Msk
Definition: M471M_R1_S.h:4375
#define PDMA_DSCT_CTL_BURSIZE_Msk
Definition: M471M_R1_S.h:4366
#define PDMA_REQSEL0_3_REQSRC3_Pos
Definition: M471M_R1_S.h:4482
#define PDMA_TOC4_5_TOC5_Pos
Definition: M471M_R1_S.h:4464
#define PDMA_DSCT_CTL_TXWIDTH_Msk
Definition: M471M_R1_S.h:4378
#define PDMA_DSCT_CTL_SAINC_Msk
Definition: M471M_R1_S.h:4372
NuMicro peripheral access layer header file.
#define PDMA_OP_BASIC
Definition: pdma.h:34
#define PDMA_INT_TRANS_DONE
Definition: pdma.h:94
#define PDMA_MEM
Definition: pdma.h:89
#define PDMA_OP_SCATTER
Definition: pdma.h:35
#define PDMA_INT_TEMPTY
Definition: pdma.h:95
#define PDMA_CH_MAX
Definition: pdma.h:28
#define PDMA_INT_TIMEOUT
Definition: pdma.h:96
void PDMA_SetTransferAddr(uint32_t u32Ch, uint32_t u32SrcAddr, uint32_t u32SrcCtrl, uint32_t u32DstAddr, uint32_t u32DstCtrl)
Set PDMA Transfer Address.
Definition: pdma.c:99
void PDMA_Trigger(uint32_t u32Ch)
Trigger PDMA.
Definition: pdma.c:295
void PDMA_EnableTimeout(uint32_t u32Mask)
Enable timeout function.
Definition: pdma.c:217
void PDMA_SetTimeOut(uint32_t u32Ch, uint32_t u32OnOff, uint32_t u32TimeOutCnt)
Set PDMA Timeout Count.
Definition: pdma.c:247
void PDMA_EnableInt(uint32_t u32Ch, uint32_t u32Mask)
Enable Interrupt.
Definition: pdma.c:314
void PDMA_Open(uint32_t u32Mask)
PDMA Open.
Definition: pdma.c:35
void PDMA_DisableTimeout(uint32_t u32Mask)
Disable timeout function.
Definition: pdma.c:231
void PDMA_Close(void)
PDMA Close.
Definition: pdma.c:57
void PDMA_DisableInt(uint32_t u32Ch, uint32_t u32Mask)
Disable Interrupt.
Definition: pdma.c:346
void PDMA_SetTransferMode(uint32_t u32Ch, uint32_t u32Peripheral, uint32_t u32ScatterEn, uint32_t u32DescAddr)
Set PDMA Transfer Mode.
Definition: pdma.c:139
void PDMA_SetBurstType(uint32_t u32Ch, uint32_t u32BurstType, uint32_t u32BurstSize)
Set PDMA Burst Type and Size.
Definition: pdma.c:202
void PDMA_SetTransferCnt(uint32_t u32Ch, uint32_t u32Width, uint32_t u32TransCount)
Set PDMA Transfer Count.
Definition: pdma.c:76
#define PDMA
Definition: M471M_R1_S.h:13826
static uint8_t u32ChSelect[PDMA_CH_MAX]
Definition: pdma.c:11