M471M/R1/S BSP V3.01.000
The Board Support Package for M4521
Macros | Functions
Collaboration diagram for SPI Exported Functions:

Macros

#define SPI_CLR_UNIT_TRANS_INT_FLAG(spi)   ((spi)->STATUS = SPI_STATUS_UNITIF_Msk)
 Clear the unit transfer interrupt flag. More...
 
#define SPI_DISABLE_2BIT_MODE(spi)   ((spi)->CTL &= ~SPI_CTL_TWOBIT_Msk)
 Disable 2-bit Transfer mode. More...
 
#define SPI_DISABLE_3WIRE_MODE(spi)   ((spi)->SSCTL &= ~SPI_SSCTL_SLV3WIRE_Msk)
 Disable Slave 3-wire mode. More...
 
#define SPI_DISABLE_DUAL_MODE(spi)   ((spi)->CTL &= ~SPI_CTL_DUALIOEN_Msk)
 Disable Dual I/O mode. More...
 
#define SPI_DISABLE_QUAD_MODE(spi)   ((spi)->CTL &= ~SPI_CTL_QUADIOEN_Msk)
 Disable Quad I/O mode. More...
 
#define SPI_ENABLE_2BIT_MODE(spi)   ((spi)->CTL |= SPI_CTL_TWOBIT_Msk)
 Enable 2-bit Transfer mode. More...
 
#define SPI_ENABLE_3WIRE_MODE(spi)   ((spi)->SSCTL |= SPI_SSCTL_SLV3WIRE_Msk)
 Enable Slave 3-wire mode. More...
 
#define SPI_ENABLE_DUAL_INPUT_MODE(spi)   ((spi)->CTL = ((spi)->CTL & (~SPI_CTL_QDIODIR_Msk)) | SPI_CTL_DUALIOEN_Msk)
 Enable Dual input mode. More...
 
#define SPI_ENABLE_DUAL_OUTPUT_MODE(spi)   ((spi)->CTL |= (SPI_CTL_QDIODIR_Msk | SPI_CTL_DUALIOEN_Msk))
 Enable Dual output mode. More...
 
#define SPI_ENABLE_QUAD_INPUT_MODE(spi)   ((spi)->CTL = ((spi)->CTL & (~SPI_CTL_QDIODIR_Msk)) | SPI_CTL_QUADIOEN_Msk)
 Enable Quad input mode. More...
 
#define SPI_ENABLE_QUAD_OUTPUT_MODE(spi)   ((spi)->CTL |= (SPI_CTL_QDIODIR_Msk | SPI_CTL_QUADIOEN_Msk))
 Enable Quad output mode. More...
 
#define SPI_TRIGGER_RX_PDMA(spi)   ((spi)->PDMACTL |= SPI_PDMACTL_RXPDMAEN_Msk)
 Trigger RX PDMA function. More...
 
#define SPI_TRIGGER_TX_PDMA(spi)   ((spi)->PDMACTL |= SPI_PDMACTL_TXPDMAEN_Msk)
 Trigger TX PDMA function. More...
 
#define SPI_DISABLE_RX_PDMA(spi)   ( (spi)->PDMACTL &= ~SPI_PDMACTL_RXPDMAEN_Msk )
 Disable RX PDMA transfer. More...
 
#define SPI_DISABLE_TX_PDMA(spi)   ( (spi)->PDMACTL &= ~SPI_PDMACTL_TXPDMAEN_Msk )
 Disable TX PDMA transfer. More...
 
#define SPI_GET_RX_FIFO_COUNT(spi)   (((spi)->STATUS & SPI_STATUS_RXCNT_Msk) >> SPI_STATUS_RXCNT_Pos)
 Get the count of available data in RX FIFO. More...
 
#define SPI_GET_RX_FIFO_EMPTY_FLAG(spi)   (((spi)->STATUS & SPI_STATUS_RXEMPTY_Msk)>>SPI_STATUS_RXEMPTY_Pos)
 Get the RX FIFO empty flag. More...
 
#define SPI_GET_TX_FIFO_EMPTY_FLAG(spi)   (((spi)->STATUS & SPI_STATUS_TXEMPTY_Msk)>>SPI_STATUS_TXEMPTY_Pos)
 Get the TX FIFO empty flag. More...
 
#define SPI_GET_TX_FIFO_FULL_FLAG(spi)   (((spi)->STATUS & SPI_STATUS_TXFULL_Msk)>>SPI_STATUS_TXFULL_Pos)
 Get the TX FIFO full flag. More...
 
#define SPI_READ_RX(spi)   ((spi)->RX)
 Get the datum read from RX register. More...
 
#define SPI_WRITE_TX(spi, u32TxData)   ((spi)->TX = (u32TxData))
 Write datum to TX register. More...
 
#define SPI_SET_SS_HIGH(spi)   ((spi)->SSCTL = ((spi)->SSCTL & (~SPI_SSCTL_AUTOSS_Msk)) | (SPI_SSCTL_SSACTPOL_Msk | SPI_SSCTL_SS_Msk))
 Set SPIn_SS pin to high state. More...
 
#define SPI_SET_SS_LOW(spi)   ((spi)->SSCTL = ((spi)->SSCTL & (~(SPI_SSCTL_AUTOSS_Msk | SPI_SSCTL_SSACTPOL_Msk))) | SPI_SSCTL_SS_Msk)
 Set SPIn_SS pin to low state. More...
 
#define SPI_ENABLE_BYTE_REORDER(spi)   ((spi)->CTL |= SPI_CTL_REORDER_Msk)
 Enable Byte Reorder function. More...
 
#define SPI_DISABLE_BYTE_REORDER(spi)   ((spi)->CTL &= ~SPI_CTL_REORDER_Msk)
 Disable Byte Reorder function. More...
 
#define SPI_SET_SUSPEND_CYCLE(spi, u32SuspCycle)   ((spi)->CTL = ((spi)->CTL & ~SPI_CTL_SUSPITV_Msk) | ((u32SuspCycle) << SPI_CTL_SUSPITV_Pos))
 Set the length of suspend interval. More...
 
#define SPI_SET_LSB_FIRST(spi)   ((spi)->CTL |= SPI_CTL_LSB_Msk)
 Set the SPI transfer sequence with LSB first. More...
 
#define SPI_SET_MSB_FIRST(spi)   ((spi)->CTL &= ~SPI_CTL_LSB_Msk)
 Set the SPI transfer sequence with MSB first. More...
 
#define SPI_SET_DATA_WIDTH(spi, u32Width)   ((spi)->CTL = ((spi)->CTL & ~SPI_CTL_DWIDTH_Msk) | (((u32Width)&0x1F) << SPI_CTL_DWIDTH_Pos))
 Set the data width of a SPI transaction. More...
 
#define SPI_IS_BUSY(spi)   ( ((spi)->STATUS & SPI_STATUS_BUSY_Msk)>>SPI_STATUS_BUSY_Pos )
 Get the SPI busy state. More...
 
#define SPI_ENABLE(spi)   ((spi)->CTL |= SPI_CTL_SPIEN_Msk)
 Enable SPI controller. More...
 
#define SPI_DISABLE(spi)   ((spi)->CTL &= ~SPI_CTL_SPIEN_Msk)
 Disable SPI controller. More...
 

Functions

uint32_t SPI_Open (SPI_T *spi, uint32_t u32MasterSlave, uint32_t u32SPIMode, uint32_t u32DataWidth, uint32_t u32BusClock)
 This function make SPI module be ready to transfer. More...
 
void SPI_Close (SPI_T *spi)
 Disable SPI controller. More...
 
void SPI_ClearRxFIFO (SPI_T *spi)
 Clear RX FIFO buffer. More...
 
void SPI_ClearTxFIFO (SPI_T *spi)
 Clear TX FIFO buffer. More...
 
void SPI_DisableAutoSS (SPI_T *spi)
 Disable the automatic slave selection function. More...
 
void SPI_EnableAutoSS (SPI_T *spi, uint32_t u32SSPinMask, uint32_t u32ActiveLevel)
 Enable the automatic slave selection function. More...
 
uint32_t SPI_SetBusClock (SPI_T *spi, uint32_t u32BusClock)
 Set the SPI bus clock. More...
 
void SPI_SetFIFO (SPI_T *spi, uint32_t u32TxThreshold, uint32_t u32RxThreshold)
 Configure FIFO threshold setting. More...
 
uint32_t SPI_GetBusClock (SPI_T *spi)
 Get the actual frequency of SPI bus clock. Only available in Master mode. More...
 
void SPI_EnableInt (SPI_T *spi, uint32_t u32Mask)
 Enable interrupt function. More...
 
void SPI_DisableInt (SPI_T *spi, uint32_t u32Mask)
 Disable interrupt function. More...
 
uint32_t SPI_GetIntFlag (SPI_T *spi, uint32_t u32Mask)
 Get interrupt flag. More...
 
void SPI_ClearIntFlag (SPI_T *spi, uint32_t u32Mask)
 Clear interrupt flag. More...
 
uint32_t SPI_GetStatus (SPI_T *spi, uint32_t u32Mask)
 Get SPI status. More...
 

Detailed Description

Macro Definition Documentation

◆ SPI_CLR_UNIT_TRANS_INT_FLAG

#define SPI_CLR_UNIT_TRANS_INT_FLAG (   spi)    ((spi)->STATUS = SPI_STATUS_UNITIF_Msk)

Clear the unit transfer interrupt flag.

Parameters
[in]spiThe pointer of the specified SPI module.
Returns
None.

Write 1 to UNITIF bit of SPI_STATUS register to clear the unit transfer interrupt flag.

Definition at line 84 of file spi.h.

◆ SPI_DISABLE

#define SPI_DISABLE (   spi)    ((spi)->CTL &= ~SPI_CTL_SPIEN_Msk)

Disable SPI controller.

Parameters
[in]spiThe pointer of the specified SPI module.
Returns
None.

Clear SPIEN (SPI_CTL[0]) to disable SPI controller.

Definition at line 340 of file spi.h.

◆ SPI_DISABLE_2BIT_MODE

#define SPI_DISABLE_2BIT_MODE (   spi)    ((spi)->CTL &= ~SPI_CTL_TWOBIT_Msk)

Disable 2-bit Transfer mode.

Parameters
[in]spiThe pointer of the specified SPI module.
Returns
None.

Clear TWOBIT bit of SPI_CTL register to disable 2-bit Transfer mode.

Definition at line 92 of file spi.h.

◆ SPI_DISABLE_3WIRE_MODE

#define SPI_DISABLE_3WIRE_MODE (   spi)    ((spi)->SSCTL &= ~SPI_SSCTL_SLV3WIRE_Msk)

Disable Slave 3-wire mode.

Parameters
[in]spiThe pointer of the specified SPI module.
Returns
None.

Clear SLV3WIRE bit of SPI_SSCTL register to disable Slave 3-wire mode.

Definition at line 100 of file spi.h.

◆ SPI_DISABLE_BYTE_REORDER

#define SPI_DISABLE_BYTE_REORDER (   spi)    ((spi)->CTL &= ~SPI_CTL_REORDER_Msk)

Disable Byte Reorder function.

Parameters
[in]spiThe pointer of the specified SPI module.
Returns
None.

Clear REORDER bit field of SPI_CTL register to disable Byte Reorder function.

Definition at line 280 of file spi.h.

◆ SPI_DISABLE_DUAL_MODE

#define SPI_DISABLE_DUAL_MODE (   spi)    ((spi)->CTL &= ~SPI_CTL_DUALIOEN_Msk)

Disable Dual I/O mode.

Parameters
[in]spiThe pointer of the specified SPI module.
Returns
None.

Clear DUALIOEN bit of SPI_CTL register to disable Dual I/O mode.

Definition at line 108 of file spi.h.

◆ SPI_DISABLE_QUAD_MODE

#define SPI_DISABLE_QUAD_MODE (   spi)    ((spi)->CTL &= ~SPI_CTL_QUADIOEN_Msk)

Disable Quad I/O mode.

Parameters
[in]spiThe pointer of the specified SPI module.
Returns
None.

Clear QUADIOEN bit of SPI_CTL register to disable Quad I/O mode.

Definition at line 116 of file spi.h.

◆ SPI_DISABLE_RX_PDMA

#define SPI_DISABLE_RX_PDMA (   spi)    ( (spi)->PDMACTL &= ~SPI_PDMACTL_RXPDMAEN_Msk )

Disable RX PDMA transfer.

Parameters
[in]spiThe pointer of the specified SPI module.
Returns
None.

Clear RXPDMAEN bit of SPI_PDMACTL register to disable RX PDMA transfer function.

Definition at line 188 of file spi.h.

◆ SPI_DISABLE_TX_PDMA

#define SPI_DISABLE_TX_PDMA (   spi)    ( (spi)->PDMACTL &= ~SPI_PDMACTL_TXPDMAEN_Msk )

Disable TX PDMA transfer.

Parameters
[in]spiThe pointer of the specified SPI module.
Returns
None.

Clear TXPDMAEN bit of SPI_PDMACTL register to disable TX PDMA transfer function.

Definition at line 196 of file spi.h.

◆ SPI_ENABLE

#define SPI_ENABLE (   spi)    ((spi)->CTL |= SPI_CTL_SPIEN_Msk)

Enable SPI controller.

Parameters
[in]spiThe pointer of the specified SPI module.
Returns
None.

Set SPIEN (SPI_CTL[0]) to enable SPI controller.

Definition at line 332 of file spi.h.

◆ SPI_ENABLE_2BIT_MODE

#define SPI_ENABLE_2BIT_MODE (   spi)    ((spi)->CTL |= SPI_CTL_TWOBIT_Msk)

Enable 2-bit Transfer mode.

Parameters
[in]spiThe pointer of the specified SPI module.
Returns
None.

Set TWOBIT bit of SPI_CTL register to enable 2-bit Transfer mode.

Definition at line 124 of file spi.h.

◆ SPI_ENABLE_3WIRE_MODE

#define SPI_ENABLE_3WIRE_MODE (   spi)    ((spi)->SSCTL |= SPI_SSCTL_SLV3WIRE_Msk)

Enable Slave 3-wire mode.

Parameters
[in]spiThe pointer of the specified SPI module.
Returns
None.

Set SLV3WIRE bit of SPI_SSCTL register to enable Slave 3-wire mode.

Definition at line 132 of file spi.h.

◆ SPI_ENABLE_BYTE_REORDER

#define SPI_ENABLE_BYTE_REORDER (   spi)    ((spi)->CTL |= SPI_CTL_REORDER_Msk)

Enable Byte Reorder function.

Parameters
[in]spiThe pointer of the specified SPI module.
Returns
None.

Enable Byte Reorder function. The suspend interval depends on the setting of SUSPITV (SPI_CTL[7:4]).

Definition at line 272 of file spi.h.

◆ SPI_ENABLE_DUAL_INPUT_MODE

#define SPI_ENABLE_DUAL_INPUT_MODE (   spi)    ((spi)->CTL = ((spi)->CTL & (~SPI_CTL_QDIODIR_Msk)) | SPI_CTL_DUALIOEN_Msk)

Enable Dual input mode.

Parameters
[in]spiThe pointer of the specified SPI module.
Returns
None.

Clear QDIODIR bit and set DUALIOEN bit of SPI_CTL register to enable Dual input mode.

Definition at line 140 of file spi.h.

◆ SPI_ENABLE_DUAL_OUTPUT_MODE

#define SPI_ENABLE_DUAL_OUTPUT_MODE (   spi)    ((spi)->CTL |= (SPI_CTL_QDIODIR_Msk | SPI_CTL_DUALIOEN_Msk))

Enable Dual output mode.

Parameters
[in]spiThe pointer of the specified SPI module.
Returns
None.

Set QDIODIR bit and DUALIOEN bit of SPI_CTL register to enable Dual output mode.

Definition at line 148 of file spi.h.

◆ SPI_ENABLE_QUAD_INPUT_MODE

#define SPI_ENABLE_QUAD_INPUT_MODE (   spi)    ((spi)->CTL = ((spi)->CTL & (~SPI_CTL_QDIODIR_Msk)) | SPI_CTL_QUADIOEN_Msk)

Enable Quad input mode.

Parameters
[in]spiThe pointer of the specified SPI module.
Returns
None.

Clear QDIODIR bit and set QUADIOEN bit of SPI_CTL register to enable Quad input mode.

Definition at line 156 of file spi.h.

◆ SPI_ENABLE_QUAD_OUTPUT_MODE

#define SPI_ENABLE_QUAD_OUTPUT_MODE (   spi)    ((spi)->CTL |= (SPI_CTL_QDIODIR_Msk | SPI_CTL_QUADIOEN_Msk))

Enable Quad output mode.

Parameters
[in]spiThe pointer of the specified SPI module.
Returns
None.

Set QDIODIR bit and QUADIOEN bit of SPI_CTL register to enable Quad output mode.

Definition at line 164 of file spi.h.

◆ SPI_GET_RX_FIFO_COUNT

#define SPI_GET_RX_FIFO_COUNT (   spi)    (((spi)->STATUS & SPI_STATUS_RXCNT_Msk) >> SPI_STATUS_RXCNT_Pos)

Get the count of available data in RX FIFO.

Parameters
[in]spiThe pointer of the specified SPI module.
Returns
The count of available data in RX FIFO.

Read RXCNT (SPI_STATUS[27:24]) to get the count of available data in RX FIFO.

Definition at line 204 of file spi.h.

◆ SPI_GET_RX_FIFO_EMPTY_FLAG

#define SPI_GET_RX_FIFO_EMPTY_FLAG (   spi)    (((spi)->STATUS & SPI_STATUS_RXEMPTY_Msk)>>SPI_STATUS_RXEMPTY_Pos)

Get the RX FIFO empty flag.

Parameters
[in]spiThe pointer of the specified SPI module.
Return values
0RX FIFO is not empty.
1RX FIFO is empty.

Read RXEMPTY bit of SPI_STATUS register to get the RX FIFO empty flag.

Definition at line 213 of file spi.h.

◆ SPI_GET_TX_FIFO_EMPTY_FLAG

#define SPI_GET_TX_FIFO_EMPTY_FLAG (   spi)    (((spi)->STATUS & SPI_STATUS_TXEMPTY_Msk)>>SPI_STATUS_TXEMPTY_Pos)

Get the TX FIFO empty flag.

Parameters
[in]spiThe pointer of the specified SPI module.
Return values
0TX FIFO is not empty.
1TX FIFO is empty.

Read TXEMPTY bit of SPI_STATUS register to get the TX FIFO empty flag.

Definition at line 222 of file spi.h.

◆ SPI_GET_TX_FIFO_FULL_FLAG

#define SPI_GET_TX_FIFO_FULL_FLAG (   spi)    (((spi)->STATUS & SPI_STATUS_TXFULL_Msk)>>SPI_STATUS_TXFULL_Pos)

Get the TX FIFO full flag.

Parameters
[in]spiThe pointer of the specified SPI module.
Return values
0TX FIFO is not full.
1TX FIFO is full.

Read TXFULL bit of SPI_STATUS register to get the TX FIFO full flag.

Definition at line 231 of file spi.h.

◆ SPI_IS_BUSY

#define SPI_IS_BUSY (   spi)    ( ((spi)->STATUS & SPI_STATUS_BUSY_Msk)>>SPI_STATUS_BUSY_Pos )

Get the SPI busy state.

Parameters
[in]spiThe pointer of the specified SPI module.
Return values
0SPI controller is not busy.
1SPI controller is busy.

This macro will return the busy state of SPI controller.

Definition at line 324 of file spi.h.

◆ SPI_READ_RX

#define SPI_READ_RX (   spi)    ((spi)->RX)

Get the datum read from RX register.

Parameters
[in]spiThe pointer of the specified SPI module.
Returns
Data in RX register.

Read SPI_RX register to get the received datum.

Definition at line 239 of file spi.h.

◆ SPI_SET_DATA_WIDTH

#define SPI_SET_DATA_WIDTH (   spi,
  u32Width 
)    ((spi)->CTL = ((spi)->CTL & ~SPI_CTL_DWIDTH_Msk) | (((u32Width)&0x1F) << SPI_CTL_DWIDTH_Pos))

Set the data width of a SPI transaction.

Parameters
[in]spiThe pointer of the specified SPI module.
[in]u32WidthThe bit width of one transaction.
Returns
None.

The data width can be 8 ~ 32 bits.

Definition at line 315 of file spi.h.

◆ SPI_SET_LSB_FIRST

#define SPI_SET_LSB_FIRST (   spi)    ((spi)->CTL |= SPI_CTL_LSB_Msk)

Set the SPI transfer sequence with LSB first.

Parameters
[in]spiThe pointer of the specified SPI module.
Returns
None.

Set LSB bit of SPI_CTL register to set the SPI transfer sequence with LSB first.

Definition at line 298 of file spi.h.

◆ SPI_SET_MSB_FIRST

#define SPI_SET_MSB_FIRST (   spi)    ((spi)->CTL &= ~SPI_CTL_LSB_Msk)

Set the SPI transfer sequence with MSB first.

Parameters
[in]spiThe pointer of the specified SPI module.
Returns
None.

Clear LSB bit of SPI_CTL register to set the SPI transfer sequence with MSB first.

Definition at line 306 of file spi.h.

◆ SPI_SET_SS_HIGH

#define SPI_SET_SS_HIGH (   spi)    ((spi)->SSCTL = ((spi)->SSCTL & (~SPI_SSCTL_AUTOSS_Msk)) | (SPI_SSCTL_SSACTPOL_Msk | SPI_SSCTL_SS_Msk))

Set SPIn_SS pin to high state.

Parameters
[in]spiThe pointer of the specified SPI module.
Returns
None.

Disable automatic slave selection function and set SPIn_SS pin to high state.

Definition at line 256 of file spi.h.

◆ SPI_SET_SS_LOW

#define SPI_SET_SS_LOW (   spi)    ((spi)->SSCTL = ((spi)->SSCTL & (~(SPI_SSCTL_AUTOSS_Msk | SPI_SSCTL_SSACTPOL_Msk))) | SPI_SSCTL_SS_Msk)

Set SPIn_SS pin to low state.

Parameters
[in]spiThe pointer of the specified SPI module.
Returns
None.

Disable automatic slave selection function and set SPIn_SS pin to low state.

Definition at line 264 of file spi.h.

◆ SPI_SET_SUSPEND_CYCLE

#define SPI_SET_SUSPEND_CYCLE (   spi,
  u32SuspCycle 
)    ((spi)->CTL = ((spi)->CTL & ~SPI_CTL_SUSPITV_Msk) | ((u32SuspCycle) << SPI_CTL_SUSPITV_Pos))

Set the length of suspend interval.

Parameters
[in]spiThe pointer of the specified SPI module.
[in]u32SuspCycleDecides the length of suspend interval. It could be 0 ~ 15.
Returns
None.

Set the length of suspend interval according to u32SuspCycle. The length of suspend interval is ((u32SuspCycle + 0.5) * the length of one SPI bus clock cycle).

Definition at line 290 of file spi.h.

◆ SPI_TRIGGER_RX_PDMA

#define SPI_TRIGGER_RX_PDMA (   spi)    ((spi)->PDMACTL |= SPI_PDMACTL_RXPDMAEN_Msk)

Trigger RX PDMA function.

Parameters
[in]spiThe pointer of the specified SPI module.
Returns
None.

Set RXPDMAEN bit of SPI_PDMACTL register to enable RX PDMA transfer function.

Definition at line 172 of file spi.h.

◆ SPI_TRIGGER_TX_PDMA

#define SPI_TRIGGER_TX_PDMA (   spi)    ((spi)->PDMACTL |= SPI_PDMACTL_TXPDMAEN_Msk)

Trigger TX PDMA function.

Parameters
[in]spiThe pointer of the specified SPI module.
Returns
None.

Set TXPDMAEN bit of SPI_PDMACTL register to enable TX PDMA transfer function.

Definition at line 180 of file spi.h.

◆ SPI_WRITE_TX

#define SPI_WRITE_TX (   spi,
  u32TxData 
)    ((spi)->TX = (u32TxData))

Write datum to TX register.

Parameters
[in]spiThe pointer of the specified SPI module.
[in]u32TxDataThe datum which user attempt to transfer through SPI bus.
Returns
None.

Write u32TxData to SPI_TX register.

Definition at line 248 of file spi.h.

Function Documentation

◆ SPI_ClearIntFlag()

void SPI_ClearIntFlag ( SPI_T spi,
uint32_t  u32Mask 
)

Clear interrupt flag.

Parameters
[in]spiThe pointer of the specified SPI module.
[in]u32MaskThe combination of all related interrupt sources. Each bit corresponds to a interrupt source. This parameter decides which interrupt flags will be cleared. It could be the combination of:
Returns
None

Clear SPI related interrupt flags specified by u32Mask parameter.

Definition at line 658 of file spi.c.

◆ SPI_ClearRxFIFO()

void SPI_ClearRxFIFO ( SPI_T spi)

Clear RX FIFO buffer.

Parameters
[in]spiThe pointer of the specified SPI module.
Returns
None

This function will clear SPI RX FIFO buffer. The RXEMPTY (SPI_STATUS[8]) will be set to 1.

Definition at line 212 of file spi.c.

◆ SPI_ClearTxFIFO()

void SPI_ClearTxFIFO ( SPI_T spi)

Clear TX FIFO buffer.

Parameters
[in]spiThe pointer of the specified SPI module.
Returns
None

This function will clear SPI TX FIFO buffer. The TXEMPTY (SPI_STATUS[16]) will be set to 1.

Note
The TX shift register will not be cleared.

Definition at line 224 of file spi.c.

◆ SPI_Close()

void SPI_Close ( SPI_T spi)

Disable SPI controller.

Parameters
[in]spiThe pointer of the specified SPI module.
Returns
None

This function will reset SPI controller.

Definition at line 190 of file spi.c.

◆ SPI_DisableAutoSS()

void SPI_DisableAutoSS ( SPI_T spi)

Disable the automatic slave selection function.

Parameters
[in]spiThe pointer of the specified SPI module.
Returns
None

This function will disable the automatic slave selection function and set slave selection signal to inactive state.

Definition at line 235 of file spi.c.

◆ SPI_DisableInt()

void SPI_DisableInt ( SPI_T spi,
uint32_t  u32Mask 
)

Disable interrupt function.

Parameters
[in]spiThe pointer of the specified SPI module.
[in]u32MaskThe combination of all related interrupt enable bits. Each bit corresponds to a interrupt bit. This parameter decides which interrupts will be disabled. It is combination of:
Returns
None

Disable SPI related interrupts specified by u32Mask parameter.

Definition at line 520 of file spi.c.

◆ SPI_EnableAutoSS()

void SPI_EnableAutoSS ( SPI_T spi,
uint32_t  u32SSPinMask,
uint32_t  u32ActiveLevel 
)

Enable the automatic slave selection function.

Parameters
[in]spiThe pointer of the specified SPI module.
[in]u32SSPinMaskSpecifies slave selection pins. (SPI_SS)
[in]u32ActiveLevelSpecifies the active level of slave selection signal. (SPI_SS_ACTIVE_HIGH, SPI_SS_ACTIVE_LOW)
Returns
None

This function will enable the automatic slave selection function. Only available in Master mode. The slave selection pin and the active level will be set in this function.

Definition at line 249 of file spi.c.

◆ SPI_EnableInt()

void SPI_EnableInt ( SPI_T spi,
uint32_t  u32Mask 
)

Enable interrupt function.

Parameters
[in]spiThe pointer of the specified SPI module.
[in]u32MaskThe combination of all related interrupt enable bits. Each bit corresponds to a interrupt enable bit. This parameter decides which interrupts will be enabled. It is combination of:
Returns
None

Enable SPI related interrupts specified by u32Mask parameter.

Definition at line 452 of file spi.c.

◆ SPI_GetBusClock()

uint32_t SPI_GetBusClock ( SPI_T spi)

Get the actual frequency of SPI bus clock. Only available in Master mode.

Parameters
[in]spiThe pointer of the specified SPI module.
Returns
Actual SPI bus clock frequency in Hz.

This function will calculate the actual SPI bus clock rate according to the SPInSEL and DIVIDER settings. Only available in Master mode.

Definition at line 380 of file spi.c.

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◆ SPI_GetIntFlag()

uint32_t SPI_GetIntFlag ( SPI_T spi,
uint32_t  u32Mask 
)

Get interrupt flag.

Parameters
[in]spiThe pointer of the specified SPI module.
[in]u32MaskThe combination of all related interrupt sources. Each bit corresponds to a interrupt source. This parameter decides which interrupt flags will be read. It is combination of:
Returns
Interrupt flags of selected sources.

Get SPI related interrupt flags specified by u32Mask parameter.

Definition at line 588 of file spi.c.

◆ SPI_GetStatus()

uint32_t SPI_GetStatus ( SPI_T spi,
uint32_t  u32Mask 
)

Get SPI status.

Parameters
[in]spiThe pointer of the specified SPI module.
[in]u32MaskThe combination of all related sources. Each bit corresponds to a source. This parameter decides which flags will be read. It is combination of:
Returns
Flags of selected sources.

Get SPI related status specified by u32Mask parameter.

Definition at line 706 of file spi.c.

◆ SPI_Open()

uint32_t SPI_Open ( SPI_T spi,
uint32_t  u32MasterSlave,
uint32_t  u32SPIMode,
uint32_t  u32DataWidth,
uint32_t  u32BusClock 
)

This function make SPI module be ready to transfer.

Parameters
[in]spiThe pointer of the specified SPI module.
[in]u32MasterSlaveDecides the SPI module is operating in master mode or in slave mode. (SPI_SLAVE, SPI_MASTER)
[in]u32SPIModeDecides the transfer timing. (SPI_MODE_0, SPI_MODE_1, SPI_MODE_2, SPI_MODE_3)
[in]u32DataWidthDecides the data width of a SPI transaction.
[in]u32BusClockThe expected frequency of SPI bus clock in Hz.
Returns
Actual frequency of SPI peripheral clock.

By default, the SPI transfer sequence is MSB first, the slave selection signal is active low and the automatic slave selection function is disabled. In Slave mode, the u32BusClock shall be NULL and the SPI clock divider setting will be 0. The actual clock rate may be different from the target SPI clock rate. For example, if the SPI source clock rate is 12MHz and the target SPI bus clock rate is 7MHz, the actual SPI clock rate will be 6MHz.

Note
If u32BusClock = 0, DIVIDER setting will be set to the maximum value.
If u32BusClock >= system clock frequency, SPI peripheral clock source will be set to APB clock and DIVIDER will be set to 0.
If u32BusClock >= SPI peripheral clock source, DIVIDER will be set to 0.
In slave mode, the SPI peripheral clock rate will be equal to APB clock rate.

Definition at line 41 of file spi.c.

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◆ SPI_SetBusClock()

uint32_t SPI_SetBusClock ( SPI_T spi,
uint32_t  u32BusClock 
)

Set the SPI bus clock.

Parameters
[in]spiThe pointer of the specified SPI module.
[in]u32BusClockThe expected frequency of SPI bus clock in Hz.
Returns
Actual frequency of SPI bus clock.

This function is only available in Master mode. The actual clock rate may be different from the target SPI bus clock rate. For example, if the SPI source clock rate is 12MHz and the target SPI bus clock rate is 7MHz, the actual SPI bus clock rate will be 6MHz.

Note
If u32BusClock = 0, DIVIDER setting will be set to the maximum value.
If u32BusClock >= system clock frequency, SPI peripheral clock source will be set to APB clock and DIVIDER will be set to 0.
If u32BusClock >= SPI peripheral clock source, DIVIDER will be set to 0.

Definition at line 266 of file spi.c.

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◆ SPI_SetFIFO()

void SPI_SetFIFO ( SPI_T spi,
uint32_t  u32TxThreshold,
uint32_t  u32RxThreshold 
)

Configure FIFO threshold setting.

Parameters
[in]spiThe pointer of the specified SPI module.
[in]u32TxThresholdDecides the TX FIFO threshold. For SPI0, it could be 0 ~ 7. For SPI1, it could be 0 ~ 3.
[in]u32RxThresholdDecides the RX FIFO threshold. For SPI0, it could be 0 ~ 7. For SPI1, it could be 0 ~ 3.
Returns
None

Set TX FIFO threshold and RX FIFO threshold configurations.

Definition at line 367 of file spi.c.