M471M/R1/S BSP V3.01.000
The Board Support Package for M4521
Modules | Macros
EADC Exported Constants
Collaboration diagram for EADC Exported Constants:

Modules

 EADC Exported Functions
 

Macros

#define EADC_CTL_DIFFEN_SINGLE_END   (0UL<<EADC_CTL_DIFFEN_Pos)
 
#define EADC_CTL_DIFFEN_DIFFERENTIAL   (1UL<<EADC_CTL_DIFFEN_Pos)
 
#define EADC_CTL_DMOF_STRAIGHT_BINARY   (0UL<<EADC_CTL_DMOF_Pos)
 
#define EADC_CTL_DMOF_TWOS_COMPLEMENT   (1UL<<EADC_CTL_DMOF_Pos)
 
#define EADC_CTL_SMPTSEL1   (0UL<<EADC_CTL_SMPTSEL_Pos)
 
#define EADC_CTL_SMPTSEL2   (1UL<<EADC_CTL_SMPTSEL_Pos)
 
#define EADC_CTL_SMPTSEL3   (2UL<<EADC_CTL_SMPTSEL_Pos)
 
#define EADC_CTL_SMPTSEL4   (3UL<<EADC_CTL_SMPTSEL_Pos)
 
#define EADC_CTL_SMPTSEL5   (4UL<<EADC_CTL_SMPTSEL_Pos)
 
#define EADC_CTL_SMPTSEL6   (5UL<<EADC_CTL_SMPTSEL_Pos)
 
#define EADC_CTL_SMPTSEL7   (6UL<<EADC_CTL_SMPTSEL_Pos)
 
#define EADC_CTL_SMPTSEL8   (7UL<<EADC_CTL_SMPTSEL_Pos)
 
#define EADC_SCTL_CHSEL(x)   ((x) << EADC_SCTL_CHSEL_Pos)
 
#define EADC_SCTL_TRGDLYDIV(x)   ((x) << EADC_SCTL_TRGDLYDIV_Pos)
 
#define EADC_SCTL_TRGDLYCNT(x)   ((x) << EADC_SCTL_TRGDLYCNT_Pos)
 
#define EADC_SOFTWARE_TRIGGER   (0UL<<EADC_SCTL_TRGSEL_Pos)
 
#define EADC_FALLING_EDGE_TRIGGER   (EADC_SCTL_EXTFEN_Msk | (1UL<<EADC_SCTL_TRGSEL_Pos))
 
#define EADC_RISING_EDGE_TRIGGER   (EADC_SCTL_EXTREN_Msk | (1UL<<EADC_SCTL_TRGSEL_Pos))
 
#define EADC_FALLING_RISING_EDGE_TRIGGER   (EADC_SCTL_EXTFEN_Msk | EADC_SCTL_EXTREN_Msk | (1UL<<EADC_SCTL_TRGSEL_Pos))
 
#define EADC_ADINT0_TRIGGER   (2UL<<EADC_SCTL_TRGSEL_Pos)
 
#define EADC_ADINT1_TRIGGER   (3UL<<EADC_SCTL_TRGSEL_Pos)
 
#define EADC_TIMER0_TRIGGER   (4UL<<EADC_SCTL_TRGSEL_Pos)
 
#define EADC_TIMER1_TRIGGER   (5UL<<EADC_SCTL_TRGSEL_Pos)
 
#define EADC_TIMER2_TRIGGER   (6UL<<EADC_SCTL_TRGSEL_Pos)
 
#define EADC_TIMER3_TRIGGER   (7UL<<EADC_SCTL_TRGSEL_Pos)
 
#define EADC_PWM0TG0_TRIGGER   (8UL<<EADC_SCTL_TRGSEL_Pos)
 
#define EADC_PWM0TG1_TRIGGER   (9UL<<EADC_SCTL_TRGSEL_Pos)
 
#define EADC_PWM0TG2_TRIGGER   (0xAUL<<EADC_SCTL_TRGSEL_Pos)
 
#define EADC_PWM0TG3_TRIGGER   (0xBUL<<EADC_SCTL_TRGSEL_Pos)
 
#define EADC_PWM0TG4_TRIGGER   (0xCUL<<EADC_SCTL_TRGSEL_Pos)
 
#define EADC_PWM0TG5_TRIGGER   (0xDUL<<EADC_SCTL_TRGSEL_Pos)
 
#define EADC_PWM1TG0_TRIGGER   (0xEUL<<EADC_SCTL_TRGSEL_Pos)
 
#define EADC_PWM1TG1_TRIGGER   (0xFUL<<EADC_SCTL_TRGSEL_Pos)
 
#define EADC_PWM1TG2_TRIGGER   (0x10UL<<EADC_SCTL_TRGSEL_Pos)
 
#define EADC_PWM1TG3_TRIGGER   (0x11UL<<EADC_SCTL_TRGSEL_Pos)
 
#define EADC_PWM1TG4_TRIGGER   (0x12UL<<EADC_SCTL_TRGSEL_Pos)
 
#define EADC_PWM1TG5_TRIGGER   (0x13UL<<EADC_SCTL_TRGSEL_Pos)
 
#define EADC_SCTL_TRGDLYDIV_DIVIDER_1   (0<<EADC_SCTL_TRGDLYDIV_Pos)
 
#define EADC_SCTL_TRGDLYDIV_DIVIDER_2   (0x1UL<<EADC_SCTL_TRGDLYDIV_Pos)
 
#define EADC_SCTL_TRGDLYDIV_DIVIDER_4   (0x2UL<<EADC_SCTL_TRGDLYDIV_Pos)
 
#define EADC_SCTL_TRGDLYDIV_DIVIDER_16   (0x3UL<<EADC_SCTL_TRGDLYDIV_Pos)
 
#define EADC_CMP_CMPCOND_LESS_THAN   (0UL<<EADC_CMP_CMPCOND_Pos)
 
#define EADC_CMP_CMPCOND_GREATER_OR_EQUAL   (1UL<<EADC_CMP_CMPCOND_Pos)
 
#define EADC_CMP_CMPWEN_ENABLE   (EADC_CMP_CMPWEN_Msk)
 
#define EADC_CMP_CMPWEN_DISABLE   (~EADC_CMP_CMPWEN_Msk)
 
#define EADC_CMP_ADCMPIE_ENABLE   (EADC_CMP_ADCMPIE_Msk)
 
#define EADC_CMP_ADCMPIE_DISABLE   (~EADC_CMP_ADCMPIE_Msk)
 

Detailed Description

Macro Definition Documentation

◆ EADC_ADINT0_TRIGGER

#define EADC_ADINT0_TRIGGER   (2UL<<EADC_SCTL_TRGSEL_Pos)

ADC ADINT0 interrupt EOC pulse trigger

Definition at line 64 of file eadc.h.

◆ EADC_ADINT1_TRIGGER

#define EADC_ADINT1_TRIGGER   (3UL<<EADC_SCTL_TRGSEL_Pos)

ADC ADINT1 interrupt EOC pulse trigger

Definition at line 65 of file eadc.h.

◆ EADC_CMP_ADCMPIE_DISABLE

#define EADC_CMP_ADCMPIE_DISABLE   (~EADC_CMP_ADCMPIE_Msk)

A/D result compare interrupt disable

Definition at line 97 of file eadc.h.

◆ EADC_CMP_ADCMPIE_ENABLE

#define EADC_CMP_ADCMPIE_ENABLE   (EADC_CMP_ADCMPIE_Msk)

A/D result compare interrupt enable

Definition at line 96 of file eadc.h.

◆ EADC_CMP_CMPCOND_GREATER_OR_EQUAL

#define EADC_CMP_CMPCOND_GREATER_OR_EQUAL   (1UL<<EADC_CMP_CMPCOND_Pos)

The compare condition is "greater than or equal to"

Definition at line 93 of file eadc.h.

◆ EADC_CMP_CMPCOND_LESS_THAN

#define EADC_CMP_CMPCOND_LESS_THAN   (0UL<<EADC_CMP_CMPCOND_Pos)

The compare condition is "less than"

Definition at line 92 of file eadc.h.

◆ EADC_CMP_CMPWEN_DISABLE

#define EADC_CMP_CMPWEN_DISABLE   (~EADC_CMP_CMPWEN_Msk)

Compare window mode disable

Definition at line 95 of file eadc.h.

◆ EADC_CMP_CMPWEN_ENABLE

#define EADC_CMP_CMPWEN_ENABLE   (EADC_CMP_CMPWEN_Msk)

Compare window mode enable

Definition at line 94 of file eadc.h.

◆ EADC_CTL_DIFFEN_DIFFERENTIAL

#define EADC_CTL_DIFFEN_DIFFERENTIAL   (1UL<<EADC_CTL_DIFFEN_Pos)

Differential input mode

Definition at line 39 of file eadc.h.

◆ EADC_CTL_DIFFEN_SINGLE_END

#define EADC_CTL_DIFFEN_SINGLE_END   (0UL<<EADC_CTL_DIFFEN_Pos)

Single-end input mode

Definition at line 38 of file eadc.h.

◆ EADC_CTL_DMOF_STRAIGHT_BINARY

#define EADC_CTL_DMOF_STRAIGHT_BINARY   (0UL<<EADC_CTL_DMOF_Pos)

Select the straight binary format as the output format of the conversion result

Definition at line 41 of file eadc.h.

◆ EADC_CTL_DMOF_TWOS_COMPLEMENT

#define EADC_CTL_DMOF_TWOS_COMPLEMENT   (1UL<<EADC_CTL_DMOF_Pos)

Select the 2's complement format as the output format of the conversion result

Definition at line 42 of file eadc.h.

◆ EADC_CTL_SMPTSEL1

#define EADC_CTL_SMPTSEL1   (0UL<<EADC_CTL_SMPTSEL_Pos)

1 ADC clock sampling time

Definition at line 44 of file eadc.h.

◆ EADC_CTL_SMPTSEL2

#define EADC_CTL_SMPTSEL2   (1UL<<EADC_CTL_SMPTSEL_Pos)

2 ADC clock sampling time

Definition at line 45 of file eadc.h.

◆ EADC_CTL_SMPTSEL3

#define EADC_CTL_SMPTSEL3   (2UL<<EADC_CTL_SMPTSEL_Pos)

3 ADC clock sampling time

Definition at line 46 of file eadc.h.

◆ EADC_CTL_SMPTSEL4

#define EADC_CTL_SMPTSEL4   (3UL<<EADC_CTL_SMPTSEL_Pos)

4 ADC clock sampling time

Definition at line 47 of file eadc.h.

◆ EADC_CTL_SMPTSEL5

#define EADC_CTL_SMPTSEL5   (4UL<<EADC_CTL_SMPTSEL_Pos)

5 ADC clock sampling time

Definition at line 48 of file eadc.h.

◆ EADC_CTL_SMPTSEL6

#define EADC_CTL_SMPTSEL6   (5UL<<EADC_CTL_SMPTSEL_Pos)

6 ADC clock sampling time

Definition at line 49 of file eadc.h.

◆ EADC_CTL_SMPTSEL7

#define EADC_CTL_SMPTSEL7   (6UL<<EADC_CTL_SMPTSEL_Pos)

7 ADC clock sampling time

Definition at line 50 of file eadc.h.

◆ EADC_CTL_SMPTSEL8

#define EADC_CTL_SMPTSEL8   (7UL<<EADC_CTL_SMPTSEL_Pos)

8 ADC clock sampling time

Definition at line 51 of file eadc.h.

◆ EADC_FALLING_EDGE_TRIGGER

#define EADC_FALLING_EDGE_TRIGGER   (EADC_SCTL_EXTFEN_Msk | (1UL<<EADC_SCTL_TRGSEL_Pos))

STADC pin falling edge trigger

Definition at line 61 of file eadc.h.

◆ EADC_FALLING_RISING_EDGE_TRIGGER

#define EADC_FALLING_RISING_EDGE_TRIGGER   (EADC_SCTL_EXTFEN_Msk | EADC_SCTL_EXTREN_Msk | (1UL<<EADC_SCTL_TRGSEL_Pos))

STADC pin both falling and rising edge trigger

Definition at line 63 of file eadc.h.

◆ EADC_PWM0TG0_TRIGGER

#define EADC_PWM0TG0_TRIGGER   (8UL<<EADC_SCTL_TRGSEL_Pos)

PWM0TG0 trigger

Definition at line 70 of file eadc.h.

◆ EADC_PWM0TG1_TRIGGER

#define EADC_PWM0TG1_TRIGGER   (9UL<<EADC_SCTL_TRGSEL_Pos)

PWM0TG1 trigger

Definition at line 71 of file eadc.h.

◆ EADC_PWM0TG2_TRIGGER

#define EADC_PWM0TG2_TRIGGER   (0xAUL<<EADC_SCTL_TRGSEL_Pos)

PWM0TG2 trigger

Definition at line 72 of file eadc.h.

◆ EADC_PWM0TG3_TRIGGER

#define EADC_PWM0TG3_TRIGGER   (0xBUL<<EADC_SCTL_TRGSEL_Pos)

PWM0TG3 trigger

Definition at line 73 of file eadc.h.

◆ EADC_PWM0TG4_TRIGGER

#define EADC_PWM0TG4_TRIGGER   (0xCUL<<EADC_SCTL_TRGSEL_Pos)

PWM0TG4 trigger

Definition at line 74 of file eadc.h.

◆ EADC_PWM0TG5_TRIGGER

#define EADC_PWM0TG5_TRIGGER   (0xDUL<<EADC_SCTL_TRGSEL_Pos)

PWM0TG5 trigger

Definition at line 75 of file eadc.h.

◆ EADC_PWM1TG0_TRIGGER

#define EADC_PWM1TG0_TRIGGER   (0xEUL<<EADC_SCTL_TRGSEL_Pos)

PWM1TG0 trigger

Definition at line 76 of file eadc.h.

◆ EADC_PWM1TG1_TRIGGER

#define EADC_PWM1TG1_TRIGGER   (0xFUL<<EADC_SCTL_TRGSEL_Pos)

PWM1TG1 trigger

Definition at line 77 of file eadc.h.

◆ EADC_PWM1TG2_TRIGGER

#define EADC_PWM1TG2_TRIGGER   (0x10UL<<EADC_SCTL_TRGSEL_Pos)

PWM1TG2 trigger

Definition at line 78 of file eadc.h.

◆ EADC_PWM1TG3_TRIGGER

#define EADC_PWM1TG3_TRIGGER   (0x11UL<<EADC_SCTL_TRGSEL_Pos)

PWM1TG3 trigger

Definition at line 79 of file eadc.h.

◆ EADC_PWM1TG4_TRIGGER

#define EADC_PWM1TG4_TRIGGER   (0x12UL<<EADC_SCTL_TRGSEL_Pos)

PWM1TG4 trigger

Definition at line 80 of file eadc.h.

◆ EADC_PWM1TG5_TRIGGER

#define EADC_PWM1TG5_TRIGGER   (0x13UL<<EADC_SCTL_TRGSEL_Pos)

PWM1TG5 trigger

Definition at line 81 of file eadc.h.

◆ EADC_RISING_EDGE_TRIGGER

#define EADC_RISING_EDGE_TRIGGER   (EADC_SCTL_EXTREN_Msk | (1UL<<EADC_SCTL_TRGSEL_Pos))

STADC pin rising edge trigger

Definition at line 62 of file eadc.h.

◆ EADC_SCTL_CHSEL

#define EADC_SCTL_CHSEL (   x)    ((x) << EADC_SCTL_CHSEL_Pos)

A/D sample module channel selection

Definition at line 56 of file eadc.h.

◆ EADC_SCTL_TRGDLYCNT

#define EADC_SCTL_TRGDLYCNT (   x)    ((x) << EADC_SCTL_TRGDLYCNT_Pos)

A/D sample module start of conversion trigger delay time

Definition at line 58 of file eadc.h.

◆ EADC_SCTL_TRGDLYDIV

#define EADC_SCTL_TRGDLYDIV (   x)    ((x) << EADC_SCTL_TRGDLYDIV_Pos)

A/D sample module start of conversion trigger delay clock divider selection

Definition at line 57 of file eadc.h.

◆ EADC_SCTL_TRGDLYDIV_DIVIDER_1

#define EADC_SCTL_TRGDLYDIV_DIVIDER_1   (0<<EADC_SCTL_TRGDLYDIV_Pos)

Trigger delay clock frequency is ADC_CLK/1

Definition at line 83 of file eadc.h.

◆ EADC_SCTL_TRGDLYDIV_DIVIDER_16

#define EADC_SCTL_TRGDLYDIV_DIVIDER_16   (0x3UL<<EADC_SCTL_TRGDLYDIV_Pos)

Trigger delay clock frequency is ADC_CLK/16

Definition at line 86 of file eadc.h.

◆ EADC_SCTL_TRGDLYDIV_DIVIDER_2

#define EADC_SCTL_TRGDLYDIV_DIVIDER_2   (0x1UL<<EADC_SCTL_TRGDLYDIV_Pos)

Trigger delay clock frequency is ADC_CLK/2

Definition at line 84 of file eadc.h.

◆ EADC_SCTL_TRGDLYDIV_DIVIDER_4

#define EADC_SCTL_TRGDLYDIV_DIVIDER_4   (0x2UL<<EADC_SCTL_TRGDLYDIV_Pos)

Trigger delay clock frequency is ADC_CLK/4

Definition at line 85 of file eadc.h.

◆ EADC_SOFTWARE_TRIGGER

#define EADC_SOFTWARE_TRIGGER   (0UL<<EADC_SCTL_TRGSEL_Pos)

Software trigger

Definition at line 60 of file eadc.h.

◆ EADC_TIMER0_TRIGGER

#define EADC_TIMER0_TRIGGER   (4UL<<EADC_SCTL_TRGSEL_Pos)

Timer0 overflow pulse trigger

Definition at line 66 of file eadc.h.

◆ EADC_TIMER1_TRIGGER

#define EADC_TIMER1_TRIGGER   (5UL<<EADC_SCTL_TRGSEL_Pos)

Timer1 overflow pulse trigger

Definition at line 67 of file eadc.h.

◆ EADC_TIMER2_TRIGGER

#define EADC_TIMER2_TRIGGER   (6UL<<EADC_SCTL_TRGSEL_Pos)

Timer2 overflow pulse trigger

Definition at line 68 of file eadc.h.

◆ EADC_TIMER3_TRIGGER

#define EADC_TIMER3_TRIGGER   (7UL<<EADC_SCTL_TRGSEL_Pos)

Timer3 overflow pulse trigger

Definition at line 69 of file eadc.h.