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M471M/R1/S BSP V3.01.000
The Board Support Package for M4521
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Modules | |
SYS Exported Functions | |
#define CRC_RST ((0x0<<24) | SYS_IPRST0_CRCRST_Pos ) |
#define EADC_RST ((0x4<<24) | SYS_IPRST1_EADCRST_Pos ) |
#define EBI_RST ((0x0<<24) | SYS_IPRST0_EBIRST_Pos ) |
#define GPIO_RST ((0x4<<24) | SYS_IPRST1_GPIORST_Pos ) |
#define I2C0_RST ((0x4<<24) | SYS_IPRST1_I2C0RST_Pos ) |
#define I2C1_RST ((0x4<<24) | SYS_IPRST1_I2C1RST_Pos ) |
#define PDMA_RST ((0x0<<24) | SYS_IPRST0_PDMARST_Pos ) |
#define PWM0_RST ((0x8<<24) | SYS_IPRST2_PWM0RST_Pos ) |
#define PWM1_RST ((0x8<<24) | SYS_IPRST2_PWM1RST_Pos ) |
#define SC0_RST ((0x8<<24) | SYS_IPRST2_SC0RST_Pos ) |
#define SPI0_RST ((0x4<<24) | SYS_IPRST1_SPI0RST_Pos ) |
#define SPI1_RST ((0x4<<24) | SYS_IPRST1_SPI1RST_Pos ) |
#define SYS_BODCTL_BOD_INTERRUPT_EN (0UL<<SYS_BODCTL_BODRSTEN_Pos) |
#define SYS_BODCTL_BOD_RST_EN (1UL<<SYS_BODCTL_BODRSTEN_Pos) |
#define SYS_BODCTL_BODVL_2_2V (0UL<<SYS_BODCTL_BODVL_Pos) |
#define SYS_BODCTL_BODVL_2_7V (1UL<<SYS_BODCTL_BODVL_Pos) |
#define SYS_BODCTL_BODVL_3_7V (2UL<<SYS_BODCTL_BODVL_Pos) |
#define SYS_BODCTL_BODVL_4_5V (3UL<<SYS_BODCTL_BODVL_Pos) |
#define SYS_GPA_MFPL_PA0MFP_EBI_AD0 (7ul << SYS_GPA_MFPL_PA0MFP_Pos) |
#define SYS_GPA_MFPL_PA0MFP_GPIO (0ul << SYS_GPA_MFPL_PA0MFP_Pos) |
#define SYS_GPA_MFPL_PA0MFP_INT0 (8ul << SYS_GPA_MFPL_PA0MFP_Pos) |
#define SYS_GPA_MFPL_PA0MFP_PWM1_CH5 (6ul << SYS_GPA_MFPL_PA0MFP_Pos) |
#define SYS_GPA_MFPL_PA0MFP_SC0_CLK (5ul << SYS_GPA_MFPL_PA0MFP_Pos) |
#define SYS_GPA_MFPL_PA0MFP_SPI1_I2SMCLK (9ul << SYS_GPA_MFPL_PA0MFP_Pos) |
#define SYS_GPA_MFPL_PA0MFP_UART1_nCTS (1ul << SYS_GPA_MFPL_PA0MFP_Pos) |
#define SYS_GPA_MFPL_PA0MFP_UART1_TXD (3ul << SYS_GPA_MFPL_PA0MFP_Pos) |
#define SYS_GPA_MFPL_PA1MFP_EBI_AD1 (7ul << SYS_GPA_MFPL_PA1MFP_Pos) |
#define SYS_GPA_MFPL_PA1MFP_GPIO (0ul << SYS_GPA_MFPL_PA1MFP_Pos) |
#define SYS_GPA_MFPL_PA1MFP_PWM1_CH4 (6ul << SYS_GPA_MFPL_PA1MFP_Pos) |
#define SYS_GPA_MFPL_PA1MFP_SC0_DAT (5ul << SYS_GPA_MFPL_PA1MFP_Pos) |
#define SYS_GPA_MFPL_PA1MFP_STADC (10ul << SYS_GPA_MFPL_PA1MFP_Pos) |
#define SYS_GPA_MFPL_PA1MFP_UART1_nRTS (1ul << SYS_GPA_MFPL_PA1MFP_Pos) |
#define SYS_GPA_MFPL_PA1MFP_UART1_RXD (3ul << SYS_GPA_MFPL_PA1MFP_Pos) |
#define SYS_GPA_MFPL_PA2MFP_EBI_AD2 (7ul << SYS_GPA_MFPL_PA2MFP_Pos) |
#define SYS_GPA_MFPL_PA2MFP_GPIO (0ul << SYS_GPA_MFPL_PA2MFP_Pos) |
#define SYS_GPA_MFPL_PA2MFP_I2C0_SDA (4ul << SYS_GPA_MFPL_PA2MFP_Pos) |
#define SYS_GPA_MFPL_PA2MFP_PWM1_CH3 (6ul << SYS_GPA_MFPL_PA2MFP_Pos) |
#define SYS_GPA_MFPL_PA2MFP_SC0_RST (5ul << SYS_GPA_MFPL_PA2MFP_Pos) |
#define SYS_GPA_MFPL_PA2MFP_UART0_nCTS (3ul << SYS_GPA_MFPL_PA2MFP_Pos) |
#define SYS_GPA_MFPL_PA2MFP_UART0_TXD (2ul << SYS_GPA_MFPL_PA2MFP_Pos) |
#define SYS_GPA_MFPL_PA2MFP_USB_VBUS_EN (1ul << SYS_GPA_MFPL_PA2MFP_Pos) |
#define SYS_GPA_MFPL_PA3MFP_EBI_AD3 (7ul << SYS_GPA_MFPL_PA3MFP_Pos) |
#define SYS_GPA_MFPL_PA3MFP_GPIO (0ul << SYS_GPA_MFPL_PA3MFP_Pos) |
#define SYS_GPA_MFPL_PA3MFP_I2C0_SCL (4ul << SYS_GPA_MFPL_PA3MFP_Pos) |
#define SYS_GPA_MFPL_PA3MFP_PWM1_CH2 (6ul << SYS_GPA_MFPL_PA3MFP_Pos) |
#define SYS_GPA_MFPL_PA3MFP_SC0_PWR (5ul << SYS_GPA_MFPL_PA3MFP_Pos) |
#define SYS_GPA_MFPL_PA3MFP_UART0_nRTS (3ul << SYS_GPA_MFPL_PA3MFP_Pos) |
#define SYS_GPA_MFPL_PA3MFP_UART0_RXD (2ul << SYS_GPA_MFPL_PA3MFP_Pos) |
#define SYS_GPA_MFPL_PA3MFP_USB_VBUS_ST (1ul << SYS_GPA_MFPL_PA3MFP_Pos) |
#define SYS_GPB_MFPH_PB11MFP_EADC_CH8 (1ul << SYS_GPB_MFPH_PB11MFP_Pos) |
#define SYS_GPB_MFPH_PB11MFP_GPIO (0ul << SYS_GPB_MFPH_PB11MFP_Pos) |
#define SYS_GPB_MFPH_PB12MFP_EADC_CH9 (1ul << SYS_GPB_MFPH_PB12MFP_Pos) |
#define SYS_GPB_MFPH_PB12MFP_GPIO (0ul << SYS_GPB_MFPH_PB12MFP_Pos) |
#define SYS_GPB_MFPH_PB15MFP_EADC_CH12 (1ul << SYS_GPB_MFPH_PB15MFP_Pos) |
#define SYS_GPB_MFPH_PB15MFP_EBI_nCS1 (7ul << SYS_GPB_MFPH_PB15MFP_Pos) |
#define SYS_GPB_MFPH_PB15MFP_GPIO (0ul << SYS_GPB_MFPH_PB15MFP_Pos) |
#define SYS_GPB_MFPH_PB8MFP_EADC_CH5 (1ul << SYS_GPB_MFPH_PB8MFP_Pos) |
#define SYS_GPB_MFPH_PB8MFP_GPIO (0ul << SYS_GPB_MFPH_PB8MFP_Pos) |
#define SYS_GPB_MFPH_PB8MFP_PWM0_CH2 (6ul << SYS_GPB_MFPH_PB8MFP_Pos) |
#define SYS_GPB_MFPH_PB8MFP_UART1_nRTS (4ul << SYS_GPB_MFPH_PB8MFP_Pos) |
#define SYS_GPB_MFPL_PB0MFP_EADC_CH0 (1ul << SYS_GPB_MFPL_PB0MFP_Pos) |
#define SYS_GPB_MFPL_PB0MFP_EBI_nWRL (7ul << SYS_GPB_MFPL_PB0MFP_Pos) |
#define SYS_GPB_MFPL_PB0MFP_GPIO (0ul << SYS_GPB_MFPL_PB0MFP_Pos) |
#define SYS_GPB_MFPL_PB0MFP_INT1 (8ul << SYS_GPB_MFPL_PB0MFP_Pos) |
#define SYS_GPB_MFPL_PB0MFP_SPI0_MOSI1 (2ul << SYS_GPB_MFPL_PB0MFP_Pos) |
#define SYS_GPB_MFPL_PB0MFP_T2 (4ul << SYS_GPB_MFPL_PB0MFP_Pos) |
#define SYS_GPB_MFPL_PB0MFP_UART2_RXD (3ul << SYS_GPB_MFPL_PB0MFP_Pos) |
#define SYS_GPB_MFPL_PB1MFP_EADC_CH1 (1ul << SYS_GPB_MFPL_PB1MFP_Pos) |
#define SYS_GPB_MFPL_PB1MFP_EBI_nWRH (7ul << SYS_GPB_MFPL_PB1MFP_Pos) |
#define SYS_GPB_MFPL_PB1MFP_GPIO (0ul << SYS_GPB_MFPL_PB1MFP_Pos) |
#define SYS_GPB_MFPL_PB1MFP_PWM0_SYNC_OUT (6ul << SYS_GPB_MFPL_PB1MFP_Pos) |
#define SYS_GPB_MFPL_PB1MFP_SC0_RST (5ul << SYS_GPB_MFPL_PB1MFP_Pos) |
#define SYS_GPB_MFPL_PB1MFP_SPI0_MISO1 (2ul << SYS_GPB_MFPL_PB1MFP_Pos) |
#define SYS_GPB_MFPL_PB1MFP_T3 (4ul << SYS_GPB_MFPL_PB1MFP_Pos) |
#define SYS_GPB_MFPL_PB1MFP_UART2_TXD (3ul << SYS_GPB_MFPL_PB1MFP_Pos) |
#define SYS_GPB_MFPL_PB2MFP_EADC_CH2 (1ul << SYS_GPB_MFPL_PB2MFP_Pos) |
#define SYS_GPB_MFPL_PB2MFP_GPIO (0ul << SYS_GPB_MFPL_PB2MFP_Pos) |
#define SYS_GPB_MFPL_PB2MFP_SC0_CD (5ul << SYS_GPB_MFPL_PB2MFP_Pos) |
#define SYS_GPB_MFPL_PB2MFP_SPI0_CLK (2ul << SYS_GPB_MFPL_PB2MFP_Pos) |
#define SYS_GPB_MFPL_PB2MFP_SPI1_CLK (3ul << SYS_GPB_MFPL_PB2MFP_Pos) |
#define SYS_GPB_MFPL_PB2MFP_T2_EXT (11ul << SYS_GPB_MFPL_PB2MFP_Pos) |
#define SYS_GPB_MFPL_PB2MFP_UART1_RXD (4ul << SYS_GPB_MFPL_PB2MFP_Pos) |
#define SYS_GPB_MFPL_PB2MFP_UART3_RXD (9ul << SYS_GPB_MFPL_PB2MFP_Pos) |
#define SYS_GPB_MFPL_PB3MFP_EADC_CH3 (1ul << SYS_GPB_MFPL_PB3MFP_Pos) |
#define SYS_GPB_MFPL_PB3MFP_EBI_ALE (7ul << SYS_GPB_MFPL_PB3MFP_Pos) |
#define SYS_GPB_MFPL_PB3MFP_GPIO (0ul << SYS_GPB_MFPL_PB3MFP_Pos) |
#define SYS_GPB_MFPL_PB3MFP_SPI0_MISO0 (2ul << SYS_GPB_MFPL_PB3MFP_Pos) |
#define SYS_GPB_MFPL_PB3MFP_SPI1_MISO (3ul << SYS_GPB_MFPL_PB3MFP_Pos) |
#define SYS_GPB_MFPL_PB3MFP_T0_EXT (11ul << SYS_GPB_MFPL_PB3MFP_Pos) |
#define SYS_GPB_MFPL_PB3MFP_UART1_TXD (4ul << SYS_GPB_MFPL_PB3MFP_Pos) |
#define SYS_GPB_MFPL_PB3MFP_UART3_TXD (9ul << SYS_GPB_MFPL_PB3MFP_Pos) |
#define SYS_GPB_MFPL_PB4MFP_EADC_CH4 (1ul << SYS_GPB_MFPL_PB4MFP_Pos) |
#define SYS_GPB_MFPL_PB4MFP_EBI_AD7 (7ul << SYS_GPB_MFPL_PB4MFP_Pos) |
#define SYS_GPB_MFPL_PB4MFP_GPIO (0ul << SYS_GPB_MFPL_PB4MFP_Pos) |
#define SYS_GPB_MFPL_PB4MFP_SPI0_SS (2ul << SYS_GPB_MFPL_PB4MFP_Pos) |
#define SYS_GPB_MFPL_PB4MFP_SPI1_SS (3ul << SYS_GPB_MFPL_PB4MFP_Pos) |
#define SYS_GPB_MFPL_PB4MFP_T1_EXT (11ul << SYS_GPB_MFPL_PB4MFP_Pos) |
#define SYS_GPB_MFPL_PB4MFP_UART1_nCTS (4ul << SYS_GPB_MFPL_PB4MFP_Pos) |
#define SYS_GPB_MFPL_PB4MFP_UART2_TXD (9ul << SYS_GPB_MFPL_PB4MFP_Pos) |
#define SYS_GPB_MFPL_PB5MFP_EADC_CH13 (1ul << SYS_GPB_MFPL_PB5MFP_Pos) |
#define SYS_GPB_MFPL_PB5MFP_EBI_AD6 (7ul << SYS_GPB_MFPL_PB5MFP_Pos) |
#define SYS_GPB_MFPL_PB5MFP_GPIO (0ul << SYS_GPB_MFPL_PB5MFP_Pos) |
#define SYS_GPB_MFPL_PB5MFP_SPI0_MOSI0 (2ul << SYS_GPB_MFPL_PB5MFP_Pos) |
#define SYS_GPB_MFPL_PB5MFP_SPI1_MOSI (3ul << SYS_GPB_MFPL_PB5MFP_Pos) |
#define SYS_GPB_MFPL_PB5MFP_UART2_RXD (9ul << SYS_GPB_MFPL_PB5MFP_Pos) |
#define SYS_GPB_MFPL_PB6MFP_EADC_CH14 (1ul << SYS_GPB_MFPL_PB6MFP_Pos) |
#define SYS_GPB_MFPL_PB6MFP_EBI_AD5 (7ul << SYS_GPB_MFPL_PB6MFP_Pos) |
#define SYS_GPB_MFPL_PB6MFP_GPIO (0ul << SYS_GPB_MFPL_PB6MFP_Pos) |
#define SYS_GPB_MFPL_PB6MFP_SPI0_MISO0 (2ul << SYS_GPB_MFPL_PB6MFP_Pos) |
#define SYS_GPB_MFPL_PB6MFP_SPI1_MISO (3ul << SYS_GPB_MFPL_PB6MFP_Pos) |
#define SYS_GPB_MFPL_PB7MFP_EADC_CH15 (1ul << SYS_GPB_MFPL_PB7MFP_Pos) |
#define SYS_GPB_MFPL_PB7MFP_EBI_AD4 (7ul << SYS_GPB_MFPL_PB7MFP_Pos) |
#define SYS_GPB_MFPL_PB7MFP_GPIO (0ul << SYS_GPB_MFPL_PB7MFP_Pos) |
#define SYS_GPB_MFPL_PB7MFP_SPI0_CLK (2ul << SYS_GPB_MFPL_PB7MFP_Pos) |
#define SYS_GPB_MFPL_PB7MFP_SPI1_CLK (3ul << SYS_GPB_MFPL_PB7MFP_Pos) |
#define SYS_GPB_MFPL_PB7MFP_STADC (10ul << SYS_GPB_MFPL_PB7MFP_Pos) |
#define SYS_GPC_MFPL_PC0MFP_EBI_AD8 (7ul << SYS_GPC_MFPL_PC0MFP_Pos) |
#define SYS_GPC_MFPL_PC0MFP_GPIO (0ul << SYS_GPC_MFPL_PC0MFP_Pos) |
#define SYS_GPC_MFPL_PC0MFP_INT2 (8ul << SYS_GPC_MFPL_PC0MFP_Pos) |
#define SYS_GPC_MFPL_PC0MFP_PWM0_CH0 (6ul << SYS_GPC_MFPL_PC0MFP_Pos) |
#define SYS_GPC_MFPL_PC0MFP_SPI1_CLK (2ul << SYS_GPC_MFPL_PC0MFP_Pos) |
#define SYS_GPC_MFPL_PC0MFP_T3_EXT (11ul << SYS_GPC_MFPL_PC0MFP_Pos) |
#define SYS_GPC_MFPL_PC0MFP_UART2_nCTS (3ul << SYS_GPC_MFPL_PC0MFP_Pos) |
#define SYS_GPC_MFPL_PC0MFP_UART3_TXD (9ul << SYS_GPC_MFPL_PC0MFP_Pos) |
#define SYS_GPC_MFPL_PC1MFP_CLKO (1ul << SYS_GPC_MFPL_PC1MFP_Pos) |
#define SYS_GPC_MFPL_PC1MFP_EBI_AD9 (7ul << SYS_GPC_MFPL_PC1MFP_Pos) |
#define SYS_GPC_MFPL_PC1MFP_GPIO (0ul << SYS_GPC_MFPL_PC1MFP_Pos) |
#define SYS_GPC_MFPL_PC1MFP_PWM0_CH1 (6ul << SYS_GPC_MFPL_PC1MFP_Pos) |
#define SYS_GPC_MFPL_PC1MFP_UART2_nRTS (3ul << SYS_GPC_MFPL_PC1MFP_Pos) |
#define SYS_GPC_MFPL_PC1MFP_UART3_RXD (9ul << SYS_GPC_MFPL_PC1MFP_Pos) |
#define SYS_GPC_MFPL_PC2MFP_EBI_AD10 (7ul << SYS_GPC_MFPL_PC2MFP_Pos) |
#define SYS_GPC_MFPL_PC2MFP_GPIO (0ul << SYS_GPC_MFPL_PC2MFP_Pos) |
#define SYS_GPC_MFPL_PC2MFP_PWM0_CH2 (6ul << SYS_GPC_MFPL_PC2MFP_Pos) |
#define SYS_GPC_MFPL_PC2MFP_SPI1_SS (2ul << SYS_GPC_MFPL_PC2MFP_Pos) |
#define SYS_GPC_MFPL_PC2MFP_UART2_TXD (3ul << SYS_GPC_MFPL_PC2MFP_Pos) |
#define SYS_GPC_MFPL_PC3MFP_EBI_AD11 (7ul << SYS_GPC_MFPL_PC3MFP_Pos) |
#define SYS_GPC_MFPL_PC3MFP_GPIO (0ul << SYS_GPC_MFPL_PC3MFP_Pos) |
#define SYS_GPC_MFPL_PC3MFP_PWM0_CH3 (6ul << SYS_GPC_MFPL_PC3MFP_Pos) |
#define SYS_GPC_MFPL_PC3MFP_SPI1_MOSI (2ul << SYS_GPC_MFPL_PC3MFP_Pos) |
#define SYS_GPC_MFPL_PC3MFP_UART2_RXD (3ul << SYS_GPC_MFPL_PC3MFP_Pos) |
#define SYS_GPC_MFPL_PC3MFP_USB_VBUS_ST (4ul << SYS_GPC_MFPL_PC3MFP_Pos) |
#define SYS_GPC_MFPL_PC4MFP_EBI_AD12 (7ul << SYS_GPC_MFPL_PC4MFP_Pos) |
#define SYS_GPC_MFPL_PC4MFP_GPIO (0ul << SYS_GPC_MFPL_PC4MFP_Pos) |
#define SYS_GPC_MFPL_PC4MFP_I2C1_SCL (3ul << SYS_GPC_MFPL_PC4MFP_Pos) |
#define SYS_GPC_MFPL_PC4MFP_PWM0_CH4 (6ul << SYS_GPC_MFPL_PC4MFP_Pos) |
#define SYS_GPC_MFPL_PC4MFP_SPI1_MISO (2ul << SYS_GPC_MFPL_PC4MFP_Pos) |
#define SYS_GPC_MFPL_PC4MFP_USB_VBUS_EN (4ul << SYS_GPC_MFPL_PC4MFP_Pos) |
#define SYS_GPC_MFPL_PC5MFP_EBI_AD13 (7ul << SYS_GPC_MFPL_PC5MFP_Pos) |
#define SYS_GPC_MFPL_PC5MFP_GPIO (0ul << SYS_GPC_MFPL_PC5MFP_Pos) |
#define SYS_GPC_MFPL_PC5MFP_PWM0_CH5 (6ul << SYS_GPC_MFPL_PC5MFP_Pos) |
#define SYS_GPC_MFPL_PC6MFP_EBI_AD14 (7ul << SYS_GPC_MFPL_PC6MFP_Pos) |
#define SYS_GPC_MFPL_PC6MFP_GPIO (0ul << SYS_GPC_MFPL_PC6MFP_Pos) |
#define SYS_GPC_MFPL_PC6MFP_I2C1_SMBAL (3ul << SYS_GPC_MFPL_PC6MFP_Pos) |
#define SYS_GPC_MFPL_PC6MFP_PWM1_CH0 (6ul << SYS_GPC_MFPL_PC6MFP_Pos) |
#define SYS_GPC_MFPL_PC6MFP_UART0_TXD (9ul << SYS_GPC_MFPL_PC6MFP_Pos) |
#define SYS_GPC_MFPL_PC7MFP_EBI_AD15 (7ul << SYS_GPC_MFPL_PC7MFP_Pos) |
#define SYS_GPC_MFPL_PC7MFP_GPIO (0ul << SYS_GPC_MFPL_PC7MFP_Pos) |
#define SYS_GPC_MFPL_PC7MFP_I2C1_SMBSUS (3ul << SYS_GPC_MFPL_PC7MFP_Pos) |
#define SYS_GPC_MFPL_PC7MFP_PWM1_CH1 (6ul << SYS_GPC_MFPL_PC7MFP_Pos) |
#define SYS_GPC_MFPL_PC7MFP_UART0_RXD (9ul << SYS_GPC_MFPL_PC7MFP_Pos) |
#define SYS_GPD_MFPH_PD12MFP_EBI_ADR16 (7ul << SYS_GPD_MFPH_PD12MFP_Pos) |
#define SYS_GPD_MFPH_PD12MFP_GPIO (0ul << SYS_GPD_MFPH_PD12MFP_Pos) |
#define SYS_GPD_MFPH_PD12MFP_PWM1_CH0 (6ul << SYS_GPD_MFPH_PD12MFP_Pos) |
#define SYS_GPD_MFPH_PD12MFP_UART3_TXD (3ul << SYS_GPD_MFPH_PD12MFP_Pos) |
#define SYS_GPD_MFPH_PD13MFP_EBI_ADR17 (7ul << SYS_GPD_MFPH_PD13MFP_Pos) |
#define SYS_GPD_MFPH_PD13MFP_GPIO (0ul << SYS_GPD_MFPH_PD13MFP_Pos) |
#define SYS_GPD_MFPH_PD13MFP_PWM1_CH1 (6ul << SYS_GPD_MFPH_PD13MFP_Pos) |
#define SYS_GPD_MFPH_PD13MFP_UART3_RXD (3ul << SYS_GPD_MFPH_PD13MFP_Pos) |
#define SYS_GPD_MFPH_PD14MFP_EBI_ADR18 (7ul << SYS_GPD_MFPH_PD14MFP_Pos) |
#define SYS_GPD_MFPH_PD14MFP_GPIO (0ul << SYS_GPD_MFPH_PD14MFP_Pos) |
#define SYS_GPD_MFPH_PD14MFP_PWM1_CH2 (6ul << SYS_GPD_MFPH_PD14MFP_Pos) |
#define SYS_GPD_MFPH_PD14MFP_UART3_nCTS (3ul << SYS_GPD_MFPH_PD14MFP_Pos) |
#define SYS_GPD_MFPH_PD15MFP_EBI_ADR19 (7ul << SYS_GPD_MFPH_PD15MFP_Pos) |
#define SYS_GPD_MFPH_PD15MFP_GPIO (0ul << SYS_GPD_MFPH_PD15MFP_Pos) |
#define SYS_GPD_MFPH_PD15MFP_PWM1_CH3 (6ul << SYS_GPD_MFPH_PD15MFP_Pos) |
#define SYS_GPD_MFPH_PD15MFP_UART3_nRTS (3ul << SYS_GPD_MFPH_PD15MFP_Pos) |
#define SYS_GPD_MFPH_PD8MFP_EADC_CH7 (1ul << SYS_GPD_MFPH_PD8MFP_Pos) |
#define SYS_GPD_MFPH_PD8MFP_EBI_nCS0 (7ul << SYS_GPD_MFPH_PD8MFP_Pos) |
#define SYS_GPD_MFPH_PD8MFP_GPIO (0ul << SYS_GPD_MFPH_PD8MFP_Pos) |
#define SYS_GPD_MFPH_PD9MFP_EADC_CH10 (1ul << SYS_GPD_MFPH_PD9MFP_Pos) |
#define SYS_GPD_MFPH_PD9MFP_EBI_ALE (7ul << SYS_GPD_MFPH_PD9MFP_Pos) |
#define SYS_GPD_MFPH_PD9MFP_GPIO (0ul << SYS_GPD_MFPH_PD9MFP_Pos) |
#define SYS_GPD_MFPL_PD0MFP_EADC_CH6 (1ul << SYS_GPD_MFPL_PD0MFP_Pos) |
#define SYS_GPD_MFPL_PD0MFP_GPIO (0ul << SYS_GPD_MFPL_PD0MFP_Pos) |
#define SYS_GPD_MFPL_PD0MFP_INT3 (8ul << SYS_GPD_MFPL_PD0MFP_Pos) |
#define SYS_GPD_MFPL_PD0MFP_SPI1_I2SMCLK (2ul << SYS_GPD_MFPL_PD0MFP_Pos) |
#define SYS_GPD_MFPL_PD0MFP_T3 (11ul << SYS_GPD_MFPL_PD0MFP_Pos) |
#define SYS_GPD_MFPL_PD0MFP_UART0_RXD (3ul << SYS_GPD_MFPL_PD0MFP_Pos) |
#define SYS_GPD_MFPL_PD1MFP_EADC_CH11 (1ul << SYS_GPD_MFPL_PD1MFP_Pos) |
#define SYS_GPD_MFPL_PD1MFP_EBI_nRD (7ul << SYS_GPD_MFPL_PD1MFP_Pos) |
#define SYS_GPD_MFPL_PD1MFP_GPIO (0ul << SYS_GPD_MFPL_PD1MFP_Pos) |
#define SYS_GPD_MFPL_PD1MFP_PWM0_SYNC_IN (2ul << SYS_GPD_MFPL_PD1MFP_Pos) |
#define SYS_GPD_MFPL_PD1MFP_T0 (6ul << SYS_GPD_MFPL_PD1MFP_Pos) |
#define SYS_GPD_MFPL_PD1MFP_UART0_TXD (3ul << SYS_GPD_MFPL_PD1MFP_Pos) |
#define SYS_GPD_MFPL_PD2MFP_EBI_nWR (7ul << SYS_GPD_MFPL_PD2MFP_Pos) |
#define SYS_GPD_MFPL_PD2MFP_GPIO (0ul << SYS_GPD_MFPL_PD2MFP_Pos) |
#define SYS_GPD_MFPL_PD2MFP_INT0 (8ul << SYS_GPD_MFPL_PD2MFP_Pos) |
#define SYS_GPD_MFPL_PD2MFP_PWM0_BRAKE0 (6ul << SYS_GPD_MFPL_PD2MFP_Pos) |
#define SYS_GPD_MFPL_PD2MFP_STADC (1ul << SYS_GPD_MFPL_PD2MFP_Pos) |
#define SYS_GPD_MFPL_PD2MFP_T0_EXT (3ul << SYS_GPD_MFPL_PD2MFP_Pos) |
#define SYS_GPD_MFPL_PD3MFP_EBI_MCLK (7ul << SYS_GPD_MFPL_PD3MFP_Pos) |
#define SYS_GPD_MFPL_PD3MFP_GPIO (0ul << SYS_GPD_MFPL_PD3MFP_Pos) |
#define SYS_GPD_MFPL_PD3MFP_INT1 (8ul << SYS_GPD_MFPL_PD3MFP_Pos) |
#define SYS_GPD_MFPL_PD3MFP_PWM0_BRAKE1 (6ul << SYS_GPD_MFPL_PD3MFP_Pos) |
#define SYS_GPD_MFPL_PD3MFP_T1_EXT (3ul << SYS_GPD_MFPL_PD3MFP_Pos) |
#define SYS_GPD_MFPL_PD3MFP_T2 (1ul << SYS_GPD_MFPL_PD3MFP_Pos) |
#define SYS_GPD_MFPL_PD7MFP_EBI_nRD (7ul << SYS_GPD_MFPL_PD7MFP_Pos) |
#define SYS_GPD_MFPL_PD7MFP_GPIO (0ul << SYS_GPD_MFPL_PD7MFP_Pos) |
#define SYS_GPD_MFPL_PD7MFP_PWM0_CH5 (6ul << SYS_GPD_MFPL_PD7MFP_Pos) |
#define SYS_GPD_MFPL_PD7MFP_PWM0_SYNC_IN (3ul << SYS_GPD_MFPL_PD7MFP_Pos) |
#define SYS_GPD_MFPL_PD7MFP_T1 (4ul << SYS_GPD_MFPL_PD7MFP_Pos) |
#define SYS_GPE_MFPH_PE10MFP_GPIO (0ul << SYS_GPE_MFPH_PE10MFP_Pos) |
#define SYS_GPE_MFPH_PE10MFP_I2C0_SMBAL (4ul << SYS_GPE_MFPH_PE10MFP_Pos) |
#define SYS_GPE_MFPH_PE10MFP_I2C1_SCL (11ul << SYS_GPE_MFPH_PE10MFP_Pos) |
#define SYS_GPE_MFPH_PE10MFP_SC0_DAT (5ul << SYS_GPE_MFPH_PE10MFP_Pos) |
#define SYS_GPE_MFPH_PE10MFP_SPI0_MISO0 (2ul << SYS_GPE_MFPH_PE10MFP_Pos) |
#define SYS_GPE_MFPH_PE10MFP_SPI1_MISO (1ul << SYS_GPE_MFPH_PE10MFP_Pos) |
#define SYS_GPE_MFPH_PE10MFP_UART1_nCTS (3ul << SYS_GPE_MFPH_PE10MFP_Pos) |
#define SYS_GPE_MFPH_PE10MFP_UART3_TXD (9ul << SYS_GPE_MFPH_PE10MFP_Pos) |
#define SYS_GPE_MFPH_PE11MFP_GPIO (0ul << SYS_GPE_MFPH_PE11MFP_Pos) |
#define SYS_GPE_MFPH_PE11MFP_I2C0_SMBSUS (4ul << SYS_GPE_MFPH_PE11MFP_Pos) |
#define SYS_GPE_MFPH_PE11MFP_I2C1_SDA (11ul << SYS_GPE_MFPH_PE11MFP_Pos) |
#define SYS_GPE_MFPH_PE11MFP_SC0_CLK (5ul << SYS_GPE_MFPH_PE11MFP_Pos) |
#define SYS_GPE_MFPH_PE11MFP_SPI0_MOSI0 (2ul << SYS_GPE_MFPH_PE11MFP_Pos) |
#define SYS_GPE_MFPH_PE11MFP_SPI1_MOSI (1ul << SYS_GPE_MFPH_PE11MFP_Pos) |
#define SYS_GPE_MFPH_PE11MFP_UART1_nRTS (3ul << SYS_GPE_MFPH_PE11MFP_Pos) |
#define SYS_GPE_MFPH_PE11MFP_UART3_RXD (9ul << SYS_GPE_MFPH_PE11MFP_Pos) |
#define SYS_GPE_MFPH_PE12MFP_GPIO (0ul << SYS_GPE_MFPH_PE12MFP_Pos) |
#define SYS_GPE_MFPH_PE12MFP_I2C0_SCL (4ul << SYS_GPE_MFPH_PE12MFP_Pos) |
#define SYS_GPE_MFPH_PE12MFP_SPI0_SS (2ul << SYS_GPE_MFPH_PE12MFP_Pos) |
#define SYS_GPE_MFPH_PE12MFP_SPI1_SS (1ul << SYS_GPE_MFPH_PE12MFP_Pos) |
#define SYS_GPE_MFPH_PE12MFP_UART1_TXD (3ul << SYS_GPE_MFPH_PE12MFP_Pos) |
#define SYS_GPE_MFPH_PE13MFP_GPIO (0ul << SYS_GPE_MFPH_PE13MFP_Pos) |
#define SYS_GPE_MFPH_PE13MFP_I2C0_SDA (4ul << SYS_GPE_MFPH_PE13MFP_Pos) |
#define SYS_GPE_MFPH_PE13MFP_SPI0_CLK (2ul << SYS_GPE_MFPH_PE13MFP_Pos) |
#define SYS_GPE_MFPH_PE13MFP_SPI1_CLK (1ul << SYS_GPE_MFPH_PE13MFP_Pos) |
#define SYS_GPE_MFPH_PE13MFP_UART1_RXD (3ul << SYS_GPE_MFPH_PE13MFP_Pos) |
#define SYS_GPE_MFPH_PE8MFP_CLKO (9ul << SYS_GPE_MFPH_PE8MFP_Pos) |
#define SYS_GPE_MFPH_PE8MFP_GPIO (0ul << SYS_GPE_MFPH_PE8MFP_Pos) |
#define SYS_GPE_MFPH_PE8MFP_I2C1_SCL (4ul << SYS_GPE_MFPH_PE8MFP_Pos) |
#define SYS_GPE_MFPH_PE8MFP_PWM0_BRAKE0 (10ul << SYS_GPE_MFPH_PE8MFP_Pos) |
#define SYS_GPE_MFPH_PE8MFP_SC0_PWR (5ul << SYS_GPE_MFPH_PE8MFP_Pos) |
#define SYS_GPE_MFPH_PE8MFP_SPI0_MISO1 (2ul << SYS_GPE_MFPH_PE8MFP_Pos) |
#define SYS_GPE_MFPH_PE8MFP_T1 (11ul << SYS_GPE_MFPH_PE8MFP_Pos) |
#define SYS_GPE_MFPH_PE8MFP_UART1_TXD (1ul << SYS_GPE_MFPH_PE8MFP_Pos) |
#define SYS_GPE_MFPH_PE9MFP_GPIO (0ul << SYS_GPE_MFPH_PE9MFP_Pos) |
#define SYS_GPE_MFPH_PE9MFP_I2C1_SDA (4ul << SYS_GPE_MFPH_PE9MFP_Pos) |
#define SYS_GPE_MFPH_PE9MFP_PWM1_BRAKE1 (10ul << SYS_GPE_MFPH_PE9MFP_Pos) |
#define SYS_GPE_MFPH_PE9MFP_SC0_RST (5ul << SYS_GPE_MFPH_PE9MFP_Pos) |
#define SYS_GPE_MFPH_PE9MFP_SPI0_MOSI1 (2ul << SYS_GPE_MFPH_PE9MFP_Pos) |
#define SYS_GPE_MFPH_PE9MFP_SPI1_I2SMCLK (9ul << SYS_GPE_MFPH_PE9MFP_Pos) |
#define SYS_GPE_MFPH_PE9MFP_T2 (11ul << SYS_GPE_MFPH_PE9MFP_Pos) |
#define SYS_GPE_MFPH_PE9MFP_UART1_RXD (1ul << SYS_GPE_MFPH_PE9MFP_Pos) |
#define SYS_GPE_MFPL_PE0MFP_EBI_nCS1 (7ul << SYS_GPE_MFPL_PE0MFP_Pos) |
#define SYS_GPE_MFPL_PE0MFP_GPIO (0ul << SYS_GPE_MFPL_PE0MFP_Pos) |
#define SYS_GPE_MFPL_PE0MFP_I2C1_SDA (3ul << SYS_GPE_MFPL_PE0MFP_Pos) |
#define SYS_GPE_MFPL_PE0MFP_INT4 (8ul << SYS_GPE_MFPL_PE0MFP_Pos) |
#define SYS_GPE_MFPL_PE0MFP_PWM0_CH0 (6ul << SYS_GPE_MFPL_PE0MFP_Pos) |
#define SYS_GPE_MFPL_PE0MFP_SC0_CD (5ul << SYS_GPE_MFPL_PE0MFP_Pos) |
#define SYS_GPE_MFPL_PE0MFP_T2_EXT (4ul << SYS_GPE_MFPL_PE0MFP_Pos) |
#define SYS_GPF_MFPL_PF0MFP_GPIO (0ul << SYS_GPF_MFPL_PF0MFP_Pos) |
#define SYS_GPF_MFPL_PF0MFP_INT5 (8ul << SYS_GPF_MFPL_PF0MFP_Pos) |
#define SYS_GPF_MFPL_PF0MFP_X32_OUT (1ul << SYS_GPF_MFPL_PF0MFP_Pos) |
#define SYS_GPF_MFPL_PF1MFP_GPIO (0ul << SYS_GPF_MFPL_PF1MFP_Pos) |
#define SYS_GPF_MFPL_PF1MFP_X32_IN (1ul << SYS_GPF_MFPL_PF1MFP_Pos) |
#define SYS_GPF_MFPL_PF2MFP_GPIO (0ul << SYS_GPF_MFPL_PF2MFP_Pos) |
#define SYS_GPF_MFPL_PF2MFP_TAMPER (1ul << SYS_GPF_MFPL_PF2MFP_Pos) |
#define SYS_GPF_MFPL_PF3MFP_GPIO (0ul << SYS_GPF_MFPL_PF3MFP_Pos) |
#define SYS_GPF_MFPL_PF3MFP_I2C1_SCL (3ul << SYS_GPF_MFPL_PF3MFP_Pos) |
#define SYS_GPF_MFPL_PF3MFP_XT1_OUT (1ul << SYS_GPF_MFPL_PF3MFP_Pos) |
#define SYS_GPF_MFPL_PF4MFP_GPIO (0ul << SYS_GPF_MFPL_PF4MFP_Pos) |
#define SYS_GPF_MFPL_PF4MFP_I2C1_SDA (3ul << SYS_GPF_MFPL_PF4MFP_Pos) |
#define SYS_GPF_MFPL_PF4MFP_XT1_IN (1ul << SYS_GPF_MFPL_PF4MFP_Pos) |
#define SYS_GPF_MFPL_PF5MFP_GPIO (0ul << SYS_GPF_MFPL_PF5MFP_Pos) |
#define SYS_GPF_MFPL_PF5MFP_ICE_CLK (1ul << SYS_GPF_MFPL_PF5MFP_Pos) |
#define SYS_GPF_MFPL_PF6MFP_GPIO (0ul << SYS_GPF_MFPL_PF6MFP_Pos) |
#define SYS_GPF_MFPL_PF6MFP_ICE_DAT (1ul << SYS_GPF_MFPL_PF6MFP_Pos) |
#define SYS_GPF_MFPL_PF7MFP_GPIO (0ul << SYS_GPF_MFPL_PF7MFP_Pos) |
#define SYS_VREFCTL_VREF_2_048V (0x7UL<<SYS_VREFCTL_VREFCTL_Pos) |
#define SYS_VREFCTL_VREF_2_56V (0x3UL<<SYS_VREFCTL_VREFCTL_Pos) |
#define SYS_VREFCTL_VREF_3_072V (0xBUL<<SYS_VREFCTL_VREFCTL_Pos) |
#define SYS_VREFCTL_VREF_4_096V (0xFUL<<SYS_VREFCTL_VREFCTL_Pos) |
#define TMR0_RST ((0x4<<24) | SYS_IPRST1_TMR0RST_Pos ) |
#define TMR1_RST ((0x4<<24) | SYS_IPRST1_TMR1RST_Pos ) |
#define TMR2_RST ((0x4<<24) | SYS_IPRST1_TMR2RST_Pos ) |
#define TMR3_RST ((0x4<<24) | SYS_IPRST1_TMR3RST_Pos ) |
#define UART0_RST ((0x4<<24) | SYS_IPRST1_UART0RST_Pos ) |
#define UART1_RST ((0x4<<24) | SYS_IPRST1_UART1RST_Pos ) |
#define UART2_RST ((0x4<<24) | SYS_IPRST1_UART2RST_Pos ) |
#define UART3_RST ((0x4<<24) | SYS_IPRST1_UART3RST_Pos ) |
#define USBD_RST ((0x4<<24) | SYS_IPRST1_USBDRST_Pos ) |
#define USBH_RST ((0x0<<24) | SYS_IPRST0_USBHRST_Pos ) |