M471M/R1/S BSP V3.01.000
The Board Support Package for M4521
i2c.c
Go to the documentation of this file.
1/**************************************************************************/
8#include "NuMicro.h"
9
36uint32_t I2C_Open(I2C_T *i2c, uint32_t u32BusClock)
37{
38 uint32_t u32Div;
39
40 u32Div = (uint32_t)(((SystemCoreClock * 10) / (u32BusClock * 4) + 5) / 10 - 1); /* Compute proper divider for I2C clock */
41 i2c->CLKDIV = u32Div;
42
43 /* Enable I2C */
44 i2c->CTL |= I2C_CTL_I2CEN_Msk;
45
46 return (SystemCoreClock / ((u32Div + 1) << 2));
47}
48
60void I2C_Close(I2C_T *i2c)
61{
62 /* Reset I2C Controller */
63 if((uint32_t)i2c == I2C0_BASE)
64 {
65 SYS->IPRST1 |= SYS_IPRST1_I2C0RST_Msk;
66 SYS->IPRST1 &= ~SYS_IPRST1_I2C0RST_Msk;
67 }
68 else if((uint32_t)i2c == I2C1_BASE)
69 {
70 SYS->IPRST1 |= SYS_IPRST1_I2C1RST_Msk;
71 SYS->IPRST1 &= ~SYS_IPRST1_I2C1RST_Msk;
72 }
73
74 /* Disable I2C */
75 i2c->CTL &= ~I2C_CTL_I2CEN_Msk;
76}
77
89{
91}
92
107void I2C_Trigger(I2C_T *i2c, uint8_t u8Start, uint8_t u8Stop, uint8_t u8Si, uint8_t u8Ack)
108{
109 uint32_t u32Reg = 0;
110
111 if(u8Start)
112 u32Reg |= I2C_CTL_STA;
113 if(u8Stop)
114 u32Reg |= I2C_CTL_STO;
115 if(u8Si)
116 u32Reg |= I2C_CTL_SI;
117 if(u8Ack)
118 u32Reg |= I2C_CTL_AA;
119
120 i2c->CTL = (i2c->CTL & ~0x3C) | u32Reg;
121}
122
134{
135 i2c->CTL &= ~I2C_CTL_INTEN_Msk;
136}
137
149{
150 i2c->CTL |= I2C_CTL_INTEN_Msk;
151}
152
163{
164 uint32_t u32Divider = i2c->CLKDIV;
165
166 return (SystemCoreClock / ((u32Divider + 1) << 2));
167}
168
179uint32_t I2C_SetBusClockFreq(I2C_T *i2c, uint32_t u32BusClock)
180{
181 uint32_t u32Div;
182
183 u32Div = (uint32_t)(((SystemCoreClock * 10) / (u32BusClock * 4) + 5) / 10 - 1); /* Compute proper divider for I2C clock */
184 i2c->CLKDIV = u32Div;
185
186 return (SystemCoreClock / ((u32Div + 1) << 2));
187}
188
198uint32_t I2C_GetIntFlag(I2C_T *i2c)
199{
200 return ((i2c->CTL & I2C_CTL_SI_Msk) == I2C_CTL_SI_Msk ? 1 : 0);
201}
202
212uint32_t I2C_GetStatus(I2C_T *i2c)
213{
214 return (i2c->STATUS);
215}
216
226uint8_t I2C_GetData(I2C_T *i2c)
227{
228 return (i2c->DAT);
229}
230
241void I2C_SetData(I2C_T *i2c, uint8_t u8Data)
242{
243 i2c->DAT = u8Data;
244}
245
260void I2C_SetSlaveAddr(I2C_T *i2c, uint8_t u8SlaveNo, uint8_t u8SlaveAddr, uint8_t u8GCMode)
261{
262 switch(u8SlaveNo)
263 {
264 case 1:
265 i2c->ADDR1 = (u8SlaveAddr << 1) | u8GCMode;
266 break;
267 case 2:
268 i2c->ADDR2 = (u8SlaveAddr << 1) | u8GCMode;
269 break;
270 case 3:
271 i2c->ADDR3 = (u8SlaveAddr << 1) | u8GCMode;
272 break;
273 case 0:
274 default:
275 i2c->ADDR0 = (u8SlaveAddr << 1) | u8GCMode;
276 break;
277 }
278}
279
292void I2C_SetSlaveAddrMask(I2C_T *i2c, uint8_t u8SlaveNo, uint8_t u8SlaveAddrMask)
293{
294 switch(u8SlaveNo)
295 {
296 case 1:
297 i2c->ADDRMSK1 = u8SlaveAddrMask << 1;
298 break;
299 case 2:
300 i2c->ADDRMSK2 = u8SlaveAddrMask << 1;
301 break;
302 case 3:
303 i2c->ADDRMSK3 = u8SlaveAddrMask << 1;
304 break;
305 case 0:
306 default:
307 i2c->ADDRMSK0 = u8SlaveAddrMask << 1;
308 break;
309 }
310}
311
324void I2C_EnableTimeout(I2C_T *i2c, uint8_t u8LongTimeout)
325{
326 if(u8LongTimeout)
328 else
329 i2c->TOCTL &= ~I2C_TOCTL_TOCDIV4_Msk;
330
332}
333
345{
346 i2c->TOCTL &= ~I2C_TOCTL_TOCEN_Msk;
347}
348
360{
362}
363
375{
376 i2c->WKCTL &= ~I2C_WKCTL_WKEN_Msk;
377}
378
390{
391 return (i2c->BUSSTS);
392}
393
405void I2C_SMBusClearInterruptFlag(I2C_T *i2c, uint8_t u8SMBusIntFlag)
406{
407 i2c->BUSSTS |= u8SMBusIntFlag;
408}
409
421void I2C_SMBusSetPacketByteCount(I2C_T *i2c, uint32_t u32PktSize)
422{
423 i2c->PKTSIZE = u32PktSize;
424}
425
437void I2C_SMBusOpen(I2C_T *i2c, uint8_t u8HostDevice)
438{
439 /* Clear BMHEN, BMDEN of BUSCTL Register */
441
442 /* Set SMBus Host/Device Mode, and enable Bus Management*/
443 if(u8HostDevice == I2C_SMBH_ENABLE)
445 else
447}
448
460{
461
462 i2c->BUSCTL = 0x00;
463}
464
476void I2C_SMBusPECTxEnable(I2C_T *i2c, uint8_t u8PECTxEn)
477{
478 i2c->BUSCTL &= ~I2C_BUSCTL_PECTXEN_Msk;
479
480 if(u8PECTxEn)
482 else
484}
485
497{
498 return i2c->PKTCRC;
499}
500
514void I2C_SMBusIdleTimeout(I2C_T *i2c, uint32_t us, uint32_t u32Hclk)
515{
516 uint32_t u32Div, u32Hclk_kHz;
517
519 u32Hclk_kHz = u32Hclk / 1000;
520 u32Div = (((us * u32Hclk_kHz) / 1000) >> 2) - 1;
521 if(u32Div > 255)
522 {
523 i2c->BUSTOUT = 0xFF;
524 }
525 else
526 {
527 i2c->BUSTOUT = u32Div;
528 }
529
530}
531
546void I2C_SMBusTimeout(I2C_T *i2c, uint32_t ms, uint32_t u32Pclk)
547{
548 uint32_t u32Div, u32Pclk_kHz;
549
550 i2c->BUSCTL &= ~I2C_BUSCTL_TIDLE_Msk;
551
552 /* DIV4 disabled */
553 i2c->TOCTL &= ~I2C_TOCTL_TOCEN_Msk;
554 u32Pclk_kHz = u32Pclk / 1000;
555 u32Div = ((ms * u32Pclk_kHz) / (16 * 1024)) - 1;
556 if(u32Div <= 0xFF)
557 {
558 i2c->BUSTOUT = u32Div;
559 return;
560 }
561
562 /* DIV4 enabled */
564
565 i2c->BUSTOUT = (((ms * u32Pclk_kHz) / (16 * 1024 * 4)) - 1) & 0xFF; //The max value is 255
566}
567
582void I2C_SMBusClockLoTimeout(I2C_T *i2c, uint32_t ms, uint32_t u32Pclk)
583{
584 uint32_t u32Div, u32Pclk_kHz;
585
586 i2c->BUSCTL &= ~I2C_BUSCTL_TIDLE_Msk;
587
588 /* DIV4 disabled */
589 i2c->TOCTL &= ~I2C_TOCTL_TOCEN_Msk;
590 u32Pclk_kHz = u32Pclk / 1000;
591 u32Div = ((ms * u32Pclk_kHz) / (16 * 1024)) - 1;
592 if(u32Div <= 0xFF)
593 {
594 i2c->CLKTOUT = u32Div;
595 return;
596 }
597
598 /* DIV4 enabled */
600 i2c->CLKTOUT = (((ms * u32Pclk_kHz) / (16 * 1024 * 4)) - 1) & 0xFF; //The max value is 255
601}
602 /* end of group I2C_EXPORTED_FUNCTIONS */
604 /* end of group I2C_Driver */
606 /* end of group Standard_Driver */
608
#define SYS_IPRST1_I2C1RST_Msk
Definition: M471M_R1_S.h:10417
#define I2C_BUSCTL_PECEN_Msk
Definition: M471M_R1_S.h:3816
#define I2C_CTL_INTEN_Msk
Definition: M471M_R1_S.h:3750
#define I2C_BUSCTL_PECTXEN_Msk
Definition: M471M_R1_S.h:3837
#define I2C_TOCTL_TOIF_Msk
Definition: M471M_R1_S.h:3768
#define I2C_TOCTL_TOCEN_Msk
Definition: M471M_R1_S.h:3774
#define I2C_BUSCTL_BMDEN_Msk
Definition: M471M_R1_S.h:3819
#define I2C_BUSCTL_TIDLE_Msk
Definition: M471M_R1_S.h:3840
#define I2C_WKCTL_WKEN_Msk
Definition: M471M_R1_S.h:3807
#define I2C_BUSCTL_BUSEN_Msk
Definition: M471M_R1_S.h:3834
#define I2C_CTL_I2CEN_Msk
Definition: M471M_R1_S.h:3747
#define SYS_IPRST1_I2C0RST_Msk
Definition: M471M_R1_S.h:10414
#define I2C_BUSCTL_BMHEN_Msk
Definition: M471M_R1_S.h:3822
#define I2C_CTL_SI_Msk
Definition: M471M_R1_S.h:3738
#define I2C_TOCTL_TOCDIV4_Msk
Definition: M471M_R1_S.h:3771
NuMicro peripheral access layer header file.
#define I2C_CTL_STO
Definition: i2c.h:41
#define I2C_CTL_AA
Definition: i2c.h:42
#define I2C_CTL_SI
Definition: i2c.h:38
#define I2C_CTL_STA
Definition: i2c.h:40
#define I2C_SMBH_ENABLE
Definition: i2c.h:53
uint32_t I2C_SMBusGetStatus(I2C_T *i2c)
To get SMBus Status.
Definition: i2c.c:389
void I2C_SMBusIdleTimeout(I2C_T *i2c, uint32_t us, uint32_t u32Hclk)
Calculate Time-out of SMBus idle period.
Definition: i2c.c:514
void I2C_SetSlaveAddrMask(I2C_T *i2c, uint8_t u8SlaveNo, uint8_t u8SlaveAddrMask)
Configure the mask bits of 7-bit Slave Address.
Definition: i2c.c:292
void I2C_Close(I2C_T *i2c)
Disable specify I2C Controller.
Definition: i2c.c:60
void I2C_SMBusSetPacketByteCount(I2C_T *i2c, uint32_t u32PktSize)
Set SMBus Bytes Counts of Transmission or Reception.
Definition: i2c.c:421
uint32_t I2C_SetBusClockFreq(I2C_T *i2c, uint32_t u32BusClock)
Set I2C Bus Clock.
Definition: i2c.c:179
void I2C_Trigger(I2C_T *i2c, uint8_t u8Start, uint8_t u8Stop, uint8_t u8Si, uint8_t u8Ack)
Set Control bit of I2C Controller.
Definition: i2c.c:107
void I2C_SMBusClose(I2C_T *i2c)
Disable SMBus function.
Definition: i2c.c:459
void I2C_EnableTimeout(I2C_T *i2c, uint8_t u8LongTimeout)
Enable Time-out Counter Function and support Long Time-out.
Definition: i2c.c:324
void I2C_SMBusClockLoTimeout(I2C_T *i2c, uint32_t ms, uint32_t u32Pclk)
Calculate Cumulative Clock low Time-out of SMBus active period.
Definition: i2c.c:582
void I2C_ClearTimeoutFlag(I2C_T *i2c)
Clear Time-out Counter flag.
Definition: i2c.c:88
void I2C_SetSlaveAddr(I2C_T *i2c, uint8_t u8SlaveNo, uint8_t u8SlaveAddr, uint8_t u8GCMode)
Set 7-bit Slave Address and GC Mode.
Definition: i2c.c:260
void I2C_SetData(I2C_T *i2c, uint8_t u8Data)
Send a byte to I2C Bus.
Definition: i2c.c:241
uint32_t I2C_GetBusClockFreq(I2C_T *i2c)
Get I2C Bus Clock.
Definition: i2c.c:162
void I2C_EnableInt(I2C_T *i2c)
Enable Interrupt of I2C Controller.
Definition: i2c.c:148
void I2C_DisableWakeup(I2C_T *i2c)
Disable I2C Wake-up Function.
Definition: i2c.c:374
uint32_t I2C_GetStatus(I2C_T *i2c)
Get I2C Bus Status Code.
Definition: i2c.c:212
void I2C_DisableInt(I2C_T *i2c)
Disable Interrupt of I2C Controller.
Definition: i2c.c:133
void I2C_SMBusPECTxEnable(I2C_T *i2c, uint8_t u8PECTxEn)
Enable SMBus PEC Transmit Function.
Definition: i2c.c:476
void I2C_EnableWakeup(I2C_T *i2c)
Enable I2C Wake-up Function.
Definition: i2c.c:359
void I2C_SMBusOpen(I2C_T *i2c, uint8_t u8HostDevice)
Init SMBus Host/Device Mode.
Definition: i2c.c:437
uint32_t I2C_GetIntFlag(I2C_T *i2c)
Get Interrupt Flag.
Definition: i2c.c:198
void I2C_SMBusTimeout(I2C_T *i2c, uint32_t ms, uint32_t u32Pclk)
Calculate Time-out of SMBus active period.
Definition: i2c.c:546
uint8_t I2C_GetData(I2C_T *i2c)
Read a Byte from I2C Bus.
Definition: i2c.c:226
uint8_t I2C_SMBusGetPECValue(I2C_T *i2c)
Get SMBus CRC value.
Definition: i2c.c:496
uint32_t I2C_Open(I2C_T *i2c, uint32_t u32BusClock)
Enable specify I2C Controller and set Clock Divider.
Definition: i2c.c:36
void I2C_DisableTimeout(I2C_T *i2c)
Disable Time-out Counter Function.
Definition: i2c.c:344
void I2C_SMBusClearInterruptFlag(I2C_T *i2c, uint8_t u8ClrSMBusIntFlag)
Clear SMBus Interrupt Flag.
Definition: i2c.c:405
#define I2C0_BASE
Definition: M471M_R1_S.h:13792
#define I2C1_BASE
Definition: M471M_R1_S.h:13804
__IO uint32_t CLKTOUT
Definition: M471M_R1_S.h:3723
__IO uint32_t ADDR2
Definition: M471M_R1_S.h:3708
__IO uint32_t ADDR3
Definition: M471M_R1_S.h:3709
__IO uint32_t ADDRMSK1
Definition: M471M_R1_S.h:3711
__IO uint32_t ADDR0
Definition: M471M_R1_S.h:3702
__IO uint32_t TOCTL
Definition: M471M_R1_S.h:3706
__IO uint32_t CLKDIV
Definition: M471M_R1_S.h:3705
__IO uint32_t CTL
Definition: M471M_R1_S.h:3701
__IO uint32_t DAT
Definition: M471M_R1_S.h:3703
__I uint32_t PKTCRC
Definition: M471M_R1_S.h:3721
__IO uint32_t ADDR1
Definition: M471M_R1_S.h:3707
__IO uint32_t BUSTOUT
Definition: M471M_R1_S.h:3722
__IO uint32_t ADDRMSK2
Definition: M471M_R1_S.h:3712
__IO uint32_t BUSSTS
Definition: M471M_R1_S.h:3719
__IO uint32_t ADDRMSK0
Definition: M471M_R1_S.h:3710
__IO uint32_t BUSCTL
Definition: M471M_R1_S.h:3717
__IO uint32_t ADDRMSK3
Definition: M471M_R1_S.h:3713
__IO uint32_t PKTSIZE
Definition: M471M_R1_S.h:3720
__I uint32_t STATUS
Definition: M471M_R1_S.h:3704
#define SYS
Definition: M471M_R1_S.h:13816
__IO uint32_t WKCTL
Definition: M471M_R1_S.h:3715
uint32_t SystemCoreClock