M471M/R1/S BSP V3.01.000
The Board Support Package for M4521
Modules | Macros
Memory Mapping
Collaboration diagram for Memory Mapping:

Modules

 Peripheral Declaration
 

Macros

#define SRAM_BASE   (0x20000000UL)
 
#define PERIPH_BASE   (0x40000000UL)
 
#define AHBPERIPH_BASE   PERIPH_BASE
 
#define APBPERIPH_BASE   (PERIPH_BASE + 0x00040000)
 
#define GCR_BASE   (AHBPERIPH_BASE + 0x00000)
 
#define CLK_BASE   (AHBPERIPH_BASE + 0x00200)
 
#define INT_BASE   (AHBPERIPH_BASE + 0x00300)
 
#define GPIO_BASE   (AHBPERIPH_BASE + 0x04000)
 
#define GPIOA_BASE   (AHBPERIPH_BASE + 0x04000)
 
#define GPIOB_BASE   (AHBPERIPH_BASE + 0x04040)
 
#define GPIOC_BASE   (AHBPERIPH_BASE + 0x04080)
 
#define GPIOD_BASE   (AHBPERIPH_BASE + 0x040C0)
 
#define GPIOE_BASE   (AHBPERIPH_BASE + 0x04100)
 
#define GPIOF_BASE   (AHBPERIPH_BASE + 0x04140)
 
#define GPIO_DBCTL_BASE   (AHBPERIPH_BASE + 0x04440)
 
#define GPIO_PIN_DATA_BASE   (AHBPERIPH_BASE + 0x04800)
 
#define PDMA_BASE   (AHBPERIPH_BASE + 0x08000)
 
#define USBH_BASE   (AHBPERIPH_BASE + 0x09000)
 
#define FMC_BASE   (AHBPERIPH_BASE + 0x0C000)
 
#define EBI_BASE   (AHBPERIPH_BASE + 0x10000)
 
#define CRC_BASE   (AHBPERIPH_BASE + 0x31000)
 
#define WDT_BASE   (APBPERIPH_BASE + 0x00000)
 
#define WWDT_BASE   (APBPERIPH_BASE + 0x00100)
 
#define TMR01_BASE   (APBPERIPH_BASE + 0x10000)
 
#define PWM0_BASE   (APBPERIPH_BASE + 0x18000)
 
#define SPI0_BASE   (APBPERIPH_BASE + 0x20000)
 
#define UART0_BASE   (APBPERIPH_BASE + 0x30000)
 
#define UART2_BASE   (APBPERIPH_BASE + 0x32000)
 
#define I2C0_BASE   (APBPERIPH_BASE + 0x40000)
 
#define SC0_BASE   (APBPERIPH_BASE + 0x50000)
 
#define USBD_BASE   (APBPERIPH_BASE + 0x80000)
 
#define RTC_BASE   (APBPERIPH_BASE + 0x01000)
 
#define EADC0_BASE   (APBPERIPH_BASE + 0x03000)
 
#define TMR23_BASE   (APBPERIPH_BASE + 0x11000)
 
#define PWM1_BASE   (APBPERIPH_BASE + 0x19000)
 
#define SPI1_BASE   (APBPERIPH_BASE + 0x21000)
 
#define UART1_BASE   (APBPERIPH_BASE + 0x31000)
 
#define UART3_BASE   (APBPERIPH_BASE + 0x33000)
 
#define I2C1_BASE   (APBPERIPH_BASE + 0x41000)
 

Detailed Description

Macro Definition Documentation

◆ AHBPERIPH_BASE

#define AHBPERIPH_BASE   PERIPH_BASE

Definition at line 13762 of file M471M_R1_S.h.

◆ APBPERIPH_BASE

#define APBPERIPH_BASE   (PERIPH_BASE + 0x00040000)

AHB peripherals

Definition at line 13765 of file M471M_R1_S.h.

◆ CLK_BASE

#define CLK_BASE   (AHBPERIPH_BASE + 0x00200)

Definition at line 13767 of file M471M_R1_S.h.

◆ CRC_BASE

#define CRC_BASE   (AHBPERIPH_BASE + 0x31000)

APB0 peripherals

Definition at line 13784 of file M471M_R1_S.h.

◆ EADC0_BASE

#define EADC0_BASE   (APBPERIPH_BASE + 0x03000)

Definition at line 13798 of file M471M_R1_S.h.

◆ EBI_BASE

#define EBI_BASE   (AHBPERIPH_BASE + 0x10000)

Definition at line 13781 of file M471M_R1_S.h.

◆ FMC_BASE

#define FMC_BASE   (AHBPERIPH_BASE + 0x0C000)

Definition at line 13780 of file M471M_R1_S.h.

◆ GCR_BASE

#define GCR_BASE   (AHBPERIPH_BASE + 0x00000)

Definition at line 13766 of file M471M_R1_S.h.

◆ GPIO_BASE

#define GPIO_BASE   (AHBPERIPH_BASE + 0x04000)

Definition at line 13769 of file M471M_R1_S.h.

◆ GPIO_DBCTL_BASE

#define GPIO_DBCTL_BASE   (AHBPERIPH_BASE + 0x04440)

Definition at line 13776 of file M471M_R1_S.h.

◆ GPIO_PIN_DATA_BASE

#define GPIO_PIN_DATA_BASE   (AHBPERIPH_BASE + 0x04800)

Definition at line 13777 of file M471M_R1_S.h.

◆ GPIOA_BASE

#define GPIOA_BASE   (AHBPERIPH_BASE + 0x04000)

Definition at line 13770 of file M471M_R1_S.h.

◆ GPIOB_BASE

#define GPIOB_BASE   (AHBPERIPH_BASE + 0x04040)

Definition at line 13771 of file M471M_R1_S.h.

◆ GPIOC_BASE

#define GPIOC_BASE   (AHBPERIPH_BASE + 0x04080)

Definition at line 13772 of file M471M_R1_S.h.

◆ GPIOD_BASE

#define GPIOD_BASE   (AHBPERIPH_BASE + 0x040C0)

Definition at line 13773 of file M471M_R1_S.h.

◆ GPIOE_BASE

#define GPIOE_BASE   (AHBPERIPH_BASE + 0x04100)

Definition at line 13774 of file M471M_R1_S.h.

◆ GPIOF_BASE

#define GPIOF_BASE   (AHBPERIPH_BASE + 0x04140)

Definition at line 13775 of file M471M_R1_S.h.

◆ I2C0_BASE

#define I2C0_BASE   (APBPERIPH_BASE + 0x40000)

Definition at line 13792 of file M471M_R1_S.h.

◆ I2C1_BASE

#define I2C1_BASE   (APBPERIPH_BASE + 0x41000)

Definition at line 13804 of file M471M_R1_S.h.

◆ INT_BASE

#define INT_BASE   (AHBPERIPH_BASE + 0x00300)

Definition at line 13768 of file M471M_R1_S.h.

◆ PDMA_BASE

#define PDMA_BASE   (AHBPERIPH_BASE + 0x08000)

Definition at line 13778 of file M471M_R1_S.h.

◆ PERIPH_BASE

#define PERIPH_BASE   (0x40000000UL)

(Peripheral) Base Address

Definition at line 13758 of file M471M_R1_S.h.

◆ PWM0_BASE

#define PWM0_BASE   (APBPERIPH_BASE + 0x18000)

Definition at line 13788 of file M471M_R1_S.h.

◆ PWM1_BASE

#define PWM1_BASE   (APBPERIPH_BASE + 0x19000)

Definition at line 13800 of file M471M_R1_S.h.

◆ RTC_BASE

#define RTC_BASE   (APBPERIPH_BASE + 0x01000)

Definition at line 13797 of file M471M_R1_S.h.

◆ SC0_BASE

#define SC0_BASE   (APBPERIPH_BASE + 0x50000)

Definition at line 13793 of file M471M_R1_S.h.

◆ SPI0_BASE

#define SPI0_BASE   (APBPERIPH_BASE + 0x20000)

Definition at line 13789 of file M471M_R1_S.h.

◆ SPI1_BASE

#define SPI1_BASE   (APBPERIPH_BASE + 0x21000)

Definition at line 13801 of file M471M_R1_S.h.

◆ SRAM_BASE

#define SRAM_BASE   (0x20000000UL)

(SRAM ) Base Address

Definition at line 13757 of file M471M_R1_S.h.

◆ TMR01_BASE

#define TMR01_BASE   (APBPERIPH_BASE + 0x10000)

Definition at line 13787 of file M471M_R1_S.h.

◆ TMR23_BASE

#define TMR23_BASE   (APBPERIPH_BASE + 0x11000)

Definition at line 13799 of file M471M_R1_S.h.

◆ UART0_BASE

#define UART0_BASE   (APBPERIPH_BASE + 0x30000)

Definition at line 13790 of file M471M_R1_S.h.

◆ UART1_BASE

#define UART1_BASE   (APBPERIPH_BASE + 0x31000)

Definition at line 13802 of file M471M_R1_S.h.

◆ UART2_BASE

#define UART2_BASE   (APBPERIPH_BASE + 0x32000)

Definition at line 13791 of file M471M_R1_S.h.

◆ UART3_BASE

#define UART3_BASE   (APBPERIPH_BASE + 0x33000)

Definition at line 13803 of file M471M_R1_S.h.

◆ USBD_BASE

#define USBD_BASE   (APBPERIPH_BASE + 0x80000)

APB1 peripherals

Definition at line 13796 of file M471M_R1_S.h.

◆ USBH_BASE

#define USBH_BASE   (AHBPERIPH_BASE + 0x09000)

Definition at line 13779 of file M471M_R1_S.h.

◆ WDT_BASE

#define WDT_BASE   (APBPERIPH_BASE + 0x00000)

Definition at line 13785 of file M471M_R1_S.h.

◆ WWDT_BASE

#define WWDT_BASE   (APBPERIPH_BASE + 0x00100)

Definition at line 13786 of file M471M_R1_S.h.