M471M/R1/S BSP V3.01.000
The Board Support Package for M4521
Data Structures | Macros | Typedefs | Enumerations
M471M_R1_S.h File Reference
#include "core_cm4.h"
#include "system_M471M_R1_S.h"
#include <stdint.h>
#include "sys.h"
#include "clk.h"
#include "gpio.h"
#include "i2c.h"
#include "crc.h"
#include "ebi.h"
#include "rtc.h"
#include "timer.h"
#include "wdt.h"
#include "wwdt.h"
#include "spi.h"
#include "sc.h"
#include "scuart.h"
#include "eadc.h"
#include "usbd.h"
#include "fmc.h"
#include "uart.h"
#include "pwm.h"
#include "pdma.h"
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Data Structures

struct  EADC_T
 
struct  CLK_T
 
struct  CRC_T
 
struct  EBI_T
 
struct  FMC_T
 
struct  GPIO_T
 
struct  GPIO_DBCTL_T
 
struct  I2C_T
 
struct  DSCT_T
 
struct  PDMA_T
 
struct  PWM_T
 
struct  RTC_T
 
struct  SC_T
 
struct  SPI_T
 
struct  SYS_T
 
struct  SYS_INT_T
 
struct  TIMER_T
 
struct  UART_T
 
struct  USBD_EP_T
 USBD endpoints register. More...
 
struct  USBD_T
 
struct  USBH_T
 
struct  WDT_T
 
struct  WWDT_T
 

Macros

#define __CM4_REV   0x0201
 
#define __NVIC_PRIO_BITS   4
 
#define __Vendor_SysTickConfig   0
 
#define __MPU_PRESENT   1
 
#define __FPU_PRESENT   1
 
#define SRAM_BASE   (0x20000000UL)
 
#define PERIPH_BASE   (0x40000000UL)
 
#define AHBPERIPH_BASE   PERIPH_BASE
 
#define APBPERIPH_BASE   (PERIPH_BASE + 0x00040000)
 
#define GCR_BASE   (AHBPERIPH_BASE + 0x00000)
 
#define CLK_BASE   (AHBPERIPH_BASE + 0x00200)
 
#define INT_BASE   (AHBPERIPH_BASE + 0x00300)
 
#define GPIO_BASE   (AHBPERIPH_BASE + 0x04000)
 
#define GPIOA_BASE   (AHBPERIPH_BASE + 0x04000)
 
#define GPIOB_BASE   (AHBPERIPH_BASE + 0x04040)
 
#define GPIOC_BASE   (AHBPERIPH_BASE + 0x04080)
 
#define GPIOD_BASE   (AHBPERIPH_BASE + 0x040C0)
 
#define GPIOE_BASE   (AHBPERIPH_BASE + 0x04100)
 
#define GPIOF_BASE   (AHBPERIPH_BASE + 0x04140)
 
#define GPIO_DBCTL_BASE   (AHBPERIPH_BASE + 0x04440)
 
#define GPIO_PIN_DATA_BASE   (AHBPERIPH_BASE + 0x04800)
 
#define PDMA_BASE   (AHBPERIPH_BASE + 0x08000)
 
#define USBH_BASE   (AHBPERIPH_BASE + 0x09000)
 
#define FMC_BASE   (AHBPERIPH_BASE + 0x0C000)
 
#define EBI_BASE   (AHBPERIPH_BASE + 0x10000)
 
#define CRC_BASE   (AHBPERIPH_BASE + 0x31000)
 
#define WDT_BASE   (APBPERIPH_BASE + 0x00000)
 
#define WWDT_BASE   (APBPERIPH_BASE + 0x00100)
 
#define TMR01_BASE   (APBPERIPH_BASE + 0x10000)
 
#define PWM0_BASE   (APBPERIPH_BASE + 0x18000)
 
#define SPI0_BASE   (APBPERIPH_BASE + 0x20000)
 
#define UART0_BASE   (APBPERIPH_BASE + 0x30000)
 
#define UART2_BASE   (APBPERIPH_BASE + 0x32000)
 
#define I2C0_BASE   (APBPERIPH_BASE + 0x40000)
 
#define SC0_BASE   (APBPERIPH_BASE + 0x50000)
 
#define USBD_BASE   (APBPERIPH_BASE + 0x80000)
 
#define RTC_BASE   (APBPERIPH_BASE + 0x01000)
 
#define EADC0_BASE   (APBPERIPH_BASE + 0x03000)
 
#define TMR23_BASE   (APBPERIPH_BASE + 0x11000)
 
#define PWM1_BASE   (APBPERIPH_BASE + 0x19000)
 
#define SPI1_BASE   (APBPERIPH_BASE + 0x21000)
 
#define UART1_BASE   (APBPERIPH_BASE + 0x31000)
 
#define UART3_BASE   (APBPERIPH_BASE + 0x33000)
 
#define I2C1_BASE   (APBPERIPH_BASE + 0x41000)
 
#define SYS   ((SYS_T *) GCR_BASE)
 
#define SYSINT   ((SYS_INT_T *) INT_BASE)
 
#define CLK   ((CLK_T *) CLK_BASE)
 
#define PA   ((GPIO_T *) GPIOA_BASE)
 
#define PB   ((GPIO_T *) GPIOB_BASE)
 
#define PC   ((GPIO_T *) GPIOC_BASE)
 
#define PD   ((GPIO_T *) GPIOD_BASE)
 
#define PE   ((GPIO_T *) GPIOE_BASE)
 
#define PF   ((GPIO_T *) GPIOF_BASE)
 
#define GPIO   ((GPIO_DBCTL_T *) GPIO_DBCTL_BASE)
 
#define PDMA   ((PDMA_T *) PDMA_BASE)
 
#define USBH   ((USBH_T *) USBH_BASE)
 
#define FMC   ((FMC_T *) FMC_BASE)
 
#define EBI   ((EBI_T *) EBI_BASE)
 
#define CRC   ((CRC_T *) CRC_BASE)
 
#define WDT   ((WDT_T *) WDT_BASE)
 
#define WWDT   ((WWDT_T *) WWDT_BASE)
 
#define RTC   ((RTC_T *) RTC_BASE)
 
#define EADC   ((EADC_T *) EADC0_BASE)
 
#define USBD   ((USBD_T *) USBD_BASE)
 
#define TIMER0   ((TIMER_T *) TMR01_BASE)
 
#define TIMER1   ((TIMER_T *) (TMR01_BASE + 0x20))
 
#define TIMER2   ((TIMER_T *) TMR23_BASE)
 
#define TIMER3   ((TIMER_T *) (TMR23_BASE + 0x20))
 
#define PWM0   ((PWM_T *) PWM0_BASE)
 
#define PWM1   ((PWM_T *) PWM1_BASE)
 
#define SPI0   ((SPI_T *) SPI0_BASE)
 
#define SPI1   ((SPI_T *) SPI1_BASE)
 
#define UART0   ((UART_T *) UART0_BASE)
 
#define UART1   ((UART_T *) UART1_BASE)
 
#define UART2   ((UART_T *) UART2_BASE)
 
#define UART3   ((UART_T *) UART3_BASE)
 
#define I2C0   ((I2C_T *) I2C0_BASE)
 
#define I2C1   ((I2C_T *) I2C1_BASE)
 
#define SC0   ((SC_T *) SC0_BASE)
 
#define BIT0   0x00000001
 
#define BIT1   0x00000002
 
#define BIT2   0x00000004
 
#define BIT3   0x00000008
 
#define BIT4   0x00000010
 
#define BIT5   0x00000020
 
#define BIT6   0x00000040
 
#define BIT7   0x00000080
 
#define BIT8   0x00000100
 
#define BIT9   0x00000200
 
#define BIT10   0x00000400
 
#define BIT11   0x00000800
 
#define BIT12   0x00001000
 
#define BIT13   0x00002000
 
#define BIT14   0x00004000
 
#define BIT15   0x00008000
 
#define BIT16   0x00010000
 
#define BIT17   0x00020000
 
#define BIT18   0x00040000
 
#define BIT19   0x00080000
 
#define BIT20   0x00100000
 
#define BIT21   0x00200000
 
#define BIT22   0x00400000
 
#define BIT23   0x00800000
 
#define BIT24   0x01000000
 
#define BIT25   0x02000000
 
#define BIT26   0x04000000
 
#define BIT27   0x08000000
 
#define BIT28   0x10000000
 
#define BIT29   0x20000000
 
#define BIT30   0x40000000
 
#define BIT31   0x80000000
 
#define BYTE0_Msk   (0x000000FF)
 
#define BYTE1_Msk   (0x0000FF00)
 
#define BYTE2_Msk   (0x00FF0000)
 
#define BYTE3_Msk   (0xFF000000)
 
#define _GET_BYTE0(u32Param)   (((u32Param) & BYTE0_Msk) )
 
#define _GET_BYTE1(u32Param)   (((u32Param) & BYTE1_Msk) >> 8)
 
#define _GET_BYTE2(u32Param)   (((u32Param) & BYTE2_Msk) >> 16)
 
#define _GET_BYTE3(u32Param)   (((u32Param) & BYTE3_Msk) >> 24)
 
#define TRUE   1
 
#define FALSE   0
 
#define NULL   0
 
#define M8(adr)   (*((vu8 *) (adr)))
 
#define M16(adr)   (*((vu16 *) (adr)))
 
#define M32(adr)   (*((vu32 *) (adr)))
 
#define outpw(port, value)   (*((volatile unsigned int *)(port))=(value))
 
#define inpw(port)   (*((volatile unsigned int *)(port)))
 
#define outpb(port, value)   (*((volatile unsigned char *)(port))=(value))
 
#define inpb(port)   (*((volatile unsigned char *)(port)))
 
#define outps(port, value)   (*((volatile unsigned short *)(port))=(value))
 
#define inps(port)   (*((volatile unsigned short *)(port)))
 
#define outp32(port, value)   (*((volatile unsigned int *)(port))=(value))
 
#define inp32(port)   (*((volatile unsigned int *)(port)))
 
#define outp8(port, value)   (*((volatile unsigned char *)(port))=(value))
 
#define inp8(port)   (*((volatile unsigned char *)(port)))
 
#define outp16(port, value)   (*((volatile unsigned short *)(port))=(value))
 
#define inp16(port)   (*((volatile unsigned short *)(port)))
 
#define EADC_DAT_RESULT_Pos   (0)
 
#define EADC_DAT_RESULT_Msk   (0xfffful << EADC_DAT_RESULT_Pos)
 
#define EADC_DAT_OV_Pos   (16)
 
#define EADC_DAT_OV_Msk   (0x1ul << EADC_DAT_OV_Pos)
 
#define EADC_DAT_VALID_Pos   (17)
 
#define EADC_DAT_VALID_Msk   (0x1ul << EADC_DAT_VALID_Pos)
 
#define EADC_CURDAT_CURDAT_Pos   (0)
 
#define EADC_CURDAT_CURDAT_Msk   (0x3fffful << EADC_CURDAT_CURDAT_Pos)
 
#define EADC_CTL_ADCEN_Pos   (0)
 
#define EADC_CTL_ADCEN_Msk   (0x1ul << EADC_CTL_ADCEN_Pos)
 
#define EADC_CTL_ADRST_Pos   (1)
 
#define EADC_CTL_ADRST_Msk   (0x1ul << EADC_CTL_ADRST_Pos)
 
#define EADC_CTL_ADCIEN0_Pos   (2)
 
#define EADC_CTL_ADCIEN0_Msk   (0x1ul << EADC_CTL_ADCIEN0_Pos)
 
#define EADC_CTL_ADCIEN1_Pos   (3)
 
#define EADC_CTL_ADCIEN1_Msk   (0x1ul << EADC_CTL_ADCIEN1_Pos)
 
#define EADC_CTL_ADCIEN2_Pos   (4)
 
#define EADC_CTL_ADCIEN2_Msk   (0x1ul << EADC_CTL_ADCIEN2_Pos)
 
#define EADC_CTL_ADCIEN3_Pos   (5)
 
#define EADC_CTL_ADCIEN3_Msk   (0x1ul << EADC_CTL_ADCIEN3_Pos)
 
#define EADC_CTL_DIFFEN_Pos   (8)
 
#define EADC_CTL_DIFFEN_Msk   (0x1ul << EADC_CTL_DIFFEN_Pos)
 
#define EADC_CTL_DMOF_Pos   (9)
 
#define EADC_CTL_DMOF_Msk   (0x1ul << EADC_CTL_DMOF_Pos)
 
#define EADC_CTL_PDMAEN_Pos   (11)
 
#define EADC_CTL_PDMAEN_Msk   (0x1ul << EADC_CTL_PDMAEN_Pos)
 
#define EADC_CTL_SMPTSEL_Pos   (16)
 
#define EADC_CTL_SMPTSEL_Msk   (0x7ul << EADC_CTL_SMPTSEL_Pos)
 
#define EADC_SWTRG_SWTRG_Pos   (0)
 
#define EADC_SWTRG_SWTRG_Msk   (0x7fffful << EADC_SWTRG_SWTRG_Pos)
 
#define EADC_PENDSTS_STPF_Pos   (0)
 
#define EADC_PENDSTS_STPF_Msk   (0x7fffful << EADC_PENDSTS_STPF_Pos)
 
#define EADC_OVSTS_SPOVF_Pos   (0)
 
#define EADC_OVSTS_SPOVF_Msk   (0x7fffful << EADC_OVSTS_SPOVF_Pos)
 
#define EADC_SCTL_CHSEL_Pos   (0)
 
#define EADC_SCTL_CHSEL_Msk   (0xful << EADC_SCTL_CHSEL_Pos)
 
#define EADC_SCTL_EXTREN_Pos   (4)
 
#define EADC_SCTL_EXTREN_Msk   (0x1ul << EADC_SCTL_EXTREN_Pos)
 
#define EADC_SCTL_EXTFEN_Pos   (5)
 
#define EADC_SCTL_EXTFEN_Msk   (0x1ul << EADC_SCTL_EXTFEN_Pos)
 
#define EADC_SCTL_TRGDLYDIV_Pos   (6)
 
#define EADC_SCTL_TRGDLYDIV_Msk   (0x3ul << EADC_SCTL_TRGDLYDIV_Pos)
 
#define EADC_SCTL_TRGDLYCNT_Pos   (8)
 
#define EADC_SCTL_TRGDLYCNT_Msk   (0xfful << EADC_SCTL_TRGDLYCNT_Pos)
 
#define EADC_SCTL_TRGSEL_Pos   (16)
 
#define EADC_SCTL_TRGSEL_Msk   (0x1ful << EADC_SCTL_TRGSEL_Pos)
 
#define EADC_SCTL_INTPOS_Pos   (22)
 
#define EADC_SCTL_INTPOS_Msk   (0x1ul << EADC_SCTL_INTPOS_Pos)
 
#define EADC_SCTL_DBMEN_Pos   (23)
 
#define EADC_SCTL_DBMEN_Msk   (0x1ul << EADC_SCTL_DBMEN_Pos)
 
#define EADC_SCTL_EXTSMPT_Pos   (24)
 
#define EADC_SCTL_EXTSMPT_Msk   (0xfful << EADC_SCTL_EXTSMPT_Pos)
 
#define EADC_INTSRC_SPLIE_Pos   (0)
 
#define EADC_INTSRC_SPLIE_Msk   (0x7FFFFul << EADC_INTSRC_SPLIE_Pos)
 
#define EADC_CMP_ADCMPEN_Pos   (0)
 
#define EADC_CMP_ADCMPEN_Msk   (0x1ul << EADC_CMP_ADCMPEN_Pos)
 
#define EADC_CMP_ADCMPIE_Pos   (1)
 
#define EADC_CMP_ADCMPIE_Msk   (0x1ul << EADC_CMP_ADCMPIE_Pos)
 
#define EADC_CMP_CMPCOND_Pos   (2)
 
#define EADC_CMP_CMPCOND_Msk   (0x1ul << EADC_CMP_CMPCOND_Pos)
 
#define EADC_CMP_CMPSPL_Pos   (3)
 
#define EADC_CMP_CMPSPL_Msk   (0x1ful << EADC_CMP_CMPSPL_Pos)
 
#define EADC_CMP_CMPMCNT_Pos   (8)
 
#define EADC_CMP_CMPMCNT_Msk   (0xful << EADC_CMP_CMPMCNT_Pos)
 
#define EADC_CMP_CMPWEN_Pos   (15)
 
#define EADC_CMP_CMPWEN_Msk   (0x1ul << EADC_CMP_CMPWEN_Pos)
 
#define EADC_CMP_CMPDAT_Pos   (16)
 
#define EADC_CMP_CMPDAT_Msk   (0xffful << EADC_CMP_CMPDAT_Pos)
 
#define EADC_STATUS0_VALID_Pos   (0)
 
#define EADC_STATUS0_VALID_Msk   (0xfffful << EADC_STATUS0_VALID_Pos)
 
#define EADC_STATUS0_OV_Pos   (16)
 
#define EADC_STATUS0_OV_Msk   (0xfffful << EADC_STATUS0_OV_Pos)
 
#define EADC_STATUS1_VALID_Pos   (0)
 
#define EADC_STATUS1_VALID_Msk   (0x7ul << EADC_STATUS1_VALID_Pos)
 
#define EADC_STATUS1_OV_Pos   (16)
 
#define EADC_STATUS1_OV_Msk   (0x7ul << EADC_STATUS1_OV_Pos)
 
#define EADC_STATUS2_ADIF0_Pos   (0)
 
#define EADC_STATUS2_ADIF0_Msk   (0x1ul << EADC_STATUS2_ADIF0_Pos)
 
#define EADC_STATUS2_ADIF1_Pos   (1)
 
#define EADC_STATUS2_ADIF1_Msk   (0x1ul << EADC_STATUS2_ADIF1_Pos)
 
#define EADC_STATUS2_ADIF2_Pos   (2)
 
#define EADC_STATUS2_ADIF2_Msk   (0x1ul << EADC_STATUS2_ADIF2_Pos)
 
#define EADC_STATUS2_ADIF3_Pos   (3)
 
#define EADC_STATUS2_ADIF3_Msk   (0x1ul << EADC_STATUS2_ADIF3_Pos)
 
#define EADC_STATUS2_ADCMPF0_Pos   (4)
 
#define EADC_STATUS2_ADCMPF0_Msk   (0x1ul << EADC_STATUS2_ADCMPF0_Pos)
 
#define EADC_STATUS2_ADCMPF1_Pos   (5)
 
#define EADC_STATUS2_ADCMPF1_Msk   (0x1ul << EADC_STATUS2_ADCMPF1_Pos)
 
#define EADC_STATUS2_ADCMPF2_Pos   (6)
 
#define EADC_STATUS2_ADCMPF2_Msk   (0x1ul << EADC_STATUS2_ADCMPF2_Pos)
 
#define EADC_STATUS2_ADCMPF3_Pos   (7)
 
#define EADC_STATUS2_ADCMPF3_Msk   (0x1ul << EADC_STATUS2_ADCMPF3_Pos)
 
#define EADC_STATUS2_ADOVIF0_Pos   (8)
 
#define EADC_STATUS2_ADOVIF0_Msk   (0x1ul << EADC_STATUS2_ADOVIF0_Pos)
 
#define EADC_STATUS2_ADOVIF1_Pos   (9)
 
#define EADC_STATUS2_ADOVIF1_Msk   (0x1ul << EADC_STATUS2_ADOVIF1_Pos)
 
#define EADC_STATUS2_ADOVIF2_Pos   (10)
 
#define EADC_STATUS2_ADOVIF2_Msk   (0x1ul << EADC_STATUS2_ADOVIF2_Pos)
 
#define EADC_STATUS2_ADOVIF3_Pos   (11)
 
#define EADC_STATUS2_ADOVIF3_Msk   (0x1ul << EADC_STATUS2_ADOVIF3_Pos)
 
#define EADC_STATUS2_ADCMPO0_Pos   (12)
 
#define EADC_STATUS2_ADCMPO0_Msk   (0x1ul << EADC_STATUS2_ADCMPO0_Pos)
 
#define EADC_STATUS2_ADCMPO1_Pos   (13)
 
#define EADC_STATUS2_ADCMPO1_Msk   (0x1ul << EADC_STATUS2_ADCMPO1_Pos)
 
#define EADC_STATUS2_ADCMPO2_Pos   (14)
 
#define EADC_STATUS2_ADCMPO2_Msk   (0x1ul << EADC_STATUS2_ADCMPO2_Pos)
 
#define EADC_STATUS2_ADCMPO3_Pos   (15)
 
#define EADC_STATUS2_ADCMPO3_Msk   (0x1ul << EADC_STATUS2_ADCMPO3_Pos)
 
#define EADC_STATUS2_CHANNEL_Pos   (16)
 
#define EADC_STATUS2_CHANNEL_Msk   (0x1ful << EADC_STATUS2_CHANNEL_Pos)
 
#define EADC_STATUS2_BUSY_Pos   (23)
 
#define EADC_STATUS2_BUSY_Msk   (0x1ul << EADC_STATUS2_BUSY_Pos)
 
#define EADC_STATUS2_ADOVIF_Pos   (24)
 
#define EADC_STATUS2_ADOVIF_Msk   (0x1ul << EADC_STATUS2_ADOVIF_Pos)
 
#define EADC_STATUS2_STOVF_Pos   (25)
 
#define EADC_STATUS2_STOVF_Msk   (0x1ul << EADC_STATUS2_STOVF_Pos)
 
#define EADC_STATUS2_AVALID_Pos   (26)
 
#define EADC_STATUS2_AVALID_Msk   (0x1ul << EADC_STATUS2_AVALID_Pos)
 
#define EADC_STATUS2_AOV_Pos   (27)
 
#define EADC_STATUS2_AOV_Msk   (0x1ul << EADC_STATUS2_AOV_Pos)
 
#define EADC_STATUS3_CURSPL_Pos   (0)
 
#define EADC_STATUS3_CURSPL_Msk   (0x1ful << EADC_STATUS3_CURSPL_Pos)
 
#define EADC_DDAT_RESULT_Pos   (0)
 
#define EADC_DDAT_RESULT_Msk   (0xfffful << EADC_DDAT_RESULT_Pos)
 
#define EADC_DDAT_OV_Pos   (16)
 
#define EADC_DDAT_OV_Msk   (0x1ul << EADC_DDAT_OV_Pos)
 
#define EADC_DDAT_VALID_Pos   (17)
 
#define EADC_DDAT_VALID_Msk   (0x1ul << EADC_DDAT_VALID_Pos)
 
#define CLK_PWRCTL_HXTEN_Pos   (0)
 
#define CLK_PWRCTL_HXTEN_Msk   (0x1ul << CLK_PWRCTL_HXTEN_Pos)
 
#define CLK_PWRCTL_LXTEN_Pos   (1)
 
#define CLK_PWRCTL_LXTEN_Msk   (0x1ul << CLK_PWRCTL_LXTEN_Pos)
 
#define CLK_PWRCTL_HIRCEN_Pos   (2)
 
#define CLK_PWRCTL_HIRCEN_Msk   (0x1ul << CLK_PWRCTL_HIRCEN_Pos)
 
#define CLK_PWRCTL_LIRCEN_Pos   (3)
 
#define CLK_PWRCTL_LIRCEN_Msk   (0x1ul << CLK_PWRCTL_LIRCEN_Pos)
 
#define CLK_PWRCTL_PDWKDLY_Pos   (4)
 
#define CLK_PWRCTL_PDWKDLY_Msk   (0x1ul << CLK_PWRCTL_PDWKDLY_Pos)
 
#define CLK_PWRCTL_PDWKIEN_Pos   (5)
 
#define CLK_PWRCTL_PDWKIEN_Msk   (0x1ul << CLK_PWRCTL_PDWKIEN_Pos)
 
#define CLK_PWRCTL_PDWKIF_Pos   (6)
 
#define CLK_PWRCTL_PDWKIF_Msk   (0x1ul << CLK_PWRCTL_PDWKIF_Pos)
 
#define CLK_PWRCTL_PDEN_Pos   (7)
 
#define CLK_PWRCTL_PDEN_Msk   (0x1ul << CLK_PWRCTL_PDEN_Pos)
 
#define CLK_PWRCTL_PDWTCPU_Pos   (8)
 
#define CLK_PWRCTL_PDWTCPU_Msk   (0x1ul << CLK_PWRCTL_PDWTCPU_Pos)
 
#define CLK_PWRCTL_HXTGAIN_Pos   (10)
 
#define CLK_PWRCTL_HXTGAIN_Msk   (0x3ul << CLK_PWRCTL_HXTGAIN_Pos)
 
#define CLK_PWRCTL_HXTSELTYP_Pos   (12)
 
#define CLK_PWRCTL_HXTSELTYP_Msk   (0x1ul << CLK_PWRCTL_HXTSELTYP_Pos)
 
#define CLK_PWRCTL_HIRC48MEN_Pos   (24)
 
#define CLK_PWRCTL_HIRC48MEN_Msk   (0x1ul << CLK_PWRCTL_HIRC48MEN_Pos)
 
#define CLK_AHBCLK_PDMACKEN_Pos   (1)
 
#define CLK_AHBCLK_PDMACKEN_Msk   (0x1ul << CLK_AHBCLK_PDMACKEN_Pos)
 
#define CLK_AHBCLK_ISPCKEN_Pos   (2)
 
#define CLK_AHBCLK_ISPCKEN_Msk   (0x1ul << CLK_AHBCLK_ISPCKEN_Pos)
 
#define CLK_AHBCLK_EBICKEN_Pos   (3)
 
#define CLK_AHBCLK_EBICKEN_Msk   (0x1ul << CLK_AHBCLK_EBICKEN_Pos)
 
#define CLK_AHBCLK_USBHCKEN_Pos   (4)
 
#define CLK_AHBCLK_USBHCKEN_Msk   (0x1ul << CLK_AHBCLK_USBHCKEN_Pos)
 
#define CLK_AHBCLK_CRCCKEN_Pos   (7)
 
#define CLK_AHBCLK_CRCCKEN_Msk   (0x1ul << CLK_AHBCLK_CRCCKEN_Pos)
 
#define CLK_AHBCLK_FMCIDLE_Pos   (15)
 
#define CLK_AHBCLK_FMCIDLE_Msk   (0x1ul << CLK_AHBCLK_FMCIDLE_Pos)
 
#define CLK_APBCLK0_WDTCKEN_Pos   (0)
 
#define CLK_APBCLK0_WDTCKEN_Msk   (0x1ul << CLK_APBCLK0_WDTCKEN_Pos)
 
#define CLK_APBCLK0_RTCCKEN_Pos   (1)
 
#define CLK_APBCLK0_RTCCKEN_Msk   (0x1ul << CLK_APBCLK0_RTCCKEN_Pos)
 
#define CLK_APBCLK0_TMR0CKEN_Pos   (2)
 
#define CLK_APBCLK0_TMR0CKEN_Msk   (0x1ul << CLK_APBCLK0_TMR0CKEN_Pos)
 
#define CLK_APBCLK0_TMR1CKEN_Pos   (3)
 
#define CLK_APBCLK0_TMR1CKEN_Msk   (0x1ul << CLK_APBCLK0_TMR1CKEN_Pos)
 
#define CLK_APBCLK0_TMR2CKEN_Pos   (4)
 
#define CLK_APBCLK0_TMR2CKEN_Msk   (0x1ul << CLK_APBCLK0_TMR2CKEN_Pos)
 
#define CLK_APBCLK0_TMR3CKEN_Pos   (5)
 
#define CLK_APBCLK0_TMR3CKEN_Msk   (0x1ul << CLK_APBCLK0_TMR3CKEN_Pos)
 
#define CLK_APBCLK0_CLKOCKEN_Pos   (6)
 
#define CLK_APBCLK0_CLKOCKEN_Msk   (0x1ul << CLK_APBCLK0_CLKOCKEN_Pos)
 
#define CLK_APBCLK0_I2C0CKEN_Pos   (8)
 
#define CLK_APBCLK0_I2C0CKEN_Msk   (0x1ul << CLK_APBCLK0_I2C0CKEN_Pos)
 
#define CLK_APBCLK0_I2C1CKEN_Pos   (9)
 
#define CLK_APBCLK0_I2C1CKEN_Msk   (0x1ul << CLK_APBCLK0_I2C1CKEN_Pos)
 
#define CLK_APBCLK0_SPI0CKEN_Pos   (12)
 
#define CLK_APBCLK0_SPI0CKEN_Msk   (0x1ul << CLK_APBCLK0_SPI0CKEN_Pos)
 
#define CLK_APBCLK0_SPI1CKEN_Pos   (13)
 
#define CLK_APBCLK0_SPI1CKEN_Msk   (0x1ul << CLK_APBCLK0_SPI1CKEN_Pos)
 
#define CLK_APBCLK0_UART0CKEN_Pos   (16)
 
#define CLK_APBCLK0_UART0CKEN_Msk   (0x1ul << CLK_APBCLK0_UART0CKEN_Pos)
 
#define CLK_APBCLK0_UART1CKEN_Pos   (17)
 
#define CLK_APBCLK0_UART1CKEN_Msk   (0x1ul << CLK_APBCLK0_UART1CKEN_Pos)
 
#define CLK_APBCLK0_UART2CKEN_Pos   (18)
 
#define CLK_APBCLK0_UART2CKEN_Msk   (0x1ul << CLK_APBCLK0_UART2CKEN_Pos)
 
#define CLK_APBCLK0_UART3CKEN_Pos   (19)
 
#define CLK_APBCLK0_UART3CKEN_Msk   (0x1ul << CLK_APBCLK0_UART3CKEN_Pos)
 
#define CLK_APBCLK0_USBDCKEN_Pos   (27)
 
#define CLK_APBCLK0_USBDCKEN_Msk   (0x1ul << CLK_APBCLK0_USBDCKEN_Pos)
 
#define CLK_APBCLK0_EADCCKEN_Pos   (28)
 
#define CLK_APBCLK0_EADCCKEN_Msk   (0x1ul << CLK_APBCLK0_EADCCKEN_Pos)
 
#define CLK_APBCLK1_SC0CKEN_Pos   (0)
 
#define CLK_APBCLK1_SC0CKEN_Msk   (0x1ul << CLK_APBCLK1_SC0CKEN_Pos)
 
#define CLK_APBCLK1_PWM0CKEN_Pos   (16)
 
#define CLK_APBCLK1_PWM0CKEN_Msk   (0x1ul << CLK_APBCLK1_PWM0CKEN_Pos)
 
#define CLK_APBCLK1_PWM1CKEN_Pos   (17)
 
#define CLK_APBCLK1_PWM1CKEN_Msk   (0x1ul << CLK_APBCLK1_PWM1CKEN_Pos)
 
#define CLK_APBCLK1_TKCKEN_Pos   (25)
 
#define CLK_APBCLK1_TKCKEN_Msk   (0x1ul << CLK_APBCLK1_TKCKEN_Pos)
 
#define CLK_CLKSEL0_HCLKSEL_Pos   (0)
 
#define CLK_CLKSEL0_HCLKSEL_Msk   (0x7ul << CLK_CLKSEL0_HCLKSEL_Pos)
 
#define CLK_CLKSEL0_STCLKSEL_Pos   (3)
 
#define CLK_CLKSEL0_STCLKSEL_Msk   (0x7ul << CLK_CLKSEL0_STCLKSEL_Pos)
 
#define CLK_CLKSEL0_PCLK0SEL_Pos   (6)
 
#define CLK_CLKSEL0_PCLK0SEL_Msk   (0x1ul << CLK_CLKSEL0_PCLK0SEL_Pos)
 
#define CLK_CLKSEL0_PCLK1SEL_Pos   (7)
 
#define CLK_CLKSEL0_PCLK1SEL_Msk   (0x1ul << CLK_CLKSEL0_PCLK1SEL_Pos)
 
#define CLK_CLKSEL0_USBCKSEL_Pos   (8)
 
#define CLK_CLKSEL0_USBCKSEL_Msk   (0x1ul << CLK_CLKSEL0_USBCKSEL_Pos)
 
#define CLK_CLKSEL1_WDTSEL_Pos   (0)
 
#define CLK_CLKSEL1_WDTSEL_Msk   (0x3ul << CLK_CLKSEL1_WDTSEL_Pos)
 
#define CLK_CLKSEL1_TMR0SEL_Pos   (8)
 
#define CLK_CLKSEL1_TMR0SEL_Msk   (0x7ul << CLK_CLKSEL1_TMR0SEL_Pos)
 
#define CLK_CLKSEL1_TMR1SEL_Pos   (12)
 
#define CLK_CLKSEL1_TMR1SEL_Msk   (0x7ul << CLK_CLKSEL1_TMR1SEL_Pos)
 
#define CLK_CLKSEL1_TMR2SEL_Pos   (16)
 
#define CLK_CLKSEL1_TMR2SEL_Msk   (0x7ul << CLK_CLKSEL1_TMR2SEL_Pos)
 
#define CLK_CLKSEL1_TMR3SEL_Pos   (20)
 
#define CLK_CLKSEL1_TMR3SEL_Msk   (0x7ul << CLK_CLKSEL1_TMR3SEL_Pos)
 
#define CLK_CLKSEL1_UARTSEL_Pos   (24)
 
#define CLK_CLKSEL1_UARTSEL_Msk   (0x3ul << CLK_CLKSEL1_UARTSEL_Pos)
 
#define CLK_CLKSEL1_CLKOSEL_Pos   (28)
 
#define CLK_CLKSEL1_CLKOSEL_Msk   (0x3ul << CLK_CLKSEL1_CLKOSEL_Pos)
 
#define CLK_CLKSEL1_WWDTSEL_Pos   (30)
 
#define CLK_CLKSEL1_WWDTSEL_Msk   (0x3ul << CLK_CLKSEL1_WWDTSEL_Pos)
 
#define CLK_CLKSEL2_PWM0SEL_Pos   (0)
 
#define CLK_CLKSEL2_PWM0SEL_Msk   (0x1ul << CLK_CLKSEL2_PWM0SEL_Pos)
 
#define CLK_CLKSEL2_PWM1SEL_Pos   (1)
 
#define CLK_CLKSEL2_PWM1SEL_Msk   (0x1ul << CLK_CLKSEL2_PWM1SEL_Pos)
 
#define CLK_CLKSEL2_SPI0SEL_Pos   (2)
 
#define CLK_CLKSEL2_SPI0SEL_Msk   (0x3ul << CLK_CLKSEL2_SPI0SEL_Pos)
 
#define CLK_CLKSEL2_SPI1SEL_Pos   (4)
 
#define CLK_CLKSEL2_SPI1SEL_Msk   (0x3ul << CLK_CLKSEL2_SPI1SEL_Pos)
 
#define CLK_CLKSEL3_SC0SEL_Pos   (0)
 
#define CLK_CLKSEL3_SC0SEL_Msk   (0x3ul << CLK_CLKSEL3_SC0SEL_Pos)
 
#define CLK_CLKSEL3_RTCSEL_Pos   (8)
 
#define CLK_CLKSEL3_RTCSEL_Msk   (0x1ul << CLK_CLKSEL3_RTCSEL_Pos)
 
#define CLK_CLKDIV0_HCLKDIV_Pos   (0)
 
#define CLK_CLKDIV0_HCLKDIV_Msk   (0xful << CLK_CLKDIV0_HCLKDIV_Pos)
 
#define CLK_CLKDIV0_USBDIV_Pos   (4)
 
#define CLK_CLKDIV0_USBDIV_Msk   (0xful << CLK_CLKDIV0_USBDIV_Pos)
 
#define CLK_CLKDIV0_UARTDIV_Pos   (8)
 
#define CLK_CLKDIV0_UARTDIV_Msk   (0xful << CLK_CLKDIV0_UARTDIV_Pos)
 
#define CLK_CLKDIV0_EADCDIV_Pos   (16)
 
#define CLK_CLKDIV0_EADCDIV_Msk   (0xfful << CLK_CLKDIV0_EADCDIV_Pos)
 
#define CLK_CLKDIV1_SC0DIV_Pos   (0)
 
#define CLK_CLKDIV1_SC0DIV_Msk   (0xfful << CLK_CLKDIV1_SC0DIV_Pos)
 
#define CLK_PLLCTL_FBDIV_Pos   (0)
 
#define CLK_PLLCTL_FBDIV_Msk   (0x1fful << CLK_PLLCTL_FBDIV_Pos)
 
#define CLK_PLLCTL_INDIV_Pos   (9)
 
#define CLK_PLLCTL_INDIV_Msk   (0x1ful << CLK_PLLCTL_INDIV_Pos)
 
#define CLK_PLLCTL_OUTDIV_Pos   (14)
 
#define CLK_PLLCTL_OUTDIV_Msk   (0x3ul << CLK_PLLCTL_OUTDIV_Pos)
 
#define CLK_PLLCTL_PD_Pos   (16)
 
#define CLK_PLLCTL_PD_Msk   (0x1ul << CLK_PLLCTL_PD_Pos)
 
#define CLK_PLLCTL_BP_Pos   (17)
 
#define CLK_PLLCTL_BP_Msk   (0x1ul << CLK_PLLCTL_BP_Pos)
 
#define CLK_PLLCTL_OE_Pos   (18)
 
#define CLK_PLLCTL_OE_Msk   (0x1ul << CLK_PLLCTL_OE_Pos)
 
#define CLK_PLLCTL_PLLSRC_Pos   (19)
 
#define CLK_PLLCTL_PLLSRC_Msk   (0x1ul << CLK_PLLCTL_PLLSRC_Pos)
 
#define CLK_PLLCTL_STBSEL_Pos   (23)
 
#define CLK_PLLCTL_STBSEL_Msk   (0x1ul << CLK_PLLCTL_STBSEL_Pos)
 
#define CLK_STATUS_HXTSTB_Pos   (0)
 
#define CLK_STATUS_HXTSTB_Msk   (0x1ul << CLK_STATUS_HXTSTB_Pos)
 
#define CLK_STATUS_LXTSTB_Pos   (1)
 
#define CLK_STATUS_LXTSTB_Msk   (0x1ul << CLK_STATUS_LXTSTB_Pos)
 
#define CLK_STATUS_PLLSTB_Pos   (2)
 
#define CLK_STATUS_PLLSTB_Msk   (0x1ul << CLK_STATUS_PLLSTB_Pos)
 
#define CLK_STATUS_LIRCSTB_Pos   (3)
 
#define CLK_STATUS_LIRCSTB_Msk   (0x1ul << CLK_STATUS_LIRCSTB_Pos)
 
#define CLK_STATUS_HIRCSTB_Pos   (4)
 
#define CLK_STATUS_HIRCSTB_Msk   (0x1ul << CLK_STATUS_HIRCSTB_Pos)
 
#define CLK_STATUS_CLKSFAIL_Pos   (7)
 
#define CLK_STATUS_CLKSFAIL_Msk   (0x1ul << CLK_STATUS_CLKSFAIL_Pos)
 
#define CLK_CLKOCTL_FREQSEL_Pos   (0)
 
#define CLK_CLKOCTL_FREQSEL_Msk   (0xful << CLK_CLKOCTL_FREQSEL_Pos)
 
#define CLK_CLKOCTL_CLKOEN_Pos   (4)
 
#define CLK_CLKOCTL_CLKOEN_Msk   (0x1ul << CLK_CLKOCTL_CLKOEN_Pos)
 
#define CLK_CLKOCTL_DIV1EN_Pos   (5)
 
#define CLK_CLKOCTL_DIV1EN_Msk   (0x1ul << CLK_CLKOCTL_DIV1EN_Pos)
 
#define CLK_CLKOCTL_CLK1HZEN_Pos   (6)
 
#define CLK_CLKOCTL_CLK1HZEN_Msk   (0x1ul << CLK_CLKOCTL_CLK1HZEN_Pos)
 
#define CLK_CLKDCTL_HXTFDEN_Pos   (4)
 
#define CLK_CLKDCTL_HXTFDEN_Msk   (0x1ul << CLK_CLKDCTL_HXTFDEN_Pos)
 
#define CLK_CLKDCTL_HXTFIEN_Pos   (5)
 
#define CLK_CLKDCTL_HXTFIEN_Msk   (0x1ul << CLK_CLKDCTL_HXTFIEN_Pos)
 
#define CLK_CLKDCTL_LXTFDEN_Pos   (12)
 
#define CLK_CLKDCTL_LXTFDEN_Msk   (0x1ul << CLK_CLKDCTL_LXTFDEN_Pos)
 
#define CLK_CLKDCTL_LXTFIEN_Pos   (13)
 
#define CLK_CLKDCTL_LXTFIEN_Msk   (0x1ul << CLK_CLKDCTL_LXTFIEN_Pos)
 
#define CLK_CLKDCTL_HXTFQDEN_Pos   (16)
 
#define CLK_CLKDCTL_HXTFQDEN_Msk   (0x1ul << CLK_CLKDCTL_HXTFQDEN_Pos)
 
#define CLK_CLKDCTL_HXTFQIEN_Pos   (17)
 
#define CLK_CLKDCTL_HXTFQIEN_Msk   (0x1ul << CLK_CLKDCTL_HXTFQIEN_Pos)
 
#define CLK_CLKDSTS_HXTFIF_Pos   (0)
 
#define CLK_CLKDSTS_HXTFIF_Msk   (0x1ul << CLK_CLKDSTS_HXTFIF_Pos)
 
#define CLK_CLKDSTS_LXTFIF_Pos   (1)
 
#define CLK_CLKDSTS_LXTFIF_Msk   (0x1ul << CLK_CLKDSTS_LXTFIF_Pos)
 
#define CLK_CLKDSTS_HXTFQIF_Pos   (8)
 
#define CLK_CLKDSTS_HXTFQIF_Msk   (0x1ul << CLK_CLKDSTS_HXTFQIF_Pos)
 
#define CLK_CDUPB_UPERBD_Pos   (0)
 
#define CLK_CDUPB_UPERBD_Msk   (0x3fful << CLK_CDUPB_UPERBD_Pos)
 
#define CLK_CDLOWB_LOWERBD_Pos   (0)
 
#define CLK_CDLOWB_LOWERBD_Msk   (0x3fful << CLK_CDLOWB_LOWERBD_Pos)
 
#define CRC_CTL_CRCEN_Pos   (0)
 
#define CRC_CTL_CRCEN_Msk   (0x1ul << CRC_CTL_CRCEN_Pos)
 
#define CRC_CTL_CRCRST_Pos   (1)
 
#define CRC_CTL_CRCRST_Msk   (0x1ul << CRC_CTL_CRCRST_Pos)
 
#define CRC_CTL_DATREV_Pos   (24)
 
#define CRC_CTL_DATREV_Msk   (0x1ul << CRC_CTL_DATREV_Pos)
 
#define CRC_CTL_CHKSREV_Pos   (25)
 
#define CRC_CTL_CHKSREV_Msk   (0x1ul << CRC_CTL_CHKSREV_Pos)
 
#define CRC_CTL_DATFMT_Pos   (26)
 
#define CRC_CTL_DATFMT_Msk   (0x1ul << CRC_CTL_DATFMT_Pos)
 
#define CRC_CTL_CHKSFMT_Pos   (27)
 
#define CRC_CTL_CHKSFMT_Msk   (0x1ul << CRC_CTL_CHKSFMT_Pos)
 
#define CRC_CTL_DATLEN_Pos   (28)
 
#define CRC_CTL_DATLEN_Msk   (0x3ul << CRC_CTL_DATLEN_Pos)
 
#define CRC_CTL_CRCMODE_Pos   (30)
 
#define CRC_CTL_CRCMODE_Msk   (0x3ul << CRC_CTL_CRCMODE_Pos)
 
#define CRC_DAT_DATA_Pos   (0)
 
#define CRC_DAT_DATA_Msk   (0xfffffffful << CRC_DAT_DATA_Pos)
 
#define CRC_SEED_SEED_Pos   (0)
 
#define CRC_SEED_SEED_Msk   (0xfffffffful << CRC_SEED_SEED_Pos)
 
#define CRC_CHECKSUM_CHECKSUM_Pos   (0)
 
#define CRC_CHECKSUM_CHECKSUM_Msk   (0xfffffffful << CRC_CHECKSUM_CHECKSUM_Pos)
 
#define EBI_CTL0_EN_Pos   (0)
 
#define EBI_CTL0_EN_Msk   (0x1ul << EBI_CTL0_EN_Pos)
 
#define EBI_CTL0_DW16_Pos   (1)
 
#define EBI_CTL0_DW16_Msk   (0x1ul << EBI_CTL0_DW16_Pos)
 
#define EBI_CTL0_CSPOLINV_Pos   (2)
 
#define EBI_CTL0_CSPOLINV_Msk   (0x1ul << EBI_CTL0_CSPOLINV_Pos)
 
#define EBI_CTL0_MCLKDIV_Pos   (8)
 
#define EBI_CTL0_MCLKDIV_Msk   (0x7ul << EBI_CTL0_MCLKDIV_Pos)
 
#define EBI_CTL0_TALE_Pos   (16)
 
#define EBI_CTL0_TALE_Msk   (0x7ul << EBI_CTL0_TALE_Pos)
 
#define EBI_CTL0_WBUFEN_Pos   (24)
 
#define EBI_CTL0_WBUFEN_Msk   (0x1ul << EBI_CTL0_WBUFEN_Pos)
 
#define EBI_TCTL0_TACC_Pos   (3)
 
#define EBI_TCTL0_TACC_Msk   (0x1ful << EBI_TCTL0_TACC_Pos)
 
#define EBI_TCTL0_TAHD_Pos   (8)
 
#define EBI_TCTL0_TAHD_Msk   (0x7ul << EBI_TCTL0_TAHD_Pos)
 
#define EBI_TCTL0_W2X_Pos   (12)
 
#define EBI_TCTL0_W2X_Msk   (0xful << EBI_TCTL0_W2X_Pos)
 
#define EBI_TCTL0_RAHDOFF_Pos   (22)
 
#define EBI_TCTL0_RAHDOFF_Msk   (0x1ul << EBI_TCTL0_RAHDOFF_Pos)
 
#define EBI_TCTL0_WAHDOFF_Pos   (23)
 
#define EBI_TCTL0_WAHDOFF_Msk   (0x1ul << EBI_TCTL0_WAHDOFF_Pos)
 
#define EBI_TCTL0_R2R_Pos   (24)
 
#define EBI_TCTL0_R2R_Msk   (0xful << EBI_TCTL0_R2R_Pos)
 
#define EBI_CTL1_EN_Pos   (0)
 
#define EBI_CTL1_EN_Msk   (0x1ul << EBI_CTL1_EN_Pos)
 
#define EBI_CTL1_DW16_Pos   (1)
 
#define EBI_CTL1_DW16_Msk   (0x1ul << EBI_CTL1_DW16_Pos)
 
#define EBI_CTL1_CSPOLINV_Pos   (2)
 
#define EBI_CTL1_CSPOLINV_Msk   (0x1ul << EBI_CTL1_CSPOLINV_Pos)
 
#define EBI_CTL1_MCLKDIV_Pos   (8)
 
#define EBI_CTL1_MCLKDIV_Msk   (0x7ul << EBI_CTL1_MCLKDIV_Pos)
 
#define EBI_CTL1_TALE_Pos   (16)
 
#define EBI_CTL1_TALE_Msk   (0x7ul << EBI_CTL1_TALE_Pos)
 
#define EBI_CTL1_WBUFEN_Pos   (24)
 
#define EBI_CTL1_WBUFEN_Msk   (0x1ul << EBI_CTL1_WBUFEN_Pos)
 
#define EBI_TCTL1_TACC_Pos   (3)
 
#define EBI_TCTL1_TACC_Msk   (0x1ful << EBI_TCTL1_TACC_Pos)
 
#define EBI_TCTL1_TAHD_Pos   (8)
 
#define EBI_TCTL1_TAHD_Msk   (0x7ul << EBI_TCTL1_TAHD_Pos)
 
#define EBI_TCTL1_W2X_Pos   (12)
 
#define EBI_TCTL1_W2X_Msk   (0xful << EBI_TCTL1_W2X_Pos)
 
#define EBI_TCTL1_RAHDOFF_Pos   (22)
 
#define EBI_TCTL1_RAHDOFF_Msk   (0x1ul << EBI_TCTL1_RAHDOFF_Pos)
 
#define EBI_TCTL1_WAHDOFF_Pos   (23)
 
#define EBI_TCTL1_WAHDOFF_Msk   (0x1ul << EBI_TCTL1_WAHDOFF_Pos)
 
#define EBI_TCTL1_R2R_Pos   (24)
 
#define EBI_TCTL1_R2R_Msk   (0xful << EBI_TCTL1_R2R_Pos)
 
#define FMC_ISPCTL_ISPEN_Pos   (0)
 
#define FMC_ISPCTL_ISPEN_Msk   (0x1ul << FMC_ISPCTL_ISPEN_Pos)
 
#define FMC_ISPCTL_BS_Pos   (1)
 
#define FMC_ISPCTL_BS_Msk   (0x1ul << FMC_ISPCTL_BS_Pos)
 
#define FMC_ISPCTL_APUEN_Pos   (3)
 
#define FMC_ISPCTL_APUEN_Msk   (0x1ul << FMC_ISPCTL_APUEN_Pos)
 
#define FMC_ISPCTL_CFGUEN_Pos   (4)
 
#define FMC_ISPCTL_CFGUEN_Msk   (0x1ul << FMC_ISPCTL_CFGUEN_Pos)
 
#define FMC_ISPCTL_LDUEN_Pos   (5)
 
#define FMC_ISPCTL_LDUEN_Msk   (0x1ul << FMC_ISPCTL_LDUEN_Pos)
 
#define FMC_ISPCTL_ISPFF_Pos   (6)
 
#define FMC_ISPCTL_ISPFF_Msk   (0x1ul << FMC_ISPCTL_ISPFF_Pos)
 
#define FMC_ISPCTL_BL_Pos   (16)
 
#define FMC_ISPCTL_BL_Msk   (0x1ul << FMC_ISPCTL_BL_Pos)
 
#define FMC_ISPADDR_ISPADDR_Pos   (0)
 
#define FMC_ISPADDR_ISPADDR_Msk   (0xfffffffful << FMC_ISPADDR_ISPADDR_Pos)
 
#define FMC_ISPDAT_ISPDAT_Pos   (0)
 
#define FMC_ISPDAT_ISPDAT_Msk   (0xfffffffful << FMC_ISPDAT_ISPDAT_Pos)
 
#define FMC_ISPCMD_CMD_Pos   (0)
 
#define FMC_ISPCMD_CMD_Msk   (0x7ful << FMC_ISPCMD_CMD_Pos)
 
#define FMC_ISPTRG_ISPGO_Pos   (0)
 
#define FMC_ISPTRG_ISPGO_Msk   (0x1ul << FMC_ISPTRG_ISPGO_Pos)
 
#define FMC_DFBA_DFBA_Pos   (0)
 
#define FMC_DFBA_DFBA_Msk   (0xfffffffful << FMC_DFBA_DFBA_Pos)
 
#define FMC_FTCTL_FOM_Pos   (4)
 
#define FMC_FTCTL_FOM_Msk   (0x7ul << FMC_FTCTL_FOM_Pos)
 
#define FMC_ISPSTS_ISPBUSY_Pos   (0)
 
#define FMC_ISPSTS_ISPBUSY_Msk   (0x1ul << FMC_ISPSTS_ISPBUSY_Pos)
 
#define FMC_ISPSTS_CBS_Pos   (1)
 
#define FMC_ISPSTS_CBS_Msk   (0x3ul << FMC_ISPSTS_CBS_Pos)
 
#define FMC_ISPSTS_MBS_Pos   (3)
 
#define FMC_ISPSTS_MBS_Msk   (0x1ul << FMC_ISPSTS_MBS_Pos)
 
#define FMC_ISPSTS_PGFF_Pos   (5)
 
#define FMC_ISPSTS_PGFF_Msk   (0x1ul << FMC_ISPSTS_PGFF_Pos)
 
#define FMC_ISPSTS_ISPFF_Pos   (6)
 
#define FMC_ISPSTS_ISPFF_Msk   (0x1ul << FMC_ISPSTS_ISPFF_Pos)
 
#define FMC_ISPSTS_VECMAP_Pos   (9)
 
#define FMC_ISPSTS_VECMAP_Msk   (0x7ffful << FMC_ISPSTS_VECMAP_Pos)
 
#define FMC_MPDAT0_ISPDAT0_Pos   (0)
 
#define FMC_MPDAT0_ISPDAT0_Msk   (0xfffffffful << FMC_MPDAT0_ISPDAT0_Pos)
 
#define FMC_MPDAT1_ISPDAT1_Pos   (0)
 
#define FMC_MPDAT1_ISPDAT1_Msk   (0xfffffffful << FMC_MPDAT1_ISPDAT1_Pos)
 
#define FMC_MPDAT2_ISPDAT2_Pos   (0)
 
#define FMC_MPDAT2_ISPDAT2_Msk   (0xfffffffful << FMC_MPDAT2_ISPDAT2_Pos)
 
#define FMC_MPDAT3_ISPDAT3_Pos   (0)
 
#define FMC_MPDAT3_ISPDAT3_Msk   (0xfffffffful << FMC_MPDAT3_ISPDAT3_Pos)
 
#define FMC_MPSTS_MPBUSY_Pos   (0)
 
#define FMC_MPSTS_MPBUSY_Msk   (0x1ul << FMC_MPSTS_MPBUSY_Pos)
 
#define FMC_MPSTS_PPGO_Pos   (1)
 
#define FMC_MPSTS_PPGO_Msk   (0x1ul << FMC_MPSTS_PPGO_Pos)
 
#define FMC_MPSTS_ISPFF_Pos   (2)
 
#define FMC_MPSTS_ISPFF_Msk   (0x1ul << FMC_MPSTS_ISPFF_Pos)
 
#define FMC_MPSTS_D0_Pos   (4)
 
#define FMC_MPSTS_D0_Msk   (0x1ul << FMC_MPSTS_D0_Pos)
 
#define FMC_MPSTS_D1_Pos   (5)
 
#define FMC_MPSTS_D1_Msk   (0x1ul << FMC_MPSTS_D1_Pos)
 
#define FMC_MPSTS_D2_Pos   (6)
 
#define FMC_MPSTS_D2_Msk   (0x1ul << FMC_MPSTS_D2_Pos)
 
#define FMC_MPSTS_D3_Pos   (7)
 
#define FMC_MPSTS_D3_Msk   (0x1ul << FMC_MPSTS_D3_Pos)
 
#define FMC_MPADDR_MPADDR_Pos   (0)
 
#define FMC_MPADDR_MPADDR_Msk   (0xfffffffful << FMC_MPADDR_MPADDR_Pos)
 
#define GPIO_MODE_MODE0_Pos   (0)
 
#define GPIO_MODE_MODE0_Msk   (0x3ul << GPIO_MODE_MODE0_Pos)
 
#define GPIO_MODE_MODE1_Pos   (2)
 
#define GPIO_MODE_MODE1_Msk   (0x3ul << GPIO_MODE_MODE1_Pos)
 
#define GPIO_MODE_MODE2_Pos   (4)
 
#define GPIO_MODE_MODE2_Msk   (0x3ul << GPIO_MODE_MODE2_Pos)
 
#define GPIO_MODE_MODE3_Pos   (6)
 
#define GPIO_MODE_MODE3_Msk   (0x3ul << GPIO_MODE_MODE3_Pos)
 
#define GPIO_MODE_MODE4_Pos   (8)
 
#define GPIO_MODE_MODE4_Msk   (0x3ul << GPIO_MODE_MODE4_Pos)
 
#define GPIO_MODE_MODE5_Pos   (10)
 
#define GPIO_MODE_MODE5_Msk   (0x3ul << GPIO_MODE_MODE5_Pos)
 
#define GPIO_MODE_MODE6_Pos   (12)
 
#define GPIO_MODE_MODE6_Msk   (0x3ul << GPIO_MODE_MODE6_Pos)
 
#define GPIO_MODE_MODE7_Pos   (14)
 
#define GPIO_MODE_MODE7_Msk   (0x3ul << GPIO_MODE_MODE7_Pos)
 
#define GPIO_MODE_MODE8_Pos   (16)
 
#define GPIO_MODE_MODE8_Msk   (0x3ul << GPIO_MODE_MODE8_Pos)
 
#define GPIO_MODE_MODE9_Pos   (18)
 
#define GPIO_MODE_MODE9_Msk   (0x3ul << GPIO_MODE_MODE9_Pos)
 
#define GPIO_MODE_MODE10_Pos   (20)
 
#define GPIO_MODE_MODE10_Msk   (0x3ul << GPIO_MODE_MODE10_Pos)
 
#define GPIO_MODE_MODE11_Pos   (22)
 
#define GPIO_MODE_MODE11_Msk   (0x3ul << GPIO_MODE_MODE11_Pos)
 
#define GPIO_MODE_MODE12_Pos   (24)
 
#define GPIO_MODE_MODE12_Msk   (0x3ul << GPIO_MODE_MODE12_Pos)
 
#define GPIO_MODE_MODE13_Pos   (26)
 
#define GPIO_MODE_MODE13_Msk   (0x3ul << GPIO_MODE_MODE13_Pos)
 
#define GPIO_MODE_MODE14_Pos   (28)
 
#define GPIO_MODE_MODE14_Msk   (0x3ul << GPIO_MODE_MODE14_Pos)
 
#define GPIO_MODE_MODE15_Pos   (30)
 
#define GPIO_MODE_MODE15_Msk   (0x3ul << GPIO_MODE_MODE15_Pos)
 
#define GPIO_DINOFF_DINOFF0_Pos   (16)
 
#define GPIO_DINOFF_DINOFF0_Msk   (0x1ul << GPIO_DINOFF_DINOFF0_Pos)
 
#define GPIO_DINOFF_DINOFF1_Pos   (17)
 
#define GPIO_DINOFF_DINOFF1_Msk   (0x1ul << GPIO_DINOFF_DINOFF1_Pos)
 
#define GPIO_DINOFF_DINOFF2_Pos   (18)
 
#define GPIO_DINOFF_DINOFF2_Msk   (0x1ul << GPIO_DINOFF_DINOFF2_Pos)
 
#define GPIO_DINOFF_DINOFF3_Pos   (19)
 
#define GPIO_DINOFF_DINOFF3_Msk   (0x1ul << GPIO_DINOFF_DINOFF3_Pos)
 
#define GPIO_DINOFF_DINOFF4_Pos   (20)
 
#define GPIO_DINOFF_DINOFF4_Msk   (0x1ul << GPIO_DINOFF_DINOFF4_Pos)
 
#define GPIO_DINOFF_DINOFF5_Pos   (21)
 
#define GPIO_DINOFF_DINOFF5_Msk   (0x1ul << GPIO_DINOFF_DINOFF5_Pos)
 
#define GPIO_DINOFF_DINOFF6_Pos   (22)
 
#define GPIO_DINOFF_DINOFF6_Msk   (0x1ul << GPIO_DINOFF_DINOFF6_Pos)
 
#define GPIO_DINOFF_DINOFF7_Pos   (23)
 
#define GPIO_DINOFF_DINOFF7_Msk   (0x1ul << GPIO_DINOFF_DINOFF7_Pos)
 
#define GPIO_DINOFF_DINOFF8_Pos   (24)
 
#define GPIO_DINOFF_DINOFF8_Msk   (0x1ul << GPIO_DINOFF_DINOFF8_Pos)
 
#define GPIO_DINOFF_DINOFF9_Pos   (25)
 
#define GPIO_DINOFF_DINOFF9_Msk   (0x1ul << GPIO_DINOFF_DINOFF9_Pos)
 
#define GPIO_DINOFF_DINOFF10_Pos   (26)
 
#define GPIO_DINOFF_DINOFF10_Msk   (0x1ul << GPIO_DINOFF_DINOFF10_Pos)
 
#define GPIO_DINOFF_DINOFF11_Pos   (27)
 
#define GPIO_DINOFF_DINOFF11_Msk   (0x1ul << GPIO_DINOFF_DINOFF11_Pos)
 
#define GPIO_DINOFF_DINOFF12_Pos   (28)
 
#define GPIO_DINOFF_DINOFF12_Msk   (0x1ul << GPIO_DINOFF_DINOFF12_Pos)
 
#define GPIO_DINOFF_DINOFF13_Pos   (29)
 
#define GPIO_DINOFF_DINOFF13_Msk   (0x1ul << GPIO_DINOFF_DINOFF13_Pos)
 
#define GPIO_DINOFF_DINOFF14_Pos   (30)
 
#define GPIO_DINOFF_DINOFF14_Msk   (0x1ul << GPIO_DINOFF_DINOFF14_Pos)
 
#define GPIO_DINOFF_DINOFF15_Pos   (31)
 
#define GPIO_DINOFF_DINOFF15_Msk   (0x1ul << GPIO_DINOFF_DINOFF15_Pos)
 
#define GPIO_DOUT_DOUT0_Pos   (0)
 
#define GPIO_DOUT_DOUT0_Msk   (0x1ul << GPIO_DOUT_DOUT0_Pos)
 
#define GPIO_DOUT_DOUT1_Pos   (1)
 
#define GPIO_DOUT_DOUT1_Msk   (0x1ul << GPIO_DOUT_DOUT1_Pos)
 
#define GPIO_DOUT_DOUT2_Pos   (2)
 
#define GPIO_DOUT_DOUT2_Msk   (0x1ul << GPIO_DOUT_DOUT2_Pos)
 
#define GPIO_DOUT_DOUT3_Pos   (3)
 
#define GPIO_DOUT_DOUT3_Msk   (0x1ul << GPIO_DOUT_DOUT3_Pos)
 
#define GPIO_DOUT_DOUT4_Pos   (4)
 
#define GPIO_DOUT_DOUT4_Msk   (0x1ul << GPIO_DOUT_DOUT4_Pos)
 
#define GPIO_DOUT_DOUT5_Pos   (5)
 
#define GPIO_DOUT_DOUT5_Msk   (0x1ul << GPIO_DOUT_DOUT5_Pos)
 
#define GPIO_DOUT_DOUT6_Pos   (6)
 
#define GPIO_DOUT_DOUT6_Msk   (0x1ul << GPIO_DOUT_DOUT6_Pos)
 
#define GPIO_DOUT_DOUT7_Pos   (7)
 
#define GPIO_DOUT_DOUT7_Msk   (0x1ul << GPIO_DOUT_DOUT7_Pos)
 
#define GPIO_DOUT_DOUT8_Pos   (8)
 
#define GPIO_DOUT_DOUT8_Msk   (0x1ul << GPIO_DOUT_DOUT8_Pos)
 
#define GPIO_DOUT_DOUT9_Pos   (9)
 
#define GPIO_DOUT_DOUT9_Msk   (0x1ul << GPIO_DOUT_DOUT9_Pos)
 
#define GPIO_DOUT_DOUT10_Pos   (10)
 
#define GPIO_DOUT_DOUT10_Msk   (0x1ul << GPIO_DOUT_DOUT10_Pos)
 
#define GPIO_DOUT_DOUT11_Pos   (11)
 
#define GPIO_DOUT_DOUT11_Msk   (0x1ul << GPIO_DOUT_DOUT11_Pos)
 
#define GPIO_DOUT_DOUT12_Pos   (12)
 
#define GPIO_DOUT_DOUT12_Msk   (0x1ul << GPIO_DOUT_DOUT12_Pos)
 
#define GPIO_DOUT_DOUT13_Pos   (13)
 
#define GPIO_DOUT_DOUT13_Msk   (0x1ul << GPIO_DOUT_DOUT13_Pos)
 
#define GPIO_DOUT_DOUT14_Pos   (14)
 
#define GPIO_DOUT_DOUT14_Msk   (0x1ul << GPIO_DOUT_DOUT14_Pos)
 
#define GPIO_DOUT_DOUT15_Pos   (15)
 
#define GPIO_DOUT_DOUT15_Msk   (0x1ul << GPIO_DOUT_DOUT15_Pos)
 
#define GPIO_DATMSK_DMASK0_Pos   (0)
 
#define GPIO_DATMSK_DMASK0_Msk   (0x1ul << GPIO_DATMSK_DMASK0_Pos)
 
#define GPIO_DATMSK_DMASK1_Pos   (1)
 
#define GPIO_DATMSK_DMASK1_Msk   (0x1ul << GPIO_DATMSK_DMASK1_Pos)
 
#define GPIO_DATMSK_DMASK2_Pos   (2)
 
#define GPIO_DATMSK_DMASK2_Msk   (0x1ul << GPIO_DATMSK_DMASK2_Pos)
 
#define GPIO_DATMSK_DMASK3_Pos   (3)
 
#define GPIO_DATMSK_DMASK3_Msk   (0x1ul << GPIO_DATMSK_DMASK3_Pos)
 
#define GPIO_DATMSK_DMASK4_Pos   (4)
 
#define GPIO_DATMSK_DMASK4_Msk   (0x1ul << GPIO_DATMSK_DMASK4_Pos)
 
#define GPIO_DATMSK_DMASK5_Pos   (5)
 
#define GPIO_DATMSK_DMASK5_Msk   (0x1ul << GPIO_DATMSK_DMASK5_Pos)
 
#define GPIO_DATMSK_DMASK6_Pos   (6)
 
#define GPIO_DATMSK_DMASK6_Msk   (0x1ul << GPIO_DATMSK_DMASK6_Pos)
 
#define GPIO_DATMSK_DMASK7_Pos   (7)
 
#define GPIO_DATMSK_DMASK7_Msk   (0x1ul << GPIO_DATMSK_DMASK7_Pos)
 
#define GPIO_DATMSK_DMASK8_Pos   (8)
 
#define GPIO_DATMSK_DMASK8_Msk   (0x1ul << GPIO_DATMSK_DMASK8_Pos)
 
#define GPIO_DATMSK_DMASK9_Pos   (9)
 
#define GPIO_DATMSK_DMASK9_Msk   (0x1ul << GPIO_DATMSK_DMASK9_Pos)
 
#define GPIO_DATMSK_DMASK10_Pos   (10)
 
#define GPIO_DATMSK_DMASK10_Msk   (0x1ul << GPIO_DATMSK_DMASK10_Pos)
 
#define GPIO_DATMSK_DMASK11_Pos   (11)
 
#define GPIO_DATMSK_DMASK11_Msk   (0x1ul << GPIO_DATMSK_DMASK11_Pos)
 
#define GPIO_DATMSK_DMASK12_Pos   (12)
 
#define GPIO_DATMSK_DMASK12_Msk   (0x1ul << GPIO_DATMSK_DMASK12_Pos)
 
#define GPIO_DATMSK_DMASK13_Pos   (13)
 
#define GPIO_DATMSK_DMASK13_Msk   (0x1ul << GPIO_DATMSK_DMASK13_Pos)
 
#define GPIO_DATMSK_DMASK14_Pos   (14)
 
#define GPIO_DATMSK_DMASK14_Msk   (0x1ul << GPIO_DATMSK_DMASK14_Pos)
 
#define GPIO_DATMSK_DMASK15_Pos   (15)
 
#define GPIO_DATMSK_DMASK15_Msk   (0x1ul << GPIO_DATMSK_DMASK15_Pos)
 
#define GPIO_PIN_PIN0_Pos   (0)
 
#define GPIO_PIN_PIN0_Msk   (0x1ul << GPIO_PIN_PIN0_Pos)
 
#define GPIO_PIN_PIN1_Pos   (1)
 
#define GPIO_PIN_PIN1_Msk   (0x1ul << GPIO_PIN_PIN1_Pos)
 
#define GPIO_PIN_PIN2_Pos   (2)
 
#define GPIO_PIN_PIN2_Msk   (0x1ul << GPIO_PIN_PIN2_Pos)
 
#define GPIO_PIN_PIN3_Pos   (3)
 
#define GPIO_PIN_PIN3_Msk   (0x1ul << GPIO_PIN_PIN3_Pos)
 
#define GPIO_PIN_PIN4_Pos   (4)
 
#define GPIO_PIN_PIN4_Msk   (0x1ul << GPIO_PIN_PIN4_Pos)
 
#define GPIO_PIN_PIN5_Pos   (5)
 
#define GPIO_PIN_PIN5_Msk   (0x1ul << GPIO_PIN_PIN5_Pos)
 
#define GPIO_PIN_PIN6_Pos   (6)
 
#define GPIO_PIN_PIN6_Msk   (0x1ul << GPIO_PIN_PIN6_Pos)
 
#define GPIO_PIN_PIN7_Pos   (7)
 
#define GPIO_PIN_PIN7_Msk   (0x1ul << GPIO_PIN_PIN7_Pos)
 
#define GPIO_PIN_PIN8_Pos   (8)
 
#define GPIO_PIN_PIN8_Msk   (0x1ul << GPIO_PIN_PIN8_Pos)
 
#define GPIO_PIN_PIN9_Pos   (9)
 
#define GPIO_PIN_PIN9_Msk   (0x1ul << GPIO_PIN_PIN9_Pos)
 
#define GPIO_PIN_PIN10_Pos   (10)
 
#define GPIO_PIN_PIN10_Msk   (0x1ul << GPIO_PIN_PIN10_Pos)
 
#define GPIO_PIN_PIN11_Pos   (11)
 
#define GPIO_PIN_PIN11_Msk   (0x1ul << GPIO_PIN_PIN11_Pos)
 
#define GPIO_PIN_PIN12_Pos   (12)
 
#define GPIO_PIN_PIN12_Msk   (0x1ul << GPIO_PIN_PIN12_Pos)
 
#define GPIO_PIN_PIN13_Pos   (13)
 
#define GPIO_PIN_PIN13_Msk   (0x1ul << GPIO_PIN_PIN13_Pos)
 
#define GPIO_PIN_PIN14_Pos   (14)
 
#define GPIO_PIN_PIN14_Msk   (0x1ul << GPIO_PIN_PIN14_Pos)
 
#define GPIO_PIN_PIN15_Pos   (15)
 
#define GPIO_PIN_PIN15_Msk   (0x1ul << GPIO_PIN_PIN15_Pos)
 
#define GPIO_DBEN_DBEN0_Pos   (0)
 
#define GPIO_DBEN_DBEN0_Msk   (0x1ul << GPIO_DBEN_DBEN0_Pos)
 
#define GPIO_DBEN_DBEN1_Pos   (1)
 
#define GPIO_DBEN_DBEN1_Msk   (0x1ul << GPIO_DBEN_DBEN1_Pos)
 
#define GPIO_DBEN_DBEN2_Pos   (2)
 
#define GPIO_DBEN_DBEN2_Msk   (0x1ul << GPIO_DBEN_DBEN2_Pos)
 
#define GPIO_DBEN_DBEN3_Pos   (3)
 
#define GPIO_DBEN_DBEN3_Msk   (0x1ul << GPIO_DBEN_DBEN3_Pos)
 
#define GPIO_DBEN_DBEN4_Pos   (4)
 
#define GPIO_DBEN_DBEN4_Msk   (0x1ul << GPIO_DBEN_DBEN4_Pos)
 
#define GPIO_DBEN_DBEN5_Pos   (5)
 
#define GPIO_DBEN_DBEN5_Msk   (0x1ul << GPIO_DBEN_DBEN5_Pos)
 
#define GPIO_DBEN_DBEN6_Pos   (6)
 
#define GPIO_DBEN_DBEN6_Msk   (0x1ul << GPIO_DBEN_DBEN6_Pos)
 
#define GPIO_DBEN_DBEN7_Pos   (7)
 
#define GPIO_DBEN_DBEN7_Msk   (0x1ul << GPIO_DBEN_DBEN7_Pos)
 
#define GPIO_DBEN_DBEN8_Pos   (8)
 
#define GPIO_DBEN_DBEN8_Msk   (0x1ul << GPIO_DBEN_DBEN8_Pos)
 
#define GPIO_DBEN_DBEN9_Pos   (9)
 
#define GPIO_DBEN_DBEN9_Msk   (0x1ul << GPIO_DBEN_DBEN9_Pos)
 
#define GPIO_DBEN_DBEN10_Pos   (10)
 
#define GPIO_DBEN_DBEN10_Msk   (0x1ul << GPIO_DBEN_DBEN10_Pos)
 
#define GPIO_DBEN_DBEN11_Pos   (11)
 
#define GPIO_DBEN_DBEN11_Msk   (0x1ul << GPIO_DBEN_DBEN11_Pos)
 
#define GPIO_DBEN_DBEN12_Pos   (12)
 
#define GPIO_DBEN_DBEN12_Msk   (0x1ul << GPIO_DBEN_DBEN12_Pos)
 
#define GPIO_DBEN_DBEN13_Pos   (13)
 
#define GPIO_DBEN_DBEN13_Msk   (0x1ul << GPIO_DBEN_DBEN13_Pos)
 
#define GPIO_DBEN_DBEN14_Pos   (14)
 
#define GPIO_DBEN_DBEN14_Msk   (0x1ul << GPIO_DBEN_DBEN14_Pos)
 
#define GPIO_DBEN_DBEN15_Pos   (15)
 
#define GPIO_DBEN_DBEN15_Msk   (0x1ul << GPIO_DBEN_DBEN15_Pos)
 
#define GPIO_INTTYPE_TYPE0_Pos   (0)
 
#define GPIO_INTTYPE_TYPE0_Msk   (0x1ul << GPIO_INTTYPE_TYPE0_Pos)
 
#define GPIO_INTTYPE_TYPE1_Pos   (1)
 
#define GPIO_INTTYPE_TYPE1_Msk   (0x1ul << GPIO_INTTYPE_TYPE1_Pos)
 
#define GPIO_INTTYPE_TYPE2_Pos   (2)
 
#define GPIO_INTTYPE_TYPE2_Msk   (0x1ul << GPIO_INTTYPE_TYPE2_Pos)
 
#define GPIO_INTTYPE_TYPE3_Pos   (3)
 
#define GPIO_INTTYPE_TYPE3_Msk   (0x1ul << GPIO_INTTYPE_TYPE3_Pos)
 
#define GPIO_INTTYPE_TYPE4_Pos   (4)
 
#define GPIO_INTTYPE_TYPE4_Msk   (0x1ul << GPIO_INTTYPE_TYPE4_Pos)
 
#define GPIO_INTTYPE_TYPE5_Pos   (5)
 
#define GPIO_INTTYPE_TYPE5_Msk   (0x1ul << GPIO_INTTYPE_TYPE5_Pos)
 
#define GPIO_INTTYPE_TYPE6_Pos   (6)
 
#define GPIO_INTTYPE_TYPE6_Msk   (0x1ul << GPIO_INTTYPE_TYPE6_Pos)
 
#define GPIO_INTTYPE_TYPE7_Pos   (7)
 
#define GPIO_INTTYPE_TYPE7_Msk   (0x1ul << GPIO_INTTYPE_TYPE7_Pos)
 
#define GPIO_INTTYPE_TYPE8_Pos   (8)
 
#define GPIO_INTTYPE_TYPE8_Msk   (0x1ul << GPIO_INTTYPE_TYPE8_Pos)
 
#define GPIO_INTTYPE_TYPE9_Pos   (9)
 
#define GPIO_INTTYPE_TYPE9_Msk   (0x1ul << GPIO_INTTYPE_TYPE9_Pos)
 
#define GPIO_INTTYPE_TYPE10_Pos   (10)
 
#define GPIO_INTTYPE_TYPE10_Msk   (0x1ul << GPIO_INTTYPE_TYPE10_Pos)
 
#define GPIO_INTTYPE_TYPE11_Pos   (11)
 
#define GPIO_INTTYPE_TYPE11_Msk   (0x1ul << GPIO_INTTYPE_TYPE11_Pos)
 
#define GPIO_INTTYPE_TYPE12_Pos   (12)
 
#define GPIO_INTTYPE_TYPE12_Msk   (0x1ul << GPIO_INTTYPE_TYPE12_Pos)
 
#define GPIO_INTTYPE_TYPE13_Pos   (13)
 
#define GPIO_INTTYPE_TYPE13_Msk   (0x1ul << GPIO_INTTYPE_TYPE13_Pos)
 
#define GPIO_INTTYPE_TYPE14_Pos   (14)
 
#define GPIO_INTTYPE_TYPE14_Msk   (0x1ul << GPIO_INTTYPE_TYPE14_Pos)
 
#define GPIO_INTTYPE_TYPE15_Pos   (15)
 
#define GPIO_INTTYPE_TYPE15_Msk   (0x1ul << GPIO_INTTYPE_TYPE15_Pos)
 
#define GPIO_INTEN_FLIEN0_Pos   (0)
 
#define GPIO_INTEN_FLIEN0_Msk   (0x1ul << GPIO_INTEN_FLIEN0_Pos)
 
#define GPIO_INTEN_FLIEN1_Pos   (1)
 
#define GPIO_INTEN_FLIEN1_Msk   (0x1ul << GPIO_INTEN_FLIEN1_Pos)
 
#define GPIO_INTEN_FLIEN2_Pos   (2)
 
#define GPIO_INTEN_FLIEN2_Msk   (0x1ul << GPIO_INTEN_FLIEN2_Pos)
 
#define GPIO_INTEN_FLIEN3_Pos   (3)
 
#define GPIO_INTEN_FLIEN3_Msk   (0x1ul << GPIO_INTEN_FLIEN3_Pos)
 
#define GPIO_INTEN_FLIEN4_Pos   (4)
 
#define GPIO_INTEN_FLIEN4_Msk   (0x1ul << GPIO_INTEN_FLIEN4_Pos)
 
#define GPIO_INTEN_FLIEN5_Pos   (5)
 
#define GPIO_INTEN_FLIEN5_Msk   (0x1ul << GPIO_INTEN_FLIEN5_Pos)
 
#define GPIO_INTEN_FLIEN6_Pos   (6)
 
#define GPIO_INTEN_FLIEN6_Msk   (0x1ul << GPIO_INTEN_FLIEN6_Pos)
 
#define GPIO_INTEN_FLIEN7_Pos   (7)
 
#define GPIO_INTEN_FLIEN7_Msk   (0x1ul << GPIO_INTEN_FLIEN7_Pos)
 
#define GPIO_INTEN_FLIEN8_Pos   (8)
 
#define GPIO_INTEN_FLIEN8_Msk   (0x1ul << GPIO_INTEN_FLIEN8_Pos)
 
#define GPIO_INTEN_FLIEN9_Pos   (9)
 
#define GPIO_INTEN_FLIEN9_Msk   (0x1ul << GPIO_INTEN_FLIEN9_Pos)
 
#define GPIO_INTEN_FLIEN10_Pos   (10)
 
#define GPIO_INTEN_FLIEN10_Msk   (0x1ul << GPIO_INTEN_FLIEN10_Pos)
 
#define GPIO_INTEN_FLIEN11_Pos   (11)
 
#define GPIO_INTEN_FLIEN11_Msk   (0x1ul << GPIO_INTEN_FLIEN11_Pos)
 
#define GPIO_INTEN_FLIEN12_Pos   (12)
 
#define GPIO_INTEN_FLIEN12_Msk   (0x1ul << GPIO_INTEN_FLIEN12_Pos)
 
#define GPIO_INTEN_FLIEN13_Pos   (13)
 
#define GPIO_INTEN_FLIEN13_Msk   (0x1ul << GPIO_INTEN_FLIEN13_Pos)
 
#define GPIO_INTEN_FLIEN14_Pos   (14)
 
#define GPIO_INTEN_FLIEN14_Msk   (0x1ul << GPIO_INTEN_FLIEN14_Pos)
 
#define GPIO_INTEN_FLIEN15_Pos   (15)
 
#define GPIO_INTEN_FLIEN15_Msk   (0x1ul << GPIO_INTEN_FLIEN15_Pos)
 
#define GPIO_INTEN_RHIEN0_Pos   (16)
 
#define GPIO_INTEN_RHIEN0_Msk   (0x1ul << GPIO_INTEN_RHIEN0_Pos)
 
#define GPIO_INTEN_RHIEN1_Pos   (17)
 
#define GPIO_INTEN_RHIEN1_Msk   (0x1ul << GPIO_INTEN_RHIEN1_Pos)
 
#define GPIO_INTEN_RHIEN2_Pos   (18)
 
#define GPIO_INTEN_RHIEN2_Msk   (0x1ul << GPIO_INTEN_RHIEN2_Pos)
 
#define GPIO_INTEN_RHIEN3_Pos   (19)
 
#define GPIO_INTEN_RHIEN3_Msk   (0x1ul << GPIO_INTEN_RHIEN3_Pos)
 
#define GPIO_INTEN_RHIEN4_Pos   (20)
 
#define GPIO_INTEN_RHIEN4_Msk   (0x1ul << GPIO_INTEN_RHIEN4_Pos)
 
#define GPIO_INTEN_RHIEN5_Pos   (21)
 
#define GPIO_INTEN_RHIEN5_Msk   (0x1ul << GPIO_INTEN_RHIEN5_Pos)
 
#define GPIO_INTEN_RHIEN6_Pos   (22)
 
#define GPIO_INTEN_RHIEN6_Msk   (0x1ul << GPIO_INTEN_RHIEN6_Pos)
 
#define GPIO_INTEN_RHIEN7_Pos   (23)
 
#define GPIO_INTEN_RHIEN7_Msk   (0x1ul << GPIO_INTEN_RHIEN7_Pos)
 
#define GPIO_INTEN_RHIEN8_Pos   (24)
 
#define GPIO_INTEN_RHIEN8_Msk   (0x1ul << GPIO_INTEN_RHIEN8_Pos)
 
#define GPIO_INTEN_RHIEN9_Pos   (25)
 
#define GPIO_INTEN_RHIEN9_Msk   (0x1ul << GPIO_INTEN_RHIEN9_Pos)
 
#define GPIO_INTEN_RHIEN10_Pos   (26)
 
#define GPIO_INTEN_RHIEN10_Msk   (0x1ul << GPIO_INTEN_RHIEN10_Pos)
 
#define GPIO_INTEN_RHIEN11_Pos   (27)
 
#define GPIO_INTEN_RHIEN11_Msk   (0x1ul << GPIO_INTEN_RHIEN11_Pos)
 
#define GPIO_INTEN_RHIEN12_Pos   (28)
 
#define GPIO_INTEN_RHIEN12_Msk   (0x1ul << GPIO_INTEN_RHIEN12_Pos)
 
#define GPIO_INTEN_RHIEN13_Pos   (29)
 
#define GPIO_INTEN_RHIEN13_Msk   (0x1ul << GPIO_INTEN_RHIEN13_Pos)
 
#define GPIO_INTEN_RHIEN14_Pos   (30)
 
#define GPIO_INTEN_RHIEN14_Msk   (0x1ul << GPIO_INTEN_RHIEN14_Pos)
 
#define GPIO_INTEN_RHIEN15_Pos   (31)
 
#define GPIO_INTEN_RHIEN15_Msk   (0x1ul << GPIO_INTEN_RHIEN15_Pos)
 
#define GPIO_INTSRC_INTSRC0_Pos   (0)
 
#define GPIO_INTSRC_INTSRC0_Msk   (0x1ul << GPIO_INTSRC_INTSRC0_Pos)
 
#define GPIO_INTSRC_INTSRC1_Pos   (1)
 
#define GPIO_INTSRC_INTSRC1_Msk   (0x1ul << GPIO_INTSRC_INTSRC1_Pos)
 
#define GPIO_INTSRC_INTSRC2_Pos   (2)
 
#define GPIO_INTSRC_INTSRC2_Msk   (0x1ul << GPIO_INTSRC_INTSRC2_Pos)
 
#define GPIO_INTSRC_INTSRC3_Pos   (3)
 
#define GPIO_INTSRC_INTSRC3_Msk   (0x1ul << GPIO_INTSRC_INTSRC3_Pos)
 
#define GPIO_INTSRC_INTSRC4_Pos   (4)
 
#define GPIO_INTSRC_INTSRC4_Msk   (0x1ul << GPIO_INTSRC_INTSRC4_Pos)
 
#define GPIO_INTSRC_INTSRC5_Pos   (5)
 
#define GPIO_INTSRC_INTSRC5_Msk   (0x1ul << GPIO_INTSRC_INTSRC5_Pos)
 
#define GPIO_INTSRC_INTSRC6_Pos   (6)
 
#define GPIO_INTSRC_INTSRC6_Msk   (0x1ul << GPIO_INTSRC_INTSRC6_Pos)
 
#define GPIO_INTSRC_INTSRC7_Pos   (7)
 
#define GPIO_INTSRC_INTSRC7_Msk   (0x1ul << GPIO_INTSRC_INTSRC7_Pos)
 
#define GPIO_INTSRC_INTSRC8_Pos   (8)
 
#define GPIO_INTSRC_INTSRC8_Msk   (0x1ul << GPIO_INTSRC_INTSRC8_Pos)
 
#define GPIO_INTSRC_INTSRC9_Pos   (9)
 
#define GPIO_INTSRC_INTSRC9_Msk   (0x1ul << GPIO_INTSRC_INTSRC9_Pos)
 
#define GPIO_INTSRC_INTSRC10_Pos   (10)
 
#define GPIO_INTSRC_INTSRC10_Msk   (0x1ul << GPIO_INTSRC_INTSRC10_Pos)
 
#define GPIO_INTSRC_INTSRC11_Pos   (11)
 
#define GPIO_INTSRC_INTSRC11_Msk   (0x1ul << GPIO_INTSRC_INTSRC11_Pos)
 
#define GPIO_INTSRC_INTSRC12_Pos   (12)
 
#define GPIO_INTSRC_INTSRC12_Msk   (0x1ul << GPIO_INTSRC_INTSRC12_Pos)
 
#define GPIO_INTSRC_INTSRC13_Pos   (13)
 
#define GPIO_INTSRC_INTSRC13_Msk   (0x1ul << GPIO_INTSRC_INTSRC13_Pos)
 
#define GPIO_INTSRC_INTSRC14_Pos   (14)
 
#define GPIO_INTSRC_INTSRC14_Msk   (0x1ul << GPIO_INTSRC_INTSRC14_Pos)
 
#define GPIO_INTSRC_INTSRC15_Pos   (15)
 
#define GPIO_INTSRC_INTSRC15_Msk   (0x1ul << GPIO_INTSRC_INTSRC15_Pos)
 
#define GPIO_SMTEN_SMTEN0_Pos   (0)
 
#define GPIO_SMTEN_SMTEN0_Msk   (0x1ul << GPIO_SMTEN_SMTEN0_Pos)
 
#define GPIO_SMTEN_SMTEN1_Pos   (1)
 
#define GPIO_SMTEN_SMTEN1_Msk   (0x1ul << GPIO_SMTEN_SMTEN1_Pos)
 
#define GPIO_SMTEN_SMTEN2_Pos   (2)
 
#define GPIO_SMTEN_SMTEN2_Msk   (0x1ul << GPIO_SMTEN_SMTEN2_Pos)
 
#define GPIO_SMTEN_SMTEN3_Pos   (3)
 
#define GPIO_SMTEN_SMTEN3_Msk   (0x1ul << GPIO_SMTEN_SMTEN3_Pos)
 
#define GPIO_SMTEN_SMTEN4_Pos   (4)
 
#define GPIO_SMTEN_SMTEN4_Msk   (0x1ul << GPIO_SMTEN_SMTEN4_Pos)
 
#define GPIO_SMTEN_SMTEN5_Pos   (5)
 
#define GPIO_SMTEN_SMTEN5_Msk   (0x1ul << GPIO_SMTEN_SMTEN5_Pos)
 
#define GPIO_SMTEN_SMTEN6_Pos   (6)
 
#define GPIO_SMTEN_SMTEN6_Msk   (0x1ul << GPIO_SMTEN_SMTEN6_Pos)
 
#define GPIO_SMTEN_SMTEN7_Pos   (7)
 
#define GPIO_SMTEN_SMTEN7_Msk   (0x1ul << GPIO_SMTEN_SMTEN7_Pos)
 
#define GPIO_SMTEN_SMTEN8_Pos   (8)
 
#define GPIO_SMTEN_SMTEN8_Msk   (0x1ul << GPIO_SMTEN_SMTEN8_Pos)
 
#define GPIO_SMTEN_SMTEN9_Pos   (9)
 
#define GPIO_SMTEN_SMTEN9_Msk   (0x1ul << GPIO_SMTEN_SMTEN9_Pos)
 
#define GPIO_SMTEN_SMTEN10_Pos   (10)
 
#define GPIO_SMTEN_SMTEN10_Msk   (0x1ul << GPIO_SMTEN_SMTEN10_Pos)
 
#define GPIO_SMTEN_SMTEN11_Pos   (11)
 
#define GPIO_SMTEN_SMTEN11_Msk   (0x1ul << GPIO_SMTEN_SMTEN11_Pos)
 
#define GPIO_SMTEN_SMTEN12_Pos   (12)
 
#define GPIO_SMTEN_SMTEN12_Msk   (0x1ul << GPIO_SMTEN_SMTEN12_Pos)
 
#define GPIO_SMTEN_SMTEN13_Pos   (13)
 
#define GPIO_SMTEN_SMTEN13_Msk   (0x1ul << GPIO_SMTEN_SMTEN13_Pos)
 
#define GPIO_SMTEN_SMTEN14_Pos   (14)
 
#define GPIO_SMTEN_SMTEN14_Msk   (0x1ul << GPIO_SMTEN_SMTEN14_Pos)
 
#define GPIO_SMTEN_SMTEN15_Pos   (15)
 
#define GPIO_SMTEN_SMTEN15_Msk   (0x1ul << GPIO_SMTEN_SMTEN15_Pos)
 
#define GPIO_SLEWCTL_HSREN0_Pos   (0)
 
#define GPIO_SLEWCTL_HSREN0_Msk   (0x1ul << GPIO_SLEWCTL_HSREN0_Pos)
 
#define GPIO_SLEWCTL_HSREN1_Pos   (1)
 
#define GPIO_SLEWCTL_HSREN1_Msk   (0x1ul << GPIO_SLEWCTL_HSREN1_Pos)
 
#define GPIO_SLEWCTL_HSREN2_Pos   (2)
 
#define GPIO_SLEWCTL_HSREN2_Msk   (0x1ul << GPIO_SLEWCTL_HSREN2_Pos)
 
#define GPIO_SLEWCTL_HSREN3_Pos   (3)
 
#define GPIO_SLEWCTL_HSREN3_Msk   (0x1ul << GPIO_SLEWCTL_HSREN3_Pos)
 
#define GPIO_SLEWCTL_HSREN4_Pos   (4)
 
#define GPIO_SLEWCTL_HSREN4_Msk   (0x1ul << GPIO_SLEWCTL_HSREN4_Pos)
 
#define GPIO_SLEWCTL_HSREN5_Pos   (5)
 
#define GPIO_SLEWCTL_HSREN5_Msk   (0x1ul << GPIO_SLEWCTL_HSREN5_Pos)
 
#define GPIO_SLEWCTL_HSREN6_Pos   (6)
 
#define GPIO_SLEWCTL_HSREN6_Msk   (0x1ul << GPIO_SLEWCTL_HSREN6_Pos)
 
#define GPIO_SLEWCTL_HSREN7_Pos   (7)
 
#define GPIO_SLEWCTL_HSREN7_Msk   (0x1ul << GPIO_SLEWCTL_HSREN7_Pos)
 
#define GPIO_SLEWCTL_HSREN8_Pos   (8)
 
#define GPIO_SLEWCTL_HSREN8_Msk   (0x1ul << GPIO_SLEWCTL_HSREN8_Pos)
 
#define GPIO_SLEWCTL_HSREN9_Pos   (9)
 
#define GPIO_SLEWCTL_HSREN9_Msk   (0x1ul << GPIO_SLEWCTL_HSREN9_Pos)
 
#define GPIO_SLEWCTL_HSREN10_Pos   (10)
 
#define GPIO_SLEWCTL_HSREN10_Msk   (0x1ul << GPIO_SLEWCTL_HSREN10_Pos)
 
#define GPIO_SLEWCTL_HSREN11_Pos   (11)
 
#define GPIO_SLEWCTL_HSREN11_Msk   (0x1ul << GPIO_SLEWCTL_HSREN11_Pos)
 
#define GPIO_SLEWCTL_HSREN12_Pos   (12)
 
#define GPIO_SLEWCTL_HSREN12_Msk   (0x1ul << GPIO_SLEWCTL_HSREN12_Pos)
 
#define GPIO_SLEWCTL_HSREN13_Pos   (13)
 
#define GPIO_SLEWCTL_HSREN13_Msk   (0x1ul << GPIO_SLEWCTL_HSREN13_Pos)
 
#define GPIO_SLEWCTL_HSREN14_Pos   (14)
 
#define GPIO_SLEWCTL_HSREN14_Msk   (0x1ul << GPIO_SLEWCTL_HSREN14_Pos)
 
#define GPIO_SLEWCTL_HSREN15_Pos   (15)
 
#define GPIO_SLEWCTL_HSREN15_Msk   (0x1ul << GPIO_SLEWCTL_HSREN15_Pos)
 
#define GPIO_DRVCTL_HDRVEN8_Pos   (8)
 
#define GPIO_DRVCTL_HDRVEN8_Msk   (0x1ul << GPIO_DRVCTL_HDRVEN8_Pos)
 
#define GPIO_DRVCTL_HDRVEN9_Pos   (9)
 
#define GPIO_DRVCTL_HDRVEN9_Msk   (0x1ul << GPIO_DRVCTL_HDRVEN9_Pos)
 
#define GPIO_DRVCTL_HDRVEN10_Pos   (10)
 
#define GPIO_DRVCTL_HDRVEN10_Msk   (0x1ul << GPIO_DRVCTL_HDRVEN10_Pos)
 
#define GPIO_DRVCTL_HDRVEN11_Pos   (11)
 
#define GPIO_DRVCTL_HDRVEN11_Msk   (0x1ul << GPIO_DRVCTL_HDRVEN11_Pos)
 
#define GPIO_DRVCTL_HDRVEN12_Pos   (12)
 
#define GPIO_DRVCTL_HDRVEN12_Msk   (0x1ul << GPIO_DRVCTL_HDRVEN12_Pos)
 
#define GPIO_DRVCTL_HDRVEN13_Pos   (13)
 
#define GPIO_DRVCTL_HDRVEN13_Msk   (0x1ul << GPIO_DRVCTL_HDRVEN13_Pos)
 
#define GPIO_DBCTL_DBCLKSEL_Pos   (0)
 
#define GPIO_DBCTL_DBCLKSEL_Msk   (0xFul << GPIO_DBCTL_DBCLKSEL_Pos)
 
#define GPIO_DBCTL_DBCLKSRC_Pos   (4)
 
#define GPIO_DBCTL_DBCLKSRC_Msk   (1ul << GPIO_DBCTL_DBCLKSRC_Pos)
 
#define GPIO_DBCTL_ICLKON_Pos   (5)
 
#define GPIO_DBCTL_ICLKON_Msk   (1ul << GPIO_DBCTL_ICLKON_Pos)
 
#define I2C_CTL_AA_Pos   (2)
 
#define I2C_CTL_AA_Msk   (0x1ul << I2C_CTL_AA_Pos)
 
#define I2C_CTL_SI_Pos   (3)
 
#define I2C_CTL_SI_Msk   (0x1ul << I2C_CTL_SI_Pos)
 
#define I2C_CTL_STO_Pos   (4)
 
#define I2C_CTL_STO_Msk   (0x1ul << I2C_CTL_STO_Pos)
 
#define I2C_CTL_STA_Pos   (5)
 
#define I2C_CTL_STA_Msk   (0x1ul << I2C_CTL_STA_Pos)
 
#define I2C_CTL_I2CEN_Pos   (6)
 
#define I2C_CTL_I2CEN_Msk   (0x1ul << I2C_CTL_I2CEN_Pos)
 
#define I2C_CTL_INTEN_Pos   (7)
 
#define I2C_CTL_INTEN_Msk   (0x1ul << I2C_CTL_INTEN_Pos)
 
#define I2C_ADDR0_GC_Pos   (0)
 
#define I2C_ADDR0_GC_Msk   (0x1ul << I2C_ADDR0_GC_Pos)
 
#define I2C_ADDR0_ADDR_Pos   (1)
 
#define I2C_ADDR0_ADDR_Msk   (0x7ful << I2C_ADDR0_ADDR_Pos)
 
#define I2C_DAT_DAT_Pos   (0)
 
#define I2C_DAT_DAT_Msk   (0xfful << I2C_DAT_DAT_Pos)
 
#define I2C_STATUS_STATUS_Pos   (0)
 
#define I2C_STATUS_STATUS_Msk   (0xfful << I2C_STATUS_STATUS_Pos)
 
#define I2C_CLKDIV_DIVIDER_Pos   (0)
 
#define I2C_CLKDIV_DIVIDER_Msk   (0xfful << I2C_CLKDIV_DIVIDER_Pos)
 
#define I2C_TOCTL_TOIF_Pos   (0)
 
#define I2C_TOCTL_TOIF_Msk   (0x1ul << I2C_TOCTL_TOIF_Pos)
 
#define I2C_TOCTL_TOCDIV4_Pos   (1)
 
#define I2C_TOCTL_TOCDIV4_Msk   (0x1ul << I2C_TOCTL_TOCDIV4_Pos)
 
#define I2C_TOCTL_TOCEN_Pos   (2)
 
#define I2C_TOCTL_TOCEN_Msk   (0x1ul << I2C_TOCTL_TOCEN_Pos)
 
#define I2C_ADDR1_GC_Pos   (0)
 
#define I2C_ADDR1_GC_Msk   (0x1ul << I2C_ADDR1_GC_Pos)
 
#define I2C_ADDR1_ADDR_Pos   (1)
 
#define I2C_ADDR1_ADDR_Msk   (0x7ful << I2C_ADDR1_ADDR_Pos)
 
#define I2C_ADDR2_GC_Pos   (0)
 
#define I2C_ADDR2_GC_Msk   (0x1ul << I2C_ADDR2_GC_Pos)
 
#define I2C_ADDR2_ADDR_Pos   (1)
 
#define I2C_ADDR2_ADDR_Msk   (0x7ful << I2C_ADDR2_ADDR_Pos)
 
#define I2C_ADDR3_GC_Pos   (0)
 
#define I2C_ADDR3_GC_Msk   (0x1ul << I2C_ADDR3_GC_Pos)
 
#define I2C_ADDR3_ADDR_Pos   (1)
 
#define I2C_ADDR3_ADDR_Msk   (0x7ful << I2C_ADDR3_ADDR_Pos)
 
#define I2C_ADDRMSK0_ADDRMSK_Pos   (1)
 
#define I2C_ADDRMSK0_ADDRMSK_Msk   (0x7ful << I2C_ADDRMSK0_ADDRMSK_Pos)
 
#define I2C_ADDRMSK1_ADDRMSK_Pos   (1)
 
#define I2C_ADDRMSK1_ADDRMSK_Msk   (0x7ful << I2C_ADDRMSK1_ADDRMSK_Pos)
 
#define I2C_ADDRMSK2_ADDRMSK_Pos   (1)
 
#define I2C_ADDRMSK2_ADDRMSK_Msk   (0x7ful << I2C_ADDRMSK2_ADDRMSK_Pos)
 
#define I2C_ADDRMSK3_ADDRMSK_Pos   (1)
 
#define I2C_ADDRMSK3_ADDRMSK_Msk   (0x7ful << I2C_ADDRMSK3_ADDRMSK_Pos)
 
#define I2C_WKCTL_WKEN_Pos   (0)
 
#define I2C_WKCTL_WKEN_Msk   (0x1ul << I2C_WKCTL_WKEN_Pos)
 
#define I2C_WKSTS_WKIF_Pos   (0)
 
#define I2C_WKSTS_WKIF_Msk   (0x1ul << I2C_WKSTS_WKIF_Pos)
 
#define I2C_BUSCTL_ACKMEN_Pos   (0)
 
#define I2C_BUSCTL_ACKMEN_Msk   (0x1ul << I2C_BUSCTL_ACKMEN_Pos)
 
#define I2C_BUSCTL_PECEN_Pos   (1)
 
#define I2C_BUSCTL_PECEN_Msk   (0x1ul << I2C_BUSCTL_PECEN_Pos)
 
#define I2C_BUSCTL_BMDEN_Pos   (2)
 
#define I2C_BUSCTL_BMDEN_Msk   (0x1ul << I2C_BUSCTL_BMDEN_Pos)
 
#define I2C_BUSCTL_BMHEN_Pos   (3)
 
#define I2C_BUSCTL_BMHEN_Msk   (0x1ul << I2C_BUSCTL_BMHEN_Pos)
 
#define I2C_BUSCTL_ALERTEN_Pos   (4)
 
#define I2C_BUSCTL_ALERTEN_Msk   (0x1ul << I2C_BUSCTL_ALERTEN_Pos)
 
#define I2C_BUSCTL_SCTLOSTS_Pos   (5)
 
#define I2C_BUSCTL_SCTLOSTS_Msk   (0x1ul << I2C_BUSCTL_SCTLOSTS_Pos)
 
#define I2C_BUSCTL_SCTLOEN_Pos   (6)
 
#define I2C_BUSCTL_SCTLOEN_Msk   (0x1ul << I2C_BUSCTL_SCTLOEN_Pos)
 
#define I2C_BUSCTL_BUSEN_Pos   (7)
 
#define I2C_BUSCTL_BUSEN_Msk   (0x1ul << I2C_BUSCTL_BUSEN_Pos)
 
#define I2C_BUSCTL_PECTXEN_Pos   (8)
 
#define I2C_BUSCTL_PECTXEN_Msk   (0x1ul << I2C_BUSCTL_PECTXEN_Pos)
 
#define I2C_BUSCTL_TIDLE_Pos   (9)
 
#define I2C_BUSCTL_TIDLE_Msk   (0x1ul << I2C_BUSCTL_TIDLE_Pos)
 
#define I2C_BUSCTL_PECCLR_Pos   (10)
 
#define I2C_BUSCTL_PECCLR_Msk   (0x1ul << I2C_BUSCTL_PECCLR_Pos)
 
#define I2C_BUSCTL_ACKM9SI_Pos   (11)
 
#define I2C_BUSCTL_ACKM9SI_Msk   (0x1ul << I2C_BUSCTL_ACKM9SI_Pos)
 
#define I2C_BUSTCTL_BUSTOEN_Pos   (0)
 
#define I2C_BUSTCTL_BUSTOEN_Msk   (0x1ul << I2C_BUSTCTL_BUSTOEN_Pos)
 
#define I2C_BUSTCTL_CLKTOEN_Pos   (1)
 
#define I2C_BUSTCTL_CLKTOEN_Msk   (0x1ul << I2C_BUSTCTL_CLKTOEN_Pos)
 
#define I2C_BUSTCTL_BUSTOIEN_Pos   (2)
 
#define I2C_BUSTCTL_BUSTOIEN_Msk   (0x1ul << I2C_BUSTCTL_BUSTOIEN_Pos)
 
#define I2C_BUSTCTL_CLKTOIEN_Pos   (3)
 
#define I2C_BUSTCTL_CLKTOIEN_Msk   (0x1ul << I2C_BUSTCTL_CLKTOIEN_Pos)
 
#define I2C_BUSTCTL_TORSTEN_Pos   (4)
 
#define I2C_BUSTCTL_TORSTEN_Msk   (0x1ul << I2C_BUSTCTL_TORSTEN_Pos)
 
#define I2C_BUSTCTL_PECIEN_Pos   (5)
 
#define I2C_BUSTCTL_PECIEN_Msk   (0x1ul << I2C_BUSTCTL_PECIEN_Pos)
 
#define I2C_BUSSTS_BUSY_Pos   (0)
 
#define I2C_BUSSTS_BUSY_Msk   (0x1ul << I2C_BUSSTS_BUSY_Pos)
 
#define I2C_BUSSTS_BCDONE_Pos   (1)
 
#define I2C_BUSSTS_BCDONE_Msk   (0x1ul << I2C_BUSSTS_BCDONE_Pos)
 
#define I2C_BUSSTS_PECERR_Pos   (2)
 
#define I2C_BUSSTS_PECERR_Msk   (0x1ul << I2C_BUSSTS_PECERR_Pos)
 
#define I2C_BUSSTS_ALERT_Pos   (3)
 
#define I2C_BUSSTS_ALERT_Msk   (0x1ul << I2C_BUSSTS_ALERT_Pos)
 
#define I2C_BUSSTS_SCTLDIN_Pos   (4)
 
#define I2C_BUSSTS_SCTLDIN_Msk   (0x1ul << I2C_BUSSTS_SCTLDIN_Pos)
 
#define I2C_BUSSTS_BUSTO_Pos   (5)
 
#define I2C_BUSSTS_BUSTO_Msk   (0x1ul << I2C_BUSSTS_BUSTO_Pos)
 
#define I2C_BUSSTS_CLKTO_Pos   (6)
 
#define I2C_BUSSTS_CLKTO_Msk   (0x1ul << I2C_BUSSTS_CLKTO_Pos)
 
#define I2C_PKTSIZE_PLDSIZE_Pos   (0)
 
#define I2C_PKTSIZE_PLDSIZE_Msk   (0xfful << I2C_PKTSIZE_PLDSIZE_Pos)
 
#define I2C_PKTCRC_PECCRC_Pos   (0)
 
#define I2C_PKTCRC_PECCRC_Msk   (0xfful << I2C_PKTCRC_PECCRC_Pos)
 
#define I2C_BUSTOUT_BUSTO_Pos   (0)
 
#define I2C_BUSTOUT_BUSTO_Msk   (0xfful << I2C_BUSTOUT_BUSTO_Pos)
 
#define I2C_CLKTOUT_CLKTO_Pos   (0)
 
#define I2C_CLKTOUT_CLKTO_Msk   (0xfful << I2C_CLKTOUT_CLKTO_Pos)
 
#define PDMA_DSCT_CTL_OPMODE_Pos   (0)
 
#define PDMA_DSCT_CTL_OPMODE_Msk   (0x3ul << PDMA_DSCT_CTL_OPMODE_Pos)
 
#define PDMA_DSCT_CTL_TXTYPE_Pos   (2)
 
#define PDMA_DSCT_CTL_TXTYPE_Msk   (1ul << PDMA_DSCT_CTL_TXTYPE_Pos)
 
#define PDMA_DSCT_CTL_BURSIZE_Pos   (4)
 
#define PDMA_DSCT_CTL_BURSIZE_Msk   (0x7ul << PDMA_DSCT_CTL_BURSIZE_Pos)
 
#define PDMA_DSCT_CTL_TBINTDIS_Pos   (7)
 
#define PDMA_DSCT_CTL_TBINTDIS_Msk   (1ul << PDMA_DSCT_CTL_TBINTDIS_Pos)
 
#define PDMA_DSCT_CTL_SAINC_Pos   (8)
 
#define PDMA_DSCT_CTL_SAINC_Msk   (0x3ul << PDMA_DSCT_CTL_SAINC_Pos)
 
#define PDMA_DSCT_CTL_DAINC_Pos   (10)
 
#define PDMA_DSCT_CTL_DAINC_Msk   (0x3ul << PDMA_DSCT_CTL_DAINC_Pos)
 
#define PDMA_DSCT_CTL_TXWIDTH_Pos   (12)
 
#define PDMA_DSCT_CTL_TXWIDTH_Msk   (0x3ul << PDMA_DSCT_CTL_TXWIDTH_Pos)
 
#define PDMA_DSCT_CTL_TXCNT_Pos   (16)
 
#define PDMA_DSCT_CTL_TXCNT_Msk   (0x3FFFul << PDMA_DSCT_CTL_TXCNT_Pos)
 
#define PDMA_DSCT_SA_SA_Pos   (0)
 
#define PDMA_DSCT_SA_SA_Msk   (0xFFFFFFFFul << PDMA_DSCT_SA_SA_Pos)
 
#define PDMA_DSCT_DA_DA_Pos   (0)
 
#define PDMA_DSCT_DA_DA_Msk   (0xFFFFFFFFul << PDMA_DSCT_DA_DA_Pos)
 
#define PDMA_DSCT_NEXT_NEXT_Pos   (0)
 
#define PDMA_DSCT_NEXT_NEXT_Msk   (0xFFFFul << PDMA_DSCT_NEXT_NEXT_Pos)
 
#define PDMA_CURSCAT_CURADDR_Pos   (0)
 
#define PDMA_CURSCAT_CURADDR_Msk   (0xfffffffful << PDMA_CURSCAT_CURADDR_Pos)
 
#define PDMA_CHCTL_CHENn_Pos   (0)
 
#define PDMA_CHCTL_CHENn_Msk   (0xffful << PDMA_CHCTL_CHENn_Pos)
 
#define PDMA_STOP_STOPn_Pos   (0)
 
#define PDMA_STOP_STOPn_Msk   (0xffful << PDMA_STOP_STOPn_Pos)
 
#define PDMA_SWREQ_SWREQn_Pos   (0)
 
#define PDMA_SWREQ_SWREQn_Msk   (0xffful << PDMA_SWREQ_SWREQn_Pos)
 
#define PDMA_TRGSTS_REQSTSn_Pos   (0)
 
#define PDMA_TRGSTS_REQSTSn_Msk   (0xffful << PDMA_TRGSTS_REQSTSn_Pos)
 
#define PDMA_PRISET_FPRISETn_Pos   (0)
 
#define PDMA_PRISET_FPRISETn_Msk   (0xffful << PDMA_PRISET_FPRISETn_Pos)
 
#define PDMA_PRICLR_FPRICLRn_Pos   (0)
 
#define PDMA_PRICLR_FPRICLRn_Msk   (0xffful << PDMA_PRICLR_FPRICLRn_Pos)
 
#define PDMA_INTEN_INTENn_Pos   (0)
 
#define PDMA_INTEN_INTENn_Msk   (0xffful << PDMA_INTEN_INTENn_Pos)
 
#define PDMA_INTSTS_ABTIF_Pos   (0)
 
#define PDMA_INTSTS_ABTIF_Msk   (0x1ul << PDMA_INTSTS_ABTIF_Pos)
 
#define PDMA_INTSTS_TDIF_Pos   (1)
 
#define PDMA_INTSTS_TDIF_Msk   (0x1ul << PDMA_INTSTS_TDIF_Pos)
 
#define PDMA_INTSTS_TEIF_Pos   (2)
 
#define PDMA_INTSTS_TEIF_Msk   (0x1ul << PDMA_INTSTS_TEIF_Pos)
 
#define PDMA_INTSTS_REQTOFn_Pos   (8)
 
#define PDMA_INTSTS_REQTOFn_Msk   (0xfful << PDMA_INTSTS_REQTOFn_Pos)
 
#define PDMA_ABTSTS_ABTIFn_Pos   (0)
 
#define PDMA_ABTSTS_ABTIFn_Msk   (0xffful << PDMA_ABTSTS_ABTIFn_Pos)
 
#define PDMA_TDSTS_TDIFn_Pos   (0)
 
#define PDMA_TDSTS_TDIFn_Msk   (0xffful << PDMA_TDSTS_TDIFn_Pos)
 
#define PDMA_SCATSTS_TEMPTYFn_Pos   (0)
 
#define PDMA_SCATSTS_TEMPTYFn_Msk   (0xffful << PDMA_SCATSTS_TEMPTYFn_Pos)
 
#define PDMA_TACTSTS_TXACTFn_Pos   (0)
 
#define PDMA_TACTSTS_TXACTFn_Msk   (0xffful << PDMA_TACTSTS_TXACTFn_Pos)
 
#define PDMA_TOUTEN_TOUTENn_Pos   (0)
 
#define PDMA_TOUTEN_TOUTENn_Msk   (0xfful << PDMA_TOUTEN_TOUTENn_Pos)
 
#define PDMA_TOUTIEN_TOUTIENn_Pos   (0)
 
#define PDMA_TOUTIEN_TOUTIENn_Msk   (0xfful << PDMA_TOUTIEN_TOUTIENn_Pos)
 
#define PDMA_SCATBA_SCATBA_Pos   (16)
 
#define PDMA_SCATBA_SCATBA_Msk   (0xfffful << PDMA_SCATBA_SCATBA_Pos)
 
#define PDMA_TOC0_1_TOC0_Pos   (0)
 
#define PDMA_TOC0_1_TOC0_Msk   (0xfffful << PDMA_TOC0_1_TOC0_Pos)
 
#define PDMA_TOC0_1_TOC1_Pos   (16)
 
#define PDMA_TOC0_1_TOC1_Msk   (0xfffful << PDMA_TOC0_1_TOC1_Pos)
 
#define PDMA_TOC2_3_TOC2_Pos   (0)
 
#define PDMA_TOC2_3_TOC2_Msk   (0xfffful << PDMA_TOC2_3_TOC2_Pos)
 
#define PDMA_TOC2_3_TOC3_Pos   (16)
 
#define PDMA_TOC2_3_TOC3_Msk   (0xfffful << PDMA_TOC2_3_TOC3_Pos)
 
#define PDMA_TOC4_5_TOC4_Pos   (0)
 
#define PDMA_TOC4_5_TOC4_Msk   (0xfffful << PDMA_TOC4_5_TOC4_Pos)
 
#define PDMA_TOC4_5_TOC5_Pos   (16)
 
#define PDMA_TOC4_5_TOC5_Msk   (0xfffful << PDMA_TOC4_5_TOC5_Pos)
 
#define PDMA_TOC6_7_TOC6_Pos   (0)
 
#define PDMA_TOC6_7_TOC6_Msk   (0xfffful << PDMA_TOC6_7_TOC6_Pos)
 
#define PDMA_TOC6_7_TOC7_Pos   (16)
 
#define PDMA_TOC6_7_TOC7_Msk   (0xfffful << PDMA_TOC6_7_TOC7_Pos)
 
#define PDMA_REQSEL0_3_REQSRC0_Pos   (0)
 
#define PDMA_REQSEL0_3_REQSRC0_Msk   (0x1ful << PDMA_REQSEL0_3_REQSRC0_Pos)
 
#define PDMA_REQSEL0_3_REQSRC1_Pos   (8)
 
#define PDMA_REQSEL0_3_REQSRC1_Msk   (0x1ful << PDMA_REQSEL0_3_REQSRC1_Pos)
 
#define PDMA_REQSEL0_3_REQSRC2_Pos   (16)
 
#define PDMA_REQSEL0_3_REQSRC2_Msk   (0x1ful << PDMA_REQSEL0_3_REQSRC2_Pos)
 
#define PDMA_REQSEL0_3_REQSRC3_Pos   (24)
 
#define PDMA_REQSEL0_3_REQSRC3_Msk   (0x1ful << PDMA_REQSEL0_3_REQSRC3_Pos)
 
#define PDMA_REQSEL4_7_REQSRC4_Pos   (0)
 
#define PDMA_REQSEL4_7_REQSRC4_Msk   (0x1ful << PDMA_REQSEL4_7_REQSRC4_Pos)
 
#define PDMA_REQSEL4_7_REQSRC5_Pos   (8)
 
#define PDMA_REQSEL4_7_REQSRC5_Msk   (0x1ful << PDMA_REQSEL4_7_REQSRC5_Pos)
 
#define PDMA_REQSEL4_7_REQSRC6_Pos   (16)
 
#define PDMA_REQSEL4_7_REQSRC6_Msk   (0x1ful << PDMA_REQSEL4_7_REQSRC6_Pos)
 
#define PDMA_REQSEL4_7_REQSRC7_Pos   (24)
 
#define PDMA_REQSEL4_7_REQSRC7_Msk   (0x1ful << PDMA_REQSEL4_7_REQSRC7_Pos)
 
#define PDMA_REQSEL8_11_REQSRC8_Pos   (0)
 
#define PDMA_REQSEL8_11_REQSRC8_Msk   (0x1ful << PDMA_REQSEL8_11_REQSRC8_Pos)
 
#define PDMA_REQSEL8_11_REQSRC9_Pos   (8)
 
#define PDMA_REQSEL8_11_REQSRC9_Msk   (0x1ful << PDMA_REQSEL8_11_REQSRC9_Pos)
 
#define PDMA_REQSEL8_11_REQSRC10_Pos   (16)
 
#define PDMA_REQSEL8_11_REQSRC10_Msk   (0x1ful << PDMA_REQSEL8_11_REQSRC10_Pos)
 
#define PDMA_REQSEL8_11_REQSRC11_Pos   (24)
 
#define PDMA_REQSEL8_11_REQSRC11_Msk   (0x1ful << PDMA_REQSEL8_11_REQSRC11_Pos)
 
#define PWM_CTL0_CTRLDn_Pos   (0)
 
#define PWM_CTL0_CTRLDn_Msk   (0x3ful << PWM_CTL0_CTRLDn_Pos)
 
#define PWM_CTL0_CTRLD0_Pos   (0)
 
#define PWM_CTL0_CTRLD0_Msk   (0x1ul << PWM_CTL0_CTRLD0_Pos)
 
#define PWM_CTL0_CTRLD1_Pos   (1)
 
#define PWM_CTL0_CTRLD1_Msk   (0x1ul << PWM_CTL0_CTRLD1_Pos)
 
#define PWM_CTL0_CTRLD2_Pos   (2)
 
#define PWM_CTL0_CTRLD2_Msk   (0x1ul << PWM_CTL0_CTRLD2_Pos)
 
#define PWM_CTL0_CTRLD3_Pos   (3)
 
#define PWM_CTL0_CTRLD3_Msk   (0x1ul << PWM_CTL0_CTRLD3_Pos)
 
#define PWM_CTL0_CTRLD4_Pos   (4)
 
#define PWM_CTL0_CTRLD4_Msk   (0x1ul << PWM_CTL0_CTRLD4_Pos)
 
#define PWM_CTL0_CTRLD5_Pos   (5)
 
#define PWM_CTL0_CTRLD5_Msk   (0x1ul << PWM_CTL0_CTRLD5_Pos)
 
#define PWM_CTL0_WINLDENn_Pos   (8)
 
#define PWM_CTL0_WINLDENn_Msk   (0x3ful << PWM_CTL0_WINLDENn_Pos)
 
#define PWM_CTL0_WINLDEN0_Pos   (8)
 
#define PWM_CTL0_WINLDEN0_Msk   (0x1ul << PWM_CTL0_WINLDEN0_Pos)
 
#define PWM_CTL0_WINLDEN1_Pos   (9)
 
#define PWM_CTL0_WINLDEN1_Msk   (0x1ul << PWM_CTL0_WINLDEN1_Pos)
 
#define PWM_CTL0_WINLDEN2_Pos   (10)
 
#define PWM_CTL0_WINLDEN2_Msk   (0x1ul << PWM_CTL0_WINLDEN2_Pos)
 
#define PWM_CTL0_WINLDEN3_Pos   (11)
 
#define PWM_CTL0_WINLDEN3_Msk   (0x1ul << PWM_CTL0_WINLDEN3_Pos)
 
#define PWM_CTL0_WINLDEN4_Pos   (12)
 
#define PWM_CTL0_WINLDEN4_Msk   (0x1ul << PWM_CTL0_WINLDEN4_Pos)
 
#define PWM_CTL0_WINLDEN5_Pos   (13)
 
#define PWM_CTL0_WINLDEN5_Msk   (0x1ul << PWM_CTL0_WINLDEN5_Pos)
 
#define PWM_CTL0_IMMLDENn_Pos   (16)
 
#define PWM_CTL0_IMMLDENn_Msk   (0x3ful << PWM_CTL0_IMMLDENn_Pos)
 
#define PWM_CTL0_IMMLDEN0_Pos   (16)
 
#define PWM_CTL0_IMMLDEN0_Msk   (0x1ul << PWM_CTL0_IMMLDEN0_Pos)
 
#define PWM_CTL0_IMMLDEN1_Pos   (17)
 
#define PWM_CTL0_IMMLDEN1_Msk   (0x1ul << PWM_CTL0_IMMLDEN1_Pos)
 
#define PWM_CTL0_IMMLDEN2_Pos   (18)
 
#define PWM_CTL0_IMMLDEN2_Msk   (0x1ul << PWM_CTL0_IMMLDEN2_Pos)
 
#define PWM_CTL0_IMMLDEN3_Pos   (19)
 
#define PWM_CTL0_IMMLDEN3_Msk   (0x1ul << PWM_CTL0_IMMLDEN3_Pos)
 
#define PWM_CTL0_IMMLDEN4_Pos   (20)
 
#define PWM_CTL0_IMMLDEN4_Msk   (0x1ul << PWM_CTL0_IMMLDEN4_Pos)
 
#define PWM_CTL0_IMMLDEN5_Pos   (21)
 
#define PWM_CTL0_IMMLDEN5_Msk   (0x1ul << PWM_CTL0_IMMLDEN5_Pos)
 
#define PWM_CTL0_GROUPEN_Pos   (24)
 
#define PWM_CTL0_GROUPEN_Msk   (0x1ul << PWM_CTL0_GROUPEN_Pos)
 
#define PWM_CTL0_DBGHALT_Pos   (30)
 
#define PWM_CTL0_DBGHALT_Msk   (0x1ul << PWM_CTL0_DBGHALT_Pos)
 
#define PWM_CTL0_DBGTRIOFF_Pos   (31)
 
#define PWM_CTL0_DBGTRIOFF_Msk   (0x1ul << PWM_CTL0_DBGTRIOFF_Pos)
 
#define PWM_CTL1_CNTTYPEn_Pos   (0)
 
#define PWM_CTL1_CNTTYPEn_Msk   (0xffful << PWM_CTL1_CNTTYPEn_Pos)
 
#define PWM_CTL1_CNTTYPE0_Pos   (0)
 
#define PWM_CTL1_CNTTYPE0_Msk   (0x3ul << PWM_CTL1_CNTTYPE0_Pos)
 
#define PWM_CTL1_CNTTYPE1_Pos   (2)
 
#define PWM_CTL1_CNTTYPE1_Msk   (0x3ul << PWM_CTL1_CNTTYPE1_Pos)
 
#define PWM_CTL1_CNTTYPE2_Pos   (4)
 
#define PWM_CTL1_CNTTYPE2_Msk   (0x3ul << PWM_CTL1_CNTTYPE2_Pos)
 
#define PWM_CTL1_CNTTYPE3_Pos   (6)
 
#define PWM_CTL1_CNTTYPE3_Msk   (0x3ul << PWM_CTL1_CNTTYPE3_Pos)
 
#define PWM_CTL1_CNTTYPE4_Pos   (8)
 
#define PWM_CTL1_CNTTYPE4_Msk   (0x3ul << PWM_CTL1_CNTTYPE4_Pos)
 
#define PWM_CTL1_CNTTYPE5_Pos   (10)
 
#define PWM_CTL1_CNTTYPE5_Msk   (0x3ul << PWM_CTL1_CNTTYPE5_Pos)
 
#define PWM_CTL1_CNTMODEn_Pos   (16)
 
#define PWM_CTL1_CNTMODEn_Msk   (0x3ful << PWM_CTL1_CNTMODEn_Pos)
 
#define PWM_CTL1_CNTMODE0_Pos   (16)
 
#define PWM_CTL1_CNTMODE0_Msk   (0x1ul << PWM_CTL1_CNTMODE0_Pos)
 
#define PWM_CTL1_CNTMODE1_Pos   (17)
 
#define PWM_CTL1_CNTMODE1_Msk   (0x1ul << PWM_CTL1_CNTMODE1_Pos)
 
#define PWM_CTL1_CNTMODE2_Pos   (18)
 
#define PWM_CTL1_CNTMODE2_Msk   (0x1ul << PWM_CTL1_CNTMODE2_Pos)
 
#define PWM_CTL1_CNTMODE3_Pos   (19)
 
#define PWM_CTL1_CNTMODE3_Msk   (0x1ul << PWM_CTL1_CNTMODE3_Pos)
 
#define PWM_CTL1_CNTMODE4_Pos   (20)
 
#define PWM_CTL1_CNTMODE4_Msk   (0x1ul << PWM_CTL1_CNTMODE4_Pos)
 
#define PWM_CTL1_CNTMODE5_Pos   (21)
 
#define PWM_CTL1_CNTMODE5_Msk   (0x1ul << PWM_CTL1_CNTMODE5_Pos)
 
#define PWM_CTL1_OUTMODEn_Pos   (24)
 
#define PWM_CTL1_OUTMODEn_Msk   (0x7ul << PWM_CTL1_OUTMODEn_Pos)
 
#define PWM_CTL1_OUTMODE0_Pos   (24)
 
#define PWM_CTL1_OUTMODE0_Msk   (0x1ul << PWM_CTL1_OUTMODE0_Pos)
 
#define PWM_CTL1_OUTMODE2_Pos   (25)
 
#define PWM_CTL1_OUTMODE2_Msk   (0x1ul << PWM_CTL1_OUTMODE2_Pos)
 
#define PWM_CTL1_OUTMODE4_Pos   (26)
 
#define PWM_CTL1_OUTMODE4_Msk   (0x1ul << PWM_CTL1_OUTMODE4_Pos)
 
#define PWM_SYNC_PHSENn_Pos   (0)
 
#define PWM_SYNC_PHSENn_Msk   (0x7ul << PWM_SYNC_PHSENn_Pos)
 
#define PWM_SYNC_PHSEN0_Pos   (0)
 
#define PWM_SYNC_PHSEN0_Msk   (0x1ul << PWM_SYNC_PHSEN0_Pos)
 
#define PWM_SYNC_PHSEN2_Pos   (1)
 
#define PWM_SYNC_PHSEN2_Msk   (0x1ul << PWM_SYNC_PHSEN2_Pos)
 
#define PWM_SYNC_PHSEN4_Pos   (2)
 
#define PWM_SYNC_PHSEN4_Msk   (0x1ul << PWM_SYNC_PHSEN4_Pos)
 
#define PWM_SYNC_SINSRCn_Pos   (8)
 
#define PWM_SYNC_SINSRCn_Msk   (0x3ful << PWM_SYNC_SINSRCn_Pos)
 
#define PWM_SYNC_SINSRC0_Pos   (8)
 
#define PWM_SYNC_SINSRC0_Msk   (0x3ul << PWM_SYNC_SINSRC0_Pos)
 
#define PWM_SYNC_SINSRC2_Pos   (10)
 
#define PWM_SYNC_SINSRC2_Msk   (0x3ul << PWM_SYNC_SINSRC2_Pos)
 
#define PWM_SYNC_SINSRC4_Pos   (12)
 
#define PWM_SYNC_SINSRC4_Msk   (0x3ul << PWM_SYNC_SINSRC4_Pos)
 
#define PWM_SYNC_SNFLTEN_Pos   (16)
 
#define PWM_SYNC_SNFLTEN_Msk   (0x1ul << PWM_SYNC_SNFLTEN_Pos)
 
#define PWM_SYNC_SFLTCSEL_Pos   (17)
 
#define PWM_SYNC_SFLTCSEL_Msk   (0x7ul << PWM_SYNC_SFLTCSEL_Pos)
 
#define PWM_SYNC_SFLTCNT_Pos   (20)
 
#define PWM_SYNC_SFLTCNT_Msk   (0x7ul << PWM_SYNC_SFLTCNT_Pos)
 
#define PWM_SYNC_SINPINV_Pos   (23)
 
#define PWM_SYNC_SINPINV_Msk   (0x1ul << PWM_SYNC_SINPINV_Pos)
 
#define PWM_SYNC_PHSDIRn_Pos   (24)
 
#define PWM_SYNC_PHSDIRn_Msk   (0x7ul << PWM_SYNC_PHSDIRn_Pos)
 
#define PWM_SYNC_PHSDIR0_Pos   (24)
 
#define PWM_SYNC_PHSDIR0_Msk   (0x1ul << PWM_SYNC_PHSDIR0_Pos)
 
#define PWM_SYNC_PHSDIR2_Pos   (25)
 
#define PWM_SYNC_PHSDIR2_Msk   (0x1ul << PWM_SYNC_PHSDIR2_Pos)
 
#define PWM_SYNC_PHSDIR4_Pos   (26)
 
#define PWM_SYNC_PHSDIR4_Msk   (0x1ul << PWM_SYNC_PHSDIR4_Pos)
 
#define PWM_SWSYNC_SWSYNCn_Pos   (0)
 
#define PWM_SWSYNC_SWSYNCn_Msk   (0x7ul << PWM_SWSYNC_SWSYNCn_Pos)
 
#define PWM_SWSYNC_SWSYNC0_Pos   (0)
 
#define PWM_SWSYNC_SWSYNC0_Msk   (0x1ul << PWM_SWSYNC_SWSYNC0_Pos)
 
#define PWM_SWSYNC_SWSYNC2_Pos   (1)
 
#define PWM_SWSYNC_SWSYNC2_Msk   (0x1ul << PWM_SWSYNC_SWSYNC2_Pos)
 
#define PWM_SWSYNC_SWSYNC4_Pos   (2)
 
#define PWM_SWSYNC_SWSYNC4_Msk   (0x1ul << PWM_SWSYNC_SWSYNC4_Pos)
 
#define PWM_CLKSRC_ECLKSRC0_Pos   (0)
 
#define PWM_CLKSRC_ECLKSRC0_Msk   (0x7ul << PWM_CLKSRC_ECLKSRC0_Pos)
 
#define PWM_CLKSRC_ECLKSRC2_Pos   (8)
 
#define PWM_CLKSRC_ECLKSRC2_Msk   (0x7ul << PWM_CLKSRC_ECLKSRC2_Pos)
 
#define PWM_CLKSRC_ECLKSRC4_Pos   (16)
 
#define PWM_CLKSRC_ECLKSRC4_Msk   (0x7ul << PWM_CLKSRC_ECLKSRC4_Pos)
 
#define PWM_CLKPSC0_1_CLKPSC_Pos   (0)
 
#define PWM_CLKPSC0_1_CLKPSC_Msk   (0xffful << PWM_CLKPSC0_1_CLKPSC_Pos)
 
#define PWM_CLKPSC2_3_CLKPSC_Pos   (0)
 
#define PWM_CLKPSC2_3_CLKPSC_Msk   (0xffful << PWM_CLKPSC2_3_CLKPSC_Pos)
 
#define PWM_CLKPSC4_5_CLKPSC_Pos   (0)
 
#define PWM_CLKPSC4_5_CLKPSC_Msk   (0xffful << PWM_CLKPSC4_5_CLKPSC_Pos)
 
#define PWM_CNTEN_CNTENn_Pos   (0)
 
#define PWM_CNTEN_CNTENn_Msk   (0x3ful << PWM_CNTEN_CNTENn_Pos)
 
#define PWM_CNTEN_CNTEN0_Pos   (0)
 
#define PWM_CNTEN_CNTEN0_Msk   (0x1ul << PWM_CNTEN_CNTEN0_Pos)
 
#define PWM_CNTEN_CNTEN1_Pos   (1)
 
#define PWM_CNTEN_CNTEN1_Msk   (0x1ul << PWM_CNTEN_CNTEN1_Pos)
 
#define PWM_CNTEN_CNTEN2_Pos   (2)
 
#define PWM_CNTEN_CNTEN2_Msk   (0x1ul << PWM_CNTEN_CNTEN2_Pos)
 
#define PWM_CNTEN_CNTEN3_Pos   (3)
 
#define PWM_CNTEN_CNTEN3_Msk   (0x1ul << PWM_CNTEN_CNTEN3_Pos)
 
#define PWM_CNTEN_CNTEN4_Pos   (4)
 
#define PWM_CNTEN_CNTEN4_Msk   (0x1ul << PWM_CNTEN_CNTEN4_Pos)
 
#define PWM_CNTEN_CNTEN5_Pos   (5)
 
#define PWM_CNTEN_CNTEN5_Msk   (0x1ul << PWM_CNTEN_CNTEN5_Pos)
 
#define PWM_CNTCLR_CNTCLRn_Pos   (0)
 
#define PWM_CNTCLR_CNTCLRn_Msk   (0x3ful << PWM_CNTCLR_CNTCLRn_Pos)
 
#define PWM_CNTCLR_CNTCLR0_Pos   (0)
 
#define PWM_CNTCLR_CNTCLR0_Msk   (0x1ul << PWM_CNTCLR_CNTCLR0_Pos)
 
#define PWM_CNTCLR_CNTCLR1_Pos   (1)
 
#define PWM_CNTCLR_CNTCLR1_Msk   (0x1ul << PWM_CNTCLR_CNTCLR1_Pos)
 
#define PWM_CNTCLR_CNTCLR2_Pos   (2)
 
#define PWM_CNTCLR_CNTCLR2_Msk   (0x1ul << PWM_CNTCLR_CNTCLR2_Pos)
 
#define PWM_CNTCLR_CNTCLR3_Pos   (3)
 
#define PWM_CNTCLR_CNTCLR3_Msk   (0x1ul << PWM_CNTCLR_CNTCLR3_Pos)
 
#define PWM_CNTCLR_CNTCLR4_Pos   (4)
 
#define PWM_CNTCLR_CNTCLR4_Msk   (0x1ul << PWM_CNTCLR_CNTCLR4_Pos)
 
#define PWM_CNTCLR_CNTCLR5_Pos   (5)
 
#define PWM_CNTCLR_CNTCLR5_Msk   (0x1ul << PWM_CNTCLR_CNTCLR5_Pos)
 
#define PWM_LOAD_LOADn_Pos   (0)
 
#define PWM_LOAD_LOADn_Msk   (0x3ful << PWM_LOAD_LOADn_Pos)
 
#define PWM_LOAD_LOAD0_Pos   (0)
 
#define PWM_LOAD_LOAD0_Msk   (0x1ul << PWM_LOAD_LOAD0_Pos)
 
#define PWM_LOAD_LOAD1_Pos   (1)
 
#define PWM_LOAD_LOAD1_Msk   (0x1ul << PWM_LOAD_LOAD1_Pos)
 
#define PWM_LOAD_LOAD2_Pos   (2)
 
#define PWM_LOAD_LOAD2_Msk   (0x1ul << PWM_LOAD_LOAD2_Pos)
 
#define PWM_LOAD_LOAD3_Pos   (3)
 
#define PWM_LOAD_LOAD3_Msk   (0x1ul << PWM_LOAD_LOAD3_Pos)
 
#define PWM_LOAD_LOAD4_Pos   (4)
 
#define PWM_LOAD_LOAD4_Msk   (0x1ul << PWM_LOAD_LOAD4_Pos)
 
#define PWM_LOAD_LOAD5_Pos   (5)
 
#define PWM_LOAD_LOAD5_Msk   (0x1ul << PWM_LOAD_LOAD5_Pos)
 
#define PWM_PERIOD_PERIOD_Pos   (0)
 
#define PWM_PERIOD_PERIOD_Msk   (0xfffful << PWM_PERIOD_PERIOD_Pos)
 
#define PWM_CMPDAT_CMP_Pos   (0)
 
#define PWM_CMPDAT_CMP_Msk   (0xfffful << PWM_CMPDAT_CMP_Pos)
 
#define PWM_DTCTL0_1_DTCNT_Pos   (0)
 
#define PWM_DTCTL0_1_DTCNT_Msk   (0xffful << PWM_DTCTL0_1_DTCNT_Pos)
 
#define PWM_DTCTL0_1_DTEN_Pos   (16)
 
#define PWM_DTCTL0_1_DTEN_Msk   (0x1ul << PWM_DTCTL0_1_DTEN_Pos)
 
#define PWM_DTCTL0_1_DTCKSEL_Pos   (24)
 
#define PWM_DTCTL0_1_DTCKSEL_Msk   (0x1ul << PWM_DTCTL0_1_DTCKSEL_Pos)
 
#define PWM_DTCTL2_3_DTCNT_Pos   (0)
 
#define PWM_DTCTL2_3_DTCNT_Msk   (0xffful << PWM_DTCTL2_3_DTCNT_Pos)
 
#define PWM_DTCTL2_3_DTEN_Pos   (16)
 
#define PWM_DTCTL2_3_DTEN_Msk   (0x1ul << PWM_DTCTL2_3_DTEN_Pos)
 
#define PWM_DTCTL2_3_DTCKSEL_Pos   (24)
 
#define PWM_DTCTL2_3_DTCKSEL_Msk   (0x1ul << PWM_DTCTL2_3_DTCKSEL_Pos)
 
#define PWM_DTCTL4_5_DTCNT_Pos   (0)
 
#define PWM_DTCTL4_5_DTCNT_Msk   (0xffful << PWM_DTCTL4_5_DTCNT_Pos)
 
#define PWM_DTCTL4_5_DTEN_Pos   (16)
 
#define PWM_DTCTL4_5_DTEN_Msk   (0x1ul << PWM_DTCTL4_5_DTEN_Pos)
 
#define PWM_DTCTL4_5_DTCKSEL_Pos   (24)
 
#define PWM_DTCTL4_5_DTCKSEL_Msk   (0x1ul << PWM_DTCTL4_5_DTCKSEL_Pos)
 
#define PWM_PHS0_1_PHS_Pos   (0)
 
#define PWM_PHS0_1_PHS_Msk   (0xfffful << PWM_PHS0_1_PHS_Pos)
 
#define PWM_PHS2_3_PHS_Pos   (0)
 
#define PWM_PHS2_3_PHS_Msk   (0xfffful << PWM_PHS2_3_PHS_Pos)
 
#define PWM_PHS4_5_PHS_Pos   (0)
 
#define PWM_PHS4_5_PHS_Msk   (0xfffful << PWM_PHS4_5_PHS_Pos)
 
#define PWM_CNT_CNT_Pos   (0)
 
#define PWM_CNT_CNT_Msk   (0xfffful << PWM_CNT_CNT_Pos)
 
#define PWM_CNT_DIRF_Pos   (16)
 
#define PWM_CNT_DIRF_Msk   (0x1ul << PWM_CNT_DIRF_Pos)
 
#define PWM_WGCTL0_ZPCTLn_Pos   (0)
 
#define PWM_WGCTL0_ZPCTLn_Msk   (0xffful << PWM_WGCTL0_ZPCTLn_Pos)
 
#define PWM_WGCTL0_ZPCTL0_Pos   (0)
 
#define PWM_WGCTL0_ZPCTL0_Msk   (0x3ul << PWM_WGCTL0_ZPCTL0_Pos)
 
#define PWM_WGCTL0_ZPCTL1_Pos   (2)
 
#define PWM_WGCTL0_ZPCTL1_Msk   (0x3ul << PWM_WGCTL0_ZPCTL1_Pos)
 
#define PWM_WGCTL0_ZPCTL2_Pos   (4)
 
#define PWM_WGCTL0_ZPCTL2_Msk   (0x3ul << PWM_WGCTL0_ZPCTL2_Pos)
 
#define PWM_WGCTL0_ZPCTL3_Pos   (6)
 
#define PWM_WGCTL0_ZPCTL3_Msk   (0x3ul << PWM_WGCTL0_ZPCTL3_Pos)
 
#define PWM_WGCTL0_ZPCTL4_Pos   (8)
 
#define PWM_WGCTL0_ZPCTL4_Msk   (0x3ul << PWM_WGCTL0_ZPCTL4_Pos)
 
#define PWM_WGCTL0_ZPCTL5_Pos   (10)
 
#define PWM_WGCTL0_ZPCTL5_Msk   (0x3ul << PWM_WGCTL0_ZPCTL5_Pos)
 
#define PWM_WGCTL0_PRDPCTLn_Pos   (16)
 
#define PWM_WGCTL0_PRDPCTLn_Msk   (0xffful << PWM_WGCTL0_PRDPCTLn_Pos)
 
#define PWM_WGCTL0_PRDPCTL0_Pos   (16)
 
#define PWM_WGCTL0_PRDPCTL0_Msk   (0x3ul << PWM_WGCTL0_PRDPCTL0_Pos)
 
#define PWM_WGCTL0_PRDPCTL1_Pos   (18)
 
#define PWM_WGCTL0_PRDPCTL1_Msk   (0x3ul << PWM_WGCTL0_PRDPCTL1_Pos)
 
#define PWM_WGCTL0_PRDPCTL2_Pos   (20)
 
#define PWM_WGCTL0_PRDPCTL2_Msk   (0x3ul << PWM_WGCTL0_PRDPCTL2_Pos)
 
#define PWM_WGCTL0_PRDPCTL3_Pos   (22)
 
#define PWM_WGCTL0_PRDPCTL3_Msk   (0x3ul << PWM_WGCTL0_PRDPCTL3_Pos)
 
#define PWM_WGCTL0_PRDPCTL4_Pos   (24)
 
#define PWM_WGCTL0_PRDPCTL4_Msk   (0x3ul << PWM_WGCTL0_PRDPCTL4_Pos)
 
#define PWM_WGCTL0_PRDPCTL5_Pos   (26)
 
#define PWM_WGCTL0_PRDPCTL5_Msk   (0x3ul << PWM_WGCTL0_PRDPCTL5_Pos)
 
#define PWM_WGCTL1_CMPUCTLn_Pos   (0)
 
#define PWM_WGCTL1_CMPUCTLn_Msk   (0xffful << PWM_WGCTL1_CMPUCTLn_Pos)
 
#define PWM_WGCTL1_CMPUCTL0_Pos   (0)
 
#define PWM_WGCTL1_CMPUCTL0_Msk   (0x3ul << PWM_WGCTL1_CMPUCTL0_Pos)
 
#define PWM_WGCTL1_CMPUCTL1_Pos   (2)
 
#define PWM_WGCTL1_CMPUCTL1_Msk   (0x3ul << PWM_WGCTL1_CMPUCTL1_Pos)
 
#define PWM_WGCTL1_CMPUCTL2_Pos   (4)
 
#define PWM_WGCTL1_CMPUCTL2_Msk   (0x3ul << PWM_WGCTL1_CMPUCTL2_Pos)
 
#define PWM_WGCTL1_CMPUCTL3_Pos   (6)
 
#define PWM_WGCTL1_CMPUCTL3_Msk   (0x3ul << PWM_WGCTL1_CMPUCTL3_Pos)
 
#define PWM_WGCTL1_CMPUCTL4_Pos   (8)
 
#define PWM_WGCTL1_CMPUCTL4_Msk   (0x3ul << PWM_WGCTL1_CMPUCTL4_Pos)
 
#define PWM_WGCTL1_CMPUCTL5_Pos   (10)
 
#define PWM_WGCTL1_CMPUCTL5_Msk   (0x3ul << PWM_WGCTL1_CMPUCTL5_Pos)
 
#define PWM_WGCTL1_CMPDCTLn_Pos   (16)
 
#define PWM_WGCTL1_CMPDCTLn_Msk   (0xffful << PWM_WGCTL1_CMPDCTLn_Pos)
 
#define PWM_WGCTL1_CMPDCTL0_Pos   (16)
 
#define PWM_WGCTL1_CMPDCTL0_Msk   (0x3ul << PWM_WGCTL1_CMPDCTL0_Pos)
 
#define PWM_WGCTL1_CMPDCTL1_Pos   (18)
 
#define PWM_WGCTL1_CMPDCTL1_Msk   (0x3ul << PWM_WGCTL1_CMPDCTL1_Pos)
 
#define PWM_WGCTL1_CMPDCTL2_Pos   (20)
 
#define PWM_WGCTL1_CMPDCTL2_Msk   (0x3ul << PWM_WGCTL1_CMPDCTL2_Pos)
 
#define PWM_WGCTL1_CMPDCTL3_Pos   (22)
 
#define PWM_WGCTL1_CMPDCTL3_Msk   (0x3ul << PWM_WGCTL1_CMPDCTL3_Pos)
 
#define PWM_WGCTL1_CMPDCTL4_Pos   (24)
 
#define PWM_WGCTL1_CMPDCTL4_Msk   (0x3ul << PWM_WGCTL1_CMPDCTL4_Pos)
 
#define PWM_WGCTL1_CMPDCTL5_Pos   (26)
 
#define PWM_WGCTL1_CMPDCTL5_Msk   (0x3ul << PWM_WGCTL1_CMPDCTL5_Pos)
 
#define PWM_MSKEN_MSKENn_Pos   (0)
 
#define PWM_MSKEN_MSKENn_Msk   (0x3ful << PWM_MSKEN_MSKENn_Pos)
 
#define PWM_MSKEN_MSKEN0_Pos   (0)
 
#define PWM_MSKEN_MSKEN0_Msk   (0x1ul << PWM_MSKEN_MSKEN0_Pos)
 
#define PWM_MSKEN_MSKEN1_Pos   (1)
 
#define PWM_MSKEN_MSKEN1_Msk   (0x1ul << PWM_MSKEN_MSKEN1_Pos)
 
#define PWM_MSKEN_MSKEN2_Pos   (2)
 
#define PWM_MSKEN_MSKEN2_Msk   (0x1ul << PWM_MSKEN_MSKEN2_Pos)
 
#define PWM_MSKEN_MSKEN3_Pos   (3)
 
#define PWM_MSKEN_MSKEN3_Msk   (0x1ul << PWM_MSKEN_MSKEN3_Pos)
 
#define PWM_MSKEN_MSKEN4_Pos   (4)
 
#define PWM_MSKEN_MSKEN4_Msk   (0x1ul << PWM_MSKEN_MSKEN4_Pos)
 
#define PWM_MSKEN_MSKEN5_Pos   (5)
 
#define PWM_MSKEN_MSKEN5_Msk   (0x1ul << PWM_MSKEN_MSKEN5_Pos)
 
#define PWM_MSK_MSKDATn_Pos   (0)
 
#define PWM_MSK_MSKDATn_Msk   (0x3ful << PWM_MSK_MSKDATn_Pos)
 
#define PWM_MSK_MSKDAT0_Pos   (0)
 
#define PWM_MSK_MSKDAT0_Msk   (0x1ul << PWM_MSK_MSKDAT0_Pos)
 
#define PWM_MSK_MSKDAT1_Pos   (1)
 
#define PWM_MSK_MSKDAT1_Msk   (0x1ul << PWM_MSK_MSKDAT1_Pos)
 
#define PWM_MSK_MSKDAT2_Pos   (2)
 
#define PWM_MSK_MSKDAT2_Msk   (0x1ul << PWM_MSK_MSKDAT2_Pos)
 
#define PWM_MSK_MSKDAT3_Pos   (3)
 
#define PWM_MSK_MSKDAT3_Msk   (0x1ul << PWM_MSK_MSKDAT3_Pos)
 
#define PWM_MSK_MSKDAT4_Pos   (4)
 
#define PWM_MSK_MSKDAT4_Msk   (0x1ul << PWM_MSK_MSKDAT4_Pos)
 
#define PWM_MSK_MSKDAT5_Pos   (5)
 
#define PWM_MSK_MSKDAT5_Msk   (0x1ul << PWM_MSK_MSKDAT5_Pos)
 
#define PWM_BNF_BRK0NFEN_Pos   (0)
 
#define PWM_BNF_BRK0NFEN_Msk   (0x1ul << PWM_BNF_BRK0NFEN_Pos)
 
#define PWM_BNF_BRK0NFSEL_Pos   (1)
 
#define PWM_BNF_BRK0NFSEL_Msk   (0x7ul << PWM_BNF_BRK0NFSEL_Pos)
 
#define PWM_BNF_BRK0FCNT_Pos   (4)
 
#define PWM_BNF_BRK0FCNT_Msk   (0x7ul << PWM_BNF_BRK0FCNT_Pos)
 
#define PWM_BNF_BRK0PINV_Pos   (7)
 
#define PWM_BNF_BRK0PINV_Msk   (0x1ul << PWM_BNF_BRK0PINV_Pos)
 
#define PWM_BNF_BRK1NFEN_Pos   (8)
 
#define PWM_BNF_BRK1NFEN_Msk   (0x1ul << PWM_BNF_BRK1NFEN_Pos)
 
#define PWM_BNF_BRK1NFSEL_Pos   (9)
 
#define PWM_BNF_BRK1NFSEL_Msk   (0x7ul << PWM_BNF_BRK1NFSEL_Pos)
 
#define PWM_BNF_BRK1FCNT_Pos   (12)
 
#define PWM_BNF_BRK1FCNT_Msk   (0x7ul << PWM_BNF_BRK1FCNT_Pos)
 
#define PWM_BNF_BRK1PINV_Pos   (15)
 
#define PWM_BNF_BRK1PINV_Msk   (0x1ul << PWM_BNF_BRK1PINV_Pos)
 
#define PWM_BNF_BK0SRC_Pos   (16)
 
#define PWM_BNF_BK0SRC_Msk   (0x1ul << PWM_BNF_BK0SRC_Pos)
 
#define PWM_BNF_BK1SRC_Pos   (24)
 
#define PWM_BNF_BK1SRC_Msk   (0x1ul << PWM_BNF_BK1SRC_Pos)
 
#define PWM_FAILBRK_CSSBRKEN_Pos   (0)
 
#define PWM_FAILBRK_CSSBRKEN_Msk   (0x1ul << PWM_FAILBRK_CSSBRKEN_Pos)
 
#define PWM_FAILBRK_BODBRKEN_Pos   (1)
 
#define PWM_FAILBRK_BODBRKEN_Msk   (0x1ul << PWM_FAILBRK_BODBRKEN_Pos)
 
#define PWM_FAILBRK_CORBRKEN_Pos   (3)
 
#define PWM_FAILBRK_CORBRKEN_Msk   (0x1ul << PWM_FAILBRK_CORBRKEN_Pos)
 
#define PWM_BRKCTL0_1_BRKP0EEN_Pos   (4)
 
#define PWM_BRKCTL0_1_BRKP0EEN_Msk   (0x1ul << PWM_BRKCTL0_1_BRKP0EEN_Pos)
 
#define PWM_BRKCTL0_1_BRKP1EEN_Pos   (5)
 
#define PWM_BRKCTL0_1_BRKP1EEN_Msk   (0x1ul << PWM_BRKCTL0_1_BRKP1EEN_Pos)
 
#define PWM_BRKCTL0_1_SYSEBEN_Pos   (7)
 
#define PWM_BRKCTL0_1_SYSEBEN_Msk   (0x1ul << PWM_BRKCTL0_1_SYSEBEN_Pos)
 
#define PWM_BRKCTL0_1_BRKP0LEN_Pos   (12)
 
#define PWM_BRKCTL0_1_BRKP0LEN_Msk   (0x1ul << PWM_BRKCTL0_1_BRKP0LEN_Pos)
 
#define PWM_BRKCTL0_1_BRKP1LEN_Pos   (13)
 
#define PWM_BRKCTL0_1_BRKP1LEN_Msk   (0x1ul << PWM_BRKCTL0_1_BRKP1LEN_Pos)
 
#define PWM_BRKCTL0_1_SYSLBEN_Pos   (15)
 
#define PWM_BRKCTL0_1_SYSLBEN_Msk   (0x1ul << PWM_BRKCTL0_1_SYSLBEN_Pos)
 
#define PWM_BRKCTL0_1_BRKAEVEN_Pos   (16)
 
#define PWM_BRKCTL0_1_BRKAEVEN_Msk   (0x3ul << PWM_BRKCTL0_1_BRKAEVEN_Pos)
 
#define PWM_BRKCTL0_1_BRKAODD_Pos   (18)
 
#define PWM_BRKCTL0_1_BRKAODD_Msk   (0x3ul << PWM_BRKCTL0_1_BRKAODD_Pos)
 
#define PWM_BRKCTL2_3_BRKP0EEN_Pos   (4)
 
#define PWM_BRKCTL2_3_BRKP0EEN_Msk   (0x1ul << PWM_BRKCTL2_3_BRKP0EEN_Pos)
 
#define PWM_BRKCTL2_3_BRKP1EEN_Pos   (5)
 
#define PWM_BRKCTL2_3_BRKP1EEN_Msk   (0x1ul << PWM_BRKCTL2_3_BRKP1EEN_Pos)
 
#define PWM_BRKCTL2_3_SYSEBEN_Pos   (7)
 
#define PWM_BRKCTL2_3_SYSEBEN_Msk   (0x1ul << PWM_BRKCTL2_3_SYSEBEN_Pos)
 
#define PWM_BRKCTL2_3_BRKP0LEN_Pos   (12)
 
#define PWM_BRKCTL2_3_BRKP0LEN_Msk   (0x1ul << PWM_BRKCTL2_3_BRKP0LEN_Pos)
 
#define PWM_BRKCTL2_3_BRKP1LEN_Pos   (13)
 
#define PWM_BRKCTL2_3_BRKP1LEN_Msk   (0x1ul << PWM_BRKCTL2_3_BRKP1LEN_Pos)
 
#define PWM_BRKCTL2_3_SYSLBEN_Pos   (15)
 
#define PWM_BRKCTL2_3_SYSLBEN_Msk   (0x1ul << PWM_BRKCTL2_3_SYSLBEN_Pos)
 
#define PWM_BRKCTL2_3_BRKAEVEN_Pos   (16)
 
#define PWM_BRKCTL2_3_BRKAEVEN_Msk   (0x3ul << PWM_BRKCTL2_3_BRKAEVEN_Pos)
 
#define PWM_BRKCTL2_3_BRKAODD_Pos   (18)
 
#define PWM_BRKCTL2_3_BRKAODD_Msk   (0x3ul << PWM_BRKCTL2_3_BRKAODD_Pos)
 
#define PWM_BRKCTL4_5_BRKP0EEN_Pos   (4)
 
#define PWM_BRKCTL4_5_BRKP0EEN_Msk   (0x1ul << PWM_BRKCTL4_5_BRKP0EEN_Pos)
 
#define PWM_BRKCTL4_5_BRKP1EEN_Pos   (5)
 
#define PWM_BRKCTL4_5_BRKP1EEN_Msk   (0x1ul << PWM_BRKCTL4_5_BRKP1EEN_Pos)
 
#define PWM_BRKCTL4_5_SYSEBEN_Pos   (7)
 
#define PWM_BRKCTL4_5_SYSEBEN_Msk   (0x1ul << PWM_BRKCTL4_5_SYSEBEN_Pos)
 
#define PWM_BRKCTL4_5_BRKP0LEN_Pos   (12)
 
#define PWM_BRKCTL4_5_BRKP0LEN_Msk   (0x1ul << PWM_BRKCTL4_5_BRKP0LEN_Pos)
 
#define PWM_BRKCTL4_5_BRKP1LEN_Pos   (13)
 
#define PWM_BRKCTL4_5_BRKP1LEN_Msk   (0x1ul << PWM_BRKCTL4_5_BRKP1LEN_Pos)
 
#define PWM_BRKCTL4_5_SYSLBEN_Pos   (15)
 
#define PWM_BRKCTL4_5_SYSLBEN_Msk   (0x1ul << PWM_BRKCTL4_5_SYSLBEN_Pos)
 
#define PWM_BRKCTL4_5_BRKAEVEN_Pos   (16)
 
#define PWM_BRKCTL4_5_BRKAEVEN_Msk   (0x3ul << PWM_BRKCTL4_5_BRKAEVEN_Pos)
 
#define PWM_BRKCTL4_5_BRKAODD_Pos   (18)
 
#define PWM_BRKCTL4_5_BRKAODD_Msk   (0x3ul << PWM_BRKCTL4_5_BRKAODD_Pos)
 
#define PWM_POLCTL_PINVn_Pos   (0)
 
#define PWM_POLCTL_PINVn_Msk   (0x3ful << PWM_POLCTL_PINVn_Pos)
 
#define PWM_POLCTL_PINV0_Pos   (0)
 
#define PWM_POLCTL_PINV0_Msk   (0x1ul << PWM_POLCTL_PINV0_Pos)
 
#define PWM_POLCTL_PINV1_Pos   (1)
 
#define PWM_POLCTL_PINV1_Msk   (0x1ul << PWM_POLCTL_PINV1_Pos)
 
#define PWM_POLCTL_PINV2_Pos   (2)
 
#define PWM_POLCTL_PINV2_Msk   (0x1ul << PWM_POLCTL_PINV2_Pos)
 
#define PWM_POLCTL_PINV3_Pos   (3)
 
#define PWM_POLCTL_PINV3_Msk   (0x1ul << PWM_POLCTL_PINV3_Pos)
 
#define PWM_POLCTL_PINV4_Pos   (4)
 
#define PWM_POLCTL_PINV4_Msk   (0x1ul << PWM_POLCTL_PINV4_Pos)
 
#define PWM_POLCTL_PINV5_Pos   (5)
 
#define PWM_POLCTL_PINV5_Msk   (0x1ul << PWM_POLCTL_PINV5_Pos)
 
#define PWM_POEN_POENn_Pos   (0)
 
#define PWM_POEN_POENn_Msk   (0x3ful << PWM_POEN_POENn_Pos)
 
#define PWM_POEN_POEN0_Pos   (0)
 
#define PWM_POEN_POEN0_Msk   (0x1ul << PWM_POEN_POEN0_Pos)
 
#define PWM_POEN_POEN1_Pos   (1)
 
#define PWM_POEN_POEN1_Msk   (0x1ul << PWM_POEN_POEN1_Pos)
 
#define PWM_POEN_POEN2_Pos   (2)
 
#define PWM_POEN_POEN2_Msk   (0x1ul << PWM_POEN_POEN2_Pos)
 
#define PWM_POEN_POEN3_Pos   (3)
 
#define PWM_POEN_POEN3_Msk   (0x1ul << PWM_POEN_POEN3_Pos)
 
#define PWM_POEN_POEN4_Pos   (4)
 
#define PWM_POEN_POEN4_Msk   (0x1ul << PWM_POEN_POEN4_Pos)
 
#define PWM_POEN_POEN5_Pos   (5)
 
#define PWM_POEN_POEN5_Msk   (0x1ul << PWM_POEN_POEN5_Pos)
 
#define PWM_SWBRK_BRKETRGn_Pos   (0)
 
#define PWM_SWBRK_BRKETRGn_Msk   (0x7ul << PWM_SWBRK_BRKETRGn_Pos)
 
#define PWM_SWBRK_BRKETRG0_Pos   (0)
 
#define PWM_SWBRK_BRKETRG0_Msk   (0x1ul << PWM_SWBRK_BRKETRG0_Pos)
 
#define PWM_SWBRK_BRKETRG2_Pos   (1)
 
#define PWM_SWBRK_BRKETRG2_Msk   (0x1ul << PWM_SWBRK_BRKETRG2_Pos)
 
#define PWM_SWBRK_BRKETRG4_Pos   (2)
 
#define PWM_SWBRK_BRKETRG4_Msk   (0x1ul << PWM_SWBRK_BRKETRG4_Pos)
 
#define PWM_SWBRK_BRKLTRGn_Pos   (8)
 
#define PWM_SWBRK_BRKLTRGn_Msk   (0x7ul << PWM_SWBRK_BRKLTRGn_Pos)
 
#define PWM_SWBRK_BRKLTRG0_Pos   (8)
 
#define PWM_SWBRK_BRKLTRG0_Msk   (0x1ul << PWM_SWBRK_BRKLTRG0_Pos)
 
#define PWM_SWBRK_BRKLTRG2_Pos   (9)
 
#define PWM_SWBRK_BRKLTRG2_Msk   (0x1ul << PWM_SWBRK_BRKLTRG2_Pos)
 
#define PWM_SWBRK_BRKLTRG4_Pos   (10)
 
#define PWM_SWBRK_BRKLTRG4_Msk   (0x1ul << PWM_SWBRK_BRKLTRG4_Pos)
 
#define PWM_INTEN0_ZIENn_Pos   (0)
 
#define PWM_INTEN0_ZIENn_Msk   (0x3ful << PWM_INTEN0_ZIENn_Pos)
 
#define PWM_INTEN0_ZIEN0_Pos   (0)
 
#define PWM_INTEN0_ZIEN0_Msk   (0x1ul << PWM_INTEN0_ZIEN0_Pos)
 
#define PWM_INTEN0_ZIEN1_Pos   (1)
 
#define PWM_INTEN0_ZIEN1_Msk   (0x1ul << PWM_INTEN0_ZIEN1_Pos)
 
#define PWM_INTEN0_ZIEN2_Pos   (2)
 
#define PWM_INTEN0_ZIEN2_Msk   (0x1ul << PWM_INTEN0_ZIEN2_Pos)
 
#define PWM_INTEN0_ZIEN3_Pos   (3)
 
#define PWM_INTEN0_ZIEN3_Msk   (0x1ul << PWM_INTEN0_ZIEN3_Pos)
 
#define PWM_INTEN0_ZIEN4_Pos   (4)
 
#define PWM_INTEN0_ZIEN4_Msk   (0x1ul << PWM_INTEN0_ZIEN4_Pos)
 
#define PWM_INTEN0_ZIEN5_Pos   (5)
 
#define PWM_INTEN0_ZIEN5_Msk   (0x1ul << PWM_INTEN0_ZIEN5_Pos)
 
#define PWM_INTEN0_IFAIEN0_1_Pos   (7)
 
#define PWM_INTEN0_IFAIEN0_1_Msk   (0x1ul << PWM_INTEN0_IFAIEN0_1_Pos)
 
#define PWM_INTEN0_PIENn_Pos   (8)
 
#define PWM_INTEN0_PIENn_Msk   (0x3ful << PWM_INTEN0_PIENn_Pos)
 
#define PWM_INTEN0_PIEN0_Pos   (8)
 
#define PWM_INTEN0_PIEN0_Msk   (0x1ul << PWM_INTEN0_PIEN0_Pos)
 
#define PWM_INTEN0_PIEN1_Pos   (9)
 
#define PWM_INTEN0_PIEN1_Msk   (0x1ul << PWM_INTEN0_PIEN1_Pos)
 
#define PWM_INTEN0_PIEN2_Pos   (10)
 
#define PWM_INTEN0_PIEN2_Msk   (0x1ul << PWM_INTEN0_PIEN2_Pos)
 
#define PWM_INTEN0_PIEN3_Pos   (11)
 
#define PWM_INTEN0_PIEN3_Msk   (0x1ul << PWM_INTEN0_PIEN3_Pos)
 
#define PWM_INTEN0_PIEN4_Pos   (12)
 
#define PWM_INTEN0_PIEN4_Msk   (0x1ul << PWM_INTEN0_PIEN4_Pos)
 
#define PWM_INTEN0_PIEN5_Pos   (13)
 
#define PWM_INTEN0_PIEN5_Msk   (0x1ul << PWM_INTEN0_PIEN5_Pos)
 
#define PWM_INTEN0_IFAIEN2_3_Pos   (15)
 
#define PWM_INTEN0_IFAIEN2_3_Msk   (0x1ul << PWM_INTEN0_IFAIEN2_3_Pos)
 
#define PWM_INTEN0_CMPUIENn_Pos   (16)
 
#define PWM_INTEN0_CMPUIENn_Msk   (0x3ful << PWM_INTEN0_CMPUIENn_Pos)
 
#define PWM_INTEN0_CMPUIEN0_Pos   (16)
 
#define PWM_INTEN0_CMPUIEN0_Msk   (0x1ul << PWM_INTEN0_CMPUIEN0_Pos)
 
#define PWM_INTEN0_CMPUIEN1_Pos   (17)
 
#define PWM_INTEN0_CMPUIEN1_Msk   (0x1ul << PWM_INTEN0_CMPUIEN1_Pos)
 
#define PWM_INTEN0_CMPUIEN2_Pos   (18)
 
#define PWM_INTEN0_CMPUIEN2_Msk   (0x1ul << PWM_INTEN0_CMPUIEN2_Pos)
 
#define PWM_INTEN0_CMPUIEN3_Pos   (19)
 
#define PWM_INTEN0_CMPUIEN3_Msk   (0x1ul << PWM_INTEN0_CMPUIEN3_Pos)
 
#define PWM_INTEN0_CMPUIEN4_Pos   (20)
 
#define PWM_INTEN0_CMPUIEN4_Msk   (0x1ul << PWM_INTEN0_CMPUIEN4_Pos)
 
#define PWM_INTEN0_CMPUIEN5_Pos   (21)
 
#define PWM_INTEN0_CMPUIEN5_Msk   (0x1ul << PWM_INTEN0_CMPUIEN5_Pos)
 
#define PWM_INTEN0_IFAIEN4_5_Pos   (23)
 
#define PWM_INTEN0_IFAIEN4_5_Msk   (0x1ul << PWM_INTEN0_IFAIEN4_5_Pos)
 
#define PWM_INTEN0_CMPDIENn_Pos   (24)
 
#define PWM_INTEN0_CMPDIENn_Msk   (0x3ful << PWM_INTEN0_CMPDIENn_Pos)
 
#define PWM_INTEN0_CMPDIEN0_Pos   (24)
 
#define PWM_INTEN0_CMPDIEN0_Msk   (0x1ul << PWM_INTEN0_CMPDIEN0_Pos)
 
#define PWM_INTEN0_CMPDIEN1_Pos   (25)
 
#define PWM_INTEN0_CMPDIEN1_Msk   (0x1ul << PWM_INTEN0_CMPDIEN1_Pos)
 
#define PWM_INTEN0_CMPDIEN2_Pos   (26)
 
#define PWM_INTEN0_CMPDIEN2_Msk   (0x1ul << PWM_INTEN0_CMPDIEN2_Pos)
 
#define PWM_INTEN0_CMPDIEN3_Pos   (27)
 
#define PWM_INTEN0_CMPDIEN3_Msk   (0x1ul << PWM_INTEN0_CMPDIEN3_Pos)
 
#define PWM_INTEN0_CMPDIEN4_Pos   (28)
 
#define PWM_INTEN0_CMPDIEN4_Msk   (0x1ul << PWM_INTEN0_CMPDIEN4_Pos)
 
#define PWM_INTEN0_CMPDIEN5_Pos   (29)
 
#define PWM_INTEN0_CMPDIEN5_Msk   (0x1ul << PWM_INTEN0_CMPDIEN5_Pos)
 
#define PWM_INTEN1_BRKEIEN0_1_Pos   (0)
 
#define PWM_INTEN1_BRKEIEN0_1_Msk   (0x1ul << PWM_INTEN1_BRKEIEN0_1_Pos)
 
#define PWM_INTEN1_BRKEIEN2_3_Pos   (1)
 
#define PWM_INTEN1_BRKEIEN2_3_Msk   (0x1ul << PWM_INTEN1_BRKEIEN2_3_Pos)
 
#define PWM_INTEN1_BRKEIEN4_5_Pos   (2)
 
#define PWM_INTEN1_BRKEIEN4_5_Msk   (0x1ul << PWM_INTEN1_BRKEIEN4_5_Pos)
 
#define PWM_INTEN1_BRKLIEN0_1_Pos   (8)
 
#define PWM_INTEN1_BRKLIEN0_1_Msk   (0x1ul << PWM_INTEN1_BRKLIEN0_1_Pos)
 
#define PWM_INTEN1_BRKLIEN2_3_Pos   (9)
 
#define PWM_INTEN1_BRKLIEN2_3_Msk   (0x1ul << PWM_INTEN1_BRKLIEN2_3_Pos)
 
#define PWM_INTEN1_BRKLIEN4_5_Pos   (10)
 
#define PWM_INTEN1_BRKLIEN4_5_Msk   (0x1ul << PWM_INTEN1_BRKLIEN4_5_Pos)
 
#define PWM_INTSTS0_ZIFn_Pos   (0)
 
#define PWM_INTSTS0_ZIFn_Msk   (0x3ful << PWM_INTSTS0_ZIFn_Pos)
 
#define PWM_INTSTS0_ZIF0_Pos   (0)
 
#define PWM_INTSTS0_ZIF0_Msk   (0x1ul << PWM_INTSTS0_ZIF0_Pos)
 
#define PWM_INTSTS0_ZIF1_Pos   (1)
 
#define PWM_INTSTS0_ZIF1_Msk   (0x1ul << PWM_INTSTS0_ZIF1_Pos)
 
#define PWM_INTSTS0_ZIF2_Pos   (2)
 
#define PWM_INTSTS0_ZIF2_Msk   (0x1ul << PWM_INTSTS0_ZIF2_Pos)
 
#define PWM_INTSTS0_ZIF3_Pos   (3)
 
#define PWM_INTSTS0_ZIF3_Msk   (0x1ul << PWM_INTSTS0_ZIF3_Pos)
 
#define PWM_INTSTS0_ZIF4_Pos   (4)
 
#define PWM_INTSTS0_ZIF4_Msk   (0x1ul << PWM_INTSTS0_ZIF4_Pos)
 
#define PWM_INTSTS0_ZIF5_Pos   (5)
 
#define PWM_INTSTS0_ZIF5_Msk   (0x1ul << PWM_INTSTS0_ZIF5_Pos)
 
#define PWM_INTSTS0_IFAIF0_1_Pos   (7)
 
#define PWM_INTSTS0_IFAIF0_1_Msk   (0x1ul << PWM_INTSTS0_IFAIF0_1_Pos)
 
#define PWM_INTSTS0_PIFn_Pos   (8)
 
#define PWM_INTSTS0_PIFn_Msk   (0x3ful << PWM_INTSTS0_PIFn_Pos)
 
#define PWM_INTSTS0_PIF0_Pos   (8)
 
#define PWM_INTSTS0_PIF0_Msk   (0x1ul << PWM_INTSTS0_PIF0_Pos)
 
#define PWM_INTSTS0_PIF1_Pos   (9)
 
#define PWM_INTSTS0_PIF1_Msk   (0x1ul << PWM_INTSTS0_PIF1_Pos)
 
#define PWM_INTSTS0_PIF2_Pos   (10)
 
#define PWM_INTSTS0_PIF2_Msk   (0x1ul << PWM_INTSTS0_PIF2_Pos)
 
#define PWM_INTSTS0_PIF3_Pos   (11)
 
#define PWM_INTSTS0_PIF3_Msk   (0x1ul << PWM_INTSTS0_PIF3_Pos)
 
#define PWM_INTSTS0_PIF4_Pos   (12)
 
#define PWM_INTSTS0_PIF4_Msk   (0x1ul << PWM_INTSTS0_PIF4_Pos)
 
#define PWM_INTSTS0_PIF5_Pos   (13)
 
#define PWM_INTSTS0_PIF5_Msk   (0x1ul << PWM_INTSTS0_PIF5_Pos)
 
#define PWM_INTSTS0_IFAIF2_3_Pos   (15)
 
#define PWM_INTSTS0_IFAIF2_3_Msk   (0x1ul << PWM_INTSTS0_IFAIF2_3_Pos)
 
#define PWM_INTSTS0_CMPUIFn_Pos   (16)
 
#define PWM_INTSTS0_CMPUIFn_Msk   (0x3ful << PWM_INTSTS0_CMPUIFn_Pos)
 
#define PWM_INTSTS0_CMPUIF0_Pos   (16)
 
#define PWM_INTSTS0_CMPUIF0_Msk   (0x1ul << PWM_INTSTS0_CMPUIF0_Pos)
 
#define PWM_INTSTS0_CMPUIF1_Pos   (17)
 
#define PWM_INTSTS0_CMPUIF1_Msk   (0x1ul << PWM_INTSTS0_CMPUIF1_Pos)
 
#define PWM_INTSTS0_CMPUIF2_Pos   (18)
 
#define PWM_INTSTS0_CMPUIF2_Msk   (0x1ul << PWM_INTSTS0_CMPUIF2_Pos)
 
#define PWM_INTSTS0_CMPUIF3_Pos   (19)
 
#define PWM_INTSTS0_CMPUIF3_Msk   (0x1ul << PWM_INTSTS0_CMPUIF3_Pos)
 
#define PWM_INTSTS0_CMPUIF4_Pos   (20)
 
#define PWM_INTSTS0_CMPUIF4_Msk   (0x1ul << PWM_INTSTS0_CMPUIF4_Pos)
 
#define PWM_INTSTS0_CMPUIF5_Pos   (21)
 
#define PWM_INTSTS0_CMPUIF5_Msk   (0x1ul << PWM_INTSTS0_CMPUIF5_Pos)
 
#define PWM_INTSTS0_IFAIF4_5_Pos   (23)
 
#define PWM_INTSTS0_IFAIF4_5_Msk   (0x1ul << PWM_INTSTS0_IFAIF4_5_Pos)
 
#define PWM_INTSTS0_CMPDIFn_Pos   (24)
 
#define PWM_INTSTS0_CMPDIFn_Msk   (0x3ful << PWM_INTSTS0_CMPDIFn_Pos)
 
#define PWM_INTSTS0_CMPDIF0_Pos   (24)
 
#define PWM_INTSTS0_CMPDIF0_Msk   (0x1ul << PWM_INTSTS0_CMPDIF0_Pos)
 
#define PWM_INTSTS0_CMPDIF1_Pos   (25)
 
#define PWM_INTSTS0_CMPDIF1_Msk   (0x1ul << PWM_INTSTS0_CMPDIF1_Pos)
 
#define PWM_INTSTS0_CMPDIF2_Pos   (26)
 
#define PWM_INTSTS0_CMPDIF2_Msk   (0x1ul << PWM_INTSTS0_CMPDIF2_Pos)
 
#define PWM_INTSTS0_CMPDIF3_Pos   (27)
 
#define PWM_INTSTS0_CMPDIF3_Msk   (0x1ul << PWM_INTSTS0_CMPDIF3_Pos)
 
#define PWM_INTSTS0_CMPDIF4_Pos   (28)
 
#define PWM_INTSTS0_CMPDIF4_Msk   (0x1ul << PWM_INTSTS0_CMPDIF4_Pos)
 
#define PWM_INTSTS0_CMPDIF5_Pos   (29)
 
#define PWM_INTSTS0_CMPDIF5_Msk   (0x1ul << PWM_INTSTS0_CMPDIF5_Pos)
 
#define PWM_INTSTS1_BRKEIFn_Pos   (0)
 
#define PWM_INTSTS1_BRKEIFn_Msk   (0x3ful << PWM_INTSTS1_BRKEIFn_Pos)
 
#define PWM_INTSTS1_BRKEIF0_Pos   (0)
 
#define PWM_INTSTS1_BRKEIF0_Msk   (0x1ul << PWM_INTSTS1_BRKEIF0_Pos)
 
#define PWM_INTSTS1_BRKEIF1_Pos   (1)
 
#define PWM_INTSTS1_BRKEIF1_Msk   (0x1ul << PWM_INTSTS1_BRKEIF1_Pos)
 
#define PWM_INTSTS1_BRKEIF2_Pos   (2)
 
#define PWM_INTSTS1_BRKEIF2_Msk   (0x1ul << PWM_INTSTS1_BRKEIF2_Pos)
 
#define PWM_INTSTS1_BRKEIF3_Pos   (3)
 
#define PWM_INTSTS1_BRKEIF3_Msk   (0x1ul << PWM_INTSTS1_BRKEIF3_Pos)
 
#define PWM_INTSTS1_BRKEIF4_Pos   (4)
 
#define PWM_INTSTS1_BRKEIF4_Msk   (0x1ul << PWM_INTSTS1_BRKEIF4_Pos)
 
#define PWM_INTSTS1_BRKEIF5_Pos   (5)
 
#define PWM_INTSTS1_BRKEIF5_Msk   (0x1ul << PWM_INTSTS1_BRKEIF5_Pos)
 
#define PWM_INTSTS1_BRKLIFn_Pos   (8)
 
#define PWM_INTSTS1_BRKLIFn_Msk   (0x3ful << PWM_INTSTS1_BRKLIFn_Pos)
 
#define PWM_INTSTS1_BRKLIF0_Pos   (8)
 
#define PWM_INTSTS1_BRKLIF0_Msk   (0x1ul << PWM_INTSTS1_BRKLIF0_Pos)
 
#define PWM_INTSTS1_BRKLIF1_Pos   (9)
 
#define PWM_INTSTS1_BRKLIF1_Msk   (0x1ul << PWM_INTSTS1_BRKLIF1_Pos)
 
#define PWM_INTSTS1_BRKLIF2_Pos   (10)
 
#define PWM_INTSTS1_BRKLIF2_Msk   (0x1ul << PWM_INTSTS1_BRKLIF2_Pos)
 
#define PWM_INTSTS1_BRKLIF3_Pos   (11)
 
#define PWM_INTSTS1_BRKLIF3_Msk   (0x1ul << PWM_INTSTS1_BRKLIF3_Pos)
 
#define PWM_INTSTS1_BRKLIF4_Pos   (12)
 
#define PWM_INTSTS1_BRKLIF4_Msk   (0x1ul << PWM_INTSTS1_BRKLIF4_Pos)
 
#define PWM_INTSTS1_BRKLIF5_Pos   (13)
 
#define PWM_INTSTS1_BRKLIF5_Msk   (0x1ul << PWM_INTSTS1_BRKLIF5_Pos)
 
#define PWM_INTSTS1_BRKESTS0_Pos   (16)
 
#define PWM_INTSTS1_BRKESTS0_Msk   (0x1ul << PWM_INTSTS1_BRKESTS0_Pos)
 
#define PWM_INTSTS1_BRKESTS1_Pos   (17)
 
#define PWM_INTSTS1_BRKESTS1_Msk   (0x1ul << PWM_INTSTS1_BRKESTS1_Pos)
 
#define PWM_INTSTS1_BRKESTS2_Pos   (18)
 
#define PWM_INTSTS1_BRKESTS2_Msk   (0x1ul << PWM_INTSTS1_BRKESTS2_Pos)
 
#define PWM_INTSTS1_BRKESTS3_Pos   (19)
 
#define PWM_INTSTS1_BRKESTS3_Msk   (0x1ul << PWM_INTSTS1_BRKESTS3_Pos)
 
#define PWM_INTSTS1_BRKESTS4_Pos   (20)
 
#define PWM_INTSTS1_BRKESTS4_Msk   (0x1ul << PWM_INTSTS1_BRKESTS4_Pos)
 
#define PWM_INTSTS1_BRKESTS5_Pos   (21)
 
#define PWM_INTSTS1_BRKESTS5_Msk   (0x1ul << PWM_INTSTS1_BRKESTS5_Pos)
 
#define PWM_INTSTS1_BRKLSTS0_Pos   (24)
 
#define PWM_INTSTS1_BRKLSTS0_Msk   (0x1ul << PWM_INTSTS1_BRKLSTS0_Pos)
 
#define PWM_INTSTS1_BRKLSTS1_Pos   (25)
 
#define PWM_INTSTS1_BRKLSTS1_Msk   (0x1ul << PWM_INTSTS1_BRKLSTS1_Pos)
 
#define PWM_INTSTS1_BRKLSTS2_Pos   (26)
 
#define PWM_INTSTS1_BRKLSTS2_Msk   (0x1ul << PWM_INTSTS1_BRKLSTS2_Pos)
 
#define PWM_INTSTS1_BRKLSTS3_Pos   (27)
 
#define PWM_INTSTS1_BRKLSTS3_Msk   (0x1ul << PWM_INTSTS1_BRKLSTS3_Pos)
 
#define PWM_INTSTS1_BRKLSTS4_Pos   (28)
 
#define PWM_INTSTS1_BRKLSTS4_Msk   (0x1ul << PWM_INTSTS1_BRKLSTS4_Pos)
 
#define PWM_INTSTS1_BRKLSTS5_Pos   (29)
 
#define PWM_INTSTS1_BRKLSTS5_Msk   (0x1ul << PWM_INTSTS1_BRKLSTS5_Pos)
 
#define PWM_IFA_IFCNT0_1_Pos   (0)
 
#define PWM_IFA_IFCNT0_1_Msk   (0xful << PWM_IFA_IFCNT0_1_Pos)
 
#define PWM_IFA_IFSEL0_1_Pos   (4)
 
#define PWM_IFA_IFSEL0_1_Msk   (0x7ul << PWM_IFA_IFSEL0_1_Pos)
 
#define PWM_IFA_IFAEN0_1_Pos   (7)
 
#define PWM_IFA_IFAEN0_1_Msk   (0x1ul << PWM_IFA_IFAEN0_1_Pos)
 
#define PWM_IFA_IFCNT2_3_Pos   (8)
 
#define PWM_IFA_IFCNT2_3_Msk   (0xful << PWM_IFA_IFCNT2_3_Pos)
 
#define PWM_IFA_IFSEL2_3_Pos   (12)
 
#define PWM_IFA_IFSEL2_3_Msk   (0x7ul << PWM_IFA_IFSEL2_3_Pos)
 
#define PWM_IFA_IFAEN2_3_Pos   (15)
 
#define PWM_IFA_IFAEN2_3_Msk   (0x1ul << PWM_IFA_IFAEN2_3_Pos)
 
#define PWM_IFA_IFCNT4_5_Pos   (16)
 
#define PWM_IFA_IFCNT4_5_Msk   (0xful << PWM_IFA_IFCNT4_5_Pos)
 
#define PWM_IFA_IFSEL4_5_Pos   (20)
 
#define PWM_IFA_IFSEL4_5_Msk   (0x7ul << PWM_IFA_IFSEL4_5_Pos)
 
#define PWM_IFA_IFAEN4_5_Pos   (23)
 
#define PWM_IFA_IFAEN4_5_Msk   (0x1ul << PWM_IFA_IFAEN4_5_Pos)
 
#define PWM_EADCTS0_TRGSEL0_Pos   (0)
 
#define PWM_EADCTS0_TRGSEL0_Msk   (0xful << PWM_EADCTS0_TRGSEL0_Pos)
 
#define PWM_EADCTS0_TRGEN0_Pos   (7)
 
#define PWM_EADCTS0_TRGEN0_Msk   (0x1ul << PWM_EADCTS0_TRGEN0_Pos)
 
#define PWM_EADCTS0_TRGSEL1_Pos   (8)
 
#define PWM_EADCTS0_TRGSEL1_Msk   (0xful << PWM_EADCTS0_TRGSEL1_Pos)
 
#define PWM_EADCTS0_TRGEN1_Pos   (15)
 
#define PWM_EADCTS0_TRGEN1_Msk   (0x1ul << PWM_EADCTS0_TRGEN1_Pos)
 
#define PWM_EADCTS0_TRGSEL2_Pos   (16)
 
#define PWM_EADCTS0_TRGSEL2_Msk   (0xful << PWM_EADCTS0_TRGSEL2_Pos)
 
#define PWM_EADCTS0_TRGEN2_Pos   (23)
 
#define PWM_EADCTS0_TRGEN2_Msk   (0x1ul << PWM_EADCTS0_TRGEN2_Pos)
 
#define PWM_EADCTS0_TRGSEL3_Pos   (24)
 
#define PWM_EADCTS0_TRGSEL3_Msk   (0xful << PWM_EADCTS0_TRGSEL3_Pos)
 
#define PWM_EADCTS0_TRGEN3_Pos   (31)
 
#define PWM_EADCTS0_TRGEN3_Msk   (0x1ul << PWM_EADCTS0_TRGEN3_Pos)
 
#define PWM_EADCTS1_TRGSEL4_Pos   (0)
 
#define PWM_EADCTS1_TRGSEL4_Msk   (0xful << PWM_EADCTS1_TRGSEL4_Pos)
 
#define PWM_EADCTS1_TRGEN4_Pos   (7)
 
#define PWM_EADCTS1_TRGEN4_Msk   (0x1ul << PWM_EADCTS1_TRGEN4_Pos)
 
#define PWM_EADCTS1_TRGSEL5_Pos   (8)
 
#define PWM_EADCTS1_TRGSEL5_Msk   (0xful << PWM_EADCTS1_TRGSEL5_Pos)
 
#define PWM_EADCTS1_TRGEN5_Pos   (15)
 
#define PWM_EADCTS1_TRGEN5_Msk   (0x1ul << PWM_EADCTS1_TRGEN5_Pos)
 
#define PWM_FTCMPDAT0_1_FTCMP_Pos   (0)
 
#define PWM_FTCMPDAT0_1_FTCMP_Msk   (0xfffful << PWM_FTCMPDAT0_1_FTCMP_Pos)
 
#define PWM_FTCMPDAT2_3_FTCMP_Pos   (0)
 
#define PWM_FTCMPDAT2_3_FTCMP_Msk   (0xfffful << PWM_FTCMPDAT2_3_FTCMP_Pos)
 
#define PWM_FTCMPDAT4_5_FTCMP_Pos   (0)
 
#define PWM_FTCMPDAT4_5_FTCMP_Msk   (0xfffful << PWM_FTCMPDAT4_5_FTCMP_Pos)
 
#define PWM_SSCTL_SSENn_Pos   (0)
 
#define PWM_SSCTL_SSENn_Msk   (0x3ful << PWM_SSCTL_SSENn_Pos)
 
#define PWM_SSCTL_SSEN0_Pos   (0)
 
#define PWM_SSCTL_SSEN0_Msk   (0x1ul << PWM_SSCTL_SSEN0_Pos)
 
#define PWM_SSCTL_SSEN1_Pos   (1)
 
#define PWM_SSCTL_SSEN1_Msk   (0x1ul << PWM_SSCTL_SSEN1_Pos)
 
#define PWM_SSCTL_SSEN2_Pos   (2)
 
#define PWM_SSCTL_SSEN2_Msk   (0x1ul << PWM_SSCTL_SSEN2_Pos)
 
#define PWM_SSCTL_SSEN3_Pos   (3)
 
#define PWM_SSCTL_SSEN3_Msk   (0x1ul << PWM_SSCTL_SSEN3_Pos)
 
#define PWM_SSCTL_SSEN4_Pos   (4)
 
#define PWM_SSCTL_SSEN4_Msk   (0x1ul << PWM_SSCTL_SSEN4_Pos)
 
#define PWM_SSCTL_SSEN5_Pos   (5)
 
#define PWM_SSCTL_SSEN5_Msk   (0x1ul << PWM_SSCTL_SSEN5_Pos)
 
#define PWM_SSTRG_CNTSEN_Pos   (0)
 
#define PWM_SSTRG_CNTSEN_Msk   (0x1ul << PWM_SSTRG_CNTSEN_Pos)
 
#define PWM_STATUS_CNTMAXFn_Pos   (0)
 
#define PWM_STATUS_CNTMAXFn_Msk   (0x3ful << PWM_STATUS_CNTMAXFn_Pos)
 
#define PWM_STATUS_CNTMAXF0_Pos   (0)
 
#define PWM_STATUS_CNTMAXF0_Msk   (0x1ul << PWM_STATUS_CNTMAXF0_Pos)
 
#define PWM_STATUS_CNTMAXF1_Pos   (1)
 
#define PWM_STATUS_CNTMAXF1_Msk   (0x1ul << PWM_STATUS_CNTMAXF1_Pos)
 
#define PWM_STATUS_CNTMAXF2_Pos   (2)
 
#define PWM_STATUS_CNTMAXF2_Msk   (0x1ul << PWM_STATUS_CNTMAXF2_Pos)
 
#define PWM_STATUS_CNTMAXF3_Pos   (3)
 
#define PWM_STATUS_CNTMAXF3_Msk   (0x1ul << PWM_STATUS_CNTMAXF3_Pos)
 
#define PWM_STATUS_CNTMAXF4_Pos   (4)
 
#define PWM_STATUS_CNTMAXF4_Msk   (0x1ul << PWM_STATUS_CNTMAXF4_Pos)
 
#define PWM_STATUS_CNTMAXF5_Pos   (5)
 
#define PWM_STATUS_CNTMAXF5_Msk   (0x1ul << PWM_STATUS_CNTMAXF5_Pos)
 
#define PWM_STATUS_SYNCINFn_Pos   (8)
 
#define PWM_STATUS_SYNCINFn_Msk   (0x7ul << PWM_STATUS_SYNCINFn_Pos)
 
#define PWM_STATUS_SYNCINF0_Pos   (8)
 
#define PWM_STATUS_SYNCINF0_Msk   (0x1ul << PWM_STATUS_SYNCINF0_Pos)
 
#define PWM_STATUS_SYNCINF2_Pos   (9)
 
#define PWM_STATUS_SYNCINF2_Msk   (0x1ul << PWM_STATUS_SYNCINF2_Pos)
 
#define PWM_STATUS_SYNCINF4_Pos   (10)
 
#define PWM_STATUS_SYNCINF4_Msk   (0x1ul << PWM_STATUS_SYNCINF4_Pos)
 
#define PWM_STATUS_ADCTRGFn_Pos   (16)
 
#define PWM_STATUS_ADCTRGFn_Msk   (0x3ful << PWM_STATUS_ADCTRGFn_Pos)
 
#define PWM_STATUS_ADCTRGF0_Pos   (16)
 
#define PWM_STATUS_ADCTRGF0_Msk   (0x1ul << PWM_STATUS_ADCTRGF0_Pos)
 
#define PWM_STATUS_ADCTRGF1_Pos   (17)
 
#define PWM_STATUS_ADCTRGF1_Msk   (0x1ul << PWM_STATUS_ADCTRGF1_Pos)
 
#define PWM_STATUS_ADCTRGF2_Pos   (18)
 
#define PWM_STATUS_ADCTRGF2_Msk   (0x1ul << PWM_STATUS_ADCTRGF2_Pos)
 
#define PWM_STATUS_ADCTRGF3_Pos   (19)
 
#define PWM_STATUS_ADCTRGF3_Msk   (0x1ul << PWM_STATUS_ADCTRGF3_Pos)
 
#define PWM_STATUS_ADCTRGF4_Pos   (20)
 
#define PWM_STATUS_ADCTRGF4_Msk   (0x1ul << PWM_STATUS_ADCTRGF4_Pos)
 
#define PWM_STATUS_ADCTRGF5_Pos   (21)
 
#define PWM_STATUS_ADCTRGF5_Msk   (0x1ul << PWM_STATUS_ADCTRGF5_Pos)
 
#define PWM_CAPINEN_CAPINENn_Pos   (0)
 
#define PWM_CAPINEN_CAPINENn_Msk   (0x3ful << PWM_CAPINEN_CAPINENn_Pos)
 
#define PWM_CAPINEN_CAPINEN0_Pos   (0)
 
#define PWM_CAPINEN_CAPINEN0_Msk   (0x1ul << PWM_CAPINEN_CAPINEN0_Pos)
 
#define PWM_CAPINEN_CAPINEN1_Pos   (1)
 
#define PWM_CAPINEN_CAPINEN1_Msk   (0x1ul << PWM_CAPINEN_CAPINEN1_Pos)
 
#define PWM_CAPINEN_CAPINEN2_Pos   (2)
 
#define PWM_CAPINEN_CAPINEN2_Msk   (0x1ul << PWM_CAPINEN_CAPINEN2_Pos)
 
#define PWM_CAPINEN_CAPINEN3_Pos   (3)
 
#define PWM_CAPINEN_CAPINEN3_Msk   (0x1ul << PWM_CAPINEN_CAPINEN3_Pos)
 
#define PWM_CAPINEN_CAPINEN4_Pos   (4)
 
#define PWM_CAPINEN_CAPINEN4_Msk   (0x1ul << PWM_CAPINEN_CAPINEN4_Pos)
 
#define PWM_CAPINEN_CAPINEN5_Pos   (5)
 
#define PWM_CAPINEN_CAPINEN5_Msk   (0x1ul << PWM_CAPINEN_CAPINEN5_Pos)
 
#define PWM_CAPCTL_CAPENn_Pos   (0)
 
#define PWM_CAPCTL_CAPENn_Msk   (0x3ful << PWM_CAPCTL_CAPENn_Pos)
 
#define PWM_CAPCTL_CAPEN0_Pos   (0)
 
#define PWM_CAPCTL_CAPEN0_Msk   (0x1ul << PWM_CAPCTL_CAPEN0_Pos)
 
#define PWM_CAPCTL_CAPEN1_Pos   (1)
 
#define PWM_CAPCTL_CAPEN1_Msk   (0x1ul << PWM_CAPCTL_CAPEN1_Pos)
 
#define PWM_CAPCTL_CAPEN2_Pos   (2)
 
#define PWM_CAPCTL_CAPEN2_Msk   (0x1ul << PWM_CAPCTL_CAPEN2_Pos)
 
#define PWM_CAPCTL_CAPEN3_Pos   (3)
 
#define PWM_CAPCTL_CAPEN3_Msk   (0x1ul << PWM_CAPCTL_CAPEN3_Pos)
 
#define PWM_CAPCTL_CAPEN4_Pos   (4)
 
#define PWM_CAPCTL_CAPEN4_Msk   (0x1ul << PWM_CAPCTL_CAPEN4_Pos)
 
#define PWM_CAPCTL_CAPEN5_Pos   (5)
 
#define PWM_CAPCTL_CAPEN5_Msk   (0x1ul << PWM_CAPCTL_CAPEN5_Pos)
 
#define PWM_CAPCTL_CAPINVn_Pos   (8)
 
#define PWM_CAPCTL_CAPINVn_Msk   (0x3ful << PWM_CAPCTL_CAPINVn_Pos)
 
#define PWM_CAPCTL_CAPINV0_Pos   (8)
 
#define PWM_CAPCTL_CAPINV0_Msk   (0x1ul << PWM_CAPCTL_CAPINV0_Pos)
 
#define PWM_CAPCTL_CAPINV1_Pos   (9)
 
#define PWM_CAPCTL_CAPINV1_Msk   (0x1ul << PWM_CAPCTL_CAPINV1_Pos)
 
#define PWM_CAPCTL_CAPINV2_Pos   (10)
 
#define PWM_CAPCTL_CAPINV2_Msk   (0x1ul << PWM_CAPCTL_CAPINV2_Pos)
 
#define PWM_CAPCTL_CAPINV3_Pos   (11)
 
#define PWM_CAPCTL_CAPINV3_Msk   (0x1ul << PWM_CAPCTL_CAPINV3_Pos)
 
#define PWM_CAPCTL_CAPINV4_Pos   (12)
 
#define PWM_CAPCTL_CAPINV4_Msk   (0x1ul << PWM_CAPCTL_CAPINV4_Pos)
 
#define PWM_CAPCTL_CAPINV5_Pos   (13)
 
#define PWM_CAPCTL_CAPINV5_Msk   (0x1ul << PWM_CAPCTL_CAPINV5_Pos)
 
#define PWM_CAPCTL_RCRLDENn_Pos   (16)
 
#define PWM_CAPCTL_RCRLDENn_Msk   (0x3ful << PWM_CAPCTL_RCRLDENn_Pos)
 
#define PWM_CAPCTL_RCRLDEN0_Pos   (16)
 
#define PWM_CAPCTL_RCRLDEN0_Msk   (0x1ul << PWM_CAPCTL_RCRLDEN0_Pos)
 
#define PWM_CAPCTL_RCRLDEN1_Pos   (17)
 
#define PWM_CAPCTL_RCRLDEN1_Msk   (0x1ul << PWM_CAPCTL_RCRLDEN1_Pos)
 
#define PWM_CAPCTL_RCRLDEN2_Pos   (18)
 
#define PWM_CAPCTL_RCRLDEN2_Msk   (0x1ul << PWM_CAPCTL_RCRLDEN2_Pos)
 
#define PWM_CAPCTL_RCRLDEN3_Pos   (19)
 
#define PWM_CAPCTL_RCRLDEN3_Msk   (0x1ul << PWM_CAPCTL_RCRLDEN3_Pos)
 
#define PWM_CAPCTL_RCRLDEN4_Pos   (20)
 
#define PWM_CAPCTL_RCRLDEN4_Msk   (0x1ul << PWM_CAPCTL_RCRLDEN4_Pos)
 
#define PWM_CAPCTL_RCRLDEN5_Pos   (21)
 
#define PWM_CAPCTL_RCRLDEN5_Msk   (0x1ul << PWM_CAPCTL_RCRLDEN5_Pos)
 
#define PWM_CAPCTL_FCRLDENn_Pos   (24)
 
#define PWM_CAPCTL_FCRLDENn_Msk   (0x3ful << PWM_CAPCTL_FCRLDENn_Pos)
 
#define PWM_CAPCTL_FCRLDEN0_Pos   (24)
 
#define PWM_CAPCTL_FCRLDEN0_Msk   (0x1ul << PWM_CAPCTL_FCRLDEN0_Pos)
 
#define PWM_CAPCTL_FCRLDEN1_Pos   (25)
 
#define PWM_CAPCTL_FCRLDEN1_Msk   (0x1ul << PWM_CAPCTL_FCRLDEN1_Pos)
 
#define PWM_CAPCTL_FCRLDEN2_Pos   (26)
 
#define PWM_CAPCTL_FCRLDEN2_Msk   (0x1ul << PWM_CAPCTL_FCRLDEN2_Pos)
 
#define PWM_CAPCTL_FCRLDEN3_Pos   (27)
 
#define PWM_CAPCTL_FCRLDEN3_Msk   (0x1ul << PWM_CAPCTL_FCRLDEN3_Pos)
 
#define PWM_CAPCTL_FCRLDEN4_Pos   (28)
 
#define PWM_CAPCTL_FCRLDEN4_Msk   (0x1ul << PWM_CAPCTL_FCRLDEN4_Pos)
 
#define PWM_CAPCTL_FCRLDEN5_Pos   (29)
 
#define PWM_CAPCTL_FCRLDEN5_Msk   (0x1ul << PWM_CAPCTL_FCRLDEN5_Pos)
 
#define PWM_CAPSTS_CRLIFOVn_Pos   (0)
 
#define PWM_CAPSTS_CRLIFOVn_Msk   (0x3ful << PWM_CAPSTS_CRLIFOVn_Pos)
 
#define PWM_CAPSTS_CRLIFOV0_Pos   (0)
 
#define PWM_CAPSTS_CRLIFOV0_Msk   (0x1ul << PWM_CAPSTS_CRLIFOV0_Pos)
 
#define PWM_CAPSTS_CRLIFOV1_Pos   (1)
 
#define PWM_CAPSTS_CRLIFOV1_Msk   (0x1ul << PWM_CAPSTS_CRLIFOV1_Pos)
 
#define PWM_CAPSTS_CRLIFOV2_Pos   (2)
 
#define PWM_CAPSTS_CRLIFOV2_Msk   (0x1ul << PWM_CAPSTS_CRLIFOV2_Pos)
 
#define PWM_CAPSTS_CRLIFOV3_Pos   (3)
 
#define PWM_CAPSTS_CRLIFOV3_Msk   (0x1ul << PWM_CAPSTS_CRLIFOV3_Pos)
 
#define PWM_CAPSTS_CRLIFOV4_Pos   (4)
 
#define PWM_CAPSTS_CRLIFOV4_Msk   (0x1ul << PWM_CAPSTS_CRLIFOV4_Pos)
 
#define PWM_CAPSTS_CRLIFOV5_Pos   (5)
 
#define PWM_CAPSTS_CRLIFOV5_Msk   (0x1ul << PWM_CAPSTS_CRLIFOV5_Pos)
 
#define PWM_CAPSTS_CFLIFOVn_Pos   (8)
 
#define PWM_CAPSTS_CFLIFOVn_Msk   (0x3ful << PWM_CAPSTS_CFLIFOVn_Pos)
 
#define PWM_CAPSTS_CFLIFOV0_Pos   (8)
 
#define PWM_CAPSTS_CFLIFOV0_Msk   (0x1ul << PWM_CAPSTS_CFLIFOV0_Pos)
 
#define PWM_CAPSTS_CFLIFOV1_Pos   (9)
 
#define PWM_CAPSTS_CFLIFOV1_Msk   (0x1ul << PWM_CAPSTS_CFLIFOV1_Pos)
 
#define PWM_CAPSTS_CFLIFOV2_Pos   (10)
 
#define PWM_CAPSTS_CFLIFOV2_Msk   (0x1ul << PWM_CAPSTS_CFLIFOV2_Pos)
 
#define PWM_CAPSTS_CFLIFOV3_Pos   (11)
 
#define PWM_CAPSTS_CFLIFOV3_Msk   (0x1ul << PWM_CAPSTS_CFLIFOV3_Pos)
 
#define PWM_CAPSTS_CFLIFOV4_Pos   (12)
 
#define PWM_CAPSTS_CFLIFOV4_Msk   (0x1ul << PWM_CAPSTS_CFLIFOV4_Pos)
 
#define PWM_CAPSTS_CFLIFOV5_Pos   (13)
 
#define PWM_CAPSTS_CFLIFOV5_Msk   (0x1ul << PWM_CAPSTS_CFLIFOV5_Pos)
 
#define PWM_RCAPDAT0_RCAPDAT_Pos   (0)
 
#define PWM_RCAPDAT0_RCAPDAT_Msk   (0xfffful << PWM_RCAPDAT0_RCAPDAT_Pos)
 
#define PWM_FCAPDAT0_FCAPDAT_Pos   (0)
 
#define PWM_FCAPDAT0_FCAPDAT_Msk   (0xfffful << PWM_FCAPDAT0_FCAPDAT_Pos)
 
#define PWM_RCAPDAT1_RCAPDAT_Pos   (0)
 
#define PWM_RCAPDAT1_RCAPDAT_Msk   (0xfffful << PWM_RCAPDAT1_RCAPDAT_Pos)
 
#define PWM_FCAPDAT1_FCAPDAT_Pos   (0)
 
#define PWM_FCAPDAT1_FCAPDAT_Msk   (0xfffful << PWM_FCAPDAT1_FCAPDAT_Pos)
 
#define PWM_RCAPDAT2_RCAPDAT_Pos   (0)
 
#define PWM_RCAPDAT2_RCAPDAT_Msk   (0xfffful << PWM_RCAPDAT2_RCAPDAT_Pos)
 
#define PWM_FCAPDAT2_FCAPDAT_Pos   (0)
 
#define PWM_FCAPDAT2_FCAPDAT_Msk   (0xfffful << PWM_FCAPDAT2_FCAPDAT_Pos)
 
#define PWM_RCAPDAT3_RCAPDAT_Pos   (0)
 
#define PWM_RCAPDAT3_RCAPDAT_Msk   (0xfffful << PWM_RCAPDAT3_RCAPDAT_Pos)
 
#define PWM_FCAPDAT3_FCAPDAT_Pos   (0)
 
#define PWM_FCAPDAT3_FCAPDAT_Msk   (0xfffful << PWM_FCAPDAT3_FCAPDAT_Pos)
 
#define PWM_RCAPDAT4_RCAPDAT_Pos   (0)
 
#define PWM_RCAPDAT4_RCAPDAT_Msk   (0xfffful << PWM_RCAPDAT4_RCAPDAT_Pos)
 
#define PWM_FCAPDAT4_FCAPDAT_Pos   (0)
 
#define PWM_FCAPDAT4_FCAPDAT_Msk   (0xfffful << PWM_FCAPDAT4_FCAPDAT_Pos)
 
#define PWM_RCAPDAT5_RCAPDAT_Pos   (0)
 
#define PWM_RCAPDAT5_RCAPDAT_Msk   (0xfffful << PWM_RCAPDAT5_RCAPDAT_Pos)
 
#define PWM_FCAPDAT5_FCAPDAT_Pos   (0)
 
#define PWM_FCAPDAT5_FCAPDAT_Msk   (0xfffful << PWM_FCAPDAT5_FCAPDAT_Pos)
 
#define PWM_PDMACTL_CHEN0_1_Pos   (0)
 
#define PWM_PDMACTL_CHEN0_1_Msk   (0x1ul << PWM_PDMACTL_CHEN0_1_Pos)
 
#define PWM_PDMACTL_CAPMOD0_1_Pos   (1)
 
#define PWM_PDMACTL_CAPMOD0_1_Msk   (0x3ul << PWM_PDMACTL_CAPMOD0_1_Pos)
 
#define PWM_PDMACTL_CAPORD0_1_Pos   (3)
 
#define PWM_PDMACTL_CAPORD0_1_Msk   (0x1ul << PWM_PDMACTL_CAPORD0_1_Pos)
 
#define PWM_PDMACTL_CHSEL0_1_Pos   (4)
 
#define PWM_PDMACTL_CHSEL0_1_Msk   (0x1ul << PWM_PDMACTL_CHSEL0_1_Pos)
 
#define PWM_PDMACTL_CHEN2_3_Pos   (8)
 
#define PWM_PDMACTL_CHEN2_3_Msk   (0x1ul << PWM_PDMACTL_CHEN2_3_Pos)
 
#define PWM_PDMACTL_CAPMOD2_3_Pos   (9)
 
#define PWM_PDMACTL_CAPMOD2_3_Msk   (0x3ul << PWM_PDMACTL_CAPMOD2_3_Pos)
 
#define PWM_PDMACTL_CAPORD2_3_Pos   (11)
 
#define PWM_PDMACTL_CAPORD2_3_Msk   (0x1ul << PWM_PDMACTL_CAPORD2_3_Pos)
 
#define PWM_PDMACTL_CHSEL2_3_Pos   (12)
 
#define PWM_PDMACTL_CHSEL2_3_Msk   (0x1ul << PWM_PDMACTL_CHSEL2_3_Pos)
 
#define PWM_PDMACTL_CHEN4_5_Pos   (16)
 
#define PWM_PDMACTL_CHEN4_5_Msk   (0x1ul << PWM_PDMACTL_CHEN4_5_Pos)
 
#define PWM_PDMACTL_CAPMOD4_5_Pos   (17)
 
#define PWM_PDMACTL_CAPMOD4_5_Msk   (0x3ul << PWM_PDMACTL_CAPMOD4_5_Pos)
 
#define PWM_PDMACTL_CAPORD4_5_Pos   (19)
 
#define PWM_PDMACTL_CAPORD4_5_Msk   (0x1ul << PWM_PDMACTL_CAPORD4_5_Pos)
 
#define PWM_PDMACTL_CHSEL4_5_Pos   (20)
 
#define PWM_PDMACTL_CHSEL4_5_Msk   (0x1ul << PWM_PDMACTL_CHSEL4_5_Pos)
 
#define PWM_PDMACAP0_1_CAPBUF_Pos   (0)
 
#define PWM_PDMACAP0_1_CAPBUF_Msk   (0xfffful << PWM_PDMACAP0_1_CAPBUF_Pos)
 
#define PWM_PDMACAP2_3_CAPBUF_Pos   (0)
 
#define PWM_PDMACAP2_3_CAPBUF_Msk   (0xfffful << PWM_PDMACAP2_3_CAPBUF_Pos)
 
#define PWM_PDMACAP4_5_CAPBUF_Pos   (0)
 
#define PWM_PDMACAP4_5_CAPBUF_Msk   (0xfffful << PWM_PDMACAP4_5_CAPBUF_Pos)
 
#define PWM_CAPIEN_CAPRIENn_Pos   (0)
 
#define PWM_CAPIEN_CAPRIENn_Msk   (0x3ful << PWM_CAPIEN_CAPRIENn_Pos)
 
#define PWM_CAPIEN_CAPRIEN0_Pos   (0)
 
#define PWM_CAPIEN_CAPRIEN0_Msk   (0x1ul << PWM_CAPIEN_CAPRIEN0_Pos)
 
#define PWM_CAPIEN_CAPRIEN1_Pos   (1)
 
#define PWM_CAPIEN_CAPRIEN1_Msk   (0x1ul << PWM_CAPIEN_CAPRIEN1_Pos)
 
#define PWM_CAPIEN_CAPRIEN2_Pos   (2)
 
#define PWM_CAPIEN_CAPRIEN2_Msk   (0x1ul << PWM_CAPIEN_CAPRIEN2_Pos)
 
#define PWM_CAPIEN_CAPRIEN3_Pos   (3)
 
#define PWM_CAPIEN_CAPRIEN3_Msk   (0x1ul << PWM_CAPIEN_CAPRIEN3_Pos)
 
#define PWM_CAPIEN_CAPRIEN4_Pos   (4)
 
#define PWM_CAPIEN_CAPRIEN4_Msk   (0x1ul << PWM_CAPIEN_CAPRIEN4_Pos)
 
#define PWM_CAPIEN_CAPRIEN5_Pos   (5)
 
#define PWM_CAPIEN_CAPRIEN5_Msk   (0x1ul << PWM_CAPIEN_CAPRIEN5_Pos)
 
#define PWM_CAPIEN_CAPFIENn_Pos   (8)
 
#define PWM_CAPIEN_CAPFIENn_Msk   (0x3ful << PWM_CAPIEN_CAPFIENn_Pos)
 
#define PWM_CAPIEN_CAPFIEN0_Pos   (8)
 
#define PWM_CAPIEN_CAPFIEN0_Msk   (0x1ul << PWM_CAPIEN_CAPFIEN0_Pos)
 
#define PWM_CAPIEN_CAPFIEN1_Pos   (9)
 
#define PWM_CAPIEN_CAPFIEN1_Msk   (0x1ul << PWM_CAPIEN_CAPFIEN1_Pos)
 
#define PWM_CAPIEN_CAPFIEN2_Pos   (10)
 
#define PWM_CAPIEN_CAPFIEN2_Msk   (0x1ul << PWM_CAPIEN_CAPFIEN2_Pos)
 
#define PWM_CAPIEN_CAPFIEN3_Pos   (11)
 
#define PWM_CAPIEN_CAPFIEN3_Msk   (0x1ul << PWM_CAPIEN_CAPFIEN3_Pos)
 
#define PWM_CAPIEN_CAPFIEN4_Pos   (12)
 
#define PWM_CAPIEN_CAPFIEN4_Msk   (0x1ul << PWM_CAPIEN_CAPFIEN4_Pos)
 
#define PWM_CAPIEN_CAPFIEN5_Pos   (13)
 
#define PWM_CAPIEN_CAPFIEN5_Msk   (0x1ul << PWM_CAPIEN_CAPFIEN5_Pos)
 
#define PWM_CAPIF_CRLIFn_Pos   (0)
 
#define PWM_CAPIF_CRLIFn_Msk   (0x3ful << PWM_CAPIF_CRLIFn_Pos)
 
#define PWM_CAPIF_CRLIF0_Pos   (0)
 
#define PWM_CAPIF_CRLIF0_Msk   (0x1ul << PWM_CAPIF_CRLIF0_Pos)
 
#define PWM_CAPIF_CRLIF1_Pos   (1)
 
#define PWM_CAPIF_CRLIF1_Msk   (0x1ul << PWM_CAPIF_CRLIF1_Pos)
 
#define PWM_CAPIF_CRLIF2_Pos   (2)
 
#define PWM_CAPIF_CRLIF2_Msk   (0x1ul << PWM_CAPIF_CRLIF2_Pos)
 
#define PWM_CAPIF_CRLIF3_Pos   (3)
 
#define PWM_CAPIF_CRLIF3_Msk   (0x1ul << PWM_CAPIF_CRLIF3_Pos)
 
#define PWM_CAPIF_CRLIF4_Pos   (4)
 
#define PWM_CAPIF_CRLIF4_Msk   (0x1ul << PWM_CAPIF_CRLIF4_Pos)
 
#define PWM_CAPIF_CRLIF5_Pos   (5)
 
#define PWM_CAPIF_CRLIF5_Msk   (0x1ul << PWM_CAPIF_CRLIF5_Pos)
 
#define PWM_CAPIF_CFLIFn_Pos   (8)
 
#define PWM_CAPIF_CFLIFn_Msk   (0x3ful << PWM_CAPIF_CFLIFn_Pos)
 
#define PWM_CAPIF_CFLIF0_Pos   (8)
 
#define PWM_CAPIF_CFLIF0_Msk   (0x1ul << PWM_CAPIF_CFLIF0_Pos)
 
#define PWM_CAPIF_CFLIF1_Pos   (9)
 
#define PWM_CAPIF_CFLIF1_Msk   (0x1ul << PWM_CAPIF_CFLIF1_Pos)
 
#define PWM_CAPIF_CFLIF2_Pos   (10)
 
#define PWM_CAPIF_CFLIF2_Msk   (0x1ul << PWM_CAPIF_CFLIF2_Pos)
 
#define PWM_CAPIF_CFLIF3_Pos   (11)
 
#define PWM_CAPIF_CFLIF3_Msk   (0x1ul << PWM_CAPIF_CFLIF3_Pos)
 
#define PWM_CAPIF_CFLIF4_Pos   (12)
 
#define PWM_CAPIF_CFLIF4_Msk   (0x1ul << PWM_CAPIF_CFLIF4_Pos)
 
#define PWM_CAPIF_CFLIF5_Pos   (13)
 
#define PWM_CAPIF_CFLIF5_Msk   (0x1ul << PWM_CAPIF_CFLIF5_Pos)
 
#define PWM_PBUF_PBUF_Pos   (0)
 
#define PWM_PBUF_PBUF_Msk   (0xfffful << PWM_PBUF_PBUF_Pos)
 
#define PWM_CMPBUF_CMPBUF_Pos   (0)
 
#define PWM_CMPBUF_CMPBUF_Msk   (0xfffful << PWM_CMPBUF_CMPBUF_Pos)
 
#define PWM_FTCBUF0_1_FTCMPBUF_Pos   (0)
 
#define PWM_FTCBUF0_1_FTCMPBUF_Msk   (0xfffful << PWM_FTCBUF0_1_FTCMPBUF_Pos)
 
#define PWM_FTCBUF2_3_FTCMPBUF_Pos   (0)
 
#define PWM_FTCBUF2_3_FTCMPBUF_Msk   (0xfffful << PWM_FTCBUF2_3_FTCMPBUF_Pos)
 
#define PWM_FTCBUF4_5_FTCMPBUF_Pos   (0)
 
#define PWM_FTCBUF4_5_FTCMPBUF_Msk   (0xfffful << PWM_FTCBUF4_5_FTCMPBUF_Pos)
 
#define PWM_FTCI_FTCMUn_Pos   (0)
 
#define PWM_FTCI_FTCMUn_Msk   (0x7ul << PWM_FTCI_FTCMUn_Pos)
 
#define PWM_FTCI_FTCMU0_Pos   (0)
 
#define PWM_FTCI_FTCMU0_Msk   (0x1ul << PWM_FTCI_FTCMU0_Pos)
 
#define PWM_FTCI_FTCMU2_Pos   (1)
 
#define PWM_FTCI_FTCMU2_Msk   (0x1ul << PWM_FTCI_FTCMU2_Pos)
 
#define PWM_FTCI_FTCMU4_Pos   (2)
 
#define PWM_FTCI_FTCMU4_Msk   (0x1ul << PWM_FTCI_FTCMU4_Pos)
 
#define PWM_FTCI_FTCMDn_Pos   (8)
 
#define PWM_FTCI_FTCMDn_Msk   (0x7ul << PWM_FTCI_FTCMDn_Pos)
 
#define PWM_FTCI_FTCMD0_Pos   (8)
 
#define PWM_FTCI_FTCMD0_Msk   (0x1ul << PWM_FTCI_FTCMD0_Pos)
 
#define PWM_FTCI_FTCMD2_Pos   (9)
 
#define PWM_FTCI_FTCMD2_Msk   (0x1ul << PWM_FTCI_FTCMD2_Pos)
 
#define PWM_FTCI_FTCMD4_Pos   (10)
 
#define PWM_FTCI_FTCMD4_Msk   (0x1ul << PWM_FTCI_FTCMD4_Pos)
 
#define RTC_INIT_ACTIVE_Pos   (0)
 
#define RTC_INIT_ACTIVE_Msk   (0x1ul << RTC_INIT_ACTIVE_Pos)
 
#define RTC_INIT_INIT_Pos   (0)
 
#define RTC_INIT_INIT_Msk   (0xfffffffful << RTC_INIT_INIT_Pos)
 
#define RTC_RWEN_RWEN_Pos   (0)
 
#define RTC_RWEN_RWEN_Msk   (0xfffful << RTC_RWEN_RWEN_Pos)
 
#define RTC_RWEN_RWENF_Pos   (16)
 
#define RTC_RWEN_RWENF_Msk   (0x1ul << RTC_RWEN_RWENF_Pos)
 
#define RTC_FREQADJ_FRACTION_Pos   (0)
 
#define RTC_FREQADJ_FRACTION_Msk   (0x3ful << RTC_FREQADJ_FRACTION_Pos)
 
#define RTC_FREQADJ_INTEGER_Pos   (8)
 
#define RTC_FREQADJ_INTEGER_Msk   (0xful << RTC_FREQADJ_INTEGER_Pos)
 
#define RTC_TIME_SEC_Pos   (0)
 
#define RTC_TIME_SEC_Msk   (0xful << RTC_TIME_SEC_Pos)
 
#define RTC_TIME_TENSEC_Pos   (4)
 
#define RTC_TIME_TENSEC_Msk   (0x7ul << RTC_TIME_TENSEC_Pos)
 
#define RTC_TIME_MIN_Pos   (8)
 
#define RTC_TIME_MIN_Msk   (0xful << RTC_TIME_MIN_Pos)
 
#define RTC_TIME_TENMIN_Pos   (12)
 
#define RTC_TIME_TENMIN_Msk   (0x7ul << RTC_TIME_TENMIN_Pos)
 
#define RTC_TIME_HR_Pos   (16)
 
#define RTC_TIME_HR_Msk   (0xful << RTC_TIME_HR_Pos)
 
#define RTC_TIME_TENHR_Pos   (20)
 
#define RTC_TIME_TENHR_Msk   (0x3ul << RTC_TIME_TENHR_Pos)
 
#define RTC_CAL_DAY_Pos   (0)
 
#define RTC_CAL_DAY_Msk   (0xful << RTC_CAL_DAY_Pos)
 
#define RTC_CAL_TENDAY_Pos   (4)
 
#define RTC_CAL_TENDAY_Msk   (0x3ul << RTC_CAL_TENDAY_Pos)
 
#define RTC_CAL_MON_Pos   (8)
 
#define RTC_CAL_MON_Msk   (0xful << RTC_CAL_MON_Pos)
 
#define RTC_CAL_TENMON_Pos   (12)
 
#define RTC_CAL_TENMON_Msk   (0x1ul << RTC_CAL_TENMON_Pos)
 
#define RTC_CAL_YEAR_Pos   (16)
 
#define RTC_CAL_YEAR_Msk   (0xful << RTC_CAL_YEAR_Pos)
 
#define RTC_CAL_TENYEAR_Pos   (20)
 
#define RTC_CAL_TENYEAR_Msk   (0xful << RTC_CAL_TENYEAR_Pos)
 
#define RTC_CLKFMT_24HEN_Pos   (0)
 
#define RTC_CLKFMT_24HEN_Msk   (0x1ul << RTC_CLKFMT_24HEN_Pos)
 
#define RTC_WEEKDAY_WEEKDAY_Pos   (0)
 
#define RTC_WEEKDAY_WEEKDAY_Msk   (0x7ul << RTC_WEEKDAY_WEEKDAY_Pos)
 
#define RTC_TALM_SEC_Pos   (0)
 
#define RTC_TALM_SEC_Msk   (0xful << RTC_TALM_SEC_Pos)
 
#define RTC_TALM_TENSEC_Pos   (4)
 
#define RTC_TALM_TENSEC_Msk   (0x7ul << RTC_TALM_TENSEC_Pos)
 
#define RTC_TALM_MIN_Pos   (8)
 
#define RTC_TALM_MIN_Msk   (0xful << RTC_TALM_MIN_Pos)
 
#define RTC_TALM_TENMIN_Pos   (12)
 
#define RTC_TALM_TENMIN_Msk   (0x7ul << RTC_TALM_TENMIN_Pos)
 
#define RTC_TALM_HR_Pos   (16)
 
#define RTC_TALM_HR_Msk   (0xful << RTC_TALM_HR_Pos)
 
#define RTC_TALM_TENHR_Pos   (20)
 
#define RTC_TALM_TENHR_Msk   (0x3ul << RTC_TALM_TENHR_Pos)
 
#define RTC_CALM_DAY_Pos   (0)
 
#define RTC_CALM_DAY_Msk   (0xful << RTC_CALM_DAY_Pos)
 
#define RTC_CALM_TENDAY_Pos   (4)
 
#define RTC_CALM_TENDAY_Msk   (0x3ul << RTC_CALM_TENDAY_Pos)
 
#define RTC_CALM_MON_Pos   (8)
 
#define RTC_CALM_MON_Msk   (0xful << RTC_CALM_MON_Pos)
 
#define RTC_CALM_TENMON_Pos   (12)
 
#define RTC_CALM_TENMON_Msk   (0x1ul << RTC_CALM_TENMON_Pos)
 
#define RTC_CALM_YEAR_Pos   (16)
 
#define RTC_CALM_YEAR_Msk   (0xful << RTC_CALM_YEAR_Pos)
 
#define RTC_CALM_TENYEAR_Pos   (20)
 
#define RTC_CALM_TENYEAR_Msk   (0xful << RTC_CALM_TENYEAR_Pos)
 
#define RTC_LEAPYEAR_LEAPYEAR_Pos   (0)
 
#define RTC_LEAPYEAR_LEAPYEAR_Msk   (0x1ul << RTC_LEAPYEAR_LEAPYEAR_Pos)
 
#define RTC_INTEN_ALMIEN_Pos   (0)
 
#define RTC_INTEN_ALMIEN_Msk   (0x1ul << RTC_INTEN_ALMIEN_Pos)
 
#define RTC_INTEN_TICKIEN_Pos   (1)
 
#define RTC_INTEN_TICKIEN_Msk   (0x1ul << RTC_INTEN_TICKIEN_Pos)
 
#define RTC_INTEN_SNPDIEN_Pos   (2)
 
#define RTC_INTEN_SNPDIEN_Msk   (0x1ul << RTC_INTEN_SNPDIEN_Pos)
 
#define RTC_INTSTS_ALMIF_Pos   (0)
 
#define RTC_INTSTS_ALMIF_Msk   (0x1ul << RTC_INTSTS_ALMIF_Pos)
 
#define RTC_INTSTS_TICKIF_Pos   (1)
 
#define RTC_INTSTS_TICKIF_Msk   (0x1ul << RTC_INTSTS_TICKIF_Pos)
 
#define RTC_INTSTS_SNPDIF_Pos   (2)
 
#define RTC_INTSTS_SNPDIF_Msk   (0x1ul << RTC_INTSTS_SNPDIF_Pos)
 
#define RTC_TICK_TICK_Pos   (0)
 
#define RTC_TICK_TICK_Msk   (0x7ul << RTC_TICK_TICK_Pos)
 
#define RTC_TAMSK_MSEC_Pos   (0)
 
#define RTC_TAMSK_MSEC_Msk   (0x1ul << RTC_TAMSK_MSEC_Pos)
 
#define RTC_TAMSK_MTENSEC_Pos   (1)
 
#define RTC_TAMSK_MTENSEC_Msk   (0x1ul << RTC_TAMSK_MTENSEC_Pos)
 
#define RTC_TAMSK_MMIN_Pos   (2)
 
#define RTC_TAMSK_MMIN_Msk   (0x1ul << RTC_TAMSK_MMIN_Pos)
 
#define RTC_TAMSK_MTENMIN_Pos   (3)
 
#define RTC_TAMSK_MTENMIN_Msk   (0x1ul << RTC_TAMSK_MTENMIN_Pos)
 
#define RTC_TAMSK_MHR_Pos   (4)
 
#define RTC_TAMSK_MHR_Msk   (0x1ul << RTC_TAMSK_MHR_Pos)
 
#define RTC_TAMSK_MTENHR_Pos   (5)
 
#define RTC_TAMSK_MTENHR_Msk   (0x1ul << RTC_TAMSK_MTENHR_Pos)
 
#define RTC_CAMSK_MDAY_Pos   (0)
 
#define RTC_CAMSK_MDAY_Msk   (0x1ul << RTC_CAMSK_MDAY_Pos)
 
#define RTC_CAMSK_MTENDAY_Pos   (1)
 
#define RTC_CAMSK_MTENDAY_Msk   (0x1ul << RTC_CAMSK_MTENDAY_Pos)
 
#define RTC_CAMSK_MMON_Pos   (2)
 
#define RTC_CAMSK_MMON_Msk   (0x1ul << RTC_CAMSK_MMON_Pos)
 
#define RTC_CAMSK_MTENMON_Pos   (3)
 
#define RTC_CAMSK_MTENMON_Msk   (0x1ul << RTC_CAMSK_MTENMON_Pos)
 
#define RTC_CAMSK_MYEAR_Pos   (4)
 
#define RTC_CAMSK_MYEAR_Msk   (0x1ul << RTC_CAMSK_MYEAR_Pos)
 
#define RTC_CAMSK_MTENYEAR_Pos   (5)
 
#define RTC_CAMSK_MTENYEAR_Msk   (0x1ul << RTC_CAMSK_MTENYEAR_Pos)
 
#define RTC_SPRCTL_SNPDEN_Pos   (0)
 
#define RTC_SPRCTL_SNPDEN_Msk   (0x1ul << RTC_SPRCTL_SNPDEN_Pos)
 
#define RTC_SPRCTL_SNPTYPE0_Pos   (1)
 
#define RTC_SPRCTL_SNPTYPE0_Msk   (0x1ul << RTC_SPRCTL_SNPTYPE0_Pos)
 
#define RTC_SPRCTL_SPRRWEN_Pos   (2)
 
#define RTC_SPRCTL_SPRRWEN_Msk   (0x1ul << RTC_SPRCTL_SPRRWEN_Pos)
 
#define RTC_SPRCTL_SNPTYPE1_Pos   (3)
 
#define RTC_SPRCTL_SNPTYPE1_Msk   (0x1ul << RTC_SPRCTL_SNPTYPE1_Pos)
 
#define RTC_SPRCTL_SPRCSTS_Pos   (5)
 
#define RTC_SPRCTL_SPRCSTS_Msk   (0x1ul << RTC_SPRCTL_SPRCSTS_Pos)
 
#define RTC_SPRCTL_SPRRWRDY_Pos   (7)
 
#define RTC_SPRCTL_SPRRWRDY_Msk   (0x1ul << RTC_SPRCTL_SPRRWRDY_Pos)
 
#define RTC_SPR_SPARE_Pos   (0)
 
#define RTC_SPR_SPARE_Msk   (0xfffffffful << RTC_SPR_SPARE_Pos)
 
#define RTC_LXTCTL_LXTEN_Pos   (0)
 
#define RTC_LXTCTL_LXTEN_Msk   (0x1ul << RTC_LXTCTL_LXTEN_Pos)
 
#define RTC_LXTCTL_GAIN_Pos   (1)
 
#define RTC_LXTCTL_GAIN_Msk   (0x7ul << RTC_LXTCTL_GAIN_Pos)
 
#define RTC_LXTOCTL_OPMODE_Pos   (0)
 
#define RTC_LXTOCTL_OPMODE_Msk   (0x3ul << RTC_LXTOCTL_OPMODE_Pos)
 
#define RTC_LXTOCTL_DOUT_Pos   (2)
 
#define RTC_LXTOCTL_DOUT_Msk   (0x1ul << RTC_LXTOCTL_DOUT_Pos)
 
#define RTC_LXTOCTL_CTLSEL_Pos   (3)
 
#define RTC_LXTOCTL_CTLSEL_Msk   (0x1ul << RTC_LXTOCTL_CTLSEL_Pos)
 
#define RTC_LXTICTL_OPMODE_Pos   (0)
 
#define RTC_LXTICTL_OPMODE_Msk   (0x3ul << RTC_LXTICTL_OPMODE_Pos)
 
#define RTC_LXTICTL_DOUT_Pos   (2)
 
#define RTC_LXTICTL_DOUT_Msk   (0x1ul << RTC_LXTICTL_DOUT_Pos)
 
#define RTC_LXTICTL_CTLSEL_Pos   (3)
 
#define RTC_LXTICTL_CTLSEL_Msk   (0x1ul << RTC_LXTICTL_CTLSEL_Pos)
 
#define RTC_TAMPCTL_OPMODE_Pos   (0)
 
#define RTC_TAMPCTL_OPMODE_Msk   (0x3ul << RTC_TAMPCTL_OPMODE_Pos)
 
#define RTC_TAMPCTL_DOUT_Pos   (2)
 
#define RTC_TAMPCTL_DOUT_Msk   (0x1ul << RTC_TAMPCTL_DOUT_Pos)
 
#define RTC_TAMPCTL_CTLSEL_Pos   (3)
 
#define RTC_TAMPCTL_CTLSEL_Msk   (0x1ul << RTC_TAMPCTL_CTLSEL_Pos)
 
#define SC_DAT_DAT_Pos   (0)
 
#define SC_DAT_DAT_Msk   (0xfful << SC_DAT_DAT_Pos)
 
#define SC_CTL_SCEN_Pos   (0)
 
#define SC_CTL_SCEN_Msk   (0x1ul << SC_CTL_SCEN_Pos)
 
#define SC_CTL_RXOFF_Pos   (1)
 
#define SC_CTL_RXOFF_Msk   (0x1ul << SC_CTL_RXOFF_Pos)
 
#define SC_CTL_TXOFF_Pos   (2)
 
#define SC_CTL_TXOFF_Msk   (0x1ul << SC_CTL_TXOFF_Pos)
 
#define SC_CTL_AUTOCEN_Pos   (3)
 
#define SC_CTL_AUTOCEN_Msk   (0x1ul << SC_CTL_AUTOCEN_Pos)
 
#define SC_CTL_CONSEL_Pos   (4)
 
#define SC_CTL_CONSEL_Msk   (0x3ul << SC_CTL_CONSEL_Pos)
 
#define SC_CTL_RXTRGLV_Pos   (6)
 
#define SC_CTL_RXTRGLV_Msk   (0x3ul << SC_CTL_RXTRGLV_Pos)
 
#define SC_CTL_BGT_Pos   (8)
 
#define SC_CTL_BGT_Msk   (0x1ful << SC_CTL_BGT_Pos)
 
#define SC_CTL_TMRSEL_Pos   (13)
 
#define SC_CTL_TMRSEL_Msk   (0x3ul << SC_CTL_TMRSEL_Pos)
 
#define SC_CTL_NSB_Pos   (15)
 
#define SC_CTL_NSB_Msk   (0x1ul << SC_CTL_NSB_Pos)
 
#define SC_CTL_RXRTY_Pos   (16)
 
#define SC_CTL_RXRTY_Msk   (0x7ul << SC_CTL_RXRTY_Pos)
 
#define SC_CTL_RXRTYEN_Pos   (19)
 
#define SC_CTL_RXRTYEN_Msk   (0x1ul << SC_CTL_RXRTYEN_Pos)
 
#define SC_CTL_TXRTY_Pos   (20)
 
#define SC_CTL_TXRTY_Msk   (0x7ul << SC_CTL_TXRTY_Pos)
 
#define SC_CTL_TXRTYEN_Pos   (23)
 
#define SC_CTL_TXRTYEN_Msk   (0x1ul << SC_CTL_TXRTYEN_Pos)
 
#define SC_CTL_CDDBSEL_Pos   (24)
 
#define SC_CTL_CDDBSEL_Msk   (0x3ul << SC_CTL_CDDBSEL_Pos)
 
#define SC_CTL_CDLV_Pos   (26)
 
#define SC_CTL_CDLV_Msk   (0x1ul << SC_CTL_CDLV_Pos)
 
#define SC_CTL_SYNC_Pos   (30)
 
#define SC_CTL_SYNC_Msk   (0x1ul << SC_CTL_SYNC_Pos)
 
#define SC_CTL_ICEDEBUG_Pos   (31)
 
#define SC_CTL_ICEDEBUG_Msk   (0x1ul << SC_CTL_ICEDEBUG_Pos)
 
#define SC_ALTCTL_TXRST_Pos   (0)
 
#define SC_ALTCTL_TXRST_Msk   (0x1ul << SC_ALTCTL_TXRST_Pos)
 
#define SC_ALTCTL_RXRST_Pos   (1)
 
#define SC_ALTCTL_RXRST_Msk   (0x1ul << SC_ALTCTL_RXRST_Pos)
 
#define SC_ALTCTL_DACTEN_Pos   (2)
 
#define SC_ALTCTL_DACTEN_Msk   (0x1ul << SC_ALTCTL_DACTEN_Pos)
 
#define SC_ALTCTL_ACTEN_Pos   (3)
 
#define SC_ALTCTL_ACTEN_Msk   (0x1ul << SC_ALTCTL_ACTEN_Pos)
 
#define SC_ALTCTL_WARSTEN_Pos   (4)
 
#define SC_ALTCTL_WARSTEN_Msk   (0x1ul << SC_ALTCTL_WARSTEN_Pos)
 
#define SC_ALTCTL_CNTEN0_Pos   (5)
 
#define SC_ALTCTL_CNTEN0_Msk   (0x1ul << SC_ALTCTL_CNTEN0_Pos)
 
#define SC_ALTCTL_CNTEN1_Pos   (6)
 
#define SC_ALTCTL_CNTEN1_Msk   (0x1ul << SC_ALTCTL_CNTEN1_Pos)
 
#define SC_ALTCTL_CNTEN2_Pos   (7)
 
#define SC_ALTCTL_CNTEN2_Msk   (0x1ul << SC_ALTCTL_CNTEN2_Pos)
 
#define SC_ALTCTL_INITSEL_Pos   (8)
 
#define SC_ALTCTL_INITSEL_Msk   (0x3ul << SC_ALTCTL_INITSEL_Pos)
 
#define SC_ALTCTL_ADACEN_Pos   (11)
 
#define SC_ALTCTL_ADACEN_Msk   (0x1ul << SC_ALTCTL_ADACEN_Pos)
 
#define SC_ALTCTL_RXBGTEN_Pos   (12)
 
#define SC_ALTCTL_RXBGTEN_Msk   (0x1ul << SC_ALTCTL_RXBGTEN_Pos)
 
#define SC_ALTCTL_ACTSTS0_Pos   (13)
 
#define SC_ALTCTL_ACTSTS0_Msk   (0x1ul << SC_ALTCTL_ACTSTS0_Pos)
 
#define SC_ALTCTL_ACTSTS1_Pos   (14)
 
#define SC_ALTCTL_ACTSTS1_Msk   (0x1ul << SC_ALTCTL_ACTSTS1_Pos)
 
#define SC_ALTCTL_ACTSTS2_Pos   (15)
 
#define SC_ALTCTL_ACTSTS2_Msk   (0x1ul << SC_ALTCTL_ACTSTS2_Pos)
 
#define SC_ALTCTL_OUTSEL_Pos   (16)
 
#define SC_ALTCTL_OUTSEL_Msk   (0x1ul << SC_ALTCTL_OUTSEL_Pos)
 
#define SC_EGT_EGT_Pos   (0)
 
#define SC_EGT_EGT_Msk   (0xfful << SC_EGT_EGT_Pos)
 
#define SC_RXTOUT_RFTM_Pos   (0)
 
#define SC_RXTOUT_RFTM_Msk   (0x1fful << SC_RXTOUT_RFTM_Pos)
 
#define SC_ETUCTL_ETURDIV_Pos   (0)
 
#define SC_ETUCTL_ETURDIV_Msk   (0xffful << SC_ETUCTL_ETURDIV_Pos)
 
#define SC_ETUCTL_CMPEN_Pos   (15)
 
#define SC_ETUCTL_CMPEN_Msk   (0x1ul << SC_ETUCTL_CMPEN_Pos)
 
#define SC_INTEN_RDAIEN_Pos   (0)
 
#define SC_INTEN_RDAIEN_Msk   (0x1ul << SC_INTEN_RDAIEN_Pos)
 
#define SC_INTEN_TBEIEN_Pos   (1)
 
#define SC_INTEN_TBEIEN_Msk   (0x1ul << SC_INTEN_TBEIEN_Pos)
 
#define SC_INTEN_TERRIEN_Pos   (2)
 
#define SC_INTEN_TERRIEN_Msk   (0x1ul << SC_INTEN_TERRIEN_Pos)
 
#define SC_INTEN_TMR0IEN_Pos   (3)
 
#define SC_INTEN_TMR0IEN_Msk   (0x1ul << SC_INTEN_TMR0IEN_Pos)
 
#define SC_INTEN_TMR1IEN_Pos   (4)
 
#define SC_INTEN_TMR1IEN_Msk   (0x1ul << SC_INTEN_TMR1IEN_Pos)
 
#define SC_INTEN_TMR2IEN_Pos   (5)
 
#define SC_INTEN_TMR2IEN_Msk   (0x1ul << SC_INTEN_TMR2IEN_Pos)
 
#define SC_INTEN_BGTIEN_Pos   (6)
 
#define SC_INTEN_BGTIEN_Msk   (0x1ul << SC_INTEN_BGTIEN_Pos)
 
#define SC_INTEN_CDIEN_Pos   (7)
 
#define SC_INTEN_CDIEN_Msk   (0x1ul << SC_INTEN_CDIEN_Pos)
 
#define SC_INTEN_INITIEN_Pos   (8)
 
#define SC_INTEN_INITIEN_Msk   (0x1ul << SC_INTEN_INITIEN_Pos)
 
#define SC_INTEN_RXTOIF_Pos   (9)
 
#define SC_INTEN_RXTOIF_Msk   (0x1ul << SC_INTEN_RXTOIF_Pos)
 
#define SC_INTEN_ACERRIEN_Pos   (10)
 
#define SC_INTEN_ACERRIEN_Msk   (0x1ul << SC_INTEN_ACERRIEN_Pos)
 
#define SC_INTSTS_RDAIF_Pos   (0)
 
#define SC_INTSTS_RDAIF_Msk   (0x1ul << SC_INTSTS_RDAIF_Pos)
 
#define SC_INTSTS_TBEIF_Pos   (1)
 
#define SC_INTSTS_TBEIF_Msk   (0x1ul << SC_INTSTS_TBEIF_Pos)
 
#define SC_INTSTS_TERRIF_Pos   (2)
 
#define SC_INTSTS_TERRIF_Msk   (0x1ul << SC_INTSTS_TERRIF_Pos)
 
#define SC_INTSTS_TMR0IF_Pos   (3)
 
#define SC_INTSTS_TMR0IF_Msk   (0x1ul << SC_INTSTS_TMR0IF_Pos)
 
#define SC_INTSTS_TMR1IF_Pos   (4)
 
#define SC_INTSTS_TMR1IF_Msk   (0x1ul << SC_INTSTS_TMR1IF_Pos)
 
#define SC_INTSTS_TMR2IF_Pos   (5)
 
#define SC_INTSTS_TMR2IF_Msk   (0x1ul << SC_INTSTS_TMR2IF_Pos)
 
#define SC_INTSTS_BGTIF_Pos   (6)
 
#define SC_INTSTS_BGTIF_Msk   (0x1ul << SC_INTSTS_BGTIF_Pos)
 
#define SC_INTSTS_CDIF_Pos   (7)
 
#define SC_INTSTS_CDIF_Msk   (0x1ul << SC_INTSTS_CDIF_Pos)
 
#define SC_INTSTS_INITIF_Pos   (8)
 
#define SC_INTSTS_INITIF_Msk   (0x1ul << SC_INTSTS_INITIF_Pos)
 
#define SC_INTSTS_RBTOIF_Pos   (9)
 
#define SC_INTSTS_RBTOIF_Msk   (0x1ul << SC_INTSTS_RBTOIF_Pos)
 
#define SC_INTSTS_ACERRIF_Pos   (10)
 
#define SC_INTSTS_ACERRIF_Msk   (0x1ul << SC_INTSTS_ACERRIF_Pos)
 
#define SC_STATUS_RXOV_Pos   (0)
 
#define SC_STATUS_RXOV_Msk   (0x1ul << SC_STATUS_RXOV_Pos)
 
#define SC_STATUS_RXEMPTY_Pos   (1)
 
#define SC_STATUS_RXEMPTY_Msk   (0x1ul << SC_STATUS_RXEMPTY_Pos)
 
#define SC_STATUS_RXFULL_Pos   (2)
 
#define SC_STATUS_RXFULL_Msk   (0x1ul << SC_STATUS_RXFULL_Pos)
 
#define SC_STATUS_PEF_Pos   (4)
 
#define SC_STATUS_PEF_Msk   (0x1ul << SC_STATUS_PEF_Pos)
 
#define SC_STATUS_FEF_Pos   (5)
 
#define SC_STATUS_FEF_Msk   (0x1ul << SC_STATUS_FEF_Pos)
 
#define SC_STATUS_BEF_Pos   (6)
 
#define SC_STATUS_BEF_Msk   (0x1ul << SC_STATUS_BEF_Pos)
 
#define SC_STATUS_TXOV_Pos   (8)
 
#define SC_STATUS_TXOV_Msk   (0x1ul << SC_STATUS_TXOV_Pos)
 
#define SC_STATUS_TXEMPTY_Pos   (9)
 
#define SC_STATUS_TXEMPTY_Msk   (0x1ul << SC_STATUS_TXEMPTY_Pos)
 
#define SC_STATUS_TXFULL_Pos   (10)
 
#define SC_STATUS_TXFULL_Msk   (0x1ul << SC_STATUS_TXFULL_Pos)
 
#define SC_STATUS_CREMOVE_Pos   (11)
 
#define SC_STATUS_CREMOVE_Msk   (0x1ul << SC_STATUS_CREMOVE_Pos)
 
#define SC_STATUS_CINSERT_Pos   (12)
 
#define SC_STATUS_CINSERT_Msk   (0x1ul << SC_STATUS_CINSERT_Pos)
 
#define SC_STATUS_CDPINSTS_Pos   (13)
 
#define SC_STATUS_CDPINSTS_Msk   (0x1ul << SC_STATUS_CDPINSTS_Pos)
 
#define SC_STATUS_RXPOINT_Pos   (16)
 
#define SC_STATUS_RXPOINT_Msk   (0x3ul << SC_STATUS_RXPOINT_Pos)
 
#define SC_STATUS_RXRERR_Pos   (21)
 
#define SC_STATUS_RXRERR_Msk   (0x1ul << SC_STATUS_RXRERR_Pos)
 
#define SC_STATUS_RXOVERR_Pos   (22)
 
#define SC_STATUS_RXOVERR_Msk   (0x1ul << SC_STATUS_RXOVERR_Pos)
 
#define SC_STATUS_RXACT_Pos   (23)
 
#define SC_STATUS_RXACT_Msk   (0x1ul << SC_STATUS_RXACT_Pos)
 
#define SC_STATUS_TXPOINT_Pos   (24)
 
#define SC_STATUS_TXPOINT_Msk   (0x3ul << SC_STATUS_TXPOINT_Pos)
 
#define SC_STATUS_TXRERR_Pos   (29)
 
#define SC_STATUS_TXRERR_Msk   (0x1ul << SC_STATUS_TXRERR_Pos)
 
#define SC_STATUS_TXOVERR_Pos   (30)
 
#define SC_STATUS_TXOVERR_Msk   (0x1ul << SC_STATUS_TXOVERR_Pos)
 
#define SC_STATUS_TXACT_Pos   (31)
 
#define SC_STATUS_TXACT_Msk   (0x1ul << SC_STATUS_TXACT_Pos)
 
#define SC_PINCTL_PWREN_Pos   (0)
 
#define SC_PINCTL_PWREN_Msk   (0x1ul << SC_PINCTL_PWREN_Pos)
 
#define SC_PINCTL_SCRST_Pos   (1)
 
#define SC_PINCTL_SCRST_Msk   (0x1ul << SC_PINCTL_SCRST_Pos)
 
#define SC_PINCTL_CSTOPLV_Pos   (5)
 
#define SC_PINCTL_CSTOPLV_Msk   (0x1ul << SC_PINCTL_CSTOPLV_Pos)
 
#define SC_PINCTL_CLKKEEP_Pos   (6)
 
#define SC_PINCTL_CLKKEEP_Msk   (0x1ul << SC_PINCTL_CLKKEEP_Pos)
 
#define SC_PINCTL_SCDOUT_Pos   (9)
 
#define SC_PINCTL_SCDOUT_Msk   (0x1ul << SC_PINCTL_SCDOUT_Pos)
 
#define SC_PINCTL_PWRINV_Pos   (11)
 
#define SC_PINCTL_PWRINV_Msk   (0x1ul << SC_PINCTL_PWRINV_Pos)
 
#define SC_PINCTL_SCDOSTS_Pos   (12)
 
#define SC_PINCTL_SCDOSTS_Msk   (0x1ul << SC_PINCTL_SCDOSTS_Pos)
 
#define SC_PINCTL_DATSTS_Pos   (16)
 
#define SC_PINCTL_DATSTS_Msk   (0x1ul << SC_PINCTL_DATSTS_Pos)
 
#define SC_PINCTL_PWRSTS_Pos   (17)
 
#define SC_PINCTL_PWRSTS_Msk   (0x1ul << SC_PINCTL_PWRSTS_Pos)
 
#define SC_PINCTL_RSTSTS_Pos   (18)
 
#define SC_PINCTL_RSTSTS_Msk   (0x1ul << SC_PINCTL_RSTSTS_Pos)
 
#define SC_PINCTL_SYNC_Pos   (30)
 
#define SC_PINCTL_SYNC_Msk   (0x1ul << SC_PINCTL_SYNC_Pos)
 
#define SC_PINCTL_LOOPBK_Pos   (31)
 
#define SC_PINCTL_LOOPBK_Msk   (0x1ul << SC_PINCTL_LOOPBK_Pos)
 
#define SC_TMRCTL0_CNT_Pos   (0)
 
#define SC_TMRCTL0_CNT_Msk   (0xfffffful << SC_TMRCTL0_CNT_Pos)
 
#define SC_TMRCTL0_OPMODE_Pos   (24)
 
#define SC_TMRCTL0_OPMODE_Msk   (0xful << SC_TMRCTL0_OPMODE_Pos)
 
#define SC_TMRCTL1_CNT_Pos   (0)
 
#define SC_TMRCTL1_CNT_Msk   (0xfful << SC_TMRCTL1_CNT_Pos)
 
#define SC_TMRCTL1_OPMODE_Pos   (24)
 
#define SC_TMRCTL1_OPMODE_Msk   (0xful << SC_TMRCTL1_OPMODE_Pos)
 
#define SC_TMRCTL2_CNT_Pos   (0)
 
#define SC_TMRCTL2_CNT_Msk   (0xfful << SC_TMRCTL2_CNT_Pos)
 
#define SC_TMRCTL2_OPMODE_Pos   (24)
 
#define SC_TMRCTL2_OPMODE_Msk   (0xful << SC_TMRCTL2_OPMODE_Pos)
 
#define SC_UARTCTL_UARTEN_Pos   (0)
 
#define SC_UARTCTL_UARTEN_Msk   (0x1ul << SC_UARTCTL_UARTEN_Pos)
 
#define SC_UARTCTL_WLS_Pos   (4)
 
#define SC_UARTCTL_WLS_Msk   (0x3ul << SC_UARTCTL_WLS10_Pos)
 
#define SC_UARTCTL_PBOFF_Pos   (6)
 
#define SC_UARTCTL_PBOFF_Msk   (0x1ul << SC_UARTCTL_PBOFF_Pos)
 
#define SC_UARTCTL_OPE_Pos   (7)
 
#define SC_UARTCTL_OPE_Msk   (0x1ul << SC_UARTCTL_OPE_Pos)
 
#define SC_TMRDAT0_CNT0_Pos   (0)
 
#define SC_TMRDAT0_CNT0_Msk   (0xfffffful << SC_TMRDAT0_CNT0_Pos)
 
#define SC_TMRDAT1_2_CNT1_Pos   (0)
 
#define SC_TMRDAT1_2_CNT1_Msk   (0xfful << SC_TMRDAT1_2_CNT1_Pos)
 
#define SC_TMRDAT1_2_CNT2_Pos   (8)
 
#define SC_TMRDAT1_2_CNT2_Msk   (0xfful << SC_TMRDAT1_2_CNT2_Pos)
 
#define SPI_CTL_SPIEN_Pos   (0)
 
#define SPI_CTL_SPIEN_Msk   (0x1ul << SPI_CTL_SPIEN_Pos)
 
#define SPI_CTL_RXNEG_Pos   (1)
 
#define SPI_CTL_RXNEG_Msk   (0x1ul << SPI_CTL_RXNEG_Pos)
 
#define SPI_CTL_TXNEG_Pos   (2)
 
#define SPI_CTL_TXNEG_Msk   (0x1ul << SPI_CTL_TXNEG_Pos)
 
#define SPI_CTL_CLKPOL_Pos   (3)
 
#define SPI_CTL_CLKPOL_Msk   (0x1ul << SPI_CTL_CLKPOL_Pos)
 
#define SPI_CTL_SUSPITV_Pos   (4)
 
#define SPI_CTL_SUSPITV_Msk   (0xful << SPI_CTL_SUSPITV_Pos)
 
#define SPI_CTL_DWIDTH_Pos   (8)
 
#define SPI_CTL_DWIDTH_Msk   (0x1ful << SPI_CTL_DWIDTH_Pos)
 
#define SPI_CTL_LSB_Pos   (13)
 
#define SPI_CTL_LSB_Msk   (0x1ul << SPI_CTL_LSB_Pos)
 
#define SPI_CTL_TWOBIT_Pos   (16)
 
#define SPI_CTL_TWOBIT_Msk   (0x1ul << SPI_CTL_TWOBIT_Pos)
 
#define SPI_CTL_UNITIEN_Pos   (17)
 
#define SPI_CTL_UNITIEN_Msk   (0x1ul << SPI_CTL_UNITIEN_Pos)
 
#define SPI_CTL_SLAVE_Pos   (18)
 
#define SPI_CTL_SLAVE_Msk   (0x1ul << SPI_CTL_SLAVE_Pos)
 
#define SPI_CTL_REORDER_Pos   (19)
 
#define SPI_CTL_REORDER_Msk   (0x1ul << SPI_CTL_REORDER_Pos)
 
#define SPI_CTL_QDIODIR_Pos   (20)
 
#define SPI_CTL_QDIODIR_Msk   (0x1ul << SPI_CTL_QDIODIR_Pos)
 
#define SPI_CTL_DUALIOEN_Pos   (21)
 
#define SPI_CTL_DUALIOEN_Msk   (0x1ul << SPI_CTL_DUALIOEN_Pos)
 
#define SPI_CTL_QUADIOEN_Pos   (22)
 
#define SPI_CTL_QUADIOEN_Msk   (0x1ul << SPI_CTL_QUADIOEN_Pos)
 
#define SPI_CLKDIV_DIVIDER_Pos   (0)
 
#define SPI_CLKDIV_DIVIDER_Msk   (0xfful << SPI_CLKDIV_DIVIDER_Pos)
 
#define SPI_SSCTL_SS_Pos   (0)
 
#define SPI_SSCTL_SS_Msk   (0x1ul << SPI_SSCTL_SS_Pos)
 
#define SPI_SSCTL_SSACTPOL_Pos   (2)
 
#define SPI_SSCTL_SSACTPOL_Msk   (0x1ul << SPI_SSCTL_SSACTPOL_Pos)
 
#define SPI_SSCTL_AUTOSS_Pos   (3)
 
#define SPI_SSCTL_AUTOSS_Msk   (0x1ul << SPI_SSCTL_AUTOSS_Pos)
 
#define SPI_SSCTL_SLV3WIRE_Pos   (4)
 
#define SPI_SSCTL_SLV3WIRE_Msk   (0x1ul << SPI_SSCTL_SLV3WIRE_Pos)
 
#define SPI_SSCTL_SLVTOIEN_Pos   (5)
 
#define SPI_SSCTL_SLVTOIEN_Msk   (0x1ul << SPI_SSCTL_SLVTOIEN_Pos)
 
#define SPI_SSCTL_SLVTORST_Pos   (6)
 
#define SPI_SSCTL_SLVTORST_Msk   (0x1ul << SPI_SSCTL_SLVTORST_Pos)
 
#define SPI_SSCTL_SLVBEIEN_Pos   (8)
 
#define SPI_SSCTL_SLVBEIEN_Msk   (0x1ul << SPI_SSCTL_SLVBEIEN_Pos)
 
#define SPI_SSCTL_SLVURIEN_Pos   (9)
 
#define SPI_SSCTL_SLVURIEN_Msk   (0x1ul << SPI_SSCTL_SLVURIEN_Pos)
 
#define SPI_SSCTL_SSACTIEN_Pos   (12)
 
#define SPI_SSCTL_SSACTIEN_Msk   (0x1ul << SPI_SSCTL_SSACTIEN_Pos)
 
#define SPI_SSCTL_SSINAIEN_Pos   (13)
 
#define SPI_SSCTL_SSINAIEN_Msk   (0x1ul << SPI_SSCTL_SSINAIEN_Pos)
 
#define SPI_SSCTL_SLVTOCNT_Pos   (16)
 
#define SPI_SSCTL_SLVTOCNT_Msk   (0xfffful << SPI_SSCTL_SLVTOCNT_Pos)
 
#define SPI_PDMACTL_TXPDMAEN_Pos   (0)
 
#define SPI_PDMACTL_TXPDMAEN_Msk   (0x1ul << SPI_PDMACTL_TXPDMAEN_Pos)
 
#define SPI_PDMACTL_RXPDMAEN_Pos   (1)
 
#define SPI_PDMACTL_RXPDMAEN_Msk   (0x1ul << SPI_PDMACTL_RXPDMAEN_Pos)
 
#define SPI_PDMACTL_PDMARST_Pos   (2)
 
#define SPI_PDMACTL_PDMARST_Msk   (0x1ul << SPI_PDMACTL_PDMARST_Pos)
 
#define SPI_FIFOCTL_RXRST_Pos   (0)
 
#define SPI_FIFOCTL_RXRST_Msk   (0x1ul << SPI_FIFOCTL_RXRST_Pos)
 
#define SPI_FIFOCTL_TXRST_Pos   (1)
 
#define SPI_FIFOCTL_TXRST_Msk   (0x1ul << SPI_FIFOCTL_TXRST_Pos)
 
#define SPI_FIFOCTL_RXTHIEN_Pos   (2)
 
#define SPI_FIFOCTL_RXTHIEN_Msk   (0x1ul << SPI_FIFOCTL_RXTHIEN_Pos)
 
#define SPI_FIFOCTL_TXTHIEN_Pos   (3)
 
#define SPI_FIFOCTL_TXTHIEN_Msk   (0x1ul << SPI_FIFOCTL_TXTHIEN_Pos)
 
#define SPI_FIFOCTL_RXTOIEN_Pos   (4)
 
#define SPI_FIFOCTL_RXTOIEN_Msk   (0x1ul << SPI_FIFOCTL_RXTOIEN_Pos)
 
#define SPI_FIFOCTL_RXOVIEN_Pos   (5)
 
#define SPI_FIFOCTL_RXOVIEN_Msk   (0x1ul << SPI_FIFOCTL_RXOVIEN_Pos)
 
#define SPI_FIFOCTL_TXUFPOL_Pos   (6)
 
#define SPI_FIFOCTL_TXUFPOL_Msk   (0x1ul << SPI_FIFOCTL_TXUFPOL_Pos)
 
#define SPI_FIFOCTL_TXUFIEN_Pos   (7)
 
#define SPI_FIFOCTL_TXUFIEN_Msk   (0x1ul << SPI_FIFOCTL_TXUFIEN_Pos)
 
#define SPI_FIFOCTL_RXFBCLR_Pos   (8)
 
#define SPI_FIFOCTL_RXFBCLR_Msk   (0x1ul << SPI_FIFOCTL_RXFBCLR_Pos)
 
#define SPI_FIFOCTL_TXFBCLR_Pos   (9)
 
#define SPI_FIFOCTL_TXFBCLR_Msk   (0x1ul << SPI_FIFOCTL_TXFBCLR_Pos)
 
#define SPI_FIFOCTL_RXTH_Pos   (24)
 
#define SPI_FIFOCTL_RXTH_Msk   (0x7ul << SPI_FIFOCTL_RXTH_Pos)
 
#define SPI_FIFOCTL_TXTH_Pos   (28)
 
#define SPI_FIFOCTL_TXTH_Msk   (0x7ul << SPI_FIFOCTL_TXTH_Pos)
 
#define SPI_STATUS_BUSY_Pos   (0)
 
#define SPI_STATUS_BUSY_Msk   (0x1ul << SPI_STATUS_BUSY_Pos)
 
#define SPI_STATUS_UNITIF_Pos   (1)
 
#define SPI_STATUS_UNITIF_Msk   (0x1ul << SPI_STATUS_UNITIF_Pos)
 
#define SPI_STATUS_SSACTIF_Pos   (2)
 
#define SPI_STATUS_SSACTIF_Msk   (0x1ul << SPI_STATUS_SSACTIF_Pos)
 
#define SPI_STATUS_SSINAIF_Pos   (3)
 
#define SPI_STATUS_SSINAIF_Msk   (0x1ul << SPI_STATUS_SSINAIF_Pos)
 
#define SPI_STATUS_SSLINE_Pos   (4)
 
#define SPI_STATUS_SSLINE_Msk   (0x1ul << SPI_STATUS_SSLINE_Pos)
 
#define SPI_STATUS_SLVTOIF_Pos   (5)
 
#define SPI_STATUS_SLVTOIF_Msk   (0x1ul << SPI_STATUS_SLVTOIF_Pos)
 
#define SPI_STATUS_SLVBEIF_Pos   (6)
 
#define SPI_STATUS_SLVBEIF_Msk   (0x1ul << SPI_STATUS_SLVBEIF_Pos)
 
#define SPI_STATUS_SLVURIF_Pos   (7)
 
#define SPI_STATUS_SLVURIF_Msk   (0x1ul << SPI_STATUS_SLVURIF_Pos)
 
#define SPI_STATUS_RXEMPTY_Pos   (8)
 
#define SPI_STATUS_RXEMPTY_Msk   (0x1ul << SPI_STATUS_RXEMPTY_Pos)
 
#define SPI_STATUS_RXFULL_Pos   (9)
 
#define SPI_STATUS_RXFULL_Msk   (0x1ul << SPI_STATUS_RXFULL_Pos)
 
#define SPI_STATUS_RXTHIF_Pos   (10)
 
#define SPI_STATUS_RXTHIF_Msk   (0x1ul << SPI_STATUS_RXTHIF_Pos)
 
#define SPI_STATUS_RXOVIF_Pos   (11)
 
#define SPI_STATUS_RXOVIF_Msk   (0x1ul << SPI_STATUS_RXOVIF_Pos)
 
#define SPI_STATUS_RXTOIF_Pos   (12)
 
#define SPI_STATUS_RXTOIF_Msk   (0x1ul << SPI_STATUS_RXTOIF_Pos)
 
#define SPI_STATUS_SPIENSTS_Pos   (15)
 
#define SPI_STATUS_SPIENSTS_Msk   (0x1ul << SPI_STATUS_SPIENSTS_Pos)
 
#define SPI_STATUS_TXEMPTY_Pos   (16)
 
#define SPI_STATUS_TXEMPTY_Msk   (0x1ul << SPI_STATUS_TXEMPTY_Pos)
 
#define SPI_STATUS_TXFULL_Pos   (17)
 
#define SPI_STATUS_TXFULL_Msk   (0x1ul << SPI_STATUS_TXFULL_Pos)
 
#define SPI_STATUS_TXTHIF_Pos   (18)
 
#define SPI_STATUS_TXTHIF_Msk   (0x1ul << SPI_STATUS_TXTHIF_Pos)
 
#define SPI_STATUS_TXUFIF_Pos   (19)
 
#define SPI_STATUS_TXUFIF_Msk   (0x1ul << SPI_STATUS_TXUFIF_Pos)
 
#define SPI_STATUS_TXRXRST_Pos   (23)
 
#define SPI_STATUS_TXRXRST_Msk   (0x1ul << SPI_STATUS_TXRXRST_Pos)
 
#define SPI_STATUS_RXCNT_Pos   (24)
 
#define SPI_STATUS_RXCNT_Msk   (0xful << SPI_STATUS_RXCNT_Pos)
 
#define SPI_STATUS_TXCNT_Pos   (28)
 
#define SPI_STATUS_TXCNT_Msk   (0xful << SPI_STATUS_TXCNT_Pos)
 
#define SPI_TX_TX_Pos   (0)
 
#define SPI_TX_TX_Msk   (0xfffffffful << SPI_TX_TX_Pos)
 
#define SPI_RX_RX_Pos   (0)
 
#define SPI_RX_RX_Msk   (0xfffffffful << SPI_RX_RX_Pos)
 
#define SPI_I2SCTL_I2SEN_Pos   (0)
 
#define SPI_I2SCTL_I2SEN_Msk   (0x1ul << SPI_I2SCTL_I2SEN_Pos)
 
#define SPI_I2SCTL_TXEN_Pos   (1)
 
#define SPI_I2SCTL_TXEN_Msk   (0x1ul << SPI_I2SCTL_TXEN_Pos)
 
#define SPI_I2SCTL_RXEN_Pos   (2)
 
#define SPI_I2SCTL_RXEN_Msk   (0x1ul << SPI_I2SCTL_RXEN_Pos)
 
#define SPI_I2SCTL_MUTE_Pos   (3)
 
#define SPI_I2SCTL_MUTE_Msk   (0x1ul << SPI_I2SCTL_MUTE_Pos)
 
#define SPI_I2SCTL_WDWIDTH_Pos   (4)
 
#define SPI_I2SCTL_WDWIDTH_Msk   (0x3ul << SPI_I2SCTL_WDWIDTH_Pos)
 
#define SPI_I2SCTL_MONO_Pos   (6)
 
#define SPI_I2SCTL_MONO_Msk   (0x1ul << SPI_I2SCTL_MONO_Pos)
 
#define SPI_I2SCTL_ORDER_Pos   (7)
 
#define SPI_I2SCTL_ORDER_Msk   (0x1ul << SPI_I2SCTL_ORDER_Pos)
 
#define SPI_I2SCTL_SLAVE_Pos   (8)
 
#define SPI_I2SCTL_SLAVE_Msk   (0x1ul << SPI_I2SCTL_SLAVE_Pos)
 
#define SPI_I2SCTL_MCLKEN_Pos   (15)
 
#define SPI_I2SCTL_MCLKEN_Msk   (0x1ul << SPI_I2SCTL_MCLKEN_Pos)
 
#define SPI_I2SCTL_RZCEN_Pos   (16)
 
#define SPI_I2SCTL_RZCEN_Msk   (0x1ul << SPI_I2SCTL_RZCEN_Pos)
 
#define SPI_I2SCTL_LZCEN_Pos   (17)
 
#define SPI_I2SCTL_LZCEN_Msk   (0x1ul << SPI_I2SCTL_LZCEN_Pos)
 
#define SPI_I2SCTL_RXLCH_Pos   (23)
 
#define SPI_I2SCTL_RXLCH_Msk   (0x1ul << SPI_I2SCTL_RXLCH_Pos)
 
#define SPI_I2SCTL_RZCIEN_Pos   (24)
 
#define SPI_I2SCTL_RZCIEN_Msk   (0x1ul << SPI_I2SCTL_RZCIEN_Pos)
 
#define SPI_I2SCTL_LZCIEN_Pos   (25)
 
#define SPI_I2SCTL_LZCIEN_Msk   (0x1ul << SPI_I2SCTL_LZCIEN_Pos)
 
#define SPI_I2SCTL_FORMAT_Pos   (28)
 
#define SPI_I2SCTL_FORMAT_Msk   (0x3ul << SPI_I2SCTL_FORMAT_Pos)
 
#define SPI_I2SCLK_MCLKDIV_Pos   (0)
 
#define SPI_I2SCLK_MCLKDIV_Msk   (0x3ful << SPI_I2SCLK_MCLKDIV_Pos)
 
#define SPI_I2SCLK_BCLKDIV_Pos   (8)
 
#define SPI_I2SCLK_BCLKDIV_Msk   (0x1fful << SPI_I2SCLK_BCLKDIV_Pos)
 
#define SPI_I2SSTS_RIGHT_Pos   (4)
 
#define SPI_I2SSTS_RIGHT_Msk   (0x1ul << SPI_I2SSTS_RIGHT_Pos)
 
#define SPI_I2SSTS_RXEMPTY_Pos   (8)
 
#define SPI_I2SSTS_RXEMPTY_Msk   (0x1ul << SPI_I2SSTS_RXEMPTY_Pos)
 
#define SPI_I2SSTS_RXFULL_Pos   (9)
 
#define SPI_I2SSTS_RXFULL_Msk   (0x1ul << SPI_I2SSTS_RXFULL_Pos)
 
#define SPI_I2SSTS_RXTHIF_Pos   (10)
 
#define SPI_I2SSTS_RXTHIF_Msk   (0x1ul << SPI_I2SSTS_RXTHIF_Pos)
 
#define SPI_I2SSTS_RXOVIF_Pos   (11)
 
#define SPI_I2SSTS_RXOVIF_Msk   (0x1ul << SPI_I2SSTS_RXOVIF_Pos)
 
#define SPI_I2SSTS_RXTOIF_Pos   (12)
 
#define SPI_I2SSTS_RXTOIF_Msk   (0x1ul << SPI_I2SSTS_RXTOIF_Pos)
 
#define SPI_I2SSTS_I2SENSTS_Pos   (15)
 
#define SPI_I2SSTS_I2SENSTS_Msk   (0x1ul << SPI_I2SSTS_I2SENSTS_Pos)
 
#define SPI_I2SSTS_TXEMPTY_Pos   (16)
 
#define SPI_I2SSTS_TXEMPTY_Msk   (0x1ul << SPI_I2SSTS_TXEMPTY_Pos)
 
#define SPI_I2SSTS_TXFULL_Pos   (17)
 
#define SPI_I2SSTS_TXFULL_Msk   (0x1ul << SPI_I2SSTS_TXFULL_Pos)
 
#define SPI_I2SSTS_TXTHIF_Pos   (18)
 
#define SPI_I2SSTS_TXTHIF_Msk   (0x1ul << SPI_I2SSTS_TXTHIF_Pos)
 
#define SPI_I2SSTS_TXUFIF_Pos   (19)
 
#define SPI_I2SSTS_TXUFIF_Msk   (0x1ul << SPI_I2SSTS_TXUFIF_Pos)
 
#define SPI_I2SSTS_RZCIF_Pos   (20)
 
#define SPI_I2SSTS_RZCIF_Msk   (0x1ul << SPI_I2SSTS_RZCIF_Pos)
 
#define SPI_I2SSTS_LZCIF_Pos   (21)
 
#define SPI_I2SSTS_LZCIF_Msk   (0x1ul << SPI_I2SSTS_LZCIF_Pos)
 
#define SPI_I2SSTS_TXRXRST_Pos   (23)
 
#define SPI_I2SSTS_TXRXRST_Msk   (0x1ul << SPI_I2SSTS_TXRXRST_Pos)
 
#define SPI_I2SSTS_RXCNT_Pos   (24)
 
#define SPI_I2SSTS_RXCNT_Msk   (0x7ul << SPI_I2SSTS_RXCNT_Pos)
 
#define SPI_I2SSTS_TXCNT_Pos   (28)
 
#define SPI_I2SSTS_TXCNT_Msk   (0x7ul << SPI_I2SSTS_TXCNT_Pos)
 
#define SYS_PDID_PDID_Pos   (0)
 
#define SYS_PDID_PDID_Msk   (0xfffffffful << SYS_PDID_PDID_Pos)
 
#define SYS_RSTSTS_PORF_Pos   (0)
 
#define SYS_RSTSTS_PORF_Msk   (0x1ul << SYS_RSTSTS_PORF_Pos)
 
#define SYS_RSTSTS_PINRF_Pos   (1)
 
#define SYS_RSTSTS_PINRF_Msk   (0x1ul << SYS_RSTSTS_PINRF_Pos)
 
#define SYS_RSTSTS_WDTRF_Pos   (2)
 
#define SYS_RSTSTS_WDTRF_Msk   (0x1ul << SYS_RSTSTS_WDTRF_Pos)
 
#define SYS_RSTSTS_LVRF_Pos   (3)
 
#define SYS_RSTSTS_LVRF_Msk   (0x1ul << SYS_RSTSTS_LVRF_Pos)
 
#define SYS_RSTSTS_BODRF_Pos   (4)
 
#define SYS_RSTSTS_BODRF_Msk   (0x1ul << SYS_RSTSTS_BODRF_Pos)
 
#define SYS_RSTSTS_SYSRF_Pos   (5)
 
#define SYS_RSTSTS_SYSRF_Msk   (0x1ul << SYS_RSTSTS_SYSRF_Pos)
 
#define SYS_RSTSTS_CPURF_Pos   (7)
 
#define SYS_RSTSTS_CPURF_Msk   (0x1ul << SYS_RSTSTS_CPURF_Pos)
 
#define SYS_RSTSTS_CPULKRF_Pos   (8)
 
#define SYS_RSTSTS_CPULKRF_Msk   (0x1ul << SYS_RSTSTS_CPULKRF_Pos)
 
#define SYS_IPRST0_CHIPRST_Pos   (0)
 
#define SYS_IPRST0_CHIPRST_Msk   (0x1ul << SYS_IPRST0_CHIPRST_Pos)
 
#define SYS_IPRST0_CPURST_Pos   (1)
 
#define SYS_IPRST0_CPURST_Msk   (0x1ul << SYS_IPRST0_CPURST_Pos)
 
#define SYS_IPRST0_PDMARST_Pos   (2)
 
#define SYS_IPRST0_PDMARST_Msk   (0x1ul << SYS_IPRST0_PDMARST_Pos)
 
#define SYS_IPRST0_EBIRST_Pos   (3)
 
#define SYS_IPRST0_EBIRST_Msk   (0x1ul << SYS_IPRST0_EBIRST_Pos)
 
#define SYS_IPRST0_USBHRST_Pos   (4)
 
#define SYS_IPRST0_USBHRST_Msk   (0x1ul << SYS_IPRST0_USBHRST_Pos)
 
#define SYS_IPRST0_CRCRST_Pos   (7)
 
#define SYS_IPRST0_CRCRST_Msk   (0x1ul << SYS_IPRST0_CRCRST_Pos)
 
#define SYS_IPRST1_GPIORST_Pos   (1)
 
#define SYS_IPRST1_GPIORST_Msk   (0x1ul << SYS_IPRST1_GPIORST_Pos)
 
#define SYS_IPRST1_TMR0RST_Pos   (2)
 
#define SYS_IPRST1_TMR0RST_Msk   (0x1ul << SYS_IPRST1_TMR0RST_Pos)
 
#define SYS_IPRST1_TMR1RST_Pos   (3)
 
#define SYS_IPRST1_TMR1RST_Msk   (0x1ul << SYS_IPRST1_TMR1RST_Pos)
 
#define SYS_IPRST1_TMR2RST_Pos   (4)
 
#define SYS_IPRST1_TMR2RST_Msk   (0x1ul << SYS_IPRST1_TMR2RST_Pos)
 
#define SYS_IPRST1_TMR3RST_Pos   (5)
 
#define SYS_IPRST1_TMR3RST_Msk   (0x1ul << SYS_IPRST1_TMR3RST_Pos)
 
#define SYS_IPRST1_I2C0RST_Pos   (8)
 
#define SYS_IPRST1_I2C0RST_Msk   (0x1ul << SYS_IPRST1_I2C0RST_Pos)
 
#define SYS_IPRST1_I2C1RST_Pos   (9)
 
#define SYS_IPRST1_I2C1RST_Msk   (0x1ul << SYS_IPRST1_I2C1RST_Pos)
 
#define SYS_IPRST1_SPI0RST_Pos   (12)
 
#define SYS_IPRST1_SPI0RST_Msk   (0x1ul << SYS_IPRST1_SPI0RST_Pos)
 
#define SYS_IPRST1_SPI1RST_Pos   (13)
 
#define SYS_IPRST1_SPI1RST_Msk   (0x1ul << SYS_IPRST1_SPI1RST_Pos)
 
#define SYS_IPRST1_UART0RST_Pos   (16)
 
#define SYS_IPRST1_UART0RST_Msk   (0x1ul << SYS_IPRST1_UART0RST_Pos)
 
#define SYS_IPRST1_UART1RST_Pos   (17)
 
#define SYS_IPRST1_UART1RST_Msk   (0x1ul << SYS_IPRST1_UART1RST_Pos)
 
#define SYS_IPRST1_UART2RST_Pos   (18)
 
#define SYS_IPRST1_UART2RST_Msk   (0x1ul << SYS_IPRST1_UART2RST_Pos)
 
#define SYS_IPRST1_UART3RST_Pos   (19)
 
#define SYS_IPRST1_UART3RST_Msk   (0x1ul << SYS_IPRST1_UART3RST_Pos)
 
#define SYS_IPRST1_USBDRST_Pos   (27)
 
#define SYS_IPRST1_USBDRST_Msk   (0x1ul << SYS_IPRST1_USBDRST_Pos)
 
#define SYS_IPRST1_EADCRST_Pos   (28)
 
#define SYS_IPRST1_EADCRST_Msk   (0x1ul << SYS_IPRST1_EADCRST_Pos)
 
#define SYS_IPRST2_SC0RST_Pos   (0)
 
#define SYS_IPRST2_SC0RST_Msk   (0x1ul << SYS_IPRST2_SC0RST_Pos)
 
#define SYS_IPRST2_PWM0RST_Pos   (16)
 
#define SYS_IPRST2_PWM0RST_Msk   (0x1ul << SYS_IPRST2_PWM0RST_Pos)
 
#define SYS_IPRST2_PWM1RST_Pos   (17)
 
#define SYS_IPRST2_PWM1RST_Msk   (0x1ul << SYS_IPRST2_PWM1RST_Pos)
 
#define SYS_IPRST2_TKRST_Pos   (25)
 
#define SYS_IPRST2_TKRST_Msk   (0x1ul << SYS_IPRST2_TKRST_Pos)
 
#define SYS_BODCTL_BODEN_Pos   (0)
 
#define SYS_BODCTL_BODEN_Msk   (0x1ul << SYS_BODCTL_BODEN_Pos)
 
#define SYS_BODCTL_BODVL_Pos   (1)
 
#define SYS_BODCTL_BODVL_Msk   (0x3ul << SYS_BODCTL_BODVL_Pos)
 
#define SYS_BODCTL_BODRSTEN_Pos   (3)
 
#define SYS_BODCTL_BODRSTEN_Msk   (0x1ul << SYS_BODCTL_BODRSTEN_Pos)
 
#define SYS_BODCTL_BODIF_Pos   (4)
 
#define SYS_BODCTL_BODIF_Msk   (0x1ul << SYS_BODCTL_BODIF_Pos)
 
#define SYS_BODCTL_BODLPM_Pos   (5)
 
#define SYS_BODCTL_BODLPM_Msk   (0x1ul << SYS_BODCTL_BODLPM_Pos)
 
#define SYS_BODCTL_BODOUT_Pos   (6)
 
#define SYS_BODCTL_BODOUT_Msk   (0x1ul << SYS_BODCTL_BODOUT_Pos)
 
#define SYS_BODCTL_LVREN_Pos   (7)
 
#define SYS_BODCTL_LVREN_Msk   (0x1ul << SYS_BODCTL_LVREN_Pos)
 
#define SYS_BODCTL_BODDGSEL_Pos   (8)
 
#define SYS_BODCTL_BODDGSEL_Msk   (0x7ul << SYS_BODCTL_BODDGSEL_Pos)
 
#define SYS_BODCTL_LVRDGSEL_Pos   (12)
 
#define SYS_BODCTL_LVRDGSEL_Msk   (0x7ul << SYS_BODCTL_LVRDGSEL_Pos)
 
#define SYS_IVSCTL_VTEMPEN_Pos   (0)
 
#define SYS_IVSCTL_VTEMPEN_Msk   (0x1ul << SYS_IVSCTL_VTEMPEN_Pos)
 
#define SYS_IVSCTL_VBATUGEN_Pos   (1)
 
#define SYS_IVSCTL_VBATUGEN_Msk   (0x1ul << SYS_IVSCTL_VBATUGEN_Pos)
 
#define SYS_PORCTL_POROFF_Pos   (0)
 
#define SYS_PORCTL_POROFF_Msk   (0xfffful << SYS_PORCTL_POROFF_Pos)
 
#define SYS_VREFCTL_VREFCTL_Pos   (0)
 
#define SYS_VREFCTL_VREFCTL_Msk   (0x1ful << SYS_VREFCTL_VREFCTL_Pos)
 
#define SYS_USBPHY_USBROLE_Pos   (0)
 
#define SYS_USBPHY_USBROLE_Msk   (0x3ul << SYS_USBPHY_USBROLE_Pos)
 
#define SYS_USBPHY_LDO33EN_Pos   (8)
 
#define SYS_USBPHY_LDO33EN_Msk   (0x1ul << SYS_USBPHY_LDO33EN_Pos)
 
#define SYS_GPA_MFPL_PA0MFP_Pos   (0)
 
#define SYS_GPA_MFPL_PA0MFP_Msk   (0xful << SYS_GPA_MFPL_PA0MFP_Pos)
 
#define SYS_GPA_MFPL_PA1MFP_Pos   (4)
 
#define SYS_GPA_MFPL_PA1MFP_Msk   (0xful << SYS_GPA_MFPL_PA1MFP_Pos)
 
#define SYS_GPA_MFPL_PA2MFP_Pos   (8)
 
#define SYS_GPA_MFPL_PA2MFP_Msk   (0xful << SYS_GPA_MFPL_PA2MFP_Pos)
 
#define SYS_GPA_MFPL_PA3MFP_Pos   (12)
 
#define SYS_GPA_MFPL_PA3MFP_Msk   (0xful << SYS_GPA_MFPL_PA3MFP_Pos)
 
#define SYS_GPA_MFPL_PA4MFP_Pos   (16)
 
#define SYS_GPA_MFPL_PA4MFP_Msk   (0xful << SYS_GPA_MFPL_PA4MFP_Pos)
 
#define SYS_GPA_MFPL_PA5MFP_Pos   (20)
 
#define SYS_GPA_MFPL_PA5MFP_Msk   (0xful << SYS_GPA_MFPL_PA5MFP_Pos)
 
#define SYS_GPA_MFPL_PA6MFP_Pos   (24)
 
#define SYS_GPA_MFPL_PA6MFP_Msk   (0xful << SYS_GPA_MFPL_PA6MFP_Pos)
 
#define SYS_GPA_MFPL_PA7MFP_Pos   (28)
 
#define SYS_GPA_MFPL_PA7MFP_Msk   (0xful << SYS_GPA_MFPL_PA7MFP_Pos)
 
#define SYS_GPA_MFPH_PA8MFP_Pos   (0)
 
#define SYS_GPA_MFPH_PA8MFP_Msk   (0xful << SYS_GPA_MFPH_PA8MFP_Pos)
 
#define SYS_GPA_MFPH_PA9MFP_Pos   (4)
 
#define SYS_GPA_MFPH_PA9MFP_Msk   (0xful << SYS_GPA_MFPH_PA9MFP_Pos)
 
#define SYS_GPA_MFPH_PA10MFP_Pos   (8)
 
#define SYS_GPA_MFPH_PA10MFP_Msk   (0xful << SYS_GPA_MFPH_PA10MFP_Pos)
 
#define SYS_GPA_MFPH_PA11MFP_Pos   (12)
 
#define SYS_GPA_MFPH_PA11MFP_Msk   (0xful << SYS_GPA_MFPH_PA11MFP_Pos)
 
#define SYS_GPA_MFPH_PA12MFP_Pos   (16)
 
#define SYS_GPA_MFPH_PA12MFP_Msk   (0xful << SYS_GPA_MFPH_PA12MFP_Pos)
 
#define SYS_GPA_MFPH_PA13MFP_Pos   (20)
 
#define SYS_GPA_MFPH_PA13MFP_Msk   (0xful << SYS_GPA_MFPH_PA13MFP_Pos)
 
#define SYS_GPA_MFPH_PA14MFP_Pos   (24)
 
#define SYS_GPA_MFPH_PA14MFP_Msk   (0xful << SYS_GPA_MFPH_PA14MFP_Pos)
 
#define SYS_GPA_MFPH_PA15MFP_Pos   (28)
 
#define SYS_GPA_MFPH_PA15MFP_Msk   (0xful << SYS_GPA_MFPH_PA15MFP_Pos)
 
#define SYS_GPB_MFPL_PB0MFP_Pos   (0)
 
#define SYS_GPB_MFPL_PB0MFP_Msk   (0xful << SYS_GPB_MFPL_PB0MFP_Pos)
 
#define SYS_GPB_MFPL_PB1MFP_Pos   (4)
 
#define SYS_GPB_MFPL_PB1MFP_Msk   (0xful << SYS_GPB_MFPL_PB1MFP_Pos)
 
#define SYS_GPB_MFPL_PB2MFP_Pos   (8)
 
#define SYS_GPB_MFPL_PB2MFP_Msk   (0xful << SYS_GPB_MFPL_PB2MFP_Pos)
 
#define SYS_GPB_MFPL_PB3MFP_Pos   (12)
 
#define SYS_GPB_MFPL_PB3MFP_Msk   (0xful << SYS_GPB_MFPL_PB3MFP_Pos)
 
#define SYS_GPB_MFPL_PB4MFP_Pos   (16)
 
#define SYS_GPB_MFPL_PB4MFP_Msk   (0xful << SYS_GPB_MFPL_PB4MFP_Pos)
 
#define SYS_GPB_MFPL_PB5MFP_Pos   (20)
 
#define SYS_GPB_MFPL_PB5MFP_Msk   (0xful << SYS_GPB_MFPL_PB5MFP_Pos)
 
#define SYS_GPB_MFPL_PB6MFP_Pos   (24)
 
#define SYS_GPB_MFPL_PB6MFP_Msk   (0xful << SYS_GPB_MFPL_PB6MFP_Pos)
 
#define SYS_GPB_MFPL_PB7MFP_Pos   (28)
 
#define SYS_GPB_MFPL_PB7MFP_Msk   (0xful << SYS_GPB_MFPL_PB7MFP_Pos)
 
#define SYS_GPB_MFPH_PB8MFP_Pos   (0)
 
#define SYS_GPB_MFPH_PB8MFP_Msk   (0xful << SYS_GPB_MFPH_PB8MFP_Pos)
 
#define SYS_GPB_MFPH_PB9MFP_Pos   (4)
 
#define SYS_GPB_MFPH_PB9MFP_Msk   (0xful << SYS_GPB_MFPH_PB9MFP_Pos)
 
#define SYS_GPB_MFPH_PB10MFP_Pos   (8)
 
#define SYS_GPB_MFPH_PB10MFP_Msk   (0xful << SYS_GPB_MFPH_PB10MFP_Pos)
 
#define SYS_GPB_MFPH_PB11MFP_Pos   (12)
 
#define SYS_GPB_MFPH_PB11MFP_Msk   (0xful << SYS_GPB_MFPH_PB11MFP_Pos)
 
#define SYS_GPB_MFPH_PB12MFP_Pos   (16)
 
#define SYS_GPB_MFPH_PB12MFP_Msk   (0xful << SYS_GPB_MFPH_PB12MFP_Pos)
 
#define SYS_GPB_MFPH_PB13MFP_Pos   (20)
 
#define SYS_GPB_MFPH_PB13MFP_Msk   (0xful << SYS_GPB_MFPH_PB13MFP_Pos)
 
#define SYS_GPB_MFPH_PB14MFP_Pos   (24)
 
#define SYS_GPB_MFPH_PB14MFP_Msk   (0xful << SYS_GPB_MFPH_PB14MFP_Pos)
 
#define SYS_GPB_MFPH_PB15MFP_Pos   (28)
 
#define SYS_GPB_MFPH_PB15MFP_Msk   (0xful << SYS_GPB_MFPH_PB15MFP_Pos)
 
#define SYS_GPC_MFPL_PC0MFP_Pos   (0)
 
#define SYS_GPC_MFPL_PC0MFP_Msk   (0xful << SYS_GPC_MFPL_PC0MFP_Pos)
 
#define SYS_GPC_MFPL_PC1MFP_Pos   (4)
 
#define SYS_GPC_MFPL_PC1MFP_Msk   (0xful << SYS_GPC_MFPL_PC1MFP_Pos)
 
#define SYS_GPC_MFPL_PC2MFP_Pos   (8)
 
#define SYS_GPC_MFPL_PC2MFP_Msk   (0xful << SYS_GPC_MFPL_PC2MFP_Pos)
 
#define SYS_GPC_MFPL_PC3MFP_Pos   (12)
 
#define SYS_GPC_MFPL_PC3MFP_Msk   (0xful << SYS_GPC_MFPL_PC3MFP_Pos)
 
#define SYS_GPC_MFPL_PC4MFP_Pos   (16)
 
#define SYS_GPC_MFPL_PC4MFP_Msk   (0xful << SYS_GPC_MFPL_PC4MFP_Pos)
 
#define SYS_GPC_MFPL_PC5MFP_Pos   (20)
 
#define SYS_GPC_MFPL_PC5MFP_Msk   (0xful << SYS_GPC_MFPL_PC5MFP_Pos)
 
#define SYS_GPC_MFPL_PC6MFP_Pos   (24)
 
#define SYS_GPC_MFPL_PC6MFP_Msk   (0xful << SYS_GPC_MFPL_PC6MFP_Pos)
 
#define SYS_GPC_MFPL_PC7MFP_Pos   (28)
 
#define SYS_GPC_MFPL_PC7MFP_Msk   (0xful << SYS_GPC_MFPL_PC7MFP_Pos)
 
#define SYS_GPC_MFPH_PC8MFP_Pos   (0)
 
#define SYS_GPC_MFPH_PC8MFP_Msk   (0xful << SYS_GPC_MFPH_PC8MFP_Pos)
 
#define SYS_GPC_MFPH_PC9MFP_Pos   (4)
 
#define SYS_GPC_MFPH_PC9MFP_Msk   (0xful << SYS_GPC_MFPH_PC9MFP_Pos)
 
#define SYS_GPC_MFPH_PC10MFP_Pos   (8)
 
#define SYS_GPC_MFPH_PC10MFP_Msk   (0xful << SYS_GPC_MFPH_PC10MFP_Pos)
 
#define SYS_GPC_MFPH_PC11MFP_Pos   (12)
 
#define SYS_GPC_MFPH_PC11MFP_Msk   (0xful << SYS_GPC_MFPH_PC11MFP_Pos)
 
#define SYS_GPC_MFPH_PC12MFP_Pos   (16)
 
#define SYS_GPC_MFPH_PC12MFP_Msk   (0xful << SYS_GPC_MFPH_PC12MFP_Pos)
 
#define SYS_GPC_MFPH_PC13MFP_Pos   (20)
 
#define SYS_GPC_MFPH_PC13MFP_Msk   (0xful << SYS_GPC_MFPH_PC13MFP_Pos)
 
#define SYS_GPC_MFPH_PC14MFP_Pos   (24)
 
#define SYS_GPC_MFPH_PC14MFP_Msk   (0xful << SYS_GPC_MFPH_PC14MFP_Pos)
 
#define SYS_GPC_MFPH_PC15MFP_Pos   (28)
 
#define SYS_GPC_MFPH_PC15MFP_Msk   (0xful << SYS_GPC_MFPH_PC15MFP_Pos)
 
#define SYS_GPD_MFPL_PD0MFP_Pos   (0)
 
#define SYS_GPD_MFPL_PD0MFP_Msk   (0xful << SYS_GPD_MFPL_PD0MFP_Pos)
 
#define SYS_GPD_MFPL_PD1MFP_Pos   (4)
 
#define SYS_GPD_MFPL_PD1MFP_Msk   (0xful << SYS_GPD_MFPL_PD1MFP_Pos)
 
#define SYS_GPD_MFPL_PD2MFP_Pos   (8)
 
#define SYS_GPD_MFPL_PD2MFP_Msk   (0xful << SYS_GPD_MFPL_PD2MFP_Pos)
 
#define SYS_GPD_MFPL_PD3MFP_Pos   (12)
 
#define SYS_GPD_MFPL_PD3MFP_Msk   (0xful << SYS_GPD_MFPL_PD3MFP_Pos)
 
#define SYS_GPD_MFPL_PD4MFP_Pos   (16)
 
#define SYS_GPD_MFPL_PD4MFP_Msk   (0xful << SYS_GPD_MFPL_PD4MFP_Pos)
 
#define SYS_GPD_MFPL_PD5MFP_Pos   (20)
 
#define SYS_GPD_MFPL_PD5MFP_Msk   (0xful << SYS_GPD_MFPL_PD5MFP_Pos)
 
#define SYS_GPD_MFPL_PD6MFP_Pos   (24)
 
#define SYS_GPD_MFPL_PD6MFP_Msk   (0xful << SYS_GPD_MFPL_PD6MFP_Pos)
 
#define SYS_GPD_MFPL_PD7MFP_Pos   (28)
 
#define SYS_GPD_MFPL_PD7MFP_Msk   (0xful << SYS_GPD_MFPL_PD7MFP_Pos)
 
#define SYS_GPD_MFPH_PD8MFP_Pos   (0)
 
#define SYS_GPD_MFPH_PD8MFP_Msk   (0xful << SYS_GPD_MFPH_PD8MFP_Pos)
 
#define SYS_GPD_MFPH_PD9MFP_Pos   (4)
 
#define SYS_GPD_MFPH_PD9MFP_Msk   (0xful << SYS_GPD_MFPH_PD9MFP_Pos)
 
#define SYS_GPD_MFPH_PD10MFP_Pos   (8)
 
#define SYS_GPD_MFPH_PD10MFP_Msk   (0xful << SYS_GPD_MFPH_PD10MFP_Pos)
 
#define SYS_GPD_MFPH_PD11MFP_Pos   (12)
 
#define SYS_GPD_MFPH_PD11MFP_Msk   (0xful << SYS_GPD_MFPH_PD11MFP_Pos)
 
#define SYS_GPD_MFPH_PD12MFP_Pos   (16)
 
#define SYS_GPD_MFPH_PD12MFP_Msk   (0xful << SYS_GPD_MFPH_PD12MFP_Pos)
 
#define SYS_GPD_MFPH_PD13MFP_Pos   (20)
 
#define SYS_GPD_MFPH_PD13MFP_Msk   (0xful << SYS_GPD_MFPH_PD13MFP_Pos)
 
#define SYS_GPD_MFPH_PD14MFP_Pos   (24)
 
#define SYS_GPD_MFPH_PD14MFP_Msk   (0xful << SYS_GPD_MFPH_PD14MFP_Pos)
 
#define SYS_GPD_MFPH_PD15MFP_Pos   (28)
 
#define SYS_GPD_MFPH_PD15MFP_Msk   (0xful << SYS_GPD_MFPH_PD15MFP_Pos)
 
#define SYS_GPE_MFPL_PE0MFP_Pos   (0)
 
#define SYS_GPE_MFPL_PE0MFP_Msk   (0xful << SYS_GPE_MFPL_PE0MFP_Pos)
 
#define SYS_GPE_MFPL_PE1MFP_Pos   (4)
 
#define SYS_GPE_MFPL_PE1MFP_Msk   (0xful << SYS_GPE_MFPL_PE1MFP_Pos)
 
#define SYS_GPE_MFPL_PE2MFP_Pos   (8)
 
#define SYS_GPE_MFPL_PE2MFP_Msk   (0xful << SYS_GPE_MFPL_PE2MFP_Pos)
 
#define SYS_GPE_MFPL_PE3MFP_Pos   (12)
 
#define SYS_GPE_MFPL_PE3MFP_Msk   (0xful << SYS_GPE_MFPL_PE3MFP_Pos)
 
#define SYS_GPE_MFPL_PE4MFP_Pos   (16)
 
#define SYS_GPE_MFPL_PE4MFP_Msk   (0xful << SYS_GPE_MFPL_PE4MFP_Pos)
 
#define SYS_GPE_MFPL_PE5MFP_Pos   (20)
 
#define SYS_GPE_MFPL_PE5MFP_Msk   (0xful << SYS_GPE_MFPL_PE5MFP_Pos)
 
#define SYS_GPE_MFPL_PE6MFP_Pos   (24)
 
#define SYS_GPE_MFPL_PE6MFP_Msk   (0xful << SYS_GPE_MFPL_PE6MFP_Pos)
 
#define SYS_GPE_MFPL_PE7MFP_Pos   (28)
 
#define SYS_GPE_MFPL_PE7MFP_Msk   (0xful << SYS_GPE_MFPL_PE7MFP_Pos)
 
#define SYS_GPE_MFPH_PE8MFP_Pos   (0)
 
#define SYS_GPE_MFPH_PE8MFP_Msk   (0xful << SYS_GPE_MFPH_PE8MFP_Pos)
 
#define SYS_GPE_MFPH_PE9MFP_Pos   (4)
 
#define SYS_GPE_MFPH_PE9MFP_Msk   (0xful << SYS_GPE_MFPH_PE9MFP_Pos)
 
#define SYS_GPE_MFPH_PE10MFP_Pos   (8)
 
#define SYS_GPE_MFPH_PE10MFP_Msk   (0xful << SYS_GPE_MFPH_PE10MFP_Pos)
 
#define SYS_GPE_MFPH_PE11MFP_Pos   (12)
 
#define SYS_GPE_MFPH_PE11MFP_Msk   (0xful << SYS_GPE_MFPH_PE11MFP_Pos)
 
#define SYS_GPE_MFPH_PE12MFP_Pos   (16)
 
#define SYS_GPE_MFPH_PE12MFP_Msk   (0xful << SYS_GPE_MFPH_PE12MFP_Pos)
 
#define SYS_GPE_MFPH_PE13MFP_Pos   (20)
 
#define SYS_GPE_MFPH_PE13MFP_Msk   (0xful << SYS_GPE_MFPH_PE13MFP_Pos)
 
#define SYS_GPE_MFPH_PE14MFP_Pos   (24)
 
#define SYS_GPE_MFPH_PE14MFP_Msk   (0xful << SYS_GPE_MFPH_PE14MFP_Pos)
 
#define SYS_GPF_MFPL_PF0MFP_Pos   (0)
 
#define SYS_GPF_MFPL_PF0MFP_Msk   (0xful << SYS_GPF_MFPL_PF0MFP_Pos)
 
#define SYS_GPF_MFPL_PF1MFP_Pos   (4)
 
#define SYS_GPF_MFPL_PF1MFP_Msk   (0xful << SYS_GPF_MFPL_PF1MFP_Pos)
 
#define SYS_GPF_MFPL_PF2MFP_Pos   (8)
 
#define SYS_GPF_MFPL_PF2MFP_Msk   (0xful << SYS_GPF_MFPL_PF2MFP_Pos)
 
#define SYS_GPF_MFPL_PF3MFP_Pos   (12)
 
#define SYS_GPF_MFPL_PF3MFP_Msk   (0xful << SYS_GPF_MFPL_PF3MFP_Pos)
 
#define SYS_GPF_MFPL_PF4MFP_Pos   (16)
 
#define SYS_GPF_MFPL_PF4MFP_Msk   (0xful << SYS_GPF_MFPL_PF4MFP_Pos)
 
#define SYS_GPF_MFPL_PF5MFP_Pos   (20)
 
#define SYS_GPF_MFPL_PF5MFP_Msk   (0xful << SYS_GPF_MFPL_PF5MFP_Pos)
 
#define SYS_GPF_MFPL_PF6MFP_Pos   (24)
 
#define SYS_GPF_MFPL_PF6MFP_Msk   (0xful << SYS_GPF_MFPL_PF6MFP_Pos)
 
#define SYS_GPF_MFPL_PF7MFP_Pos   (28)
 
#define SYS_GPF_MFPL_PF7MFP_Msk   (0xful << SYS_GPF_MFPL_PF7MFP_Pos)
 
#define SYS_SRAM_BISTCTL_SRBIST0_Pos   (0)
 
#define SYS_SRAM_BISTCTL_SRBIST0_Msk   (0x1ul << SYS_SRAM_BISTCTL_SRBIST0_Pos)
 
#define SYS_SRAM_BISTCTL_SRBIST1_Pos   (1)
 
#define SYS_SRAM_BISTCTL_SRBIST1_Msk   (0x1ul << SYS_SRAM_BISTCTL_SRBIST1_Pos)
 
#define SYS_SRAM_BISTCTL_CRBIST_Pos   (2)
 
#define SYS_SRAM_BISTCTL_CRBIST_Msk   (0x1ul << SYS_SRAM_BISTCTL_CRBIST_Pos)
 
#define SYS_SRAM_BISTCTL_USBBIST_Pos   (4)
 
#define SYS_SRAM_BISTCTL_USBBIST_Msk   (0x1ul << SYS_SRAM_BISTCTL_USBBIST_Pos)
 
#define SYS_SRAM_BISTSTS_SRBISTEF0_Pos   (0)
 
#define SYS_SRAM_BISTSTS_SRBISTEF0_Msk   (0x1ul << SYS_SRAM_BISTSTS_SRBISTEF0_Pos)
 
#define SYS_SRAM_BISTSTS_SRBISTEF1_Pos   (1)
 
#define SYS_SRAM_BISTSTS_SRBISTEF1_Msk   (0x1ul << SYS_SRAM_BISTSTS_SRBISTEF1_Pos)
 
#define SYS_SRAM_BISTSTS_CRBISTEF_Pos   (2)
 
#define SYS_SRAM_BISTSTS_CRBISTEF_Msk   (0x1ul << SYS_SRAM_BISTSTS_CRBISTEF_Pos)
 
#define SYS_SRAM_BISTSTS_USBBEF_Pos   (4)
 
#define SYS_SRAM_BISTSTS_USBBEF_Msk   (0x1ul << SYS_SRAM_BISTSTS_USBBEF_Pos)
 
#define SYS_SRAM_BISTSTS_SRBEND0_Pos   (16)
 
#define SYS_SRAM_BISTSTS_SRBEND0_Msk   (0x1ul << SYS_SRAM_BISTSTS_SRBEND0_Pos)
 
#define SYS_SRAM_BISTSTS_SRBEND1_Pos   (17)
 
#define SYS_SRAM_BISTSTS_SRBEND1_Msk   (0x1ul << SYS_SRAM_BISTSTS_SRBEND1_Pos)
 
#define SYS_SRAM_BISTSTS_CRBEND_Pos   (18)
 
#define SYS_SRAM_BISTSTS_CRBEND_Msk   (0x1ul << SYS_SRAM_BISTSTS_CRBEND_Pos)
 
#define SYS_SRAM_BISTSTS_USBBEND_Pos   (20)
 
#define SYS_SRAM_BISTSTS_USBBEND_Msk   (0x1ul << SYS_SRAM_BISTSTS_USBBEND_Pos)
 
#define SYS_IRCTCTL_FREQSEL_Pos   (0)
 
#define SYS_IRCTCTL_FREQSEL_Msk   (0x3ul << SYS_IRCTCTL_FREQSEL_Pos)
 
#define SYS_IRCTCTL_LOOPSEL_Pos   (4)
 
#define SYS_IRCTCTL_LOOPSEL_Msk   (0x3ul << SYS_IRCTCTL_LOOPSEL_Pos)
 
#define SYS_IRCTCTL_RETRYCNT_Pos   (6)
 
#define SYS_IRCTCTL_RETRYCNT_Msk   (0x3ul << SYS_IRCTCTL_RETRYCNT_Pos)
 
#define SYS_IRCTCTL_CESTOPEN_Pos   (8)
 
#define SYS_IRCTCTL_CESTOPEN_Msk   (0x1ul << SYS_IRCTCTL_CESTOPEN_Pos)
 
#define SYS_IRCTIEN_TFAILIEN_Pos   (1)
 
#define SYS_IRCTIEN_TFAILIEN_Msk   (0x1ul << SYS_IRCTIEN_TFAILIEN_Pos)
 
#define SYS_IRCTIEN_CLKEIEN_Pos   (2)
 
#define SYS_IRCTIEN_CLKEIEN_Msk   (0x1ul << SYS_IRCTIEN_CLKEIEN_Pos)
 
#define SYS_IRCTISTS_FREQLOCK_Pos   (0)
 
#define SYS_IRCTISTS_FREQLOCK_Msk   (0x1ul << SYS_IRCTISTS_FREQLOCK_Pos)
 
#define SYS_IRCTISTS_TFAILIF_Pos   (1)
 
#define SYS_IRCTISTS_TFAILIF_Msk   (0x1ul << SYS_IRCTISTS_TFAILIF_Pos)
 
#define SYS_IRCTISTS_CLKERRIF_Pos   (2)
 
#define SYS_IRCTISTS_CLKERRIF_Msk   (0x1ul << SYS_IRCTISTS_CLKERRIF_Pos)
 
#define SYS_REGLCTL_REGLCTL_Pos   (0)
 
#define SYS_REGLCTL_REGLCTL_Msk   (0xfful << SYS_REGLCTL_REGLCTL_Pos)
 
#define SYS_IRC48MTCTL_FREQSEL_Pos   (0)
 
#define SYS_IRC48MTCTL_FREQSEL_Msk   (0x3ul << SYS_IRC48MTCTL_FREQSEL_Pos)
 
#define SYS_IRC48MTCTL_LOOPSEL_Pos   (4)
 
#define SYS_IRC48MTCTL_LOOPSEL_Msk   (0x3ul << SYS_IRC48MTCTL_LOOPSEL_Pos)
 
#define SYS_IRC48MTCTL_RETRYCNT_Pos   (6)
 
#define SYS_IRC48MTCTL_RETRYCNT_Msk   (0x3ul << SYS_IRC48MTCTL_RETRYCNT_Pos)
 
#define SYS_IRC48MTCTL_CESTOPEN_Pos   (8)
 
#define SYS_IRC48MTCTL_CESTOPEN_Msk   (0x1ul << SYS_IRC48MTCTL_CESTOPEN_Pos)
 
#define SYS_IRC48MTCTL_REFCKSEL_Pos   (10)
 
#define SYS_IRC48MTCTL_REFCKSEL_Msk   (0x1ul << SYS_IRC48MTCTL_REFCKSEL_Pos)
 
#define SYS_IRC48MTIEN_TFAILIEN_Pos   (1)
 
#define SYS_IRC48MTIEN_TFAILIEN_Msk   (0x1ul << SYS_IRC48MTIEN_TFAILIEN_Pos)
 
#define SYS_IRC48MTIEN_CLKEIEN_Pos   (2)
 
#define SYS_IRC48MTIEN_CLKEIEN_Msk   (0x1ul << SYS_IRC48MTIEN_CLKEIEN_Pos)
 
#define SYS_IRC48MTISTS_FREQLOCK_Pos   (0)
 
#define SYS_IRC48MTISTS_FREQLOCK_Msk   (0x1ul << SYS_IRC48MTISTS_FREQLOCK_Pos)
 
#define SYS_IRC48MTISTS_TFAILIF_Pos   (1)
 
#define SYS_IRC48MTISTS_TFAILIF_Msk   (0x1ul << SYS_IRC48MTISTS_TFAILIF_Pos)
 
#define SYS_IRC48MTISTS_CLKERRIF_Pos   (2)
 
#define SYS_IRC48MTISTS_CLKERRIF_Msk   (0x1ul << SYS_IRC48MTISTS_CLKERRIF_Pos)
 
#define SYS_NMIEN_BODOUT_Pos   (0)
 
#define SYS_NMIEN_BODOUT_Msk   (0x1ul << SYS_NMIEN_BODOUT_Pos )
 
#define SYS_NMIEN_IRC_INT_Pos   (1)
 
#define SYS_NMIEN_IRC_INT_Msk   (0x1ul << SYS_NMIEN_IRC_INT_Pos )
 
#define SYS_NMIEN_PWRWU_INT_Pos   (2)
 
#define SYS_NMIEN_PWRWU_INT_Msk   (0x1ul << SYS_NMIEN_PWRWU_INT_Pos )
 
#define SYS_NMIEN_CLKFAIL_Pos   (4)
 
#define SYS_NMIEN_CLKFAIL_Msk   (0x1ul << SYS_NMIEN_CLKFAIL_Pos )
 
#define SYS_NMIEN_RTC_INT_Pos   (6)
 
#define SYS_NMIEN_RTC_INT_Msk   (0x1ul << SYS_NMIEN_RTC_INT_Pos )
 
#define SYS_NMIEN_TAMPER_INT_Pos   (7)
 
#define SYS_NMIEN_TAMPER_INT_Msk   (0x1ul << SYS_NMIEN_TAMPER_INT_Pos )
 
#define SYS_NMIEN_EINT0_Pos   (8)
 
#define SYS_NMIEN_EINT0_Msk   (0x1ul << SYS_NMIEN_EINT0_Pos )
 
#define SYS_NMIEN_EINT1_Pos   (9)
 
#define SYS_NMIEN_EINT1_Msk   (0x1ul << SYS_NMIEN_EINT1_Pos )
 
#define SYS_NMIEN_EINT2_Pos   (10)
 
#define SYS_NMIEN_EINT2_Msk   (0x1ul << SYS_NMIEN_EINT2_Pos )
 
#define SYS_NMIEN_EINT3_Pos   (11)
 
#define SYS_NMIEN_EINT3_Msk   (0x1ul << SYS_NMIEN_EINT3_Pos )
 
#define SYS_NMIEN_EINT4_Pos   (12)
 
#define SYS_NMIEN_EINT4_Msk   (0x1ul << SYS_NMIEN_EINT4_Pos )
 
#define SYS_NMIEN_EINT5_Pos   (13)
 
#define SYS_NMIEN_EINT5_Msk   (0x1ul << SYS_NMIEN_EINT5_Pos )
 
#define SYS_NMIEN_UART0_INT_Pos   (14)
 
#define SYS_NMIEN_UART0_INT_Msk   (0x1ul << SYS_NMIEN_UART0_INT_Pos )
 
#define SYS_NMIEN_UART1_INT_Pos   (15)
 
#define SYS_NMIEN_UART1_INT_Msk   (0x1ul << SYS_NMIEN_UART1_INT_Pos )
 
#define SYS_NMISTS_BODOUT_Pos   (0)
 
#define SYS_NMISTS_BODOUT_Msk   (0x1ul << SYS_NMISTS_BODOUT_Pos )
 
#define SYS_NMISTS_IRC_INT_Pos   (1)
 
#define SYS_NMISTS_IRC_INT_Msk   (0x1ul << SYS_NMISTS_IRC_INT_Pos )
 
#define SYS_NMISTS_PWRWU_INT_Pos   (2)
 
#define SYS_NMISTS_PWRWU_INT_Msk   (0x1ul << SYS_NMISTS_PWRWU_INT_Pos )
 
#define SYS_NMISTS_CLKFAIL_Pos   (4)
 
#define SYS_NMISTS_CLKFAIL_Msk   (0x1ul << SYS_NMISTS_CLKFAIL_Pos )
 
#define SYS_NMISTS_RTC_INT_Pos   (6)
 
#define SYS_NMISTS_RTC_INT_Msk   (0x1ul << SYS_NMISTS_RTC_INT_Pos )
 
#define SYS_NMISTS_TAMPER_INT_Pos   (7)
 
#define SYS_NMISTS_TAMPER_INT_Msk   (0x1ul << SYS_NMISTS_TAMPER_INT_Pos )
 
#define SYS_NMISTS_EINT0_Pos   (8)
 
#define SYS_NMISTS_EINT0_Msk   (0x1ul << SYS_NMISTS_EINT0_Pos )
 
#define SYS_NMISTS_EINT1_Pos   (9)
 
#define SYS_NMISTS_EINT1_Msk   (0x1ul << SYS_NMISTS_EINT1_Pos )
 
#define SYS_NMISTS_EINT2_Pos   (10)
 
#define SYS_NMISTS_EINT2_Msk   (0x1ul << SYS_NMISTS_EINT2_Pos )
 
#define SYS_NMISTS_EINT3_Pos   (11)
 
#define SYS_NMISTS_EINT3_Msk   (0x1ul << SYS_NMISTS_EINT3_Pos )
 
#define SYS_NMISTS_EINT4_Pos   (12)
 
#define SYS_NMISTS_EINT4_Msk   (0x1ul << SYS_NMISTS_EINT4_Pos )
 
#define SYS_NMISTS_EINT5_Pos   (13)
 
#define SYS_NMISTS_EINT5_Msk   (0x1ul << SYS_NMISTS_EINT5_Pos )
 
#define SYS_NMISTS_UART0_INT_Pos   (14)
 
#define SYS_NMISTS_UART0_INT_Msk   (0x1ul << SYS_NMISTS_UART0_INT_Pos )
 
#define SYS_NMISTS_UART1_INT_Pos   (15)
 
#define SYS_NMISTS_UART1_INT_Msk   (0x1ul << SYS_NMISTS_UART1_INT_Pos )
 
#define TIMER_CTL_PSC_Pos   (0)
 
#define TIMER_CTL_PSC_Msk   (0xfful << TIMER_CTL_PSC_Pos)
 
#define TIMER_CTL_WKTKEN_Pos   (17)
 
#define TIMER_CTL_WKTKEN_Msk   (0x1ul << TIMER_CTL_WKTKEN_Pos)
 
#define TIMER_CTL_TRGSSEL_Pos   (18)
 
#define TIMER_CTL_TRGSSEL_Msk   (0x1ul << TIMER_CTL_TRGSSEL_Pos)
 
#define TIMER_CTL_TRGPWM_Pos   (19)
 
#define TIMER_CTL_TRGPWM_Msk   (0x1ul << TIMER_CTL_TRGPWM_Pos)
 
#define TIMER_CTL_TRGEADC_Pos   (21)
 
#define TIMER_CTL_TRGEADC_Msk   (0x1ul << TIMER_CTL_TRGEADC_Pos)
 
#define TIMER_CTL_TGLPINSEL_Pos   (22)
 
#define TIMER_CTL_TGLPINSEL_Msk   (0x1ul << TIMER_CTL_TGLPINSEL_Pos)
 
#define TIMER_CTL_WKEN_Pos   (23)
 
#define TIMER_CTL_WKEN_Msk   (0x1ul << TIMER_CTL_WKEN_Pos)
 
#define TIMER_CTL_EXTCNTEN_Pos   (24)
 
#define TIMER_CTL_EXTCNTEN_Msk   (0x1ul << TIMER_CTL_EXTCNTEN_Pos)
 
#define TIMER_CTL_ACTSTS_Pos   (25)
 
#define TIMER_CTL_ACTSTS_Msk   (0x1ul << TIMER_CTL_ACTSTS_Pos)
 
#define TIMER_CTL_RSTCNT_Pos   (26)
 
#define TIMER_CTL_RSTCNT_Msk   (0x1ul << TIMER_CTL_RSTCNT_Pos)
 
#define TIMER_CTL_OPMODE_Pos   (27)
 
#define TIMER_CTL_OPMODE_Msk   (0x3ul << TIMER_CTL_OPMODE_Pos)
 
#define TIMER_CTL_INTEN_Pos   (29)
 
#define TIMER_CTL_INTEN_Msk   (0x1ul << TIMER_CTL_INTEN_Pos)
 
#define TIMER_CTL_CNTEN_Pos   (30)
 
#define TIMER_CTL_CNTEN_Msk   (0x1ul << TIMER_CTL_CNTEN_Pos)
 
#define TIMER_CTL_ICEDEBUG_Pos   (31)
 
#define TIMER_CTL_ICEDEBUG_Msk   (0x1ul << TIMER_CTL_ICEDEBUG_Pos)
 
#define TIMER_CMP_CMPDAT_Pos   (0)
 
#define TIMER_CMP_CMPDAT_Msk   (0xfffffful << TIMER_CMP_CMPDAT_Pos)
 
#define TIMER_INTSTS_TIF_Pos   (0)
 
#define TIMER_INTSTS_TIF_Msk   (0x1ul << TIMER_INTSTS_TIF_Pos)
 
#define TIMER_INTSTS_TWKF_Pos   (1)
 
#define TIMER_INTSTS_TWKF_Msk   (0x1ul << TIMER_INTSTS_TWKF_Pos)
 
#define TIMER_CNT_CNT_Pos   (0)
 
#define TIMER_CNT_CNT_Msk   (0xfffffful << TIMER_CNT_CNT_Pos)
 
#define TIMER_CAP_CAPDAT_Pos   (0)
 
#define TIMER_CAP_CAPDAT_Msk   (0xfffffful << TIMER_CAP_CAPDAT_Pos)
 
#define TIMER_EXTCTL_CNTPHASE_Pos   (0)
 
#define TIMER_EXTCTL_CNTPHASE_Msk   (0x1ul << TIMER_EXTCTL_CNTPHASE_Pos)
 
#define TIMER_EXTCTL_CAPEDGE_Pos   (1)
 
#define TIMER_EXTCTL_CAPEDGE_Msk   (0x3ul << TIMER_EXTCTL_CAPEDGE_Pos)
 
#define TIMER_EXTCTL_CAPEN_Pos   (3)
 
#define TIMER_EXTCTL_CAPEN_Msk   (0x1ul << TIMER_EXTCTL_CAPEN_Pos)
 
#define TIMER_EXTCTL_CAPFUNCS_Pos   (4)
 
#define TIMER_EXTCTL_CAPFUNCS_Msk   (0x1ul << TIMER_EXTCTL_CAPFUNCS_Pos)
 
#define TIMER_EXTCTL_CAPIEN_Pos   (5)
 
#define TIMER_EXTCTL_CAPIEN_Msk   (0x1ul << TIMER_EXTCTL_CAPIEN_Pos)
 
#define TIMER_EXTCTL_CAPDBEN_Pos   (6)
 
#define TIMER_EXTCTL_CAPDBEN_Msk   (0x1ul << TIMER_EXTCTL_CAPDBEN_Pos)
 
#define TIMER_EXTCTL_CNTDBEN_Pos   (7)
 
#define TIMER_EXTCTL_CNTDBEN_Msk   (0x1ul << TIMER_EXTCTL_CNTDBEN_Pos)
 
#define TIMER_EINTSTS_CAPIF_Pos   (0)
 
#define TIMER_EINTSTS_CAPIF_Msk   (0x1ul << TIMER_EINTSTS_CAPIF_Pos)
 
#define UART_DAT_DAT_Pos   (0)
 
#define UART_DAT_DAT_Msk   (0xfful << UART_DAT_DAT_Pos)
 
#define UART_INTEN_RDAIEN_Pos   (0)
 
#define UART_INTEN_RDAIEN_Msk   (0x1ul << UART_INTEN_RDAIEN_Pos)
 
#define UART_INTEN_THREIEN_Pos   (1)
 
#define UART_INTEN_THREIEN_Msk   (0x1ul << UART_INTEN_THREIEN_Pos)
 
#define UART_INTEN_RLSIEN_Pos   (2)
 
#define UART_INTEN_RLSIEN_Msk   (0x1ul << UART_INTEN_RLSIEN_Pos)
 
#define UART_INTEN_MODEMIEN_Pos   (3)
 
#define UART_INTEN_MODEMIEN_Msk   (0x1ul << UART_INTEN_MODEMIEN_Pos)
 
#define UART_INTEN_RXTOIEN_Pos   (4)
 
#define UART_INTEN_RXTOIEN_Msk   (0x1ul << UART_INTEN_RXTOIEN_Pos)
 
#define UART_INTEN_BUFERRIEN_Pos   (5)
 
#define UART_INTEN_BUFERRIEN_Msk   (0x1ul << UART_INTEN_BUFERRIEN_Pos)
 
#define UART_INTEN_LINIEN_Pos   (8)
 
#define UART_INTEN_LINIEN_Msk   (0x1ul << UART_INTEN_LINIEN_Pos)
 
#define UART_INTEN_WKCTSIEN_Pos   (9)
 
#define UART_INTEN_WKCTSIEN_Msk   (0x1ul << UART_INTEN_WKCTSIEN_Pos)
 
#define UART_INTEN_WKDATIEN_Pos   (10)
 
#define UART_INTEN_WKDATIEN_Msk   (0x1ul << UART_INTEN_WKDATIEN_Pos)
 
#define UART_INTEN_TOCNTEN_Pos   (11)
 
#define UART_INTEN_TOCNTEN_Msk   (0x1ul << UART_INTEN_TOCNTEN_Pos)
 
#define UART_INTEN_ATORTSEN_Pos   (12)
 
#define UART_INTEN_ATORTSEN_Msk   (0x1ul << UART_INTEN_ATORTSEN_Pos)
 
#define UART_INTEN_ATOCTSEN_Pos   (13)
 
#define UART_INTEN_ATOCTSEN_Msk   (0x1ul << UART_INTEN_ATOCTSEN_Pos)
 
#define UART_INTEN_TXPDMAEN_Pos   (14)
 
#define UART_INTEN_TXPDMAEN_Msk   (0x1ul << UART_INTEN_TXPDMAEN_Pos)
 
#define UART_INTEN_RXPDMAEN_Pos   (15)
 
#define UART_INTEN_RXPDMAEN_Msk   (0x1ul << UART_INTEN_RXPDMAEN_Pos)
 
#define UART_INTEN_ABRIEN_Pos   (18)
 
#define UART_INTEN_ABRIEN_Msk   (0x1ul << UART_INTEN_ABRIEN_Pos)
 
#define UART_FIFO_RXRST_Pos   (1)
 
#define UART_FIFO_RXRST_Msk   (0x1ul << UART_FIFO_RXRST_Pos)
 
#define UART_FIFO_TXRST_Pos   (2)
 
#define UART_FIFO_TXRST_Msk   (0x1ul << UART_FIFO_TXRST_Pos)
 
#define UART_FIFO_RFITL_Pos   (4)
 
#define UART_FIFO_RFITL_Msk   (0xful << UART_FIFO_RFITL_Pos)
 
#define UART_FIFO_RXOFF_Pos   (8)
 
#define UART_FIFO_RXOFF_Msk   (0x1ul << UART_FIFO_RXOFF_Pos)
 
#define UART_FIFO_RTSTRGLV_Pos   (16)
 
#define UART_FIFO_RTSTRGLV_Msk   (0xful << UART_FIFO_RTSTRGLV_Pos)
 
#define UART_LINE_WLS_Pos   (0)
 
#define UART_LINE_WLS_Msk   (0x3ul << UART_LINE_WLS_Pos)
 
#define UART_LINE_NSB_Pos   (2)
 
#define UART_LINE_NSB_Msk   (0x1ul << UART_LINE_NSB_Pos)
 
#define UART_LINE_PBE_Pos   (3)
 
#define UART_LINE_PBE_Msk   (0x1ul << UART_LINE_PBE_Pos)
 
#define UART_LINE_EPE_Pos   (4)
 
#define UART_LINE_EPE_Msk   (0x1ul << UART_LINE_EPE_Pos)
 
#define UART_LINE_SPE_Pos   (5)
 
#define UART_LINE_SPE_Msk   (0x1ul << UART_LINE_SPE_Pos)
 
#define UART_LINE_BCB_Pos   (6)
 
#define UART_LINE_BCB_Msk   (0x1ul << UART_LINE_BCB_Pos)
 
#define UART_MODEM_RTS_Pos   (1)
 
#define UART_MODEM_RTS_Msk   (0x1ul << UART_MODEM_RTS_Pos)
 
#define UART_MODEM_RTSACTLV_Pos   (9)
 
#define UART_MODEM_RTSACTLV_Msk   (0x1ul << UART_MODEM_RTSACTLV_Pos)
 
#define UART_MODEM_RTSSTS_Pos   (13)
 
#define UART_MODEM_RTSSTS_Msk   (0x1ul << UART_MODEM_RTSSTS_Pos)
 
#define UART_MODEMSTS_CTSDETF_Pos   (0)
 
#define UART_MODEMSTS_CTSDETF_Msk   (0x1ul << UART_MODEMSTS_CTSDETF_Pos)
 
#define UART_MODEMSTS_CTSSTS_Pos   (4)
 
#define UART_MODEMSTS_CTSSTS_Msk   (0x1ul << UART_MODEMSTS_CTSSTS_Pos)
 
#define UART_MODEMSTS_CTSACTLV_Pos   (8)
 
#define UART_MODEMSTS_CTSACTLV_Msk   (0x1ul << UART_MODEMSTS_CTSACTLV_Pos)
 
#define UART_FIFOSTS_RXOVIF_Pos   (0)
 
#define UART_FIFOSTS_RXOVIF_Msk   (0x1ul << UART_FIFOSTS_RXOVIF_Pos)
 
#define UART_FIFOSTS_ABRDIF_Pos   (1)
 
#define UART_FIFOSTS_ABRDIF_Msk   (0x1ul << UART_FIFOSTS_ABRDIF_Pos)
 
#define UART_FIFOSTS_ABRDTOIF_Pos   (2)
 
#define UART_FIFOSTS_ABRDTOIF_Msk   (0x1ul << UART_FIFOSTS_ABRDTOIF_Pos)
 
#define UART_FIFOSTS_ADDRDETF_Pos   (3)
 
#define UART_FIFOSTS_ADDRDETF_Msk   (0x1ul << UART_FIFOSTS_ADDRDETF_Pos)
 
#define UART_FIFOSTS_PEF_Pos   (4)
 
#define UART_FIFOSTS_PEF_Msk   (0x1ul << UART_FIFOSTS_PEF_Pos)
 
#define UART_FIFOSTS_FEF_Pos   (5)
 
#define UART_FIFOSTS_FEF_Msk   (0x1ul << UART_FIFOSTS_FEF_Pos)
 
#define UART_FIFOSTS_BIF_Pos   (6)
 
#define UART_FIFOSTS_BIF_Msk   (0x1ul << UART_FIFOSTS_BIF_Pos)
 
#define UART_FIFOSTS_RXPTR_Pos   (8)
 
#define UART_FIFOSTS_RXPTR_Msk   (0x3ful << UART_FIFOSTS_RXPTR_Pos)
 
#define UART_FIFOSTS_RXEMPTY_Pos   (14)
 
#define UART_FIFOSTS_RXEMPTY_Msk   (0x1ul << UART_FIFOSTS_RXEMPTY_Pos)
 
#define UART_FIFOSTS_RXFULL_Pos   (15)
 
#define UART_FIFOSTS_RXFULL_Msk   (0x1ul << UART_FIFOSTS_RXFULL_Pos)
 
#define UART_FIFOSTS_TXPTR_Pos   (16)
 
#define UART_FIFOSTS_TXPTR_Msk   (0x3ful << UART_FIFOSTS_TXPTR_Pos)
 
#define UART_FIFOSTS_TXEMPTY_Pos   (22)
 
#define UART_FIFOSTS_TXEMPTY_Msk   (0x1ul << UART_FIFOSTS_TXEMPTY_Pos)
 
#define UART_FIFOSTS_TXFULL_Pos   (23)
 
#define UART_FIFOSTS_TXFULL_Msk   (0x1ul << UART_FIFOSTS_TXFULL_Pos)
 
#define UART_FIFOSTS_TXOVIF_Pos   (24)
 
#define UART_FIFOSTS_TXOVIF_Msk   (0x1ul << UART_FIFOSTS_TXOVIF_Pos)
 
#define UART_FIFOSTS_TXEMPTYF_Pos   (28)
 
#define UART_FIFOSTS_TXEMPTYF_Msk   (0x1ul << UART_FIFOSTS_TXEMPTYF_Pos)
 
#define UART_INTSTS_RDAIF_Pos   (0)
 
#define UART_INTSTS_RDAIF_Msk   (0x1ul << UART_INTSTS_RDAIF_Pos)
 
#define UART_INTSTS_THREIF_Pos   (1)
 
#define UART_INTSTS_THREIF_Msk   (0x1ul << UART_INTSTS_THREIF_Pos)
 
#define UART_INTSTS_RLSIF_Pos   (2)
 
#define UART_INTSTS_RLSIF_Msk   (0x1ul << UART_INTSTS_RLSIF_Pos)
 
#define UART_INTSTS_MODEMIF_Pos   (3)
 
#define UART_INTSTS_MODEMIF_Msk   (0x1ul << UART_INTSTS_MODEMIF_Pos)
 
#define UART_INTSTS_RXTOIF_Pos   (4)
 
#define UART_INTSTS_RXTOIF_Msk   (0x1ul << UART_INTSTS_RXTOIF_Pos)
 
#define UART_INTSTS_BUFERRIF_Pos   (5)
 
#define UART_INTSTS_BUFERRIF_Msk   (0x1ul << UART_INTSTS_BUFERRIF_Pos)
 
#define UART_INTSTS_WKIF_Pos   (6)
 
#define UART_INTSTS_WKIF_Msk   (0x1ul << UART_INTSTS_WKIF_Pos)
 
#define UART_INTSTS_LINIF_Pos   (7)
 
#define UART_INTSTS_LINIF_Msk   (0x1ul << UART_INTSTS_LINIF_Pos)
 
#define UART_INTSTS_RDAINT_Pos   (8)
 
#define UART_INTSTS_RDAINT_Msk   (0x1ul << UART_INTSTS_RDAINT_Pos)
 
#define UART_INTSTS_THREINT_Pos   (9)
 
#define UART_INTSTS_THREINT_Msk   (0x1ul << UART_INTSTS_THREINT_Pos)
 
#define UART_INTSTS_RLSINT_Pos   (10)
 
#define UART_INTSTS_RLSINT_Msk   (0x1ul << UART_INTSTS_RLSINT_Pos)
 
#define UART_INTSTS_MODEMINT_Pos   (11)
 
#define UART_INTSTS_MODEMINT_Msk   (0x1ul << UART_INTSTS_MODEMINT_Pos)
 
#define UART_INTSTS_RXTOINT_Pos   (12)
 
#define UART_INTSTS_RXTOINT_Msk   (0x1ul << UART_INTSTS_RXTOINT_Pos)
 
#define UART_INTSTS_BUFERRINT_Pos   (13)
 
#define UART_INTSTS_BUFERRINT_Msk   (0x1ul << UART_INTSTS_BUFERRINT_Pos)
 
#define UART_INTSTS_LININT_Pos   (15)
 
#define UART_INTSTS_LININT_Msk   (0x1ul << UART_INTSTS_LININT_Pos)
 
#define UART_INTSTS_CTSWKIF_Pos   (16)
 
#define UART_INTSTS_CTSWKIF_Msk   (0x1ul << UART_INTSTS_CTSWKIF_Pos)
 
#define UART_INTSTS_DATWKIF_Pos   (17)
 
#define UART_INTSTS_DATWKIF_Msk   (0x1ul << UART_INTSTS_DATWKIF_Pos)
 
#define UART_INTSTS_HWRLSIF_Pos   (18)
 
#define UART_INTSTS_HWRLSIF_Msk   (0x1ul << UART_INTSTS_HWRLSIF_Pos)
 
#define UART_INTSTS_HWMODIF_Pos   (19)
 
#define UART_INTSTS_HWMODIF_Msk   (0x1ul << UART_INTSTS_HWMODIF_Pos)
 
#define UART_INTSTS_HWTOIF_Pos   (20)
 
#define UART_INTSTS_HWTOIF_Msk   (0x1ul << UART_INTSTS_HWTOIF_Pos)
 
#define UART_INTSTS_HWBUFEIF_Pos   (21)
 
#define UART_INTSTS_HWBUFEIF_Msk   (0x1ul << UART_INTSTS_HWBUFEIF_Pos)
 
#define UART_INTSTS_HWRLSINT_Pos   (26)
 
#define UART_INTSTS_HWRLSINT_Msk   (0x1ul << UART_INTSTS_HWRLSINT_Pos)
 
#define UART_INTSTS_HWMODINT_Pos   (27)
 
#define UART_INTSTS_HWMODINT_Msk   (0x1ul << UART_INTSTS_HWMODINT_Pos)
 
#define UART_INTSTS_HWTOINT_Pos   (28)
 
#define UART_INTSTS_HWTOINT_Msk   (0x1ul << UART_INTSTS_HWTOINT_Pos)
 
#define UART_INTSTS_HWBUFEINT_Pos   (29)
 
#define UART_INTSTS_HWBUFEINT_Msk   (0x1ul << UART_INTSTS_HWBUFEINT_Pos)
 
#define UART_TOUT_TOIC_Pos   (0)
 
#define UART_TOUT_TOIC_Msk   (0xfful << UART_TOUT_TOIC_Pos)
 
#define UART_TOUT_DLY_Pos   (8)
 
#define UART_TOUT_DLY_Msk   (0xfful << UART_TOUT_DLY_Pos)
 
#define UART_BAUD_BRD_Pos   (0)
 
#define UART_BAUD_BRD_Msk   (0xfffful << UART_BAUD_BRD_Pos)
 
#define UART_BAUD_EDIVM1_Pos   (24)
 
#define UART_BAUD_EDIVM1_Msk   (0xful << UART_BAUD_EDIVM1_Pos)
 
#define UART_BAUD_BAUDM0_Pos   (28)
 
#define UART_BAUD_BAUDM0_Msk   (0x1ul << UART_BAUD_BAUDM0_Pos)
 
#define UART_BAUD_BAUDM1_Pos   (29)
 
#define UART_BAUD_BAUDM1_Msk   (0x1ul << UART_BAUD_BAUDM1_Pos)
 
#define UART_IRDA_TXEN_Pos   (1)
 
#define UART_IRDA_TXEN_Msk   (0x1ul << UART_IRDA_TXEN_Pos)
 
#define UART_IRDA_TXINV_Pos   (5)
 
#define UART_IRDA_TXINV_Msk   (0x1ul << UART_IRDA_TXINV_Pos)
 
#define UART_IRDA_RXINV_Pos   (6)
 
#define UART_IRDA_RXINV_Msk   (0x1ul << UART_IRDA_RXINV_Pos)
 
#define UART_ALTCTL_BRKFL_Pos   (0)
 
#define UART_ALTCTL_BRKFL_Msk   (0xful << UART_ALTCTL_BRKFL_Pos)
 
#define UART_ALTCTL_LINRXEN_Pos   (6)
 
#define UART_ALTCTL_LINRXEN_Msk   (0x1ul << UART_ALTCTL_LINRXEN_Pos)
 
#define UART_ALTCTL_LINTXEN_Pos   (7)
 
#define UART_ALTCTL_LINTXEN_Msk   (0x1ul << UART_ALTCTL_LINTXEN_Pos)
 
#define UART_ALTCTL_RS485NMM_Pos   (8)
 
#define UART_ALTCTL_RS485NMM_Msk   (0x1ul << UART_ALTCTL_RS485NMM_Pos)
 
#define UART_ALTCTL_RS485AAD_Pos   (9)
 
#define UART_ALTCTL_RS485AAD_Msk   (0x1ul << UART_ALTCTL_RS485AAD_Pos)
 
#define UART_ALTCTL_RS485AUD_Pos   (10)
 
#define UART_ALTCTL_RS485AUD_Msk   (0x1ul << UART_ALTCTL_RS485AUD_Pos)
 
#define UART_ALTCTL_ADDRDEN_Pos   (15)
 
#define UART_ALTCTL_ADDRDEN_Msk   (0x1ul << UART_ALTCTL_ADDRDEN_Pos)
 
#define UART_ALTCTL_ABRIF_Pos   (17)
 
#define UART_ALTCTL_ABRIF_Msk   (0x1ul << UART_ALTCTL_ABRIF_Pos)
 
#define UART_ALTCTL_ABRDEN_Pos   (18)
 
#define UART_ALTCTL_ABRDEN_Msk   (0x1ul << UART_ALTCTL_ABRDEN_Pos)
 
#define UART_ALTCTL_ABRDBITS_Pos   (19)
 
#define UART_ALTCTL_ABRDBITS_Msk   (0x3ul << UART_ALTCTL_ABRDBITS_Pos)
 
#define UART_ALTCTL_ADDRMV_Pos   (24)
 
#define UART_ALTCTL_ADDRMV_Msk   (0xfful << UART_ALTCTL_ADDRMV_Pos)
 
#define UART_FUNCSEL_FUNCSEL_Pos   (0)
 
#define UART_FUNCSEL_FUNCSEL_Msk   (0x3ul << UART_FUNCSEL_FUNCSEL_Pos)
 
#define USBD_INTEN_BUSIEN_Pos   (0)
 
#define USBD_INTEN_BUSIEN_Msk   (0x1ul << USBD_INTEN_BUSIEN_Pos)
 
#define USBD_INTEN_USBIEN_Pos   (1)
 
#define USBD_INTEN_USBIEN_Msk   (0x1ul << USBD_INTEN_USBIEN_Pos)
 
#define USBD_INTEN_VBDETIEN_Pos   (2)
 
#define USBD_INTEN_VBDETIEN_Msk   (0x1ul << USBD_INTEN_VBDETIEN_Pos)
 
#define USBD_INTEN_NEVWKIEN_Pos   (3)
 
#define USBD_INTEN_NEVWKIEN_Msk   (0x1ul << USBD_INTEN_NEVWKIEN_Pos)
 
#define USBD_INTEN_WKEN_Pos   (8)
 
#define USBD_INTEN_WKEN_Msk   (0x1ul << USBD_INTEN_WKEN_Pos)
 
#define USBD_INTEN_INNAKEN_Pos   (15)
 
#define USBD_INTEN_INNAKEN_Msk   (0x1ul << USBD_INTEN_INNAKEN_Pos)
 
#define USBD_INTSTS_BUSIF_Pos   (0)
 
#define USBD_INTSTS_BUSIF_Msk   (0x1ul << USBD_INTSTS_BUSIF_Pos)
 
#define USBD_INTSTS_USBIF_Pos   (1)
 
#define USBD_INTSTS_USBIF_Msk   (0x1ul << USBD_INTSTS_USBIF_Pos)
 
#define USBD_INTSTS_VBDETIF_Pos   (2)
 
#define USBD_INTSTS_VBDETIF_Msk   (0x1ul << USBD_INTSTS_VBDETIF_Pos)
 
#define USBD_INTSTS_NEVWKIF_Pos   (3)
 
#define USBD_INTSTS_NEVWKIF_Msk   (0x1ul << USBD_INTSTS_NEVWKIF_Pos)
 
#define USBD_INTSTS_SOFIF_Pos   (4)
 
#define USBD_INTSTS_SOFIF_Msk   (0x1ul << USBD_INTSTS_SOFIF_Pos)
 
#define USBD_INTSTS_EPEVT0_Pos   (16)
 
#define USBD_INTSTS_EPEVT0_Msk   (0x1ul << USBD_INTSTS_EPEVT0_Pos)
 
#define USBD_INTSTS_EPEVT1_Pos   (17)
 
#define USBD_INTSTS_EPEVT1_Msk   (0x1ul << USBD_INTSTS_EPEVT1_Pos)
 
#define USBD_INTSTS_EPEVT2_Pos   (18)
 
#define USBD_INTSTS_EPEVT2_Msk   (0x1ul << USBD_INTSTS_EPEVT2_Pos)
 
#define USBD_INTSTS_EPEVT3_Pos   (19)
 
#define USBD_INTSTS_EPEVT3_Msk   (0x1ul << USBD_INTSTS_EPEVT3_Pos)
 
#define USBD_INTSTS_EPEVT4_Pos   (20)
 
#define USBD_INTSTS_EPEVT4_Msk   (0x1ul << USBD_INTSTS_EPEVT4_Pos)
 
#define USBD_INTSTS_EPEVT5_Pos   (21)
 
#define USBD_INTSTS_EPEVT5_Msk   (0x1ul << USBD_INTSTS_EPEVT5_Pos)
 
#define USBD_INTSTS_EPEVT6_Pos   (22)
 
#define USBD_INTSTS_EPEVT6_Msk   (0x1ul << USBD_INTSTS_EPEVT6_Pos)
 
#define USBD_INTSTS_EPEVT7_Pos   (23)
 
#define USBD_INTSTS_EPEVT7_Msk   (0x1ul << USBD_INTSTS_EPEVT7_Pos)
 
#define USBD_INTSTS_SETUP_Pos   (31)
 
#define USBD_INTSTS_SETUP_Msk   (0x1ul << USBD_INTSTS_SETUP_Pos)
 
#define USBD_FADDR_FADDR_Pos   (0)
 
#define USBD_FADDR_FADDR_Msk   (0x7ful << USBD_FADDR_FADDR_Pos)
 
#define USBD_EPSTS_OV_Pos   (7)
 
#define USBD_EPSTS_OV_Msk   (0x1ul << USBD_EPSTS_OV_Pos)
 
#define USBD_EPSTS_EPSTS0_Pos   (8)
 
#define USBD_EPSTS_EPSTS0_Msk   (0x7ul << USBD_EPSTS_EPSTS0_Pos)
 
#define USBD_EPSTS_EPSTS1_Pos   (11)
 
#define USBD_EPSTS_EPSTS1_Msk   (0x7ul << USBD_EPSTS_EPSTS1_Pos)
 
#define USBD_EPSTS_EPSTS2_Pos   (14)
 
#define USBD_EPSTS_EPSTS2_Msk   (0x7ul << USBD_EPSTS_EPSTS2_Pos)
 
#define USBD_EPSTS_EPSTS3_Pos   (17)
 
#define USBD_EPSTS_EPSTS3_Msk   (0x7ul << USBD_EPSTS_EPSTS3_Pos)
 
#define USBD_EPSTS_EPSTS4_Pos   (20)
 
#define USBD_EPSTS_EPSTS4_Msk   (0x7ul << USBD_EPSTS_EPSTS4_Pos)
 
#define USBD_EPSTS_EPSTS5_Pos   (23)
 
#define USBD_EPSTS_EPSTS5_Msk   (0x7ul << USBD_EPSTS_EPSTS5_Pos)
 
#define USBD_EPSTS_EPSTS6_Pos   (26)
 
#define USBD_EPSTS_EPSTS6_Msk   (0x7ul << USBD_EPSTS_EPSTS6_Pos)
 
#define USBD_EPSTS_EPSTS7_Pos   (29)
 
#define USBD_EPSTS_EPSTS7_Msk   (0x7ul << USBD_EPSTS_EPSTS7_Pos)
 
#define USBD_ATTR_USBRST_Pos   (0)
 
#define USBD_ATTR_USBRST_Msk   (0x1ul << USBD_ATTR_USBRST_Pos)
 
#define USBD_ATTR_SUSPEND_Pos   (1)
 
#define USBD_ATTR_SUSPEND_Msk   (0x1ul << USBD_ATTR_SUSPEND_Pos)
 
#define USBD_ATTR_RESUME_Pos   (2)
 
#define USBD_ATTR_RESUME_Msk   (0x1ul << USBD_ATTR_RESUME_Pos)
 
#define USBD_ATTR_TOUT_Pos   (3)
 
#define USBD_ATTR_TOUT_Msk   (0x1ul << USBD_ATTR_TOUT_Pos)
 
#define USBD_ATTR_PHYEN_Pos   (4)
 
#define USBD_ATTR_PHYEN_Msk   (0x1ul << USBD_ATTR_PHYEN_Pos)
 
#define USBD_ATTR_RWAKEUP_Pos   (5)
 
#define USBD_ATTR_RWAKEUP_Msk   (0x1ul << USBD_ATTR_RWAKEUP_Pos)
 
#define USBD_ATTR_USBEN_Pos   (7)
 
#define USBD_ATTR_USBEN_Msk   (0x1ul << USBD_ATTR_USBEN_Pos)
 
#define USBD_ATTR_DPPUEN_Pos   (8)
 
#define USBD_ATTR_DPPUEN_Msk   (0x1ul << USBD_ATTR_DPPUEN_Pos)
 
#define USBD_ATTR_PWRDN_Pos   (9)
 
#define USBD_ATTR_PWRDN_Msk   (0x1ul << USBD_ATTR_PWRDN_Pos)
 
#define USBD_ATTR_BYTEM_Pos   (10)
 
#define USBD_ATTR_BYTEM_Msk   (0x1ul << USBD_ATTR_BYTEM_Pos)
 
#define USBD_VBUSDET_VBUSDET_Pos   (0)
 
#define USBD_VBUSDET_VBUSDET_Msk   (0x1ul << USBD_VBUSDET_VBUSDET_Pos)
 
#define USBD_STBUFSEG_STBUFSEG_Pos   (3)
 
#define USBD_STBUFSEG_STBUFSEG_Msk   (0x3ful << USBD_STBUFSEG_STBUFSEG_Pos)
 
#define USBD_SE0_SE0_Pos   (0)
 
#define USBD_SE0_SE0_Msk   (0x1ul << USBD_SE0_SE0_Pos)
 
#define USBD_BUFSEG_BUFSEG_Pos   (3)
 
#define USBD_BUFSEG_BUFSEG_Msk   (0x3ful << USBD_BUFSEG_BUFSEG_Pos)
 
#define USBD_MXPLD_MXPLD_Pos   (0)
 
#define USBD_MXPLD_MXPLD_Msk   (0x1fful << USBD_MXPLD_MXPLD_Pos)
 
#define USBD_CFG_EPNUM_Pos   (0)
 
#define USBD_CFG_EPNUM_Msk   (0xful << USBD_CFG_EPNUM_Pos)
 
#define USBD_CFG_ISOCH_Pos   (4)
 
#define USBD_CFG_ISOCH_Msk   (0x1ul << USBD_CFG_ISOCH_Pos)
 
#define USBD_CFG_STATE_Pos   (5)
 
#define USBD_CFG_STATE_Msk   (0x3ul << USBD_CFG_STATE_Pos)
 
#define USBD_CFG_DSQSYNC_Pos   (7)
 
#define USBD_CFG_DSQSYNC_Msk   (0x1ul << USBD_CFG_DSQSYNC_Pos)
 
#define USBD_CFG_CSTALL_Pos   (9)
 
#define USBD_CFG_CSTALL_Msk   (0x1ul << USBD_CFG_CSTALL_Pos)
 
#define USBD_CFGP_CLRRDY_Pos   (0)
 
#define USBD_CFGP_CLRRDY_Msk   (0x1ul << USBD_CFGP_CLRRDY_Pos)
 
#define USBD_CFGP_SSTALL_Pos   (1)
 
#define USBD_CFGP_SSTALL_Msk   (0x1ul << USBD_CFGP_SSTALL_Pos)
 
#define USBH_HcRevision_REV_Pos   (0)
 
#define USBH_HcRevision_REV_Msk   (0xfful << USBH_HcRevision_REV_Pos)
 
#define USBH_HcControl_CBSR_Pos   (0)
 
#define USBH_HcControl_CBSR_Msk   (0x3ul << USBH_HcControl_CBSR_Pos)
 
#define USBH_HcControl_PLE_Pos   (2)
 
#define USBH_HcControl_PLE_Msk   (0x1ul << USBH_HcControl_PLE_Pos)
 
#define USBH_HcControl_IE_Pos   (3)
 
#define USBH_HcControl_IE_Msk   (0x1ul << USBH_HcControl_IE_Pos)
 
#define USBH_HcControl_CLE_Pos   (4)
 
#define USBH_HcControl_CLE_Msk   (0x1ul << USBH_HcControl_CLE_Pos)
 
#define USBH_HcControl_BLE_Pos   (5)
 
#define USBH_HcControl_BLE_Msk   (0x1ul << USBH_HcControl_BLE_Pos)
 
#define USBH_HcControl_HCFS_Pos   (6)
 
#define USBH_HcControl_HCFS_Msk   (0x3ul << USBH_HcControl_HCFS_Pos)
 
#define USBH_HcCommandStatus_HCR_Pos   (0)
 
#define USBH_HcCommandStatus_HCR_Msk   (0x1ul << USBH_HcCommandStatus_HCR_Pos)
 
#define USBH_HcCommandStatus_CLF_Pos   (1)
 
#define USBH_HcCommandStatus_CLF_Msk   (0x1ul << USBH_HcCommandStatus_CLF_Pos)
 
#define USBH_HcCommandStatus_BLF_Pos   (2)
 
#define USBH_HcCommandStatus_BLF_Msk   (0x1ul << USBH_HcCommandStatus_BLF_Pos)
 
#define USBH_HcCommandStatus_SOC_Pos   (16)
 
#define USBH_HcCommandStatus_SOC_Msk   (0x3ul << USBH_HcCommandStatus_SOC_Pos)
 
#define USBH_HcInterruptStatus_SO_Pos   (0)
 
#define USBH_HcInterruptStatus_SO_Msk   (0x1ul << USBH_HcInterruptStatus_SO_Pos)
 
#define USBH_HcInterruptStatus_WDH_Pos   (1)
 
#define USBH_HcInterruptStatus_WDH_Msk   (0x1ul << USBH_HcInterruptStatus_WDH_Pos)
 
#define USBH_HcInterruptStatus_SF_Pos   (2)
 
#define USBH_HcInterruptStatus_SF_Msk   (0x1ul << USBH_HcInterruptStatus_SF_Pos)
 
#define USBH_HcInterruptStatus_RD_Pos   (3)
 
#define USBH_HcInterruptStatus_RD_Msk   (0x1ul << USBH_HcInterruptStatus_RD_Pos)
 
#define USBH_HcInterruptStatus_FNO_Pos   (5)
 
#define USBH_HcInterruptStatus_FNO_Msk   (0x1ul << USBH_HcInterruptStatus_FNO_Pos)
 
#define USBH_HcInterruptStatus_RHSC_Pos   (6)
 
#define USBH_HcInterruptStatus_RHSC_Msk   (0x1ul << USBH_HcInterruptStatus_RHSC_Pos)
 
#define USBH_HcInterruptEnable_SO_Pos   (0)
 
#define USBH_HcInterruptEnable_SO_Msk   (0x1ul << USBH_HcInterruptEnable_SO_Pos)
 
#define USBH_HcInterruptEnable_WDH_Pos   (1)
 
#define USBH_HcInterruptEnable_WDH_Msk   (0x1ul << USBH_HcInterruptEnable_WDH_Pos)
 
#define USBH_HcInterruptEnable_SF_Pos   (2)
 
#define USBH_HcInterruptEnable_SF_Msk   (0x1ul << USBH_HcInterruptEnable_SF_Pos)
 
#define USBH_HcInterruptEnable_RD_Pos   (3)
 
#define USBH_HcInterruptEnable_RD_Msk   (0x1ul << USBH_HcInterruptEnable_RD_Pos)
 
#define USBH_HcInterruptEnable_FNO_Pos   (5)
 
#define USBH_HcInterruptEnable_FNO_Msk   (0x1ul << USBH_HcInterruptEnable_FNO_Pos)
 
#define USBH_HcInterruptEnable_RHSC_Pos   (6)
 
#define USBH_HcInterruptEnable_RHSC_Msk   (0x1ul << USBH_HcInterruptEnable_RHSC_Pos)
 
#define USBH_HcInterruptEnable_MIE_Pos   (31)
 
#define USBH_HcInterruptEnable_MIE_Msk   (0x1ul << USBH_HcInterruptEnable_MIE_Pos)
 
#define USBH_HcInterruptDisable_SO_Pos   (0)
 
#define USBH_HcInterruptDisable_SO_Msk   (0x1ul << USBH_HcInterruptDisable_SO_Pos)
 
#define USBH_HcInterruptDisable_WDH_Pos   (1)
 
#define USBH_HcInterruptDisable_WDH_Msk   (0x1ul << USBH_HcInterruptDisable_WDH_Pos)
 
#define USBH_HcInterruptDisable_SF_Pos   (2)
 
#define USBH_HcInterruptDisable_SF_Msk   (0x1ul << USBH_HcInterruptDisable_SF_Pos)
 
#define USBH_HcInterruptDisable_RD_Pos   (3)
 
#define USBH_HcInterruptDisable_RD_Msk   (0x1ul << USBH_HcInterruptDisable_RD_Pos)
 
#define USBH_HcInterruptDisable_FNO_Pos   (5)
 
#define USBH_HcInterruptDisable_FNO_Msk   (0x1ul << USBH_HcInterruptDisable_FNO_Pos)
 
#define USBH_HcInterruptDisable_RHSC_Pos   (6)
 
#define USBH_HcInterruptDisable_RHSC_Msk   (0x1ul << USBH_HcInterruptDisable_RHSC_Pos)
 
#define USBH_HcInterruptDisable_MIE_Pos   (31)
 
#define USBH_HcInterruptDisable_MIE_Msk   (0x1ul << USBH_HcInterruptDisable_MIE_Pos)
 
#define USBH_HcHCCA_HCCA_Pos   (8)
 
#define USBH_HcHCCA_HCCA_Msk   (0xfffffful << USBH_HcHCCA_HCCA_Pos)
 
#define USBH_HcPeriodCurrentED_PCED_Pos   (4)
 
#define USBH_HcPeriodCurrentED_PCED_Msk   (0xffffffful << USBH_HcPeriodCurrentED_PCED_Pos)
 
#define USBH_HcControlHeadED_CHED_Pos   (4)
 
#define USBH_HcControlHeadED_CHED_Msk   (0xffffffful << USBH_HcControlHeadED_CHED_Pos)
 
#define USBH_HcControlCurrentED_CCED_Pos   (4)
 
#define USBH_HcControlCurrentED_CCED_Msk   (0xffffffful << USBH_HcControlCurrentED_CCED_Pos)
 
#define USBH_HcBulkHeadED_BHED_Pos   (4)
 
#define USBH_HcBulkHeadED_BHED_Msk   (0xffffffful << USBH_HcBulkHeadED_BHED_Pos)
 
#define USBH_HcBulkCurrentED_BCED_Pos   (4)
 
#define USBH_HcBulkCurrentED_BCED_Msk   (0xffffffful << USBH_HcBulkCurrentED_BCED_Pos)
 
#define USBH_HcDoneHead_DH_Pos   (4)
 
#define USBH_HcDoneHead_DH_Msk   (0xffffffful << USBH_HcDoneHead_DH_Pos)
 
#define USBH_HcFmInterval_FI_Pos   (0)
 
#define USBH_HcFmInterval_FI_Msk   (0x3ffful << USBH_HcFmInterval_FI_Pos)
 
#define USBH_HcFmInterval_FSMPS_Pos   (16)
 
#define USBH_HcFmInterval_FSMPS_Msk   (0x7ffful << USBH_HcFmInterval_FSMPS_Pos)
 
#define USBH_HcFmInterval_FIT_Pos   (31)
 
#define USBH_HcFmInterval_FIT_Msk   (0x1ul << USBH_HcFmInterval_FIT_Pos)
 
#define USBH_HcFmRemaining_FR_Pos   (0)
 
#define USBH_HcFmRemaining_FR_Msk   (0x3ffful << USBH_HcFmRemaining_FR_Pos)
 
#define USBH_HcFmRemaining_FRT_Pos   (31)
 
#define USBH_HcFmRemaining_FRT_Msk   (0x1ul << USBH_HcFmRemaining_FRT_Pos)
 
#define USBH_HcFmNumber_FN_Pos   (0)
 
#define USBH_HcFmNumber_FN_Msk   (0xfffful << USBH_HcFmNumber_FN_Pos)
 
#define USBH_HcPeriodicStart_PS_Pos   (0)
 
#define USBH_HcPeriodicStart_PS_Msk   (0x3ffful << USBH_HcPeriodicStart_PS_Pos)
 
#define USBH_HcLSThreshold_LST_Pos   (0)
 
#define USBH_HcLSThreshold_LST_Msk   (0xffful << USBH_HcLSThreshold_LST_Pos)
 
#define USBH_HcRhDescriptorA_NDP_Pos   (0)
 
#define USBH_HcRhDescriptorA_NDP_Msk   (0xfful << USBH_HcRhDescriptorA_NDP_Pos)
 
#define USBH_HcRhDescriptorA_PSM_Pos   (8)
 
#define USBH_HcRhDescriptorA_PSM_Msk   (0x1ul << USBH_HcRhDescriptorA_PSM_Pos)
 
#define USBH_HcRhDescriptorA_OCPM_Pos   (11)
 
#define USBH_HcRhDescriptorA_OCPM_Msk   (0x1ul << USBH_HcRhDescriptorA_OCPM_Pos)
 
#define USBH_HcRhDescriptorA_NOCP_Pos   (12)
 
#define USBH_HcRhDescriptorA_NOCP_Msk   (0x1ul << USBH_HcRhDescriptorA_NOCP_Pos)
 
#define USBH_HcRhDescriptorB_PPCM_Pos   (16)
 
#define USBH_HcRhDescriptorB_PPCM_Msk   (0xfffful << USBH_HcRhDescriptorB_PPCM_Pos)
 
#define USBH_HcRhStatus_LPS_Pos   (0)
 
#define USBH_HcRhStatus_LPS_Msk   (0x1ul << USBH_HcRhStatus_LPS_Pos)
 
#define USBH_HcRhStatus_OCI_Pos   (1)
 
#define USBH_HcRhStatus_OCI_Msk   (0x1ul << USBH_HcRhStatus_OCI_Pos)
 
#define USBH_HcRhStatus_DRWE_Pos   (15)
 
#define USBH_HcRhStatus_DRWE_Msk   (0x1ul << USBH_HcRhStatus_DRWE_Pos)
 
#define USBH_HcRhStatus_LPSC_Pos   (16)
 
#define USBH_HcRhStatus_LPSC_Msk   (0x1ul << USBH_HcRhStatus_LPSC_Pos)
 
#define USBH_HcRhStatus_OCIC_Pos   (17)
 
#define USBH_HcRhStatus_OCIC_Msk   (0x1ul << USBH_HcRhStatus_OCIC_Pos)
 
#define USBH_HcRhStatus_CRWE_Pos   (31)
 
#define USBH_HcRhStatus_CRWE_Msk   (0x1ul << USBH_HcRhStatus_CRWE_Pos)
 
#define USBH_HcRhPortStatus_CCS_Pos   (0)
 
#define USBH_HcRhPortStatus_CCS_Msk   (0x1ul << USBH_HcRhPortStatus_CCS_Pos)
 
#define USBH_HcRhPortStatus_PES_Pos   (1)
 
#define USBH_HcRhPortStatus_PES_Msk   (0x1ul << USBH_HcRhPortStatus_PES_Pos)
 
#define USBH_HcRhPortStatus_PSS_Pos   (2)
 
#define USBH_HcRhPortStatus_PSS_Msk   (0x1ul << USBH_HcRhPortStatus_PSS_Pos)
 
#define USBH_HcRhPortStatus_POCI_Pos   (3)
 
#define USBH_HcRhPortStatus_POCI_Msk   (0x1ul << USBH_HcRhPortStatus_POCI_Pos)
 
#define USBH_HcRhPortStatus_PRS_Pos   (4)
 
#define USBH_HcRhPortStatus_PRS_Msk   (0x1ul << USBH_HcRhPortStatus_PRS_Pos)
 
#define USBH_HcRhPortStatus_PPS_Pos   (8)
 
#define USBH_HcRhPortStatus_PPS_Msk   (0x1ul << USBH_HcRhPortStatus_PPS_Pos)
 
#define USBH_HcRhPortStatus_LSDA_Pos   (9)
 
#define USBH_HcRhPortStatus_LSDA_Msk   (0x1ul << USBH_HcRhPortStatus_LSDA_Pos)
 
#define USBH_HcRhPortStatus_CSC_Pos   (16)
 
#define USBH_HcRhPortStatus_CSC_Msk   (0x1ul << USBH_HcRhPortStatus_CSC_Pos)
 
#define USBH_HcRhPortStatus_PESC_Pos   (17)
 
#define USBH_HcRhPortStatus_PESC_Msk   (0x1ul << USBH_HcRhPortStatus_PESC_Pos)
 
#define USBH_HcRhPortStatus_PSSC_Pos   (18)
 
#define USBH_HcRhPortStatus_PSSC_Msk   (0x1ul << USBH_HcRhPortStatus_PSSC_Pos)
 
#define USBH_HcRhPortStatus_OCIC_Pos   (19)
 
#define USBH_HcRhPortStatus_OCIC_Msk   (0x1ul << USBH_HcRhPortStatus_OCIC_Pos)
 
#define USBH_HcRhPortStatus_PRSC_Pos   (20)
 
#define USBH_HcRhPortStatus_PRSC_Msk   (0x1ul << USBH_HcRhPortStatus_PRSC_Pos)
 
#define USBH_HcPhyControl_STBYEN_Pos   (27)
 
#define USBH_HcPhyControl_STBYEN_Msk   (0x1ul << USBH_HcPhyControl_STBYEN_Pos)
 
#define USBH_HcMiscControl_ABORT_Pos   (1)
 
#define USBH_HcMiscControl_ABORT_Msk   (0x1ul << USBH_HcMiscControl_ABORT_Pos)
 
#define USBH_HcMiscControl_OCAL_Pos   (3)
 
#define USBH_HcMiscControl_OCAL_Msk   (0x1ul << USBH_HcMiscControl_OCAL_Pos)
 
#define USBH_HcMiscControl_DPRT1_Pos   (16)
 
#define USBH_HcMiscControl_DPRT1_Msk   (0x1ul << USBH_HcMiscControl_DPRT1_Pos)
 
#define WDT_CTL_RSTCNT_Pos   (0)
 
#define WDT_CTL_RSTCNT_Msk   (0x1ul << WDT_CTL_RSTCNT_Pos)
 
#define WDT_CTL_RSTEN_Pos   (1)
 
#define WDT_CTL_RSTEN_Msk   (0x1ul << WDT_CTL_RSTEN_Pos)
 
#define WDT_CTL_RSTF_Pos   (2)
 
#define WDT_CTL_RSTF_Msk   (0x1ul << WDT_CTL_RSTF_Pos)
 
#define WDT_CTL_IF_Pos   (3)
 
#define WDT_CTL_IF_Msk   (0x1ul << WDT_CTL_IF_Pos)
 
#define WDT_CTL_WKEN_Pos   (4)
 
#define WDT_CTL_WKEN_Msk   (0x1ul << WDT_CTL_WKEN_Pos)
 
#define WDT_CTL_WKF_Pos   (5)
 
#define WDT_CTL_WKF_Msk   (0x1ul << WDT_CTL_WKF_Pos)
 
#define WDT_CTL_INTEN_Pos   (6)
 
#define WDT_CTL_INTEN_Msk   (0x1ul << WDT_CTL_INTEN_Pos)
 
#define WDT_CTL_WDTEN_Pos   (7)
 
#define WDT_CTL_WDTEN_Msk   (0x1ul << WDT_CTL_WDTEN_Pos)
 
#define WDT_CTL_TOUTSEL_Pos   (8)
 
#define WDT_CTL_TOUTSEL_Msk   (0x7ul << WDT_CTL_TOUTSEL_Pos)
 
#define WDT_CTL_ICEDEBUG_Pos   (31)
 
#define WDT_CTL_ICEDEBUG_Msk   (0x1ul << WDT_CTL_ICEDEBUG_Pos)
 
#define WDT_ALTCTL_RSTDSEL_Pos   (0)
 
#define WDT_ALTCTL_RSTDSEL_Msk   (0x3ul << WDT_ALTCTL_RSTDSEL_Pos)
 
#define WWDT_RLDCNT_WWDT_RLDCNT_Pos   (0)
 
#define WWDT_RLDCNT_WWDT_RLDCNT_Msk   (0xfffffffful << WWDT_RLDCNT_WWDT_RLDCNT_Pos)
 
#define WWDT_CTL_WWDTEN_Pos   (0)
 
#define WWDT_CTL_WWDTEN_Msk   (0x1ul << WWDT_CTL_WWDTEN_Pos)
 
#define WWDT_CTL_INTEN_Pos   (1)
 
#define WWDT_CTL_INTEN_Msk   (0x1ul << WWDT_CTL_INTEN_Pos)
 
#define WWDT_CTL_PSCSEL_Pos   (8)
 
#define WWDT_CTL_PSCSEL_Msk   (0xful << WWDT_CTL_PSCSEL_Pos)
 
#define WWDT_CTL_CMPDAT_Pos   (16)
 
#define WWDT_CTL_CMPDAT_Msk   (0x3ful << WWDT_CTL_CMPDAT_Pos)
 
#define WWDT_CTL_ICEDEBUG_Pos   (31)
 
#define WWDT_CTL_ICEDEBUG_Msk   (0x1ul << WWDT_CTL_ICEDEBUG_Pos)
 
#define WWDT_STATUS_WWDTIF_Pos   (0)
 
#define WWDT_STATUS_WWDTIF_Msk   (0x1ul << WWDT_STATUS_WWDTIF_Pos)
 
#define WWDT_STATUS_WWDTRF_Pos   (1)
 
#define WWDT_STATUS_WWDTRF_Msk   (0x1ul << WWDT_STATUS_WWDTRF_Pos)
 
#define WWDT_CNT_CNTDAT_Pos   (0)
 
#define WWDT_CNT_CNTDAT_Msk   (0x3ful << WWDT_CNT_CNTDAT_Pos)
 

Typedefs

typedef enum IRQn IRQn_Type
 
typedef volatile unsigned char vu8
 
typedef volatile unsigned long vu32
 
typedef volatile unsigned short vu16
 

Enumerations

enum  IRQn {
  NonMaskableInt_IRQn = -14 ,
  MemoryManagement_IRQn = -12 ,
  BusFault_IRQn = -11 ,
  UsageFault_IRQn = -10 ,
  SVCall_IRQn = -5 ,
  DebugMonitor_IRQn = -4 ,
  PendSV_IRQn = -2 ,
  SysTick_IRQn = -1 ,
  BOD_IRQn = 0 ,
  IRC_IRQn = 1 ,
  PWRWU_IRQn = 2 ,
  CKFAIL_IRQn = 4 ,
  RTC_IRQn = 6 ,
  TAMPER_IRQn = 7 ,
  WDT_IRQn = 8 ,
  WWDT_IRQn = 9 ,
  EINT0_IRQn = 10 ,
  EINT1_IRQn = 11 ,
  EINT2_IRQn = 12 ,
  EINT3_IRQn = 13 ,
  EINT4_IRQn = 14 ,
  EINT5_IRQn = 15 ,
  GPA_IRQn = 16 ,
  GPB_IRQn = 17 ,
  GPC_IRQn = 18 ,
  GPD_IRQn = 19 ,
  GPE_IRQn = 20 ,
  GPF_IRQn = 21 ,
  SPI0_IRQn = 22 ,
  SPI1_IRQn = 23 ,
  BRAKE0_IRQn = 24 ,
  PWM0P0_IRQn = 25 ,
  PWM0P1_IRQn = 26 ,
  PWM0P2_IRQn = 27 ,
  BRAKE1_IRQn = 28 ,
  PWM1P0_IRQn = 29 ,
  PWM1P1_IRQn = 30 ,
  PWM1P2_IRQn = 31 ,
  TMR0_IRQn = 32 ,
  TMR1_IRQn = 33 ,
  TMR2_IRQn = 34 ,
  TMR3_IRQn = 35 ,
  UART0_IRQn = 36 ,
  UART1_IRQn = 37 ,
  I2C0_IRQn = 38 ,
  I2C1_IRQn = 39 ,
  PDMA_IRQn = 40 ,
  ADC00_IRQn = 42 ,
  ADC01_IRQn = 43 ,
  ADC02_IRQn = 46 ,
  ADC03_IRQn = 47 ,
  UART2_IRQn = 48 ,
  UART3_IRQn = 49 ,
  USBD_IRQn = 53 ,
  USBH_IRQn = 54 ,
  SC0_IRQn = 58
}
 

Macro Definition Documentation

◆ CRC_CHECKSUM_CHECKSUM_Msk

#define CRC_CHECKSUM_CHECKSUM_Msk   (0xfffffffful << CRC_CHECKSUM_CHECKSUM_Pos)

CRC_T::CHECKSUM: CHECKSUM Mask

Definition at line 1853 of file M471M_R1_S.h.

◆ CRC_CHECKSUM_CHECKSUM_Pos

#define CRC_CHECKSUM_CHECKSUM_Pos   (0)

CRC_T::CHECKSUM: CHECKSUM Position

Definition at line 1852 of file M471M_R1_S.h.

◆ CRC_CTL_CHKSFMT_Msk

#define CRC_CTL_CHKSFMT_Msk   (0x1ul << CRC_CTL_CHKSFMT_Pos)

CRC_T::CTL: CHKSFMT Mask

Definition at line 1838 of file M471M_R1_S.h.

◆ CRC_CTL_CHKSFMT_Pos

#define CRC_CTL_CHKSFMT_Pos   (27)

CRC_T::CTL: CHKSFMT Position

Definition at line 1837 of file M471M_R1_S.h.

◆ CRC_CTL_CHKSREV_Msk

#define CRC_CTL_CHKSREV_Msk   (0x1ul << CRC_CTL_CHKSREV_Pos)

CRC_T::CTL: CHKSREV Mask

Definition at line 1832 of file M471M_R1_S.h.

◆ CRC_CTL_CHKSREV_Pos

#define CRC_CTL_CHKSREV_Pos   (25)

CRC_T::CTL: CHKSREV Position

Definition at line 1831 of file M471M_R1_S.h.

◆ CRC_CTL_CRCEN_Msk

#define CRC_CTL_CRCEN_Msk   (0x1ul << CRC_CTL_CRCEN_Pos)

CRC_T::CTL: CRCEN Mask

Definition at line 1823 of file M471M_R1_S.h.

◆ CRC_CTL_CRCEN_Pos

#define CRC_CTL_CRCEN_Pos   (0)
@addtogroup CRC_CONST CRC Bit Field Definition
Constant Definitions for CRC Controller

CRC_T::CTL: CRCEN Position

Definition at line 1822 of file M471M_R1_S.h.

◆ CRC_CTL_CRCMODE_Msk

#define CRC_CTL_CRCMODE_Msk   (0x3ul << CRC_CTL_CRCMODE_Pos)

CRC_T::CTL: CRCMODE Mask

Definition at line 1844 of file M471M_R1_S.h.

◆ CRC_CTL_CRCMODE_Pos

#define CRC_CTL_CRCMODE_Pos   (30)

CRC_T::CTL: CRCMODE Position

Definition at line 1843 of file M471M_R1_S.h.

◆ CRC_CTL_CRCRST_Msk

#define CRC_CTL_CRCRST_Msk   (0x1ul << CRC_CTL_CRCRST_Pos)

CRC_T::CTL: CRCRST Mask

Definition at line 1826 of file M471M_R1_S.h.

◆ CRC_CTL_CRCRST_Pos

#define CRC_CTL_CRCRST_Pos   (1)

CRC_T::CTL: CRCRST Position

Definition at line 1825 of file M471M_R1_S.h.

◆ CRC_CTL_DATFMT_Msk

#define CRC_CTL_DATFMT_Msk   (0x1ul << CRC_CTL_DATFMT_Pos)

CRC_T::CTL: DATFMT Mask

Definition at line 1835 of file M471M_R1_S.h.

◆ CRC_CTL_DATFMT_Pos

#define CRC_CTL_DATFMT_Pos   (26)

CRC_T::CTL: DATFMT Position

Definition at line 1834 of file M471M_R1_S.h.

◆ CRC_CTL_DATLEN_Msk

#define CRC_CTL_DATLEN_Msk   (0x3ul << CRC_CTL_DATLEN_Pos)

CRC_T::CTL: DATLEN Mask

Definition at line 1841 of file M471M_R1_S.h.

◆ CRC_CTL_DATLEN_Pos

#define CRC_CTL_DATLEN_Pos   (28)

CRC_T::CTL: DATLEN Position

Definition at line 1840 of file M471M_R1_S.h.

◆ CRC_CTL_DATREV_Msk

#define CRC_CTL_DATREV_Msk   (0x1ul << CRC_CTL_DATREV_Pos)

CRC_T::CTL: DATREV Mask

Definition at line 1829 of file M471M_R1_S.h.

◆ CRC_CTL_DATREV_Pos

#define CRC_CTL_DATREV_Pos   (24)

CRC_T::CTL: DATREV Position

Definition at line 1828 of file M471M_R1_S.h.

◆ CRC_DAT_DATA_Msk

#define CRC_DAT_DATA_Msk   (0xfffffffful << CRC_DAT_DATA_Pos)

CRC_T::DAT: DATA Mask

Definition at line 1847 of file M471M_R1_S.h.

◆ CRC_DAT_DATA_Pos

#define CRC_DAT_DATA_Pos   (0)

CRC_T::DAT: DATA Position

Definition at line 1846 of file M471M_R1_S.h.

◆ CRC_SEED_SEED_Msk

#define CRC_SEED_SEED_Msk   (0xfffffffful << CRC_SEED_SEED_Pos)

CRC_T::SEED: SEED Mask

Definition at line 1850 of file M471M_R1_S.h.

◆ CRC_SEED_SEED_Pos

#define CRC_SEED_SEED_Pos   (0)

CRC_T::SEED: SEED Position

Definition at line 1849 of file M471M_R1_S.h.

◆ EBI_CTL0_CSPOLINV_Msk

#define EBI_CTL0_CSPOLINV_Msk   (0x1ul << EBI_CTL0_CSPOLINV_Pos)

EBI_T::CTL0: CSPOLINV Mask

Definition at line 2018 of file M471M_R1_S.h.

◆ EBI_CTL0_CSPOLINV_Pos

#define EBI_CTL0_CSPOLINV_Pos   (2)

EBI_T::CTL0: CSPOLINV Position

Definition at line 2017 of file M471M_R1_S.h.

◆ EBI_CTL0_DW16_Msk

#define EBI_CTL0_DW16_Msk   (0x1ul << EBI_CTL0_DW16_Pos)

EBI_T::CTL0: DW16 Mask

Definition at line 2015 of file M471M_R1_S.h.

◆ EBI_CTL0_DW16_Pos

#define EBI_CTL0_DW16_Pos   (1)

EBI_T::CTL0: DW16 Position

Definition at line 2014 of file M471M_R1_S.h.

◆ EBI_CTL0_EN_Msk

#define EBI_CTL0_EN_Msk   (0x1ul << EBI_CTL0_EN_Pos)

EBI_T::CTL0: EN Mask

Definition at line 2012 of file M471M_R1_S.h.

◆ EBI_CTL0_EN_Pos

#define EBI_CTL0_EN_Pos   (0)
@addtogroup EBI_CONST EBI Bit Field Definition
Constant Definitions for EBI Controller

EBI_T::CTL0: EN Position

Definition at line 2011 of file M471M_R1_S.h.

◆ EBI_CTL0_MCLKDIV_Msk

#define EBI_CTL0_MCLKDIV_Msk   (0x7ul << EBI_CTL0_MCLKDIV_Pos)

EBI_T::CTL0: MCLKDIV Mask

Definition at line 2021 of file M471M_R1_S.h.

◆ EBI_CTL0_MCLKDIV_Pos

#define EBI_CTL0_MCLKDIV_Pos   (8)

EBI_T::CTL0: MCLKDIV Position

Definition at line 2020 of file M471M_R1_S.h.

◆ EBI_CTL0_TALE_Msk

#define EBI_CTL0_TALE_Msk   (0x7ul << EBI_CTL0_TALE_Pos)

EBI_T::CTL0: TALE Mask

Definition at line 2024 of file M471M_R1_S.h.

◆ EBI_CTL0_TALE_Pos

#define EBI_CTL0_TALE_Pos   (16)

EBI_T::CTL0: TALE Position

Definition at line 2023 of file M471M_R1_S.h.

◆ EBI_CTL0_WBUFEN_Msk

#define EBI_CTL0_WBUFEN_Msk   (0x1ul << EBI_CTL0_WBUFEN_Pos)

EBI_T::CTL0: WBUFEN Mask

Definition at line 2027 of file M471M_R1_S.h.

◆ EBI_CTL0_WBUFEN_Pos

#define EBI_CTL0_WBUFEN_Pos   (24)

EBI_T::CTL0: WBUFEN Position

Definition at line 2026 of file M471M_R1_S.h.

◆ EBI_CTL1_CSPOLINV_Msk

#define EBI_CTL1_CSPOLINV_Msk   (0x1ul << EBI_CTL1_CSPOLINV_Pos)

EBI_T::CTL1: CSPOLINV Mask

Definition at line 2054 of file M471M_R1_S.h.

◆ EBI_CTL1_CSPOLINV_Pos

#define EBI_CTL1_CSPOLINV_Pos   (2)

EBI_T::CTL1: CSPOLINV Position

Definition at line 2053 of file M471M_R1_S.h.

◆ EBI_CTL1_DW16_Msk

#define EBI_CTL1_DW16_Msk   (0x1ul << EBI_CTL1_DW16_Pos)

EBI_T::CTL1: DW16 Mask

Definition at line 2051 of file M471M_R1_S.h.

◆ EBI_CTL1_DW16_Pos

#define EBI_CTL1_DW16_Pos   (1)

EBI_T::CTL1: DW16 Position

Definition at line 2050 of file M471M_R1_S.h.

◆ EBI_CTL1_EN_Msk

#define EBI_CTL1_EN_Msk   (0x1ul << EBI_CTL1_EN_Pos)

EBI_T::CTL1: EN Mask

Definition at line 2048 of file M471M_R1_S.h.

◆ EBI_CTL1_EN_Pos

#define EBI_CTL1_EN_Pos   (0)

EBI_T::CTL1: EN Position

Definition at line 2047 of file M471M_R1_S.h.

◆ EBI_CTL1_MCLKDIV_Msk

#define EBI_CTL1_MCLKDIV_Msk   (0x7ul << EBI_CTL1_MCLKDIV_Pos)

EBI_T::CTL1: MCLKDIV Mask

Definition at line 2057 of file M471M_R1_S.h.

◆ EBI_CTL1_MCLKDIV_Pos

#define EBI_CTL1_MCLKDIV_Pos   (8)

EBI_T::CTL1: MCLKDIV Position

Definition at line 2056 of file M471M_R1_S.h.

◆ EBI_CTL1_TALE_Msk

#define EBI_CTL1_TALE_Msk   (0x7ul << EBI_CTL1_TALE_Pos)

EBI_T::CTL1: TALE Mask

Definition at line 2060 of file M471M_R1_S.h.

◆ EBI_CTL1_TALE_Pos

#define EBI_CTL1_TALE_Pos   (16)

EBI_T::CTL1: TALE Position

Definition at line 2059 of file M471M_R1_S.h.

◆ EBI_CTL1_WBUFEN_Msk

#define EBI_CTL1_WBUFEN_Msk   (0x1ul << EBI_CTL1_WBUFEN_Pos)

EBI_T::CTL1: WBUFEN Mask

Definition at line 2063 of file M471M_R1_S.h.

◆ EBI_CTL1_WBUFEN_Pos

#define EBI_CTL1_WBUFEN_Pos   (24)

EBI_T::CTL1: WBUFEN Position

Definition at line 2062 of file M471M_R1_S.h.

◆ EBI_TCTL0_R2R_Msk

#define EBI_TCTL0_R2R_Msk   (0xful << EBI_TCTL0_R2R_Pos)

EBI_T::TCTL0: R2R Mask

Definition at line 2045 of file M471M_R1_S.h.

◆ EBI_TCTL0_R2R_Pos

#define EBI_TCTL0_R2R_Pos   (24)

EBI_T::TCTL0: R2R Position

Definition at line 2044 of file M471M_R1_S.h.

◆ EBI_TCTL0_RAHDOFF_Msk

#define EBI_TCTL0_RAHDOFF_Msk   (0x1ul << EBI_TCTL0_RAHDOFF_Pos)

EBI_T::TCTL0: RAHDOFF Mask

Definition at line 2039 of file M471M_R1_S.h.

◆ EBI_TCTL0_RAHDOFF_Pos

#define EBI_TCTL0_RAHDOFF_Pos   (22)

EBI_T::TCTL0: RAHDOFF Position

Definition at line 2038 of file M471M_R1_S.h.

◆ EBI_TCTL0_TACC_Msk

#define EBI_TCTL0_TACC_Msk   (0x1ful << EBI_TCTL0_TACC_Pos)

EBI_T::TCTL0: TACC Mask

Definition at line 2030 of file M471M_R1_S.h.

◆ EBI_TCTL0_TACC_Pos

#define EBI_TCTL0_TACC_Pos   (3)

EBI_T::TCTL0: TACC Position

Definition at line 2029 of file M471M_R1_S.h.

◆ EBI_TCTL0_TAHD_Msk

#define EBI_TCTL0_TAHD_Msk   (0x7ul << EBI_TCTL0_TAHD_Pos)

EBI_T::TCTL0: TAHD Mask

Definition at line 2033 of file M471M_R1_S.h.

◆ EBI_TCTL0_TAHD_Pos

#define EBI_TCTL0_TAHD_Pos   (8)

EBI_T::TCTL0: TAHD Position

Definition at line 2032 of file M471M_R1_S.h.

◆ EBI_TCTL0_W2X_Msk

#define EBI_TCTL0_W2X_Msk   (0xful << EBI_TCTL0_W2X_Pos)

EBI_T::TCTL0: W2X Mask

Definition at line 2036 of file M471M_R1_S.h.

◆ EBI_TCTL0_W2X_Pos

#define EBI_TCTL0_W2X_Pos   (12)

EBI_T::TCTL0: W2X Position

Definition at line 2035 of file M471M_R1_S.h.

◆ EBI_TCTL0_WAHDOFF_Msk

#define EBI_TCTL0_WAHDOFF_Msk   (0x1ul << EBI_TCTL0_WAHDOFF_Pos)

EBI_T::TCTL0: WAHDOFF Mask

Definition at line 2042 of file M471M_R1_S.h.

◆ EBI_TCTL0_WAHDOFF_Pos

#define EBI_TCTL0_WAHDOFF_Pos   (23)

EBI_T::TCTL0: WAHDOFF Position

Definition at line 2041 of file M471M_R1_S.h.

◆ EBI_TCTL1_R2R_Msk

#define EBI_TCTL1_R2R_Msk   (0xful << EBI_TCTL1_R2R_Pos)

EBI_T::TCTL1: R2R Mask

Definition at line 2081 of file M471M_R1_S.h.

◆ EBI_TCTL1_R2R_Pos

#define EBI_TCTL1_R2R_Pos   (24)

EBI_T::TCTL1: R2R Position

Definition at line 2080 of file M471M_R1_S.h.

◆ EBI_TCTL1_RAHDOFF_Msk

#define EBI_TCTL1_RAHDOFF_Msk   (0x1ul << EBI_TCTL1_RAHDOFF_Pos)

EBI_T::TCTL1: RAHDOFF Mask

Definition at line 2075 of file M471M_R1_S.h.

◆ EBI_TCTL1_RAHDOFF_Pos

#define EBI_TCTL1_RAHDOFF_Pos   (22)

EBI_T::TCTL1: RAHDOFF Position

Definition at line 2074 of file M471M_R1_S.h.

◆ EBI_TCTL1_TACC_Msk

#define EBI_TCTL1_TACC_Msk   (0x1ful << EBI_TCTL1_TACC_Pos)

EBI_T::TCTL1: TACC Mask

Definition at line 2066 of file M471M_R1_S.h.

◆ EBI_TCTL1_TACC_Pos

#define EBI_TCTL1_TACC_Pos   (3)

EBI_T::TCTL1: TACC Position

Definition at line 2065 of file M471M_R1_S.h.

◆ EBI_TCTL1_TAHD_Msk

#define EBI_TCTL1_TAHD_Msk   (0x7ul << EBI_TCTL1_TAHD_Pos)

EBI_T::TCTL1: TAHD Mask

Definition at line 2069 of file M471M_R1_S.h.

◆ EBI_TCTL1_TAHD_Pos

#define EBI_TCTL1_TAHD_Pos   (8)

EBI_T::TCTL1: TAHD Position

Definition at line 2068 of file M471M_R1_S.h.

◆ EBI_TCTL1_W2X_Msk

#define EBI_TCTL1_W2X_Msk   (0xful << EBI_TCTL1_W2X_Pos)

EBI_T::TCTL1: W2X Mask

Definition at line 2072 of file M471M_R1_S.h.

◆ EBI_TCTL1_W2X_Pos

#define EBI_TCTL1_W2X_Pos   (12)

EBI_T::TCTL1: W2X Position

Definition at line 2071 of file M471M_R1_S.h.

◆ EBI_TCTL1_WAHDOFF_Msk

#define EBI_TCTL1_WAHDOFF_Msk   (0x1ul << EBI_TCTL1_WAHDOFF_Pos)

EBI_T::TCTL1: WAHDOFF Mask

Definition at line 2078 of file M471M_R1_S.h.

◆ EBI_TCTL1_WAHDOFF_Pos

#define EBI_TCTL1_WAHDOFF_Pos   (23)

EBI_T::TCTL1: WAHDOFF Position

Definition at line 2077 of file M471M_R1_S.h.

◆ FMC_DFBA_DFBA_Msk

#define FMC_DFBA_DFBA_Msk   (0xfffffffful << FMC_DFBA_DFBA_Pos)

FMC_T::DFBA: DFBA Mask

Definition at line 2397 of file M471M_R1_S.h.

◆ FMC_DFBA_DFBA_Pos

#define FMC_DFBA_DFBA_Pos   (0)

FMC_T::DFBA: DFBA Position

Definition at line 2396 of file M471M_R1_S.h.

◆ FMC_FTCTL_FOM_Msk

#define FMC_FTCTL_FOM_Msk   (0x7ul << FMC_FTCTL_FOM_Pos)

FMC_T::FTCTL: FOM Mask

Definition at line 2400 of file M471M_R1_S.h.

◆ FMC_FTCTL_FOM_Pos

#define FMC_FTCTL_FOM_Pos   (4)

FMC_T::FTCTL: FOM Position

Definition at line 2399 of file M471M_R1_S.h.

◆ FMC_ISPADDR_ISPADDR_Msk

#define FMC_ISPADDR_ISPADDR_Msk   (0xfffffffful << FMC_ISPADDR_ISPADDR_Pos)

FMC_T::ISPADDR: ISPADDR Mask

Definition at line 2385 of file M471M_R1_S.h.

◆ FMC_ISPADDR_ISPADDR_Pos

#define FMC_ISPADDR_ISPADDR_Pos   (0)

FMC_T::ISPADDR: ISPADDR Position

Definition at line 2384 of file M471M_R1_S.h.

◆ FMC_ISPCMD_CMD_Msk

#define FMC_ISPCMD_CMD_Msk   (0x7ful << FMC_ISPCMD_CMD_Pos)

FMC_T::ISPCMD: CMD Mask

Definition at line 2391 of file M471M_R1_S.h.

◆ FMC_ISPCMD_CMD_Pos

#define FMC_ISPCMD_CMD_Pos   (0)

FMC_T::ISPCMD: CMD Position

Definition at line 2390 of file M471M_R1_S.h.

◆ FMC_ISPCTL_APUEN_Msk

#define FMC_ISPCTL_APUEN_Msk   (0x1ul << FMC_ISPCTL_APUEN_Pos)

FMC_T::ISPCTL: APUEN Mask

Definition at line 2370 of file M471M_R1_S.h.

◆ FMC_ISPCTL_APUEN_Pos

#define FMC_ISPCTL_APUEN_Pos   (3)

FMC_T::ISPCTL: APUEN Position

Definition at line 2369 of file M471M_R1_S.h.

◆ FMC_ISPCTL_BL_Msk

#define FMC_ISPCTL_BL_Msk   (0x1ul << FMC_ISPCTL_BL_Pos)

FMC_T::ISPCTL: BL Mask

Definition at line 2382 of file M471M_R1_S.h.

◆ FMC_ISPCTL_BL_Pos

#define FMC_ISPCTL_BL_Pos   (16)

FMC_T::ISPCTL: BL Position

Definition at line 2381 of file M471M_R1_S.h.

◆ FMC_ISPCTL_BS_Msk

#define FMC_ISPCTL_BS_Msk   (0x1ul << FMC_ISPCTL_BS_Pos)

FMC_T::ISPCTL: BS Mask

Definition at line 2367 of file M471M_R1_S.h.

◆ FMC_ISPCTL_BS_Pos

#define FMC_ISPCTL_BS_Pos   (1)

FMC_T::ISPCTL: BS Position

Definition at line 2366 of file M471M_R1_S.h.

◆ FMC_ISPCTL_CFGUEN_Msk

#define FMC_ISPCTL_CFGUEN_Msk   (0x1ul << FMC_ISPCTL_CFGUEN_Pos)

FMC_T::ISPCTL: CFGUEN Mask

Definition at line 2373 of file M471M_R1_S.h.

◆ FMC_ISPCTL_CFGUEN_Pos

#define FMC_ISPCTL_CFGUEN_Pos   (4)

FMC_T::ISPCTL: CFGUEN Position

Definition at line 2372 of file M471M_R1_S.h.

◆ FMC_ISPCTL_ISPEN_Msk

#define FMC_ISPCTL_ISPEN_Msk   (0x1ul << FMC_ISPCTL_ISPEN_Pos)

FMC_T::ISPCTL: ISPEN Mask

Definition at line 2364 of file M471M_R1_S.h.

◆ FMC_ISPCTL_ISPEN_Pos

#define FMC_ISPCTL_ISPEN_Pos   (0)
@addtogroup FMC_CONST FMC Bit Field Definition
Constant Definitions for FMC Controller

FMC_T::ISPCTL: ISPEN Position

Definition at line 2363 of file M471M_R1_S.h.

◆ FMC_ISPCTL_ISPFF_Msk

#define FMC_ISPCTL_ISPFF_Msk   (0x1ul << FMC_ISPCTL_ISPFF_Pos)

FMC_T::ISPCTL: ISPFF Mask

Definition at line 2379 of file M471M_R1_S.h.

◆ FMC_ISPCTL_ISPFF_Pos

#define FMC_ISPCTL_ISPFF_Pos   (6)

FMC_T::ISPCTL: ISPFF Position

Definition at line 2378 of file M471M_R1_S.h.

◆ FMC_ISPCTL_LDUEN_Msk

#define FMC_ISPCTL_LDUEN_Msk   (0x1ul << FMC_ISPCTL_LDUEN_Pos)

FMC_T::ISPCTL: LDUEN Mask

Definition at line 2376 of file M471M_R1_S.h.

◆ FMC_ISPCTL_LDUEN_Pos

#define FMC_ISPCTL_LDUEN_Pos   (5)

FMC_T::ISPCTL: LDUEN Position

Definition at line 2375 of file M471M_R1_S.h.

◆ FMC_ISPDAT_ISPDAT_Msk

#define FMC_ISPDAT_ISPDAT_Msk   (0xfffffffful << FMC_ISPDAT_ISPDAT_Pos)

FMC_T::ISPDAT: ISPDAT Mask

Definition at line 2388 of file M471M_R1_S.h.

◆ FMC_ISPDAT_ISPDAT_Pos

#define FMC_ISPDAT_ISPDAT_Pos   (0)

FMC_T::ISPDAT: ISPDAT Position

Definition at line 2387 of file M471M_R1_S.h.

◆ FMC_ISPSTS_CBS_Msk

#define FMC_ISPSTS_CBS_Msk   (0x3ul << FMC_ISPSTS_CBS_Pos)

FMC_T::ISPSTS: CBS Mask

Definition at line 2406 of file M471M_R1_S.h.

◆ FMC_ISPSTS_CBS_Pos

#define FMC_ISPSTS_CBS_Pos   (1)

FMC_T::ISPSTS: CBS Position

Definition at line 2405 of file M471M_R1_S.h.

◆ FMC_ISPSTS_ISPBUSY_Msk

#define FMC_ISPSTS_ISPBUSY_Msk   (0x1ul << FMC_ISPSTS_ISPBUSY_Pos)

FMC_T::ISPSTS: ISPBUSY Mask

Definition at line 2403 of file M471M_R1_S.h.

◆ FMC_ISPSTS_ISPBUSY_Pos

#define FMC_ISPSTS_ISPBUSY_Pos   (0)

FMC_T::ISPSTS: ISPBUSY Position

Definition at line 2402 of file M471M_R1_S.h.

◆ FMC_ISPSTS_ISPFF_Msk

#define FMC_ISPSTS_ISPFF_Msk   (0x1ul << FMC_ISPSTS_ISPFF_Pos)

FMC_T::ISPSTS: ISPFF Mask

Definition at line 2415 of file M471M_R1_S.h.

◆ FMC_ISPSTS_ISPFF_Pos

#define FMC_ISPSTS_ISPFF_Pos   (6)

FMC_T::ISPSTS: ISPFF Position

Definition at line 2414 of file M471M_R1_S.h.

◆ FMC_ISPSTS_MBS_Msk

#define FMC_ISPSTS_MBS_Msk   (0x1ul << FMC_ISPSTS_MBS_Pos)

FMC_T::ISPSTS: MBS Mask

Definition at line 2409 of file M471M_R1_S.h.

◆ FMC_ISPSTS_MBS_Pos

#define FMC_ISPSTS_MBS_Pos   (3)

FMC_T::ISPSTS: MBS Position

Definition at line 2408 of file M471M_R1_S.h.

◆ FMC_ISPSTS_PGFF_Msk

#define FMC_ISPSTS_PGFF_Msk   (0x1ul << FMC_ISPSTS_PGFF_Pos)

FMC_T::ISPSTS: PGFF Mask

Definition at line 2412 of file M471M_R1_S.h.

◆ FMC_ISPSTS_PGFF_Pos

#define FMC_ISPSTS_PGFF_Pos   (5)

FMC_T::ISPSTS: PGFF Position

Definition at line 2411 of file M471M_R1_S.h.

◆ FMC_ISPSTS_VECMAP_Msk

#define FMC_ISPSTS_VECMAP_Msk   (0x7ffful << FMC_ISPSTS_VECMAP_Pos)

FMC_T::ISPSTS: VECMAP Mask

Definition at line 2418 of file M471M_R1_S.h.

◆ FMC_ISPSTS_VECMAP_Pos

#define FMC_ISPSTS_VECMAP_Pos   (9)

FMC_T::ISPSTS: VECMAP Position

Definition at line 2417 of file M471M_R1_S.h.

◆ FMC_ISPTRG_ISPGO_Msk

#define FMC_ISPTRG_ISPGO_Msk   (0x1ul << FMC_ISPTRG_ISPGO_Pos)

FMC_T::ISPTRG: ISPGO Mask

Definition at line 2394 of file M471M_R1_S.h.

◆ FMC_ISPTRG_ISPGO_Pos

#define FMC_ISPTRG_ISPGO_Pos   (0)

FMC_T::ISPTRG: ISPGO Position

Definition at line 2393 of file M471M_R1_S.h.

◆ FMC_MPADDR_MPADDR_Msk

#define FMC_MPADDR_MPADDR_Msk   (0xfffffffful << FMC_MPADDR_MPADDR_Pos)

FMC_T::MPADDR: MPADDR Mask

Definition at line 2454 of file M471M_R1_S.h.

◆ FMC_MPADDR_MPADDR_Pos

#define FMC_MPADDR_MPADDR_Pos   (0)

FMC_T::MPADDR: MPADDR Position

Definition at line 2453 of file M471M_R1_S.h.

◆ FMC_MPDAT0_ISPDAT0_Msk

#define FMC_MPDAT0_ISPDAT0_Msk   (0xfffffffful << FMC_MPDAT0_ISPDAT0_Pos)

FMC_T::MPDAT0: ISPDAT0 Mask

Definition at line 2421 of file M471M_R1_S.h.

◆ FMC_MPDAT0_ISPDAT0_Pos

#define FMC_MPDAT0_ISPDAT0_Pos   (0)

FMC_T::MPDAT0: ISPDAT0 Position

Definition at line 2420 of file M471M_R1_S.h.

◆ FMC_MPDAT1_ISPDAT1_Msk

#define FMC_MPDAT1_ISPDAT1_Msk   (0xfffffffful << FMC_MPDAT1_ISPDAT1_Pos)

FMC_T::MPDAT1: ISPDAT1 Mask

Definition at line 2424 of file M471M_R1_S.h.

◆ FMC_MPDAT1_ISPDAT1_Pos

#define FMC_MPDAT1_ISPDAT1_Pos   (0)

FMC_T::MPDAT1: ISPDAT1 Position

Definition at line 2423 of file M471M_R1_S.h.

◆ FMC_MPDAT2_ISPDAT2_Msk

#define FMC_MPDAT2_ISPDAT2_Msk   (0xfffffffful << FMC_MPDAT2_ISPDAT2_Pos)

FMC_T::MPDAT2: ISPDAT2 Mask

Definition at line 2427 of file M471M_R1_S.h.

◆ FMC_MPDAT2_ISPDAT2_Pos

#define FMC_MPDAT2_ISPDAT2_Pos   (0)

FMC_T::MPDAT2: ISPDAT2 Position

Definition at line 2426 of file M471M_R1_S.h.

◆ FMC_MPDAT3_ISPDAT3_Msk

#define FMC_MPDAT3_ISPDAT3_Msk   (0xfffffffful << FMC_MPDAT3_ISPDAT3_Pos)

FMC_T::MPDAT3: ISPDAT3 Mask

Definition at line 2430 of file M471M_R1_S.h.

◆ FMC_MPDAT3_ISPDAT3_Pos

#define FMC_MPDAT3_ISPDAT3_Pos   (0)

FMC_T::MPDAT3: ISPDAT3 Position

Definition at line 2429 of file M471M_R1_S.h.

◆ FMC_MPSTS_D0_Msk

#define FMC_MPSTS_D0_Msk   (0x1ul << FMC_MPSTS_D0_Pos)

FMC_T::MPSTS: D0 Mask

Definition at line 2442 of file M471M_R1_S.h.

◆ FMC_MPSTS_D0_Pos

#define FMC_MPSTS_D0_Pos   (4)

FMC_T::MPSTS: D0 Position

Definition at line 2441 of file M471M_R1_S.h.

◆ FMC_MPSTS_D1_Msk

#define FMC_MPSTS_D1_Msk   (0x1ul << FMC_MPSTS_D1_Pos)

FMC_T::MPSTS: D1 Mask

Definition at line 2445 of file M471M_R1_S.h.

◆ FMC_MPSTS_D1_Pos

#define FMC_MPSTS_D1_Pos   (5)

FMC_T::MPSTS: D1 Position

Definition at line 2444 of file M471M_R1_S.h.

◆ FMC_MPSTS_D2_Msk

#define FMC_MPSTS_D2_Msk   (0x1ul << FMC_MPSTS_D2_Pos)

FMC_T::MPSTS: D2 Mask

Definition at line 2448 of file M471M_R1_S.h.

◆ FMC_MPSTS_D2_Pos

#define FMC_MPSTS_D2_Pos   (6)

FMC_T::MPSTS: D2 Position

Definition at line 2447 of file M471M_R1_S.h.

◆ FMC_MPSTS_D3_Msk

#define FMC_MPSTS_D3_Msk   (0x1ul << FMC_MPSTS_D3_Pos)

FMC_T::MPSTS: D3 Mask

Definition at line 2451 of file M471M_R1_S.h.

◆ FMC_MPSTS_D3_Pos

#define FMC_MPSTS_D3_Pos   (7)

FMC_T::MPSTS: D3 Position

Definition at line 2450 of file M471M_R1_S.h.

◆ FMC_MPSTS_ISPFF_Msk

#define FMC_MPSTS_ISPFF_Msk   (0x1ul << FMC_MPSTS_ISPFF_Pos)

FMC_T::MPSTS: ISPFF Mask

Definition at line 2439 of file M471M_R1_S.h.

◆ FMC_MPSTS_ISPFF_Pos

#define FMC_MPSTS_ISPFF_Pos   (2)

FMC_T::MPSTS: ISPFF Position

Definition at line 2438 of file M471M_R1_S.h.

◆ FMC_MPSTS_MPBUSY_Msk

#define FMC_MPSTS_MPBUSY_Msk   (0x1ul << FMC_MPSTS_MPBUSY_Pos)

FMC_T::MPSTS: MPBUSY Mask

Definition at line 2433 of file M471M_R1_S.h.

◆ FMC_MPSTS_MPBUSY_Pos

#define FMC_MPSTS_MPBUSY_Pos   (0)

FMC_T::MPSTS: MPBUSY Position

Definition at line 2432 of file M471M_R1_S.h.

◆ FMC_MPSTS_PPGO_Msk

#define FMC_MPSTS_PPGO_Msk   (0x1ul << FMC_MPSTS_PPGO_Pos)

FMC_T::MPSTS: PPGO Mask

Definition at line 2436 of file M471M_R1_S.h.

◆ FMC_MPSTS_PPGO_Pos

#define FMC_MPSTS_PPGO_Pos   (1)

FMC_T::MPSTS: PPGO Position

Definition at line 2435 of file M471M_R1_S.h.

◆ GPIO_DATMSK_DMASK0_Msk

#define GPIO_DATMSK_DMASK0_Msk   (0x1ul << GPIO_DATMSK_DMASK0_Pos)

GPIO_T::DATMSK: DMASK0 Mask

Definition at line 2864 of file M471M_R1_S.h.

◆ GPIO_DATMSK_DMASK0_Pos

#define GPIO_DATMSK_DMASK0_Pos   (0)

GPIO_T::DATMSK: DMASK0 Position

Definition at line 2863 of file M471M_R1_S.h.

◆ GPIO_DATMSK_DMASK10_Msk

#define GPIO_DATMSK_DMASK10_Msk   (0x1ul << GPIO_DATMSK_DMASK10_Pos)

GPIO_T::DATMSK: DMASK10 Mask

Definition at line 2894 of file M471M_R1_S.h.

◆ GPIO_DATMSK_DMASK10_Pos

#define GPIO_DATMSK_DMASK10_Pos   (10)

GPIO_T::DATMSK: DMASK10 Position

Definition at line 2893 of file M471M_R1_S.h.

◆ GPIO_DATMSK_DMASK11_Msk

#define GPIO_DATMSK_DMASK11_Msk   (0x1ul << GPIO_DATMSK_DMASK11_Pos)

GPIO_T::DATMSK: DMASK11 Mask

Definition at line 2897 of file M471M_R1_S.h.

◆ GPIO_DATMSK_DMASK11_Pos

#define GPIO_DATMSK_DMASK11_Pos   (11)

GPIO_T::DATMSK: DMASK11 Position

Definition at line 2896 of file M471M_R1_S.h.

◆ GPIO_DATMSK_DMASK12_Msk

#define GPIO_DATMSK_DMASK12_Msk   (0x1ul << GPIO_DATMSK_DMASK12_Pos)

GPIO_T::DATMSK: DMASK12 Mask

Definition at line 2900 of file M471M_R1_S.h.

◆ GPIO_DATMSK_DMASK12_Pos

#define GPIO_DATMSK_DMASK12_Pos   (12)

GPIO_T::DATMSK: DMASK12 Position

Definition at line 2899 of file M471M_R1_S.h.

◆ GPIO_DATMSK_DMASK13_Msk

#define GPIO_DATMSK_DMASK13_Msk   (0x1ul << GPIO_DATMSK_DMASK13_Pos)

GPIO_T::DATMSK: DMASK13 Mask

Definition at line 2903 of file M471M_R1_S.h.

◆ GPIO_DATMSK_DMASK13_Pos

#define GPIO_DATMSK_DMASK13_Pos   (13)

GPIO_T::DATMSK: DMASK13 Position

Definition at line 2902 of file M471M_R1_S.h.

◆ GPIO_DATMSK_DMASK14_Msk

#define GPIO_DATMSK_DMASK14_Msk   (0x1ul << GPIO_DATMSK_DMASK14_Pos)

GPIO_T::DATMSK: DMASK14 Mask

Definition at line 2906 of file M471M_R1_S.h.

◆ GPIO_DATMSK_DMASK14_Pos

#define GPIO_DATMSK_DMASK14_Pos   (14)

GPIO_T::DATMSK: DMASK14 Position

Definition at line 2905 of file M471M_R1_S.h.

◆ GPIO_DATMSK_DMASK15_Msk

#define GPIO_DATMSK_DMASK15_Msk   (0x1ul << GPIO_DATMSK_DMASK15_Pos)

GPIO_T::DATMSK: DMASK15 Mask

Definition at line 2909 of file M471M_R1_S.h.

◆ GPIO_DATMSK_DMASK15_Pos

#define GPIO_DATMSK_DMASK15_Pos   (15)

GPIO_T::DATMSK: DMASK15 Position

Definition at line 2908 of file M471M_R1_S.h.

◆ GPIO_DATMSK_DMASK1_Msk

#define GPIO_DATMSK_DMASK1_Msk   (0x1ul << GPIO_DATMSK_DMASK1_Pos)

GPIO_T::DATMSK: DMASK1 Mask

Definition at line 2867 of file M471M_R1_S.h.

◆ GPIO_DATMSK_DMASK1_Pos

#define GPIO_DATMSK_DMASK1_Pos   (1)

GPIO_T::DATMSK: DMASK1 Position

Definition at line 2866 of file M471M_R1_S.h.

◆ GPIO_DATMSK_DMASK2_Msk

#define GPIO_DATMSK_DMASK2_Msk   (0x1ul << GPIO_DATMSK_DMASK2_Pos)

GPIO_T::DATMSK: DMASK2 Mask

Definition at line 2870 of file M471M_R1_S.h.

◆ GPIO_DATMSK_DMASK2_Pos

#define GPIO_DATMSK_DMASK2_Pos   (2)

GPIO_T::DATMSK: DMASK2 Position

Definition at line 2869 of file M471M_R1_S.h.

◆ GPIO_DATMSK_DMASK3_Msk

#define GPIO_DATMSK_DMASK3_Msk   (0x1ul << GPIO_DATMSK_DMASK3_Pos)

GPIO_T::DATMSK: DMASK3 Mask

Definition at line 2873 of file M471M_R1_S.h.

◆ GPIO_DATMSK_DMASK3_Pos

#define GPIO_DATMSK_DMASK3_Pos   (3)

GPIO_T::DATMSK: DMASK3 Position

Definition at line 2872 of file M471M_R1_S.h.

◆ GPIO_DATMSK_DMASK4_Msk

#define GPIO_DATMSK_DMASK4_Msk   (0x1ul << GPIO_DATMSK_DMASK4_Pos)

GPIO_T::DATMSK: DMASK4 Mask

Definition at line 2876 of file M471M_R1_S.h.

◆ GPIO_DATMSK_DMASK4_Pos

#define GPIO_DATMSK_DMASK4_Pos   (4)

GPIO_T::DATMSK: DMASK4 Position

Definition at line 2875 of file M471M_R1_S.h.

◆ GPIO_DATMSK_DMASK5_Msk

#define GPIO_DATMSK_DMASK5_Msk   (0x1ul << GPIO_DATMSK_DMASK5_Pos)

GPIO_T::DATMSK: DMASK5 Mask

Definition at line 2879 of file M471M_R1_S.h.

◆ GPIO_DATMSK_DMASK5_Pos

#define GPIO_DATMSK_DMASK5_Pos   (5)

GPIO_T::DATMSK: DMASK5 Position

Definition at line 2878 of file M471M_R1_S.h.

◆ GPIO_DATMSK_DMASK6_Msk

#define GPIO_DATMSK_DMASK6_Msk   (0x1ul << GPIO_DATMSK_DMASK6_Pos)

GPIO_T::DATMSK: DMASK6 Mask

Definition at line 2882 of file M471M_R1_S.h.

◆ GPIO_DATMSK_DMASK6_Pos

#define GPIO_DATMSK_DMASK6_Pos   (6)

GPIO_T::DATMSK: DMASK6 Position

Definition at line 2881 of file M471M_R1_S.h.

◆ GPIO_DATMSK_DMASK7_Msk

#define GPIO_DATMSK_DMASK7_Msk   (0x1ul << GPIO_DATMSK_DMASK7_Pos)

GPIO_T::DATMSK: DMASK7 Mask

Definition at line 2885 of file M471M_R1_S.h.

◆ GPIO_DATMSK_DMASK7_Pos

#define GPIO_DATMSK_DMASK7_Pos   (7)

GPIO_T::DATMSK: DMASK7 Position

Definition at line 2884 of file M471M_R1_S.h.

◆ GPIO_DATMSK_DMASK8_Msk

#define GPIO_DATMSK_DMASK8_Msk   (0x1ul << GPIO_DATMSK_DMASK8_Pos)

GPIO_T::DATMSK: DMASK8 Mask

Definition at line 2888 of file M471M_R1_S.h.

◆ GPIO_DATMSK_DMASK8_Pos

#define GPIO_DATMSK_DMASK8_Pos   (8)

GPIO_T::DATMSK: DMASK8 Position

Definition at line 2887 of file M471M_R1_S.h.

◆ GPIO_DATMSK_DMASK9_Msk

#define GPIO_DATMSK_DMASK9_Msk   (0x1ul << GPIO_DATMSK_DMASK9_Pos)

GPIO_T::DATMSK: DMASK9 Mask

Definition at line 2891 of file M471M_R1_S.h.

◆ GPIO_DATMSK_DMASK9_Pos

#define GPIO_DATMSK_DMASK9_Pos   (9)

GPIO_T::DATMSK: DMASK9 Position

Definition at line 2890 of file M471M_R1_S.h.

◆ GPIO_DBCTL_DBCLKSEL_Msk

#define GPIO_DBCTL_DBCLKSEL_Msk   (0xFul << GPIO_DBCTL_DBCLKSEL_Pos)

GPIO_T::DBCTL: DBCLKSEL Mask

Definition at line 3314 of file M471M_R1_S.h.

◆ GPIO_DBCTL_DBCLKSEL_Pos

#define GPIO_DBCTL_DBCLKSEL_Pos   (0)

GPIO_T::DBCTL: DBCLKSEL Position

Definition at line 3313 of file M471M_R1_S.h.

◆ GPIO_DBCTL_DBCLKSRC_Msk

#define GPIO_DBCTL_DBCLKSRC_Msk   (1ul << GPIO_DBCTL_DBCLKSRC_Pos)

GPIO_T::DBCTL: DBCLKSRC Mask

Definition at line 3317 of file M471M_R1_S.h.

◆ GPIO_DBCTL_DBCLKSRC_Pos

#define GPIO_DBCTL_DBCLKSRC_Pos   (4)

GPIO_T::DBCTL: DBCLKSRC Position

Definition at line 3316 of file M471M_R1_S.h.

◆ GPIO_DBCTL_ICLKON_Msk

#define GPIO_DBCTL_ICLKON_Msk   (1ul << GPIO_DBCTL_ICLKON_Pos)

GPIO_T::DBCTL: ICLKON Mask

Definition at line 3320 of file M471M_R1_S.h.

◆ GPIO_DBCTL_ICLKON_Pos

#define GPIO_DBCTL_ICLKON_Pos   (5)

GPIO_T::DBCTL: ICLKON Position

Definition at line 3319 of file M471M_R1_S.h.

◆ GPIO_DBEN_DBEN0_Msk

#define GPIO_DBEN_DBEN0_Msk   (0x1ul << GPIO_DBEN_DBEN0_Pos)

GPIO_T::DBEN: DBEN0 Mask

Definition at line 2960 of file M471M_R1_S.h.

◆ GPIO_DBEN_DBEN0_Pos

#define GPIO_DBEN_DBEN0_Pos   (0)

GPIO_T::DBEN: DBEN0 Position

Definition at line 2959 of file M471M_R1_S.h.

◆ GPIO_DBEN_DBEN10_Msk

#define GPIO_DBEN_DBEN10_Msk   (0x1ul << GPIO_DBEN_DBEN10_Pos)

GPIO_T::DBEN: DBEN10 Mask

Definition at line 2990 of file M471M_R1_S.h.

◆ GPIO_DBEN_DBEN10_Pos

#define GPIO_DBEN_DBEN10_Pos   (10)

GPIO_T::DBEN: DBEN10 Position

Definition at line 2989 of file M471M_R1_S.h.

◆ GPIO_DBEN_DBEN11_Msk

#define GPIO_DBEN_DBEN11_Msk   (0x1ul << GPIO_DBEN_DBEN11_Pos)

GPIO_T::DBEN: DBEN11 Mask

Definition at line 2993 of file M471M_R1_S.h.

◆ GPIO_DBEN_DBEN11_Pos

#define GPIO_DBEN_DBEN11_Pos   (11)

GPIO_T::DBEN: DBEN11 Position

Definition at line 2992 of file M471M_R1_S.h.

◆ GPIO_DBEN_DBEN12_Msk

#define GPIO_DBEN_DBEN12_Msk   (0x1ul << GPIO_DBEN_DBEN12_Pos)

GPIO_T::DBEN: DBEN12 Mask

Definition at line 2996 of file M471M_R1_S.h.

◆ GPIO_DBEN_DBEN12_Pos

#define GPIO_DBEN_DBEN12_Pos   (12)

GPIO_T::DBEN: DBEN12 Position

Definition at line 2995 of file M471M_R1_S.h.

◆ GPIO_DBEN_DBEN13_Msk

#define GPIO_DBEN_DBEN13_Msk   (0x1ul << GPIO_DBEN_DBEN13_Pos)

GPIO_T::DBEN: DBEN13 Mask

Definition at line 2999 of file M471M_R1_S.h.

◆ GPIO_DBEN_DBEN13_Pos

#define GPIO_DBEN_DBEN13_Pos   (13)

GPIO_T::DBEN: DBEN13 Position

Definition at line 2998 of file M471M_R1_S.h.

◆ GPIO_DBEN_DBEN14_Msk

#define GPIO_DBEN_DBEN14_Msk   (0x1ul << GPIO_DBEN_DBEN14_Pos)

GPIO_T::DBEN: DBEN14 Mask

Definition at line 3002 of file M471M_R1_S.h.

◆ GPIO_DBEN_DBEN14_Pos

#define GPIO_DBEN_DBEN14_Pos   (14)

GPIO_T::DBEN: DBEN14 Position

Definition at line 3001 of file M471M_R1_S.h.

◆ GPIO_DBEN_DBEN15_Msk

#define GPIO_DBEN_DBEN15_Msk   (0x1ul << GPIO_DBEN_DBEN15_Pos)

GPIO_T::DBEN: DBEN15 Mask

Definition at line 3005 of file M471M_R1_S.h.

◆ GPIO_DBEN_DBEN15_Pos

#define GPIO_DBEN_DBEN15_Pos   (15)

GPIO_T::DBEN: DBEN15 Position

Definition at line 3004 of file M471M_R1_S.h.

◆ GPIO_DBEN_DBEN1_Msk

#define GPIO_DBEN_DBEN1_Msk   (0x1ul << GPIO_DBEN_DBEN1_Pos)

GPIO_T::DBEN: DBEN1 Mask

Definition at line 2963 of file M471M_R1_S.h.

◆ GPIO_DBEN_DBEN1_Pos

#define GPIO_DBEN_DBEN1_Pos   (1)

GPIO_T::DBEN: DBEN1 Position

Definition at line 2962 of file M471M_R1_S.h.

◆ GPIO_DBEN_DBEN2_Msk

#define GPIO_DBEN_DBEN2_Msk   (0x1ul << GPIO_DBEN_DBEN2_Pos)

GPIO_T::DBEN: DBEN2 Mask

Definition at line 2966 of file M471M_R1_S.h.

◆ GPIO_DBEN_DBEN2_Pos

#define GPIO_DBEN_DBEN2_Pos   (2)

GPIO_T::DBEN: DBEN2 Position

Definition at line 2965 of file M471M_R1_S.h.

◆ GPIO_DBEN_DBEN3_Msk

#define GPIO_DBEN_DBEN3_Msk   (0x1ul << GPIO_DBEN_DBEN3_Pos)

GPIO_T::DBEN: DBEN3 Mask

Definition at line 2969 of file M471M_R1_S.h.

◆ GPIO_DBEN_DBEN3_Pos

#define GPIO_DBEN_DBEN3_Pos   (3)

GPIO_T::DBEN: DBEN3 Position

Definition at line 2968 of file M471M_R1_S.h.

◆ GPIO_DBEN_DBEN4_Msk

#define GPIO_DBEN_DBEN4_Msk   (0x1ul << GPIO_DBEN_DBEN4_Pos)

GPIO_T::DBEN: DBEN4 Mask

Definition at line 2972 of file M471M_R1_S.h.

◆ GPIO_DBEN_DBEN4_Pos

#define GPIO_DBEN_DBEN4_Pos   (4)

GPIO_T::DBEN: DBEN4 Position

Definition at line 2971 of file M471M_R1_S.h.

◆ GPIO_DBEN_DBEN5_Msk

#define GPIO_DBEN_DBEN5_Msk   (0x1ul << GPIO_DBEN_DBEN5_Pos)

GPIO_T::DBEN: DBEN5 Mask

Definition at line 2975 of file M471M_R1_S.h.

◆ GPIO_DBEN_DBEN5_Pos

#define GPIO_DBEN_DBEN5_Pos   (5)

GPIO_T::DBEN: DBEN5 Position

Definition at line 2974 of file M471M_R1_S.h.

◆ GPIO_DBEN_DBEN6_Msk

#define GPIO_DBEN_DBEN6_Msk   (0x1ul << GPIO_DBEN_DBEN6_Pos)

GPIO_T::DBEN: DBEN6 Mask

Definition at line 2978 of file M471M_R1_S.h.

◆ GPIO_DBEN_DBEN6_Pos

#define GPIO_DBEN_DBEN6_Pos   (6)

GPIO_T::DBEN: DBEN6 Position

Definition at line 2977 of file M471M_R1_S.h.

◆ GPIO_DBEN_DBEN7_Msk

#define GPIO_DBEN_DBEN7_Msk   (0x1ul << GPIO_DBEN_DBEN7_Pos)

GPIO_T::DBEN: DBEN7 Mask

Definition at line 2981 of file M471M_R1_S.h.

◆ GPIO_DBEN_DBEN7_Pos

#define GPIO_DBEN_DBEN7_Pos   (7)

GPIO_T::DBEN: DBEN7 Position

Definition at line 2980 of file M471M_R1_S.h.

◆ GPIO_DBEN_DBEN8_Msk

#define GPIO_DBEN_DBEN8_Msk   (0x1ul << GPIO_DBEN_DBEN8_Pos)

GPIO_T::DBEN: DBEN8 Mask

Definition at line 2984 of file M471M_R1_S.h.

◆ GPIO_DBEN_DBEN8_Pos

#define GPIO_DBEN_DBEN8_Pos   (8)

GPIO_T::DBEN: DBEN8 Position

Definition at line 2983 of file M471M_R1_S.h.

◆ GPIO_DBEN_DBEN9_Msk

#define GPIO_DBEN_DBEN9_Msk   (0x1ul << GPIO_DBEN_DBEN9_Pos)

GPIO_T::DBEN: DBEN9 Mask

Definition at line 2987 of file M471M_R1_S.h.

◆ GPIO_DBEN_DBEN9_Pos

#define GPIO_DBEN_DBEN9_Pos   (9)

GPIO_T::DBEN: DBEN9 Position

Definition at line 2986 of file M471M_R1_S.h.

◆ GPIO_DINOFF_DINOFF0_Msk

#define GPIO_DINOFF_DINOFF0_Msk   (0x1ul << GPIO_DINOFF_DINOFF0_Pos)

GPIO_T::DINOFF: DINOFF0 Mask

Definition at line 2768 of file M471M_R1_S.h.

◆ GPIO_DINOFF_DINOFF0_Pos

#define GPIO_DINOFF_DINOFF0_Pos   (16)

GPIO_T::DINOFF: DINOFF0 Position

Definition at line 2767 of file M471M_R1_S.h.

◆ GPIO_DINOFF_DINOFF10_Msk

#define GPIO_DINOFF_DINOFF10_Msk   (0x1ul << GPIO_DINOFF_DINOFF10_Pos)

GPIO_T::DINOFF: DINOFF10 Mask

Definition at line 2798 of file M471M_R1_S.h.

◆ GPIO_DINOFF_DINOFF10_Pos

#define GPIO_DINOFF_DINOFF10_Pos   (26)

GPIO_T::DINOFF: DINOFF10 Position

Definition at line 2797 of file M471M_R1_S.h.

◆ GPIO_DINOFF_DINOFF11_Msk

#define GPIO_DINOFF_DINOFF11_Msk   (0x1ul << GPIO_DINOFF_DINOFF11_Pos)

GPIO_T::DINOFF: DINOFF11 Mask

Definition at line 2801 of file M471M_R1_S.h.

◆ GPIO_DINOFF_DINOFF11_Pos

#define GPIO_DINOFF_DINOFF11_Pos   (27)

GPIO_T::DINOFF: DINOFF11 Position

Definition at line 2800 of file M471M_R1_S.h.

◆ GPIO_DINOFF_DINOFF12_Msk

#define GPIO_DINOFF_DINOFF12_Msk   (0x1ul << GPIO_DINOFF_DINOFF12_Pos)

GPIO_T::DINOFF: DINOFF12 Mask

Definition at line 2804 of file M471M_R1_S.h.

◆ GPIO_DINOFF_DINOFF12_Pos

#define GPIO_DINOFF_DINOFF12_Pos   (28)

GPIO_T::DINOFF: DINOFF12 Position

Definition at line 2803 of file M471M_R1_S.h.

◆ GPIO_DINOFF_DINOFF13_Msk

#define GPIO_DINOFF_DINOFF13_Msk   (0x1ul << GPIO_DINOFF_DINOFF13_Pos)

GPIO_T::DINOFF: DINOFF13 Mask

Definition at line 2807 of file M471M_R1_S.h.

◆ GPIO_DINOFF_DINOFF13_Pos

#define GPIO_DINOFF_DINOFF13_Pos   (29)

GPIO_T::DINOFF: DINOFF13 Position

Definition at line 2806 of file M471M_R1_S.h.

◆ GPIO_DINOFF_DINOFF14_Msk

#define GPIO_DINOFF_DINOFF14_Msk   (0x1ul << GPIO_DINOFF_DINOFF14_Pos)

GPIO_T::DINOFF: DINOFF14 Mask

Definition at line 2810 of file M471M_R1_S.h.

◆ GPIO_DINOFF_DINOFF14_Pos

#define GPIO_DINOFF_DINOFF14_Pos   (30)

GPIO_T::DINOFF: DINOFF14 Position

Definition at line 2809 of file M471M_R1_S.h.

◆ GPIO_DINOFF_DINOFF15_Msk

#define GPIO_DINOFF_DINOFF15_Msk   (0x1ul << GPIO_DINOFF_DINOFF15_Pos)

GPIO_T::DINOFF: DINOFF15 Mask

Definition at line 2813 of file M471M_R1_S.h.

◆ GPIO_DINOFF_DINOFF15_Pos

#define GPIO_DINOFF_DINOFF15_Pos   (31)

GPIO_T::DINOFF: DINOFF15 Position

Definition at line 2812 of file M471M_R1_S.h.

◆ GPIO_DINOFF_DINOFF1_Msk

#define GPIO_DINOFF_DINOFF1_Msk   (0x1ul << GPIO_DINOFF_DINOFF1_Pos)

GPIO_T::DINOFF: DINOFF1 Mask

Definition at line 2771 of file M471M_R1_S.h.

◆ GPIO_DINOFF_DINOFF1_Pos

#define GPIO_DINOFF_DINOFF1_Pos   (17)

GPIO_T::DINOFF: DINOFF1 Position

Definition at line 2770 of file M471M_R1_S.h.

◆ GPIO_DINOFF_DINOFF2_Msk

#define GPIO_DINOFF_DINOFF2_Msk   (0x1ul << GPIO_DINOFF_DINOFF2_Pos)

GPIO_T::DINOFF: DINOFF2 Mask

Definition at line 2774 of file M471M_R1_S.h.

◆ GPIO_DINOFF_DINOFF2_Pos

#define GPIO_DINOFF_DINOFF2_Pos   (18)

GPIO_T::DINOFF: DINOFF2 Position

Definition at line 2773 of file M471M_R1_S.h.

◆ GPIO_DINOFF_DINOFF3_Msk

#define GPIO_DINOFF_DINOFF3_Msk   (0x1ul << GPIO_DINOFF_DINOFF3_Pos)

GPIO_T::DINOFF: DINOFF3 Mask

Definition at line 2777 of file M471M_R1_S.h.

◆ GPIO_DINOFF_DINOFF3_Pos

#define GPIO_DINOFF_DINOFF3_Pos   (19)

GPIO_T::DINOFF: DINOFF3 Position

Definition at line 2776 of file M471M_R1_S.h.

◆ GPIO_DINOFF_DINOFF4_Msk

#define GPIO_DINOFF_DINOFF4_Msk   (0x1ul << GPIO_DINOFF_DINOFF4_Pos)

GPIO_T::DINOFF: DINOFF4 Mask

Definition at line 2780 of file M471M_R1_S.h.

◆ GPIO_DINOFF_DINOFF4_Pos

#define GPIO_DINOFF_DINOFF4_Pos   (20)

GPIO_T::DINOFF: DINOFF4 Position

Definition at line 2779 of file M471M_R1_S.h.

◆ GPIO_DINOFF_DINOFF5_Msk

#define GPIO_DINOFF_DINOFF5_Msk   (0x1ul << GPIO_DINOFF_DINOFF5_Pos)

GPIO_T::DINOFF: DINOFF5 Mask

Definition at line 2783 of file M471M_R1_S.h.

◆ GPIO_DINOFF_DINOFF5_Pos

#define GPIO_DINOFF_DINOFF5_Pos   (21)

GPIO_T::DINOFF: DINOFF5 Position

Definition at line 2782 of file M471M_R1_S.h.

◆ GPIO_DINOFF_DINOFF6_Msk

#define GPIO_DINOFF_DINOFF6_Msk   (0x1ul << GPIO_DINOFF_DINOFF6_Pos)

GPIO_T::DINOFF: DINOFF6 Mask

Definition at line 2786 of file M471M_R1_S.h.

◆ GPIO_DINOFF_DINOFF6_Pos

#define GPIO_DINOFF_DINOFF6_Pos   (22)

GPIO_T::DINOFF: DINOFF6 Position

Definition at line 2785 of file M471M_R1_S.h.

◆ GPIO_DINOFF_DINOFF7_Msk

#define GPIO_DINOFF_DINOFF7_Msk   (0x1ul << GPIO_DINOFF_DINOFF7_Pos)

GPIO_T::DINOFF: DINOFF7 Mask

Definition at line 2789 of file M471M_R1_S.h.

◆ GPIO_DINOFF_DINOFF7_Pos

#define GPIO_DINOFF_DINOFF7_Pos   (23)

GPIO_T::DINOFF: DINOFF7 Position

Definition at line 2788 of file M471M_R1_S.h.

◆ GPIO_DINOFF_DINOFF8_Msk

#define GPIO_DINOFF_DINOFF8_Msk   (0x1ul << GPIO_DINOFF_DINOFF8_Pos)

GPIO_T::DINOFF: DINOFF8 Mask

Definition at line 2792 of file M471M_R1_S.h.

◆ GPIO_DINOFF_DINOFF8_Pos

#define GPIO_DINOFF_DINOFF8_Pos   (24)

GPIO_T::DINOFF: DINOFF8 Position

Definition at line 2791 of file M471M_R1_S.h.

◆ GPIO_DINOFF_DINOFF9_Msk

#define GPIO_DINOFF_DINOFF9_Msk   (0x1ul << GPIO_DINOFF_DINOFF9_Pos)

GPIO_T::DINOFF: DINOFF9 Mask

Definition at line 2795 of file M471M_R1_S.h.

◆ GPIO_DINOFF_DINOFF9_Pos

#define GPIO_DINOFF_DINOFF9_Pos   (25)

GPIO_T::DINOFF: DINOFF9 Position

Definition at line 2794 of file M471M_R1_S.h.

◆ GPIO_DOUT_DOUT0_Msk

#define GPIO_DOUT_DOUT0_Msk   (0x1ul << GPIO_DOUT_DOUT0_Pos)

GPIO_T::DOUT: DOUT0 Mask

Definition at line 2816 of file M471M_R1_S.h.

◆ GPIO_DOUT_DOUT0_Pos

#define GPIO_DOUT_DOUT0_Pos   (0)

GPIO_T::DOUT: DOUT0 Position

Definition at line 2815 of file M471M_R1_S.h.

◆ GPIO_DOUT_DOUT10_Msk

#define GPIO_DOUT_DOUT10_Msk   (0x1ul << GPIO_DOUT_DOUT10_Pos)

GPIO_T::DOUT: DOUT10 Mask

Definition at line 2846 of file M471M_R1_S.h.

◆ GPIO_DOUT_DOUT10_Pos

#define GPIO_DOUT_DOUT10_Pos   (10)

GPIO_T::DOUT: DOUT10 Position

Definition at line 2845 of file M471M_R1_S.h.

◆ GPIO_DOUT_DOUT11_Msk

#define GPIO_DOUT_DOUT11_Msk   (0x1ul << GPIO_DOUT_DOUT11_Pos)

GPIO_T::DOUT: DOUT11 Mask

Definition at line 2849 of file M471M_R1_S.h.

◆ GPIO_DOUT_DOUT11_Pos

#define GPIO_DOUT_DOUT11_Pos   (11)

GPIO_T::DOUT: DOUT11 Position

Definition at line 2848 of file M471M_R1_S.h.

◆ GPIO_DOUT_DOUT12_Msk

#define GPIO_DOUT_DOUT12_Msk   (0x1ul << GPIO_DOUT_DOUT12_Pos)

GPIO_T::DOUT: DOUT12 Mask

Definition at line 2852 of file M471M_R1_S.h.

◆ GPIO_DOUT_DOUT12_Pos

#define GPIO_DOUT_DOUT12_Pos   (12)

GPIO_T::DOUT: DOUT12 Position

Definition at line 2851 of file M471M_R1_S.h.

◆ GPIO_DOUT_DOUT13_Msk

#define GPIO_DOUT_DOUT13_Msk   (0x1ul << GPIO_DOUT_DOUT13_Pos)

GPIO_T::DOUT: DOUT13 Mask

Definition at line 2855 of file M471M_R1_S.h.

◆ GPIO_DOUT_DOUT13_Pos

#define GPIO_DOUT_DOUT13_Pos   (13)

GPIO_T::DOUT: DOUT13 Position

Definition at line 2854 of file M471M_R1_S.h.

◆ GPIO_DOUT_DOUT14_Msk

#define GPIO_DOUT_DOUT14_Msk   (0x1ul << GPIO_DOUT_DOUT14_Pos)

GPIO_T::DOUT: DOUT14 Mask

Definition at line 2858 of file M471M_R1_S.h.

◆ GPIO_DOUT_DOUT14_Pos

#define GPIO_DOUT_DOUT14_Pos   (14)

GPIO_T::DOUT: DOUT14 Position

Definition at line 2857 of file M471M_R1_S.h.

◆ GPIO_DOUT_DOUT15_Msk

#define GPIO_DOUT_DOUT15_Msk   (0x1ul << GPIO_DOUT_DOUT15_Pos)

GPIO_T::DOUT: DOUT15 Mask

Definition at line 2861 of file M471M_R1_S.h.

◆ GPIO_DOUT_DOUT15_Pos

#define GPIO_DOUT_DOUT15_Pos   (15)

GPIO_T::DOUT: DOUT15 Position

Definition at line 2860 of file M471M_R1_S.h.

◆ GPIO_DOUT_DOUT1_Msk

#define GPIO_DOUT_DOUT1_Msk   (0x1ul << GPIO_DOUT_DOUT1_Pos)

GPIO_T::DOUT: DOUT1 Mask

Definition at line 2819 of file M471M_R1_S.h.

◆ GPIO_DOUT_DOUT1_Pos

#define GPIO_DOUT_DOUT1_Pos   (1)

GPIO_T::DOUT: DOUT1 Position

Definition at line 2818 of file M471M_R1_S.h.

◆ GPIO_DOUT_DOUT2_Msk

#define GPIO_DOUT_DOUT2_Msk   (0x1ul << GPIO_DOUT_DOUT2_Pos)

GPIO_T::DOUT: DOUT2 Mask

Definition at line 2822 of file M471M_R1_S.h.

◆ GPIO_DOUT_DOUT2_Pos

#define GPIO_DOUT_DOUT2_Pos   (2)

GPIO_T::DOUT: DOUT2 Position

Definition at line 2821 of file M471M_R1_S.h.

◆ GPIO_DOUT_DOUT3_Msk

#define GPIO_DOUT_DOUT3_Msk   (0x1ul << GPIO_DOUT_DOUT3_Pos)

GPIO_T::DOUT: DOUT3 Mask

Definition at line 2825 of file M471M_R1_S.h.

◆ GPIO_DOUT_DOUT3_Pos

#define GPIO_DOUT_DOUT3_Pos   (3)

GPIO_T::DOUT: DOUT3 Position

Definition at line 2824 of file M471M_R1_S.h.

◆ GPIO_DOUT_DOUT4_Msk

#define GPIO_DOUT_DOUT4_Msk   (0x1ul << GPIO_DOUT_DOUT4_Pos)

GPIO_T::DOUT: DOUT4 Mask

Definition at line 2828 of file M471M_R1_S.h.

◆ GPIO_DOUT_DOUT4_Pos

#define GPIO_DOUT_DOUT4_Pos   (4)

GPIO_T::DOUT: DOUT4 Position

Definition at line 2827 of file M471M_R1_S.h.

◆ GPIO_DOUT_DOUT5_Msk

#define GPIO_DOUT_DOUT5_Msk   (0x1ul << GPIO_DOUT_DOUT5_Pos)

GPIO_T::DOUT: DOUT5 Mask

Definition at line 2831 of file M471M_R1_S.h.

◆ GPIO_DOUT_DOUT5_Pos

#define GPIO_DOUT_DOUT5_Pos   (5)

GPIO_T::DOUT: DOUT5 Position

Definition at line 2830 of file M471M_R1_S.h.

◆ GPIO_DOUT_DOUT6_Msk

#define GPIO_DOUT_DOUT6_Msk   (0x1ul << GPIO_DOUT_DOUT6_Pos)

GPIO_T::DOUT: DOUT6 Mask

Definition at line 2834 of file M471M_R1_S.h.

◆ GPIO_DOUT_DOUT6_Pos

#define GPIO_DOUT_DOUT6_Pos   (6)

GPIO_T::DOUT: DOUT6 Position

Definition at line 2833 of file M471M_R1_S.h.

◆ GPIO_DOUT_DOUT7_Msk

#define GPIO_DOUT_DOUT7_Msk   (0x1ul << GPIO_DOUT_DOUT7_Pos)

GPIO_T::DOUT: DOUT7 Mask

Definition at line 2837 of file M471M_R1_S.h.

◆ GPIO_DOUT_DOUT7_Pos

#define GPIO_DOUT_DOUT7_Pos   (7)

GPIO_T::DOUT: DOUT7 Position

Definition at line 2836 of file M471M_R1_S.h.

◆ GPIO_DOUT_DOUT8_Msk

#define GPIO_DOUT_DOUT8_Msk   (0x1ul << GPIO_DOUT_DOUT8_Pos)

GPIO_T::DOUT: DOUT8 Mask

Definition at line 2840 of file M471M_R1_S.h.

◆ GPIO_DOUT_DOUT8_Pos

#define GPIO_DOUT_DOUT8_Pos   (8)

GPIO_T::DOUT: DOUT8 Position

Definition at line 2839 of file M471M_R1_S.h.

◆ GPIO_DOUT_DOUT9_Msk

#define GPIO_DOUT_DOUT9_Msk   (0x1ul << GPIO_DOUT_DOUT9_Pos)

GPIO_T::DOUT: DOUT9 Mask

Definition at line 2843 of file M471M_R1_S.h.

◆ GPIO_DOUT_DOUT9_Pos

#define GPIO_DOUT_DOUT9_Pos   (9)

GPIO_T::DOUT: DOUT9 Position

Definition at line 2842 of file M471M_R1_S.h.

◆ GPIO_DRVCTL_HDRVEN10_Msk

#define GPIO_DRVCTL_HDRVEN10_Msk   (0x1ul << GPIO_DRVCTL_HDRVEN10_Pos)

GPIO_T::DRVCTL: HDRVEN10 Mask

Definition at line 3302 of file M471M_R1_S.h.

◆ GPIO_DRVCTL_HDRVEN10_Pos

#define GPIO_DRVCTL_HDRVEN10_Pos   (10)

GPIO_T::DRVCTL: HDRVEN10 Position

Definition at line 3301 of file M471M_R1_S.h.

◆ GPIO_DRVCTL_HDRVEN11_Msk

#define GPIO_DRVCTL_HDRVEN11_Msk   (0x1ul << GPIO_DRVCTL_HDRVEN11_Pos)

GPIO_T::DRVCTL: HDRVEN11 Mask

Definition at line 3305 of file M471M_R1_S.h.

◆ GPIO_DRVCTL_HDRVEN11_Pos

#define GPIO_DRVCTL_HDRVEN11_Pos   (11)

GPIO_T::DRVCTL: HDRVEN11 Position

Definition at line 3304 of file M471M_R1_S.h.

◆ GPIO_DRVCTL_HDRVEN12_Msk

#define GPIO_DRVCTL_HDRVEN12_Msk   (0x1ul << GPIO_DRVCTL_HDRVEN12_Pos)

GPIO_T::DRVCTL: HDRVEN12 Mask

Definition at line 3308 of file M471M_R1_S.h.

◆ GPIO_DRVCTL_HDRVEN12_Pos

#define GPIO_DRVCTL_HDRVEN12_Pos   (12)

GPIO_T::DRVCTL: HDRVEN12 Position

Definition at line 3307 of file M471M_R1_S.h.

◆ GPIO_DRVCTL_HDRVEN13_Msk

#define GPIO_DRVCTL_HDRVEN13_Msk   (0x1ul << GPIO_DRVCTL_HDRVEN13_Pos)

GPIO_T::DRVCTL: HDRVEN13 Mask

Definition at line 3311 of file M471M_R1_S.h.

◆ GPIO_DRVCTL_HDRVEN13_Pos

#define GPIO_DRVCTL_HDRVEN13_Pos   (13)

GPIO_T::DRVCTL: HDRVEN13 Position

Definition at line 3310 of file M471M_R1_S.h.

◆ GPIO_DRVCTL_HDRVEN8_Msk

#define GPIO_DRVCTL_HDRVEN8_Msk   (0x1ul << GPIO_DRVCTL_HDRVEN8_Pos)

GPIO_T::DRVCTL: HDRVEN8 Mask

Definition at line 3296 of file M471M_R1_S.h.

◆ GPIO_DRVCTL_HDRVEN8_Pos

#define GPIO_DRVCTL_HDRVEN8_Pos   (8)

GPIO_T::DRVCTL: HDRVEN8 Position

Definition at line 3295 of file M471M_R1_S.h.

◆ GPIO_DRVCTL_HDRVEN9_Msk

#define GPIO_DRVCTL_HDRVEN9_Msk   (0x1ul << GPIO_DRVCTL_HDRVEN9_Pos)

GPIO_T::DRVCTL: HDRVEN9 Mask

Definition at line 3299 of file M471M_R1_S.h.

◆ GPIO_DRVCTL_HDRVEN9_Pos

#define GPIO_DRVCTL_HDRVEN9_Pos   (9)

GPIO_T::DRVCTL: HDRVEN9 Position

Definition at line 3298 of file M471M_R1_S.h.

◆ GPIO_INTEN_FLIEN0_Msk

#define GPIO_INTEN_FLIEN0_Msk   (0x1ul << GPIO_INTEN_FLIEN0_Pos)

GPIO_T::INTEN: FLIEN0 Mask

Definition at line 3056 of file M471M_R1_S.h.

◆ GPIO_INTEN_FLIEN0_Pos

#define GPIO_INTEN_FLIEN0_Pos   (0)

GPIO_T::INTEN: FLIEN0 Position

Definition at line 3055 of file M471M_R1_S.h.

◆ GPIO_INTEN_FLIEN10_Msk

#define GPIO_INTEN_FLIEN10_Msk   (0x1ul << GPIO_INTEN_FLIEN10_Pos)

GPIO_T::INTEN: FLIEN10 Mask

Definition at line 3086 of file M471M_R1_S.h.

◆ GPIO_INTEN_FLIEN10_Pos

#define GPIO_INTEN_FLIEN10_Pos   (10)

GPIO_T::INTEN: FLIEN10 Position

Definition at line 3085 of file M471M_R1_S.h.

◆ GPIO_INTEN_FLIEN11_Msk

#define GPIO_INTEN_FLIEN11_Msk   (0x1ul << GPIO_INTEN_FLIEN11_Pos)

GPIO_T::INTEN: FLIEN11 Mask

Definition at line 3089 of file M471M_R1_S.h.

◆ GPIO_INTEN_FLIEN11_Pos

#define GPIO_INTEN_FLIEN11_Pos   (11)

GPIO_T::INTEN: FLIEN11 Position

Definition at line 3088 of file M471M_R1_S.h.

◆ GPIO_INTEN_FLIEN12_Msk

#define GPIO_INTEN_FLIEN12_Msk   (0x1ul << GPIO_INTEN_FLIEN12_Pos)

GPIO_T::INTEN: FLIEN12 Mask

Definition at line 3092 of file M471M_R1_S.h.

◆ GPIO_INTEN_FLIEN12_Pos

#define GPIO_INTEN_FLIEN12_Pos   (12)

GPIO_T::INTEN: FLIEN12 Position

Definition at line 3091 of file M471M_R1_S.h.

◆ GPIO_INTEN_FLIEN13_Msk

#define GPIO_INTEN_FLIEN13_Msk   (0x1ul << GPIO_INTEN_FLIEN13_Pos)

GPIO_T::INTEN: FLIEN13 Mask

Definition at line 3095 of file M471M_R1_S.h.

◆ GPIO_INTEN_FLIEN13_Pos

#define GPIO_INTEN_FLIEN13_Pos   (13)

GPIO_T::INTEN: FLIEN13 Position

Definition at line 3094 of file M471M_R1_S.h.

◆ GPIO_INTEN_FLIEN14_Msk

#define GPIO_INTEN_FLIEN14_Msk   (0x1ul << GPIO_INTEN_FLIEN14_Pos)

GPIO_T::INTEN: FLIEN14 Mask

Definition at line 3098 of file M471M_R1_S.h.

◆ GPIO_INTEN_FLIEN14_Pos

#define GPIO_INTEN_FLIEN14_Pos   (14)

GPIO_T::INTEN: FLIEN14 Position

Definition at line 3097 of file M471M_R1_S.h.

◆ GPIO_INTEN_FLIEN15_Msk

#define GPIO_INTEN_FLIEN15_Msk   (0x1ul << GPIO_INTEN_FLIEN15_Pos)

GPIO_T::INTEN: FLIEN15 Mask

Definition at line 3101 of file M471M_R1_S.h.

◆ GPIO_INTEN_FLIEN15_Pos

#define GPIO_INTEN_FLIEN15_Pos   (15)

GPIO_T::INTEN: FLIEN15 Position

Definition at line 3100 of file M471M_R1_S.h.

◆ GPIO_INTEN_FLIEN1_Msk

#define GPIO_INTEN_FLIEN1_Msk   (0x1ul << GPIO_INTEN_FLIEN1_Pos)

GPIO_T::INTEN: FLIEN1 Mask

Definition at line 3059 of file M471M_R1_S.h.

◆ GPIO_INTEN_FLIEN1_Pos

#define GPIO_INTEN_FLIEN1_Pos   (1)

GPIO_T::INTEN: FLIEN1 Position

Definition at line 3058 of file M471M_R1_S.h.

◆ GPIO_INTEN_FLIEN2_Msk

#define GPIO_INTEN_FLIEN2_Msk   (0x1ul << GPIO_INTEN_FLIEN2_Pos)

GPIO_T::INTEN: FLIEN2 Mask

Definition at line 3062 of file M471M_R1_S.h.

◆ GPIO_INTEN_FLIEN2_Pos

#define GPIO_INTEN_FLIEN2_Pos   (2)

GPIO_T::INTEN: FLIEN2 Position

Definition at line 3061 of file M471M_R1_S.h.

◆ GPIO_INTEN_FLIEN3_Msk

#define GPIO_INTEN_FLIEN3_Msk   (0x1ul << GPIO_INTEN_FLIEN3_Pos)

GPIO_T::INTEN: FLIEN3 Mask

Definition at line 3065 of file M471M_R1_S.h.

◆ GPIO_INTEN_FLIEN3_Pos

#define GPIO_INTEN_FLIEN3_Pos   (3)

GPIO_T::INTEN: FLIEN3 Position

Definition at line 3064 of file M471M_R1_S.h.

◆ GPIO_INTEN_FLIEN4_Msk

#define GPIO_INTEN_FLIEN4_Msk   (0x1ul << GPIO_INTEN_FLIEN4_Pos)

GPIO_T::INTEN: FLIEN4 Mask

Definition at line 3068 of file M471M_R1_S.h.

◆ GPIO_INTEN_FLIEN4_Pos

#define GPIO_INTEN_FLIEN4_Pos   (4)

GPIO_T::INTEN: FLIEN4 Position

Definition at line 3067 of file M471M_R1_S.h.

◆ GPIO_INTEN_FLIEN5_Msk

#define GPIO_INTEN_FLIEN5_Msk   (0x1ul << GPIO_INTEN_FLIEN5_Pos)

GPIO_T::INTEN: FLIEN5 Mask

Definition at line 3071 of file M471M_R1_S.h.

◆ GPIO_INTEN_FLIEN5_Pos

#define GPIO_INTEN_FLIEN5_Pos   (5)

GPIO_T::INTEN: FLIEN5 Position

Definition at line 3070 of file M471M_R1_S.h.

◆ GPIO_INTEN_FLIEN6_Msk

#define GPIO_INTEN_FLIEN6_Msk   (0x1ul << GPIO_INTEN_FLIEN6_Pos)

GPIO_T::INTEN: FLIEN6 Mask

Definition at line 3074 of file M471M_R1_S.h.

◆ GPIO_INTEN_FLIEN6_Pos

#define GPIO_INTEN_FLIEN6_Pos   (6)

GPIO_T::INTEN: FLIEN6 Position

Definition at line 3073 of file M471M_R1_S.h.

◆ GPIO_INTEN_FLIEN7_Msk

#define GPIO_INTEN_FLIEN7_Msk   (0x1ul << GPIO_INTEN_FLIEN7_Pos)

GPIO_T::INTEN: FLIEN7 Mask

Definition at line 3077 of file M471M_R1_S.h.

◆ GPIO_INTEN_FLIEN7_Pos

#define GPIO_INTEN_FLIEN7_Pos   (7)

GPIO_T::INTEN: FLIEN7 Position

Definition at line 3076 of file M471M_R1_S.h.

◆ GPIO_INTEN_FLIEN8_Msk

#define GPIO_INTEN_FLIEN8_Msk   (0x1ul << GPIO_INTEN_FLIEN8_Pos)

GPIO_T::INTEN: FLIEN8 Mask

Definition at line 3080 of file M471M_R1_S.h.

◆ GPIO_INTEN_FLIEN8_Pos

#define GPIO_INTEN_FLIEN8_Pos   (8)

GPIO_T::INTEN: FLIEN8 Position

Definition at line 3079 of file M471M_R1_S.h.

◆ GPIO_INTEN_FLIEN9_Msk

#define GPIO_INTEN_FLIEN9_Msk   (0x1ul << GPIO_INTEN_FLIEN9_Pos)

GPIO_T::INTEN: FLIEN9 Mask

Definition at line 3083 of file M471M_R1_S.h.

◆ GPIO_INTEN_FLIEN9_Pos

#define GPIO_INTEN_FLIEN9_Pos   (9)

GPIO_T::INTEN: FLIEN9 Position

Definition at line 3082 of file M471M_R1_S.h.

◆ GPIO_INTEN_RHIEN0_Msk

#define GPIO_INTEN_RHIEN0_Msk   (0x1ul << GPIO_INTEN_RHIEN0_Pos)

GPIO_T::INTEN: RHIEN0 Mask

Definition at line 3104 of file M471M_R1_S.h.

◆ GPIO_INTEN_RHIEN0_Pos

#define GPIO_INTEN_RHIEN0_Pos   (16)

GPIO_T::INTEN: RHIEN0 Position

Definition at line 3103 of file M471M_R1_S.h.

◆ GPIO_INTEN_RHIEN10_Msk

#define GPIO_INTEN_RHIEN10_Msk   (0x1ul << GPIO_INTEN_RHIEN10_Pos)

GPIO_T::INTEN: RHIEN10 Mask

Definition at line 3134 of file M471M_R1_S.h.

◆ GPIO_INTEN_RHIEN10_Pos

#define GPIO_INTEN_RHIEN10_Pos   (26)

GPIO_T::INTEN: RHIEN10 Position

Definition at line 3133 of file M471M_R1_S.h.

◆ GPIO_INTEN_RHIEN11_Msk

#define GPIO_INTEN_RHIEN11_Msk   (0x1ul << GPIO_INTEN_RHIEN11_Pos)

GPIO_T::INTEN: RHIEN11 Mask

Definition at line 3137 of file M471M_R1_S.h.

◆ GPIO_INTEN_RHIEN11_Pos

#define GPIO_INTEN_RHIEN11_Pos   (27)

GPIO_T::INTEN: RHIEN11 Position

Definition at line 3136 of file M471M_R1_S.h.

◆ GPIO_INTEN_RHIEN12_Msk

#define GPIO_INTEN_RHIEN12_Msk   (0x1ul << GPIO_INTEN_RHIEN12_Pos)

GPIO_T::INTEN: RHIEN12 Mask

Definition at line 3140 of file M471M_R1_S.h.

◆ GPIO_INTEN_RHIEN12_Pos

#define GPIO_INTEN_RHIEN12_Pos   (28)

GPIO_T::INTEN: RHIEN12 Position

Definition at line 3139 of file M471M_R1_S.h.

◆ GPIO_INTEN_RHIEN13_Msk

#define GPIO_INTEN_RHIEN13_Msk   (0x1ul << GPIO_INTEN_RHIEN13_Pos)

GPIO_T::INTEN: RHIEN13 Mask

Definition at line 3143 of file M471M_R1_S.h.

◆ GPIO_INTEN_RHIEN13_Pos

#define GPIO_INTEN_RHIEN13_Pos   (29)

GPIO_T::INTEN: RHIEN13 Position

Definition at line 3142 of file M471M_R1_S.h.

◆ GPIO_INTEN_RHIEN14_Msk

#define GPIO_INTEN_RHIEN14_Msk   (0x1ul << GPIO_INTEN_RHIEN14_Pos)

GPIO_T::INTEN: RHIEN14 Mask

Definition at line 3146 of file M471M_R1_S.h.

◆ GPIO_INTEN_RHIEN14_Pos

#define GPIO_INTEN_RHIEN14_Pos   (30)

GPIO_T::INTEN: RHIEN14 Position

Definition at line 3145 of file M471M_R1_S.h.

◆ GPIO_INTEN_RHIEN15_Msk

#define GPIO_INTEN_RHIEN15_Msk   (0x1ul << GPIO_INTEN_RHIEN15_Pos)

GPIO_T::INTEN: RHIEN15 Mask

Definition at line 3149 of file M471M_R1_S.h.

◆ GPIO_INTEN_RHIEN15_Pos

#define GPIO_INTEN_RHIEN15_Pos   (31)

GPIO_T::INTEN: RHIEN15 Position

Definition at line 3148 of file M471M_R1_S.h.

◆ GPIO_INTEN_RHIEN1_Msk

#define GPIO_INTEN_RHIEN1_Msk   (0x1ul << GPIO_INTEN_RHIEN1_Pos)

GPIO_T::INTEN: RHIEN1 Mask

Definition at line 3107 of file M471M_R1_S.h.

◆ GPIO_INTEN_RHIEN1_Pos

#define GPIO_INTEN_RHIEN1_Pos   (17)

GPIO_T::INTEN: RHIEN1 Position

Definition at line 3106 of file M471M_R1_S.h.

◆ GPIO_INTEN_RHIEN2_Msk

#define GPIO_INTEN_RHIEN2_Msk   (0x1ul << GPIO_INTEN_RHIEN2_Pos)

GPIO_T::INTEN: RHIEN2 Mask

Definition at line 3110 of file M471M_R1_S.h.

◆ GPIO_INTEN_RHIEN2_Pos

#define GPIO_INTEN_RHIEN2_Pos   (18)

GPIO_T::INTEN: RHIEN2 Position

Definition at line 3109 of file M471M_R1_S.h.

◆ GPIO_INTEN_RHIEN3_Msk

#define GPIO_INTEN_RHIEN3_Msk   (0x1ul << GPIO_INTEN_RHIEN3_Pos)

GPIO_T::INTEN: RHIEN3 Mask

Definition at line 3113 of file M471M_R1_S.h.

◆ GPIO_INTEN_RHIEN3_Pos

#define GPIO_INTEN_RHIEN3_Pos   (19)

GPIO_T::INTEN: RHIEN3 Position

Definition at line 3112 of file M471M_R1_S.h.

◆ GPIO_INTEN_RHIEN4_Msk

#define GPIO_INTEN_RHIEN4_Msk   (0x1ul << GPIO_INTEN_RHIEN4_Pos)

GPIO_T::INTEN: RHIEN4 Mask

Definition at line 3116 of file M471M_R1_S.h.

◆ GPIO_INTEN_RHIEN4_Pos

#define GPIO_INTEN_RHIEN4_Pos   (20)

GPIO_T::INTEN: RHIEN4 Position

Definition at line 3115 of file M471M_R1_S.h.

◆ GPIO_INTEN_RHIEN5_Msk

#define GPIO_INTEN_RHIEN5_Msk   (0x1ul << GPIO_INTEN_RHIEN5_Pos)

GPIO_T::INTEN: RHIEN5 Mask

Definition at line 3119 of file M471M_R1_S.h.

◆ GPIO_INTEN_RHIEN5_Pos

#define GPIO_INTEN_RHIEN5_Pos   (21)

GPIO_T::INTEN: RHIEN5 Position

Definition at line 3118 of file M471M_R1_S.h.

◆ GPIO_INTEN_RHIEN6_Msk

#define GPIO_INTEN_RHIEN6_Msk   (0x1ul << GPIO_INTEN_RHIEN6_Pos)

GPIO_T::INTEN: RHIEN6 Mask

Definition at line 3122 of file M471M_R1_S.h.

◆ GPIO_INTEN_RHIEN6_Pos

#define GPIO_INTEN_RHIEN6_Pos   (22)

GPIO_T::INTEN: RHIEN6 Position

Definition at line 3121 of file M471M_R1_S.h.

◆ GPIO_INTEN_RHIEN7_Msk

#define GPIO_INTEN_RHIEN7_Msk   (0x1ul << GPIO_INTEN_RHIEN7_Pos)

GPIO_T::INTEN: RHIEN7 Mask

Definition at line 3125 of file M471M_R1_S.h.

◆ GPIO_INTEN_RHIEN7_Pos

#define GPIO_INTEN_RHIEN7_Pos   (23)

GPIO_T::INTEN: RHIEN7 Position

Definition at line 3124 of file M471M_R1_S.h.

◆ GPIO_INTEN_RHIEN8_Msk

#define GPIO_INTEN_RHIEN8_Msk   (0x1ul << GPIO_INTEN_RHIEN8_Pos)

GPIO_T::INTEN: RHIEN8 Mask

Definition at line 3128 of file M471M_R1_S.h.

◆ GPIO_INTEN_RHIEN8_Pos

#define GPIO_INTEN_RHIEN8_Pos   (24)

GPIO_T::INTEN: RHIEN8 Position

Definition at line 3127 of file M471M_R1_S.h.

◆ GPIO_INTEN_RHIEN9_Msk

#define GPIO_INTEN_RHIEN9_Msk   (0x1ul << GPIO_INTEN_RHIEN9_Pos)

GPIO_T::INTEN: RHIEN9 Mask

Definition at line 3131 of file M471M_R1_S.h.

◆ GPIO_INTEN_RHIEN9_Pos

#define GPIO_INTEN_RHIEN9_Pos   (25)

GPIO_T::INTEN: RHIEN9 Position

Definition at line 3130 of file M471M_R1_S.h.

◆ GPIO_INTSRC_INTSRC0_Msk

#define GPIO_INTSRC_INTSRC0_Msk   (0x1ul << GPIO_INTSRC_INTSRC0_Pos)

GPIO_T::INTSRC: INTSRC0 Mask

Definition at line 3152 of file M471M_R1_S.h.

◆ GPIO_INTSRC_INTSRC0_Pos

#define GPIO_INTSRC_INTSRC0_Pos   (0)

GPIO_T::INTSRC: INTSRC0 Position

Definition at line 3151 of file M471M_R1_S.h.

◆ GPIO_INTSRC_INTSRC10_Msk

#define GPIO_INTSRC_INTSRC10_Msk   (0x1ul << GPIO_INTSRC_INTSRC10_Pos)

GPIO_T::INTSRC: INTSRC10 Mask

Definition at line 3182 of file M471M_R1_S.h.

◆ GPIO_INTSRC_INTSRC10_Pos

#define GPIO_INTSRC_INTSRC10_Pos   (10)

GPIO_T::INTSRC: INTSRC10 Position

Definition at line 3181 of file M471M_R1_S.h.

◆ GPIO_INTSRC_INTSRC11_Msk

#define GPIO_INTSRC_INTSRC11_Msk   (0x1ul << GPIO_INTSRC_INTSRC11_Pos)

GPIO_T::INTSRC: INTSRC11 Mask

Definition at line 3185 of file M471M_R1_S.h.

◆ GPIO_INTSRC_INTSRC11_Pos

#define GPIO_INTSRC_INTSRC11_Pos   (11)

GPIO_T::INTSRC: INTSRC11 Position

Definition at line 3184 of file M471M_R1_S.h.

◆ GPIO_INTSRC_INTSRC12_Msk

#define GPIO_INTSRC_INTSRC12_Msk   (0x1ul << GPIO_INTSRC_INTSRC12_Pos)

GPIO_T::INTSRC: INTSRC12 Mask

Definition at line 3188 of file M471M_R1_S.h.

◆ GPIO_INTSRC_INTSRC12_Pos

#define GPIO_INTSRC_INTSRC12_Pos   (12)

GPIO_T::INTSRC: INTSRC12 Position

Definition at line 3187 of file M471M_R1_S.h.

◆ GPIO_INTSRC_INTSRC13_Msk

#define GPIO_INTSRC_INTSRC13_Msk   (0x1ul << GPIO_INTSRC_INTSRC13_Pos)

GPIO_T::INTSRC: INTSRC13 Mask

Definition at line 3191 of file M471M_R1_S.h.

◆ GPIO_INTSRC_INTSRC13_Pos

#define GPIO_INTSRC_INTSRC13_Pos   (13)

GPIO_T::INTSRC: INTSRC13 Position

Definition at line 3190 of file M471M_R1_S.h.

◆ GPIO_INTSRC_INTSRC14_Msk

#define GPIO_INTSRC_INTSRC14_Msk   (0x1ul << GPIO_INTSRC_INTSRC14_Pos)

GPIO_T::INTSRC: INTSRC14 Mask

Definition at line 3194 of file M471M_R1_S.h.

◆ GPIO_INTSRC_INTSRC14_Pos

#define GPIO_INTSRC_INTSRC14_Pos   (14)

GPIO_T::INTSRC: INTSRC14 Position

Definition at line 3193 of file M471M_R1_S.h.

◆ GPIO_INTSRC_INTSRC15_Msk

#define GPIO_INTSRC_INTSRC15_Msk   (0x1ul << GPIO_INTSRC_INTSRC15_Pos)

GPIO_T::INTSRC: INTSRC15 Mask

Definition at line 3197 of file M471M_R1_S.h.

◆ GPIO_INTSRC_INTSRC15_Pos

#define GPIO_INTSRC_INTSRC15_Pos   (15)

GPIO_T::INTSRC: INTSRC15 Position

Definition at line 3196 of file M471M_R1_S.h.

◆ GPIO_INTSRC_INTSRC1_Msk

#define GPIO_INTSRC_INTSRC1_Msk   (0x1ul << GPIO_INTSRC_INTSRC1_Pos)

GPIO_T::INTSRC: INTSRC1 Mask

Definition at line 3155 of file M471M_R1_S.h.

◆ GPIO_INTSRC_INTSRC1_Pos

#define GPIO_INTSRC_INTSRC1_Pos   (1)

GPIO_T::INTSRC: INTSRC1 Position

Definition at line 3154 of file M471M_R1_S.h.

◆ GPIO_INTSRC_INTSRC2_Msk

#define GPIO_INTSRC_INTSRC2_Msk   (0x1ul << GPIO_INTSRC_INTSRC2_Pos)

GPIO_T::INTSRC: INTSRC2 Mask

Definition at line 3158 of file M471M_R1_S.h.

◆ GPIO_INTSRC_INTSRC2_Pos

#define GPIO_INTSRC_INTSRC2_Pos   (2)

GPIO_T::INTSRC: INTSRC2 Position

Definition at line 3157 of file M471M_R1_S.h.

◆ GPIO_INTSRC_INTSRC3_Msk

#define GPIO_INTSRC_INTSRC3_Msk   (0x1ul << GPIO_INTSRC_INTSRC3_Pos)

GPIO_T::INTSRC: INTSRC3 Mask

Definition at line 3161 of file M471M_R1_S.h.

◆ GPIO_INTSRC_INTSRC3_Pos

#define GPIO_INTSRC_INTSRC3_Pos   (3)

GPIO_T::INTSRC: INTSRC3 Position

Definition at line 3160 of file M471M_R1_S.h.

◆ GPIO_INTSRC_INTSRC4_Msk

#define GPIO_INTSRC_INTSRC4_Msk   (0x1ul << GPIO_INTSRC_INTSRC4_Pos)

GPIO_T::INTSRC: INTSRC4 Mask

Definition at line 3164 of file M471M_R1_S.h.

◆ GPIO_INTSRC_INTSRC4_Pos

#define GPIO_INTSRC_INTSRC4_Pos   (4)

GPIO_T::INTSRC: INTSRC4 Position

Definition at line 3163 of file M471M_R1_S.h.

◆ GPIO_INTSRC_INTSRC5_Msk

#define GPIO_INTSRC_INTSRC5_Msk   (0x1ul << GPIO_INTSRC_INTSRC5_Pos)

GPIO_T::INTSRC: INTSRC5 Mask

Definition at line 3167 of file M471M_R1_S.h.

◆ GPIO_INTSRC_INTSRC5_Pos

#define GPIO_INTSRC_INTSRC5_Pos   (5)

GPIO_T::INTSRC: INTSRC5 Position

Definition at line 3166 of file M471M_R1_S.h.

◆ GPIO_INTSRC_INTSRC6_Msk

#define GPIO_INTSRC_INTSRC6_Msk   (0x1ul << GPIO_INTSRC_INTSRC6_Pos)

GPIO_T::INTSRC: INTSRC6 Mask

Definition at line 3170 of file M471M_R1_S.h.

◆ GPIO_INTSRC_INTSRC6_Pos

#define GPIO_INTSRC_INTSRC6_Pos   (6)

GPIO_T::INTSRC: INTSRC6 Position

Definition at line 3169 of file M471M_R1_S.h.

◆ GPIO_INTSRC_INTSRC7_Msk

#define GPIO_INTSRC_INTSRC7_Msk   (0x1ul << GPIO_INTSRC_INTSRC7_Pos)

GPIO_T::INTSRC: INTSRC7 Mask

Definition at line 3173 of file M471M_R1_S.h.

◆ GPIO_INTSRC_INTSRC7_Pos

#define GPIO_INTSRC_INTSRC7_Pos   (7)

GPIO_T::INTSRC: INTSRC7 Position

Definition at line 3172 of file M471M_R1_S.h.

◆ GPIO_INTSRC_INTSRC8_Msk

#define GPIO_INTSRC_INTSRC8_Msk   (0x1ul << GPIO_INTSRC_INTSRC8_Pos)

GPIO_T::INTSRC: INTSRC8 Mask

Definition at line 3176 of file M471M_R1_S.h.

◆ GPIO_INTSRC_INTSRC8_Pos

#define GPIO_INTSRC_INTSRC8_Pos   (8)

GPIO_T::INTSRC: INTSRC8 Position

Definition at line 3175 of file M471M_R1_S.h.

◆ GPIO_INTSRC_INTSRC9_Msk

#define GPIO_INTSRC_INTSRC9_Msk   (0x1ul << GPIO_INTSRC_INTSRC9_Pos)

GPIO_T::INTSRC: INTSRC9 Mask

Definition at line 3179 of file M471M_R1_S.h.

◆ GPIO_INTSRC_INTSRC9_Pos

#define GPIO_INTSRC_INTSRC9_Pos   (9)

GPIO_T::INTSRC: INTSRC9 Position

Definition at line 3178 of file M471M_R1_S.h.

◆ GPIO_INTTYPE_TYPE0_Msk

#define GPIO_INTTYPE_TYPE0_Msk   (0x1ul << GPIO_INTTYPE_TYPE0_Pos)

GPIO_T::INTTYPE: TYPE0 Mask

Definition at line 3008 of file M471M_R1_S.h.

◆ GPIO_INTTYPE_TYPE0_Pos

#define GPIO_INTTYPE_TYPE0_Pos   (0)

GPIO_T::INTTYPE: TYPE0 Position

Definition at line 3007 of file M471M_R1_S.h.

◆ GPIO_INTTYPE_TYPE10_Msk

#define GPIO_INTTYPE_TYPE10_Msk   (0x1ul << GPIO_INTTYPE_TYPE10_Pos)

GPIO_T::INTTYPE: TYPE10 Mask

Definition at line 3038 of file M471M_R1_S.h.

◆ GPIO_INTTYPE_TYPE10_Pos

#define GPIO_INTTYPE_TYPE10_Pos   (10)

GPIO_T::INTTYPE: TYPE10 Position

Definition at line 3037 of file M471M_R1_S.h.

◆ GPIO_INTTYPE_TYPE11_Msk

#define GPIO_INTTYPE_TYPE11_Msk   (0x1ul << GPIO_INTTYPE_TYPE11_Pos)

GPIO_T::INTTYPE: TYPE11 Mask

Definition at line 3041 of file M471M_R1_S.h.

◆ GPIO_INTTYPE_TYPE11_Pos

#define GPIO_INTTYPE_TYPE11_Pos   (11)

GPIO_T::INTTYPE: TYPE11 Position

Definition at line 3040 of file M471M_R1_S.h.

◆ GPIO_INTTYPE_TYPE12_Msk

#define GPIO_INTTYPE_TYPE12_Msk   (0x1ul << GPIO_INTTYPE_TYPE12_Pos)

GPIO_T::INTTYPE: TYPE12 Mask

Definition at line 3044 of file M471M_R1_S.h.

◆ GPIO_INTTYPE_TYPE12_Pos

#define GPIO_INTTYPE_TYPE12_Pos   (12)

GPIO_T::INTTYPE: TYPE12 Position

Definition at line 3043 of file M471M_R1_S.h.

◆ GPIO_INTTYPE_TYPE13_Msk

#define GPIO_INTTYPE_TYPE13_Msk   (0x1ul << GPIO_INTTYPE_TYPE13_Pos)

GPIO_T::INTTYPE: TYPE13 Mask

Definition at line 3047 of file M471M_R1_S.h.

◆ GPIO_INTTYPE_TYPE13_Pos

#define GPIO_INTTYPE_TYPE13_Pos   (13)

GPIO_T::INTTYPE: TYPE13 Position

Definition at line 3046 of file M471M_R1_S.h.

◆ GPIO_INTTYPE_TYPE14_Msk

#define GPIO_INTTYPE_TYPE14_Msk   (0x1ul << GPIO_INTTYPE_TYPE14_Pos)

GPIO_T::INTTYPE: TYPE14 Mask

Definition at line 3050 of file M471M_R1_S.h.

◆ GPIO_INTTYPE_TYPE14_Pos

#define GPIO_INTTYPE_TYPE14_Pos   (14)

GPIO_T::INTTYPE: TYPE14 Position

Definition at line 3049 of file M471M_R1_S.h.

◆ GPIO_INTTYPE_TYPE15_Msk

#define GPIO_INTTYPE_TYPE15_Msk   (0x1ul << GPIO_INTTYPE_TYPE15_Pos)

GPIO_T::INTTYPE: TYPE15 Mask

Definition at line 3053 of file M471M_R1_S.h.

◆ GPIO_INTTYPE_TYPE15_Pos

#define GPIO_INTTYPE_TYPE15_Pos   (15)

GPIO_T::INTTYPE: TYPE15 Position

Definition at line 3052 of file M471M_R1_S.h.

◆ GPIO_INTTYPE_TYPE1_Msk

#define GPIO_INTTYPE_TYPE1_Msk   (0x1ul << GPIO_INTTYPE_TYPE1_Pos)

GPIO_T::INTTYPE: TYPE1 Mask

Definition at line 3011 of file M471M_R1_S.h.

◆ GPIO_INTTYPE_TYPE1_Pos

#define GPIO_INTTYPE_TYPE1_Pos   (1)

GPIO_T::INTTYPE: TYPE1 Position

Definition at line 3010 of file M471M_R1_S.h.

◆ GPIO_INTTYPE_TYPE2_Msk

#define GPIO_INTTYPE_TYPE2_Msk   (0x1ul << GPIO_INTTYPE_TYPE2_Pos)

GPIO_T::INTTYPE: TYPE2 Mask

Definition at line 3014 of file M471M_R1_S.h.

◆ GPIO_INTTYPE_TYPE2_Pos

#define GPIO_INTTYPE_TYPE2_Pos   (2)

GPIO_T::INTTYPE: TYPE2 Position

Definition at line 3013 of file M471M_R1_S.h.

◆ GPIO_INTTYPE_TYPE3_Msk

#define GPIO_INTTYPE_TYPE3_Msk   (0x1ul << GPIO_INTTYPE_TYPE3_Pos)

GPIO_T::INTTYPE: TYPE3 Mask

Definition at line 3017 of file M471M_R1_S.h.

◆ GPIO_INTTYPE_TYPE3_Pos

#define GPIO_INTTYPE_TYPE3_Pos   (3)

GPIO_T::INTTYPE: TYPE3 Position

Definition at line 3016 of file M471M_R1_S.h.

◆ GPIO_INTTYPE_TYPE4_Msk

#define GPIO_INTTYPE_TYPE4_Msk   (0x1ul << GPIO_INTTYPE_TYPE4_Pos)

GPIO_T::INTTYPE: TYPE4 Mask

Definition at line 3020 of file M471M_R1_S.h.

◆ GPIO_INTTYPE_TYPE4_Pos

#define GPIO_INTTYPE_TYPE4_Pos   (4)

GPIO_T::INTTYPE: TYPE4 Position

Definition at line 3019 of file M471M_R1_S.h.

◆ GPIO_INTTYPE_TYPE5_Msk

#define GPIO_INTTYPE_TYPE5_Msk   (0x1ul << GPIO_INTTYPE_TYPE5_Pos)

GPIO_T::INTTYPE: TYPE5 Mask

Definition at line 3023 of file M471M_R1_S.h.

◆ GPIO_INTTYPE_TYPE5_Pos

#define GPIO_INTTYPE_TYPE5_Pos   (5)

GPIO_T::INTTYPE: TYPE5 Position

Definition at line 3022 of file M471M_R1_S.h.

◆ GPIO_INTTYPE_TYPE6_Msk

#define GPIO_INTTYPE_TYPE6_Msk   (0x1ul << GPIO_INTTYPE_TYPE6_Pos)

GPIO_T::INTTYPE: TYPE6 Mask

Definition at line 3026 of file M471M_R1_S.h.

◆ GPIO_INTTYPE_TYPE6_Pos

#define GPIO_INTTYPE_TYPE6_Pos   (6)

GPIO_T::INTTYPE: TYPE6 Position

Definition at line 3025 of file M471M_R1_S.h.

◆ GPIO_INTTYPE_TYPE7_Msk

#define GPIO_INTTYPE_TYPE7_Msk   (0x1ul << GPIO_INTTYPE_TYPE7_Pos)

GPIO_T::INTTYPE: TYPE7 Mask

Definition at line 3029 of file M471M_R1_S.h.

◆ GPIO_INTTYPE_TYPE7_Pos

#define GPIO_INTTYPE_TYPE7_Pos   (7)

GPIO_T::INTTYPE: TYPE7 Position

Definition at line 3028 of file M471M_R1_S.h.

◆ GPIO_INTTYPE_TYPE8_Msk

#define GPIO_INTTYPE_TYPE8_Msk   (0x1ul << GPIO_INTTYPE_TYPE8_Pos)

GPIO_T::INTTYPE: TYPE8 Mask

Definition at line 3032 of file M471M_R1_S.h.

◆ GPIO_INTTYPE_TYPE8_Pos

#define GPIO_INTTYPE_TYPE8_Pos   (8)

GPIO_T::INTTYPE: TYPE8 Position

Definition at line 3031 of file M471M_R1_S.h.

◆ GPIO_INTTYPE_TYPE9_Msk

#define GPIO_INTTYPE_TYPE9_Msk   (0x1ul << GPIO_INTTYPE_TYPE9_Pos)

GPIO_T::INTTYPE: TYPE9 Mask

Definition at line 3035 of file M471M_R1_S.h.

◆ GPIO_INTTYPE_TYPE9_Pos

#define GPIO_INTTYPE_TYPE9_Pos   (9)

GPIO_T::INTTYPE: TYPE9 Position

Definition at line 3034 of file M471M_R1_S.h.

◆ GPIO_MODE_MODE0_Msk

#define GPIO_MODE_MODE0_Msk   (0x3ul << GPIO_MODE_MODE0_Pos)

GPIO_T::MODE: MODE0 Mask

Definition at line 2720 of file M471M_R1_S.h.

◆ GPIO_MODE_MODE0_Pos

#define GPIO_MODE_MODE0_Pos   (0)
@addtogroup GPIO_CONST GPIO Bit Field Definition
Constant Definitions for GPIO Controller

GPIO_T::MODE: MODE0 Position

Definition at line 2719 of file M471M_R1_S.h.

◆ GPIO_MODE_MODE10_Msk

#define GPIO_MODE_MODE10_Msk   (0x3ul << GPIO_MODE_MODE10_Pos)

GPIO_T::MODE: MODE10 Mask

Definition at line 2750 of file M471M_R1_S.h.

◆ GPIO_MODE_MODE10_Pos

#define GPIO_MODE_MODE10_Pos   (20)

GPIO_T::MODE: MODE10 Position

Definition at line 2749 of file M471M_R1_S.h.

◆ GPIO_MODE_MODE11_Msk

#define GPIO_MODE_MODE11_Msk   (0x3ul << GPIO_MODE_MODE11_Pos)

GPIO_T::MODE: MODE11 Mask

Definition at line 2753 of file M471M_R1_S.h.

◆ GPIO_MODE_MODE11_Pos

#define GPIO_MODE_MODE11_Pos   (22)

GPIO_T::MODE: MODE11 Position

Definition at line 2752 of file M471M_R1_S.h.

◆ GPIO_MODE_MODE12_Msk

#define GPIO_MODE_MODE12_Msk   (0x3ul << GPIO_MODE_MODE12_Pos)

GPIO_T::MODE: MODE12 Mask

Definition at line 2756 of file M471M_R1_S.h.

◆ GPIO_MODE_MODE12_Pos

#define GPIO_MODE_MODE12_Pos   (24)

GPIO_T::MODE: MODE12 Position

Definition at line 2755 of file M471M_R1_S.h.

◆ GPIO_MODE_MODE13_Msk

#define GPIO_MODE_MODE13_Msk   (0x3ul << GPIO_MODE_MODE13_Pos)

GPIO_T::MODE: MODE13 Mask

Definition at line 2759 of file M471M_R1_S.h.

◆ GPIO_MODE_MODE13_Pos

#define GPIO_MODE_MODE13_Pos   (26)

GPIO_T::MODE: MODE13 Position

Definition at line 2758 of file M471M_R1_S.h.

◆ GPIO_MODE_MODE14_Msk

#define GPIO_MODE_MODE14_Msk   (0x3ul << GPIO_MODE_MODE14_Pos)

GPIO_T::MODE: MODE14 Mask

Definition at line 2762 of file M471M_R1_S.h.

◆ GPIO_MODE_MODE14_Pos

#define GPIO_MODE_MODE14_Pos   (28)

GPIO_T::MODE: MODE14 Position

Definition at line 2761 of file M471M_R1_S.h.

◆ GPIO_MODE_MODE15_Msk

#define GPIO_MODE_MODE15_Msk   (0x3ul << GPIO_MODE_MODE15_Pos)

GPIO_T::MODE: MODE15 Mask

Definition at line 2765 of file M471M_R1_S.h.

◆ GPIO_MODE_MODE15_Pos

#define GPIO_MODE_MODE15_Pos   (30)

GPIO_T::MODE: MODE15 Position

Definition at line 2764 of file M471M_R1_S.h.

◆ GPIO_MODE_MODE1_Msk

#define GPIO_MODE_MODE1_Msk   (0x3ul << GPIO_MODE_MODE1_Pos)

GPIO_T::MODE: MODE1 Mask

Definition at line 2723 of file M471M_R1_S.h.

◆ GPIO_MODE_MODE1_Pos

#define GPIO_MODE_MODE1_Pos   (2)

GPIO_T::MODE: MODE1 Position

Definition at line 2722 of file M471M_R1_S.h.

◆ GPIO_MODE_MODE2_Msk

#define GPIO_MODE_MODE2_Msk   (0x3ul << GPIO_MODE_MODE2_Pos)

GPIO_T::MODE: MODE2 Mask

Definition at line 2726 of file M471M_R1_S.h.

◆ GPIO_MODE_MODE2_Pos

#define GPIO_MODE_MODE2_Pos   (4)

GPIO_T::MODE: MODE2 Position

Definition at line 2725 of file M471M_R1_S.h.

◆ GPIO_MODE_MODE3_Msk

#define GPIO_MODE_MODE3_Msk   (0x3ul << GPIO_MODE_MODE3_Pos)

GPIO_T::MODE: MODE3 Mask

Definition at line 2729 of file M471M_R1_S.h.

◆ GPIO_MODE_MODE3_Pos

#define GPIO_MODE_MODE3_Pos   (6)

GPIO_T::MODE: MODE3 Position

Definition at line 2728 of file M471M_R1_S.h.

◆ GPIO_MODE_MODE4_Msk

#define GPIO_MODE_MODE4_Msk   (0x3ul << GPIO_MODE_MODE4_Pos)

GPIO_T::MODE: MODE4 Mask

Definition at line 2732 of file M471M_R1_S.h.

◆ GPIO_MODE_MODE4_Pos

#define GPIO_MODE_MODE4_Pos   (8)

GPIO_T::MODE: MODE4 Position

Definition at line 2731 of file M471M_R1_S.h.

◆ GPIO_MODE_MODE5_Msk

#define GPIO_MODE_MODE5_Msk   (0x3ul << GPIO_MODE_MODE5_Pos)

GPIO_T::MODE: MODE5 Mask

Definition at line 2735 of file M471M_R1_S.h.

◆ GPIO_MODE_MODE5_Pos

#define GPIO_MODE_MODE5_Pos   (10)

GPIO_T::MODE: MODE5 Position

Definition at line 2734 of file M471M_R1_S.h.

◆ GPIO_MODE_MODE6_Msk

#define GPIO_MODE_MODE6_Msk   (0x3ul << GPIO_MODE_MODE6_Pos)

GPIO_T::MODE: MODE6 Mask

Definition at line 2738 of file M471M_R1_S.h.

◆ GPIO_MODE_MODE6_Pos

#define GPIO_MODE_MODE6_Pos   (12)

GPIO_T::MODE: MODE6 Position

Definition at line 2737 of file M471M_R1_S.h.

◆ GPIO_MODE_MODE7_Msk

#define GPIO_MODE_MODE7_Msk   (0x3ul << GPIO_MODE_MODE7_Pos)

GPIO_T::MODE: MODE7 Mask

Definition at line 2741 of file M471M_R1_S.h.

◆ GPIO_MODE_MODE7_Pos

#define GPIO_MODE_MODE7_Pos   (14)

GPIO_T::MODE: MODE7 Position

Definition at line 2740 of file M471M_R1_S.h.

◆ GPIO_MODE_MODE8_Msk

#define GPIO_MODE_MODE8_Msk   (0x3ul << GPIO_MODE_MODE8_Pos)

GPIO_T::MODE: MODE8 Mask

Definition at line 2744 of file M471M_R1_S.h.

◆ GPIO_MODE_MODE8_Pos

#define GPIO_MODE_MODE8_Pos   (16)

GPIO_T::MODE: MODE8 Position

Definition at line 2743 of file M471M_R1_S.h.

◆ GPIO_MODE_MODE9_Msk

#define GPIO_MODE_MODE9_Msk   (0x3ul << GPIO_MODE_MODE9_Pos)

GPIO_T::MODE: MODE9 Mask

Definition at line 2747 of file M471M_R1_S.h.

◆ GPIO_MODE_MODE9_Pos

#define GPIO_MODE_MODE9_Pos   (18)

GPIO_T::MODE: MODE9 Position

Definition at line 2746 of file M471M_R1_S.h.

◆ GPIO_PIN_PIN0_Msk

#define GPIO_PIN_PIN0_Msk   (0x1ul << GPIO_PIN_PIN0_Pos)

GPIO_T::PIN: PIN0 Mask

Definition at line 2912 of file M471M_R1_S.h.

◆ GPIO_PIN_PIN0_Pos

#define GPIO_PIN_PIN0_Pos   (0)

GPIO_T::PIN: PIN0 Position

Definition at line 2911 of file M471M_R1_S.h.

◆ GPIO_PIN_PIN10_Msk

#define GPIO_PIN_PIN10_Msk   (0x1ul << GPIO_PIN_PIN10_Pos)

GPIO_T::PIN: PIN10 Mask

Definition at line 2942 of file M471M_R1_S.h.

◆ GPIO_PIN_PIN10_Pos

#define GPIO_PIN_PIN10_Pos   (10)

GPIO_T::PIN: PIN10 Position

Definition at line 2941 of file M471M_R1_S.h.

◆ GPIO_PIN_PIN11_Msk

#define GPIO_PIN_PIN11_Msk   (0x1ul << GPIO_PIN_PIN11_Pos)

GPIO_T::PIN: PIN11 Mask

Definition at line 2945 of file M471M_R1_S.h.

◆ GPIO_PIN_PIN11_Pos

#define GPIO_PIN_PIN11_Pos   (11)

GPIO_T::PIN: PIN11 Position

Definition at line 2944 of file M471M_R1_S.h.

◆ GPIO_PIN_PIN12_Msk

#define GPIO_PIN_PIN12_Msk   (0x1ul << GPIO_PIN_PIN12_Pos)

GPIO_T::PIN: PIN12 Mask

Definition at line 2948 of file M471M_R1_S.h.

◆ GPIO_PIN_PIN12_Pos

#define GPIO_PIN_PIN12_Pos   (12)

GPIO_T::PIN: PIN12 Position

Definition at line 2947 of file M471M_R1_S.h.

◆ GPIO_PIN_PIN13_Msk

#define GPIO_PIN_PIN13_Msk   (0x1ul << GPIO_PIN_PIN13_Pos)

GPIO_T::PIN: PIN13 Mask

Definition at line 2951 of file M471M_R1_S.h.

◆ GPIO_PIN_PIN13_Pos

#define GPIO_PIN_PIN13_Pos   (13)

GPIO_T::PIN: PIN13 Position

Definition at line 2950 of file M471M_R1_S.h.

◆ GPIO_PIN_PIN14_Msk

#define GPIO_PIN_PIN14_Msk   (0x1ul << GPIO_PIN_PIN14_Pos)

GPIO_T::PIN: PIN14 Mask

Definition at line 2954 of file M471M_R1_S.h.

◆ GPIO_PIN_PIN14_Pos

#define GPIO_PIN_PIN14_Pos   (14)

GPIO_T::PIN: PIN14 Position

Definition at line 2953 of file M471M_R1_S.h.

◆ GPIO_PIN_PIN15_Msk

#define GPIO_PIN_PIN15_Msk   (0x1ul << GPIO_PIN_PIN15_Pos)

GPIO_T::PIN: PIN15 Mask

Definition at line 2957 of file M471M_R1_S.h.

◆ GPIO_PIN_PIN15_Pos

#define GPIO_PIN_PIN15_Pos   (15)

GPIO_T::PIN: PIN15 Position

Definition at line 2956 of file M471M_R1_S.h.

◆ GPIO_PIN_PIN1_Msk

#define GPIO_PIN_PIN1_Msk   (0x1ul << GPIO_PIN_PIN1_Pos)

GPIO_T::PIN: PIN1 Mask

Definition at line 2915 of file M471M_R1_S.h.

◆ GPIO_PIN_PIN1_Pos

#define GPIO_PIN_PIN1_Pos   (1)

GPIO_T::PIN: PIN1 Position

Definition at line 2914 of file M471M_R1_S.h.

◆ GPIO_PIN_PIN2_Msk

#define GPIO_PIN_PIN2_Msk   (0x1ul << GPIO_PIN_PIN2_Pos)

GPIO_T::PIN: PIN2 Mask

Definition at line 2918 of file M471M_R1_S.h.

◆ GPIO_PIN_PIN2_Pos

#define GPIO_PIN_PIN2_Pos   (2)

GPIO_T::PIN: PIN2 Position

Definition at line 2917 of file M471M_R1_S.h.

◆ GPIO_PIN_PIN3_Msk

#define GPIO_PIN_PIN3_Msk   (0x1ul << GPIO_PIN_PIN3_Pos)

GPIO_T::PIN: PIN3 Mask

Definition at line 2921 of file M471M_R1_S.h.

◆ GPIO_PIN_PIN3_Pos

#define GPIO_PIN_PIN3_Pos   (3)

GPIO_T::PIN: PIN3 Position

Definition at line 2920 of file M471M_R1_S.h.

◆ GPIO_PIN_PIN4_Msk

#define GPIO_PIN_PIN4_Msk   (0x1ul << GPIO_PIN_PIN4_Pos)

GPIO_T::PIN: PIN4 Mask

Definition at line 2924 of file M471M_R1_S.h.

◆ GPIO_PIN_PIN4_Pos

#define GPIO_PIN_PIN4_Pos   (4)

GPIO_T::PIN: PIN4 Position

Definition at line 2923 of file M471M_R1_S.h.

◆ GPIO_PIN_PIN5_Msk

#define GPIO_PIN_PIN5_Msk   (0x1ul << GPIO_PIN_PIN5_Pos)

GPIO_T::PIN: PIN5 Mask

Definition at line 2927 of file M471M_R1_S.h.

◆ GPIO_PIN_PIN5_Pos

#define GPIO_PIN_PIN5_Pos   (5)

GPIO_T::PIN: PIN5 Position

Definition at line 2926 of file M471M_R1_S.h.

◆ GPIO_PIN_PIN6_Msk

#define GPIO_PIN_PIN6_Msk   (0x1ul << GPIO_PIN_PIN6_Pos)

GPIO_T::PIN: PIN6 Mask

Definition at line 2930 of file M471M_R1_S.h.

◆ GPIO_PIN_PIN6_Pos

#define GPIO_PIN_PIN6_Pos   (6)

GPIO_T::PIN: PIN6 Position

Definition at line 2929 of file M471M_R1_S.h.

◆ GPIO_PIN_PIN7_Msk

#define GPIO_PIN_PIN7_Msk   (0x1ul << GPIO_PIN_PIN7_Pos)

GPIO_T::PIN: PIN7 Mask

Definition at line 2933 of file M471M_R1_S.h.

◆ GPIO_PIN_PIN7_Pos

#define GPIO_PIN_PIN7_Pos   (7)

GPIO_T::PIN: PIN7 Position

Definition at line 2932 of file M471M_R1_S.h.

◆ GPIO_PIN_PIN8_Msk

#define GPIO_PIN_PIN8_Msk   (0x1ul << GPIO_PIN_PIN8_Pos)

GPIO_T::PIN: PIN8 Mask

Definition at line 2936 of file M471M_R1_S.h.

◆ GPIO_PIN_PIN8_Pos

#define GPIO_PIN_PIN8_Pos   (8)

GPIO_T::PIN: PIN8 Position

Definition at line 2935 of file M471M_R1_S.h.

◆ GPIO_PIN_PIN9_Msk

#define GPIO_PIN_PIN9_Msk   (0x1ul << GPIO_PIN_PIN9_Pos)

GPIO_T::PIN: PIN9 Mask

Definition at line 2939 of file M471M_R1_S.h.

◆ GPIO_PIN_PIN9_Pos

#define GPIO_PIN_PIN9_Pos   (9)

GPIO_T::PIN: PIN9 Position

Definition at line 2938 of file M471M_R1_S.h.

◆ GPIO_SLEWCTL_HSREN0_Msk

#define GPIO_SLEWCTL_HSREN0_Msk   (0x1ul << GPIO_SLEWCTL_HSREN0_Pos)

GPIO_T::SLEWCTL: HSREN0 Mask

Definition at line 3248 of file M471M_R1_S.h.

◆ GPIO_SLEWCTL_HSREN0_Pos

#define GPIO_SLEWCTL_HSREN0_Pos   (0)

GPIO_T::SLEWCTL: HSREN0 Position

Definition at line 3247 of file M471M_R1_S.h.

◆ GPIO_SLEWCTL_HSREN10_Msk

#define GPIO_SLEWCTL_HSREN10_Msk   (0x1ul << GPIO_SLEWCTL_HSREN10_Pos)

GPIO_T::SLEWCTL: HSREN10 Mask

Definition at line 3278 of file M471M_R1_S.h.

◆ GPIO_SLEWCTL_HSREN10_Pos

#define GPIO_SLEWCTL_HSREN10_Pos   (10)

GPIO_T::SLEWCTL: HSREN10 Position

Definition at line 3277 of file M471M_R1_S.h.

◆ GPIO_SLEWCTL_HSREN11_Msk

#define GPIO_SLEWCTL_HSREN11_Msk   (0x1ul << GPIO_SLEWCTL_HSREN11_Pos)

GPIO_T::SLEWCTL: HSREN11 Mask

Definition at line 3281 of file M471M_R1_S.h.

◆ GPIO_SLEWCTL_HSREN11_Pos

#define GPIO_SLEWCTL_HSREN11_Pos   (11)

GPIO_T::SLEWCTL: HSREN11 Position

Definition at line 3280 of file M471M_R1_S.h.

◆ GPIO_SLEWCTL_HSREN12_Msk

#define GPIO_SLEWCTL_HSREN12_Msk   (0x1ul << GPIO_SLEWCTL_HSREN12_Pos)

GPIO_T::SLEWCTL: HSREN12 Mask

Definition at line 3284 of file M471M_R1_S.h.

◆ GPIO_SLEWCTL_HSREN12_Pos

#define GPIO_SLEWCTL_HSREN12_Pos   (12)

GPIO_T::SLEWCTL: HSREN12 Position

Definition at line 3283 of file M471M_R1_S.h.

◆ GPIO_SLEWCTL_HSREN13_Msk

#define GPIO_SLEWCTL_HSREN13_Msk   (0x1ul << GPIO_SLEWCTL_HSREN13_Pos)

GPIO_T::SLEWCTL: HSREN13 Mask

Definition at line 3287 of file M471M_R1_S.h.

◆ GPIO_SLEWCTL_HSREN13_Pos

#define GPIO_SLEWCTL_HSREN13_Pos   (13)

GPIO_T::SLEWCTL: HSREN13 Position

Definition at line 3286 of file M471M_R1_S.h.

◆ GPIO_SLEWCTL_HSREN14_Msk

#define GPIO_SLEWCTL_HSREN14_Msk   (0x1ul << GPIO_SLEWCTL_HSREN14_Pos)

GPIO_T::SLEWCTL: HSREN14 Mask

Definition at line 3290 of file M471M_R1_S.h.

◆ GPIO_SLEWCTL_HSREN14_Pos

#define GPIO_SLEWCTL_HSREN14_Pos   (14)

GPIO_T::SLEWCTL: HSREN14 Position

Definition at line 3289 of file M471M_R1_S.h.

◆ GPIO_SLEWCTL_HSREN15_Msk

#define GPIO_SLEWCTL_HSREN15_Msk   (0x1ul << GPIO_SLEWCTL_HSREN15_Pos)

GPIO_T::SLEWCTL: HSREN15 Mask

Definition at line 3293 of file M471M_R1_S.h.

◆ GPIO_SLEWCTL_HSREN15_Pos

#define GPIO_SLEWCTL_HSREN15_Pos   (15)

GPIO_T::SLEWCTL: HSREN15 Position

Definition at line 3292 of file M471M_R1_S.h.

◆ GPIO_SLEWCTL_HSREN1_Msk

#define GPIO_SLEWCTL_HSREN1_Msk   (0x1ul << GPIO_SLEWCTL_HSREN1_Pos)

GPIO_T::SLEWCTL: HSREN1 Mask

Definition at line 3251 of file M471M_R1_S.h.

◆ GPIO_SLEWCTL_HSREN1_Pos

#define GPIO_SLEWCTL_HSREN1_Pos   (1)

GPIO_T::SLEWCTL: HSREN1 Position

Definition at line 3250 of file M471M_R1_S.h.

◆ GPIO_SLEWCTL_HSREN2_Msk

#define GPIO_SLEWCTL_HSREN2_Msk   (0x1ul << GPIO_SLEWCTL_HSREN2_Pos)

GPIO_T::SLEWCTL: HSREN2 Mask

Definition at line 3254 of file M471M_R1_S.h.

◆ GPIO_SLEWCTL_HSREN2_Pos

#define GPIO_SLEWCTL_HSREN2_Pos   (2)

GPIO_T::SLEWCTL: HSREN2 Position

Definition at line 3253 of file M471M_R1_S.h.

◆ GPIO_SLEWCTL_HSREN3_Msk

#define GPIO_SLEWCTL_HSREN3_Msk   (0x1ul << GPIO_SLEWCTL_HSREN3_Pos)

GPIO_T::SLEWCTL: HSREN3 Mask

Definition at line 3257 of file M471M_R1_S.h.

◆ GPIO_SLEWCTL_HSREN3_Pos

#define GPIO_SLEWCTL_HSREN3_Pos   (3)

GPIO_T::SLEWCTL: HSREN3 Position

Definition at line 3256 of file M471M_R1_S.h.

◆ GPIO_SLEWCTL_HSREN4_Msk

#define GPIO_SLEWCTL_HSREN4_Msk   (0x1ul << GPIO_SLEWCTL_HSREN4_Pos)

GPIO_T::SLEWCTL: HSREN4 Mask

Definition at line 3260 of file M471M_R1_S.h.

◆ GPIO_SLEWCTL_HSREN4_Pos

#define GPIO_SLEWCTL_HSREN4_Pos   (4)

GPIO_T::SLEWCTL: HSREN4 Position

Definition at line 3259 of file M471M_R1_S.h.

◆ GPIO_SLEWCTL_HSREN5_Msk

#define GPIO_SLEWCTL_HSREN5_Msk   (0x1ul << GPIO_SLEWCTL_HSREN5_Pos)

GPIO_T::SLEWCTL: HSREN5 Mask

Definition at line 3263 of file M471M_R1_S.h.

◆ GPIO_SLEWCTL_HSREN5_Pos

#define GPIO_SLEWCTL_HSREN5_Pos   (5)

GPIO_T::SLEWCTL: HSREN5 Position

Definition at line 3262 of file M471M_R1_S.h.

◆ GPIO_SLEWCTL_HSREN6_Msk

#define GPIO_SLEWCTL_HSREN6_Msk   (0x1ul << GPIO_SLEWCTL_HSREN6_Pos)

GPIO_T::SLEWCTL: HSREN6 Mask

Definition at line 3266 of file M471M_R1_S.h.

◆ GPIO_SLEWCTL_HSREN6_Pos

#define GPIO_SLEWCTL_HSREN6_Pos   (6)

GPIO_T::SLEWCTL: HSREN6 Position

Definition at line 3265 of file M471M_R1_S.h.

◆ GPIO_SLEWCTL_HSREN7_Msk

#define GPIO_SLEWCTL_HSREN7_Msk   (0x1ul << GPIO_SLEWCTL_HSREN7_Pos)

GPIO_T::SLEWCTL: HSREN7 Mask

Definition at line 3269 of file M471M_R1_S.h.

◆ GPIO_SLEWCTL_HSREN7_Pos

#define GPIO_SLEWCTL_HSREN7_Pos   (7)

GPIO_T::SLEWCTL: HSREN7 Position

Definition at line 3268 of file M471M_R1_S.h.

◆ GPIO_SLEWCTL_HSREN8_Msk

#define GPIO_SLEWCTL_HSREN8_Msk   (0x1ul << GPIO_SLEWCTL_HSREN8_Pos)

GPIO_T::SLEWCTL: HSREN8 Mask

Definition at line 3272 of file M471M_R1_S.h.

◆ GPIO_SLEWCTL_HSREN8_Pos

#define GPIO_SLEWCTL_HSREN8_Pos   (8)

GPIO_T::SLEWCTL: HSREN8 Position

Definition at line 3271 of file M471M_R1_S.h.

◆ GPIO_SLEWCTL_HSREN9_Msk

#define GPIO_SLEWCTL_HSREN9_Msk   (0x1ul << GPIO_SLEWCTL_HSREN9_Pos)

GPIO_T::SLEWCTL: HSREN9 Mask

Definition at line 3275 of file M471M_R1_S.h.

◆ GPIO_SLEWCTL_HSREN9_Pos

#define GPIO_SLEWCTL_HSREN9_Pos   (9)

GPIO_T::SLEWCTL: HSREN9 Position

Definition at line 3274 of file M471M_R1_S.h.

◆ GPIO_SMTEN_SMTEN0_Msk

#define GPIO_SMTEN_SMTEN0_Msk   (0x1ul << GPIO_SMTEN_SMTEN0_Pos)

GPIO_T::SMTEN: SMTEN0 Mask

Definition at line 3200 of file M471M_R1_S.h.

◆ GPIO_SMTEN_SMTEN0_Pos

#define GPIO_SMTEN_SMTEN0_Pos   (0)

GPIO_T::SMTEN: SMTEN0 Position

Definition at line 3199 of file M471M_R1_S.h.

◆ GPIO_SMTEN_SMTEN10_Msk

#define GPIO_SMTEN_SMTEN10_Msk   (0x1ul << GPIO_SMTEN_SMTEN10_Pos)

GPIO_T::SMTEN: SMTEN10 Mask

Definition at line 3230 of file M471M_R1_S.h.

◆ GPIO_SMTEN_SMTEN10_Pos

#define GPIO_SMTEN_SMTEN10_Pos   (10)

GPIO_T::SMTEN: SMTEN10 Position

Definition at line 3229 of file M471M_R1_S.h.

◆ GPIO_SMTEN_SMTEN11_Msk

#define GPIO_SMTEN_SMTEN11_Msk   (0x1ul << GPIO_SMTEN_SMTEN11_Pos)

GPIO_T::SMTEN: SMTEN11 Mask

Definition at line 3233 of file M471M_R1_S.h.

◆ GPIO_SMTEN_SMTEN11_Pos

#define GPIO_SMTEN_SMTEN11_Pos   (11)

GPIO_T::SMTEN: SMTEN11 Position

Definition at line 3232 of file M471M_R1_S.h.

◆ GPIO_SMTEN_SMTEN12_Msk

#define GPIO_SMTEN_SMTEN12_Msk   (0x1ul << GPIO_SMTEN_SMTEN12_Pos)

GPIO_T::SMTEN: SMTEN12 Mask

Definition at line 3236 of file M471M_R1_S.h.

◆ GPIO_SMTEN_SMTEN12_Pos

#define GPIO_SMTEN_SMTEN12_Pos   (12)

GPIO_T::SMTEN: SMTEN12 Position

Definition at line 3235 of file M471M_R1_S.h.

◆ GPIO_SMTEN_SMTEN13_Msk

#define GPIO_SMTEN_SMTEN13_Msk   (0x1ul << GPIO_SMTEN_SMTEN13_Pos)

GPIO_T::SMTEN: SMTEN13 Mask

Definition at line 3239 of file M471M_R1_S.h.

◆ GPIO_SMTEN_SMTEN13_Pos

#define GPIO_SMTEN_SMTEN13_Pos   (13)

GPIO_T::SMTEN: SMTEN13 Position

Definition at line 3238 of file M471M_R1_S.h.

◆ GPIO_SMTEN_SMTEN14_Msk

#define GPIO_SMTEN_SMTEN14_Msk   (0x1ul << GPIO_SMTEN_SMTEN14_Pos)

GPIO_T::SMTEN: SMTEN14 Mask

Definition at line 3242 of file M471M_R1_S.h.

◆ GPIO_SMTEN_SMTEN14_Pos

#define GPIO_SMTEN_SMTEN14_Pos   (14)

GPIO_T::SMTEN: SMTEN14 Position

Definition at line 3241 of file M471M_R1_S.h.

◆ GPIO_SMTEN_SMTEN15_Msk

#define GPIO_SMTEN_SMTEN15_Msk   (0x1ul << GPIO_SMTEN_SMTEN15_Pos)

GPIO_T::SMTEN: SMTEN15 Mask

Definition at line 3245 of file M471M_R1_S.h.

◆ GPIO_SMTEN_SMTEN15_Pos

#define GPIO_SMTEN_SMTEN15_Pos   (15)

GPIO_T::SMTEN: SMTEN15 Position

Definition at line 3244 of file M471M_R1_S.h.

◆ GPIO_SMTEN_SMTEN1_Msk

#define GPIO_SMTEN_SMTEN1_Msk   (0x1ul << GPIO_SMTEN_SMTEN1_Pos)

GPIO_T::SMTEN: SMTEN1 Mask

Definition at line 3203 of file M471M_R1_S.h.

◆ GPIO_SMTEN_SMTEN1_Pos

#define GPIO_SMTEN_SMTEN1_Pos   (1)

GPIO_T::SMTEN: SMTEN1 Position

Definition at line 3202 of file M471M_R1_S.h.

◆ GPIO_SMTEN_SMTEN2_Msk

#define GPIO_SMTEN_SMTEN2_Msk   (0x1ul << GPIO_SMTEN_SMTEN2_Pos)

GPIO_T::SMTEN: SMTEN2 Mask

Definition at line 3206 of file M471M_R1_S.h.

◆ GPIO_SMTEN_SMTEN2_Pos

#define GPIO_SMTEN_SMTEN2_Pos   (2)

GPIO_T::SMTEN: SMTEN2 Position

Definition at line 3205 of file M471M_R1_S.h.

◆ GPIO_SMTEN_SMTEN3_Msk

#define GPIO_SMTEN_SMTEN3_Msk   (0x1ul << GPIO_SMTEN_SMTEN3_Pos)

GPIO_T::SMTEN: SMTEN3 Mask

Definition at line 3209 of file M471M_R1_S.h.

◆ GPIO_SMTEN_SMTEN3_Pos

#define GPIO_SMTEN_SMTEN3_Pos   (3)

GPIO_T::SMTEN: SMTEN3 Position

Definition at line 3208 of file M471M_R1_S.h.

◆ GPIO_SMTEN_SMTEN4_Msk

#define GPIO_SMTEN_SMTEN4_Msk   (0x1ul << GPIO_SMTEN_SMTEN4_Pos)

GPIO_T::SMTEN: SMTEN4 Mask

Definition at line 3212 of file M471M_R1_S.h.

◆ GPIO_SMTEN_SMTEN4_Pos

#define GPIO_SMTEN_SMTEN4_Pos   (4)

GPIO_T::SMTEN: SMTEN4 Position

Definition at line 3211 of file M471M_R1_S.h.

◆ GPIO_SMTEN_SMTEN5_Msk

#define GPIO_SMTEN_SMTEN5_Msk   (0x1ul << GPIO_SMTEN_SMTEN5_Pos)

GPIO_T::SMTEN: SMTEN5 Mask

Definition at line 3215 of file M471M_R1_S.h.

◆ GPIO_SMTEN_SMTEN5_Pos

#define GPIO_SMTEN_SMTEN5_Pos   (5)

GPIO_T::SMTEN: SMTEN5 Position

Definition at line 3214 of file M471M_R1_S.h.

◆ GPIO_SMTEN_SMTEN6_Msk

#define GPIO_SMTEN_SMTEN6_Msk   (0x1ul << GPIO_SMTEN_SMTEN6_Pos)

GPIO_T::SMTEN: SMTEN6 Mask

Definition at line 3218 of file M471M_R1_S.h.

◆ GPIO_SMTEN_SMTEN6_Pos

#define GPIO_SMTEN_SMTEN6_Pos   (6)

GPIO_T::SMTEN: SMTEN6 Position

Definition at line 3217 of file M471M_R1_S.h.

◆ GPIO_SMTEN_SMTEN7_Msk

#define GPIO_SMTEN_SMTEN7_Msk   (0x1ul << GPIO_SMTEN_SMTEN7_Pos)

GPIO_T::SMTEN: SMTEN7 Mask

Definition at line 3221 of file M471M_R1_S.h.

◆ GPIO_SMTEN_SMTEN7_Pos

#define GPIO_SMTEN_SMTEN7_Pos   (7)

GPIO_T::SMTEN: SMTEN7 Position

Definition at line 3220 of file M471M_R1_S.h.

◆ GPIO_SMTEN_SMTEN8_Msk

#define GPIO_SMTEN_SMTEN8_Msk   (0x1ul << GPIO_SMTEN_SMTEN8_Pos)

GPIO_T::SMTEN: SMTEN8 Mask

Definition at line 3224 of file M471M_R1_S.h.

◆ GPIO_SMTEN_SMTEN8_Pos

#define GPIO_SMTEN_SMTEN8_Pos   (8)

GPIO_T::SMTEN: SMTEN8 Position

Definition at line 3223 of file M471M_R1_S.h.

◆ GPIO_SMTEN_SMTEN9_Msk

#define GPIO_SMTEN_SMTEN9_Msk   (0x1ul << GPIO_SMTEN_SMTEN9_Pos)

GPIO_T::SMTEN: SMTEN9 Mask

Definition at line 3227 of file M471M_R1_S.h.

◆ GPIO_SMTEN_SMTEN9_Pos

#define GPIO_SMTEN_SMTEN9_Pos   (9)

GPIO_T::SMTEN: SMTEN9 Position

Definition at line 3226 of file M471M_R1_S.h.

◆ I2C_ADDR0_ADDR_Msk

#define I2C_ADDR0_ADDR_Msk   (0x7ful << I2C_ADDR0_ADDR_Pos)

I2C_T::ADDR0: ADDR Mask

Definition at line 3756 of file M471M_R1_S.h.

◆ I2C_ADDR0_ADDR_Pos

#define I2C_ADDR0_ADDR_Pos   (1)

I2C_T::ADDR0: ADDR Position

Definition at line 3755 of file M471M_R1_S.h.

◆ I2C_ADDR0_GC_Msk

#define I2C_ADDR0_GC_Msk   (0x1ul << I2C_ADDR0_GC_Pos)

I2C_T::ADDR0: GC Mask

Definition at line 3753 of file M471M_R1_S.h.

◆ I2C_ADDR0_GC_Pos

#define I2C_ADDR0_GC_Pos   (0)

I2C_T::ADDR0: GC Position

Definition at line 3752 of file M471M_R1_S.h.

◆ I2C_ADDR1_ADDR_Msk

#define I2C_ADDR1_ADDR_Msk   (0x7ful << I2C_ADDR1_ADDR_Pos)

I2C_T::ADDR1: ADDR Mask

Definition at line 3780 of file M471M_R1_S.h.

◆ I2C_ADDR1_ADDR_Pos

#define I2C_ADDR1_ADDR_Pos   (1)

I2C_T::ADDR1: ADDR Position

Definition at line 3779 of file M471M_R1_S.h.

◆ I2C_ADDR1_GC_Msk

#define I2C_ADDR1_GC_Msk   (0x1ul << I2C_ADDR1_GC_Pos)

I2C_T::ADDR1: GC Mask

Definition at line 3777 of file M471M_R1_S.h.

◆ I2C_ADDR1_GC_Pos

#define I2C_ADDR1_GC_Pos   (0)

I2C_T::ADDR1: GC Position

Definition at line 3776 of file M471M_R1_S.h.

◆ I2C_ADDR2_ADDR_Msk

#define I2C_ADDR2_ADDR_Msk   (0x7ful << I2C_ADDR2_ADDR_Pos)

I2C_T::ADDR2: ADDR Mask

Definition at line 3786 of file M471M_R1_S.h.

◆ I2C_ADDR2_ADDR_Pos

#define I2C_ADDR2_ADDR_Pos   (1)

I2C_T::ADDR2: ADDR Position

Definition at line 3785 of file M471M_R1_S.h.

◆ I2C_ADDR2_GC_Msk

#define I2C_ADDR2_GC_Msk   (0x1ul << I2C_ADDR2_GC_Pos)

I2C_T::ADDR2: GC Mask

Definition at line 3783 of file M471M_R1_S.h.

◆ I2C_ADDR2_GC_Pos

#define I2C_ADDR2_GC_Pos   (0)

I2C_T::ADDR2: GC Position

Definition at line 3782 of file M471M_R1_S.h.

◆ I2C_ADDR3_ADDR_Msk

#define I2C_ADDR3_ADDR_Msk   (0x7ful << I2C_ADDR3_ADDR_Pos)

I2C_T::ADDR3: ADDR Mask

Definition at line 3792 of file M471M_R1_S.h.

◆ I2C_ADDR3_ADDR_Pos

#define I2C_ADDR3_ADDR_Pos   (1)

I2C_T::ADDR3: ADDR Position

Definition at line 3791 of file M471M_R1_S.h.

◆ I2C_ADDR3_GC_Msk

#define I2C_ADDR3_GC_Msk   (0x1ul << I2C_ADDR3_GC_Pos)

I2C_T::ADDR3: GC Mask

Definition at line 3789 of file M471M_R1_S.h.

◆ I2C_ADDR3_GC_Pos

#define I2C_ADDR3_GC_Pos   (0)

I2C_T::ADDR3: GC Position

Definition at line 3788 of file M471M_R1_S.h.

◆ I2C_ADDRMSK0_ADDRMSK_Msk

#define I2C_ADDRMSK0_ADDRMSK_Msk   (0x7ful << I2C_ADDRMSK0_ADDRMSK_Pos)

I2C_T::ADDRMSK0: ADDRMSK Mask

Definition at line 3795 of file M471M_R1_S.h.

◆ I2C_ADDRMSK0_ADDRMSK_Pos

#define I2C_ADDRMSK0_ADDRMSK_Pos   (1)

I2C_T::ADDRMSK0: ADDRMSK Position

Definition at line 3794 of file M471M_R1_S.h.

◆ I2C_ADDRMSK1_ADDRMSK_Msk

#define I2C_ADDRMSK1_ADDRMSK_Msk   (0x7ful << I2C_ADDRMSK1_ADDRMSK_Pos)

I2C_T::ADDRMSK1: ADDRMSK Mask

Definition at line 3798 of file M471M_R1_S.h.

◆ I2C_ADDRMSK1_ADDRMSK_Pos

#define I2C_ADDRMSK1_ADDRMSK_Pos   (1)

I2C_T::ADDRMSK1: ADDRMSK Position

Definition at line 3797 of file M471M_R1_S.h.

◆ I2C_ADDRMSK2_ADDRMSK_Msk

#define I2C_ADDRMSK2_ADDRMSK_Msk   (0x7ful << I2C_ADDRMSK2_ADDRMSK_Pos)

I2C_T::ADDRMSK2: ADDRMSK Mask

Definition at line 3801 of file M471M_R1_S.h.

◆ I2C_ADDRMSK2_ADDRMSK_Pos

#define I2C_ADDRMSK2_ADDRMSK_Pos   (1)

I2C_T::ADDRMSK2: ADDRMSK Position

Definition at line 3800 of file M471M_R1_S.h.

◆ I2C_ADDRMSK3_ADDRMSK_Msk

#define I2C_ADDRMSK3_ADDRMSK_Msk   (0x7ful << I2C_ADDRMSK3_ADDRMSK_Pos)

I2C_T::ADDRMSK3: ADDRMSK Mask

Definition at line 3804 of file M471M_R1_S.h.

◆ I2C_ADDRMSK3_ADDRMSK_Pos

#define I2C_ADDRMSK3_ADDRMSK_Pos   (1)

I2C_T::ADDRMSK3: ADDRMSK Position

Definition at line 3803 of file M471M_R1_S.h.

◆ I2C_BUSCTL_ACKM9SI_Msk

#define I2C_BUSCTL_ACKM9SI_Msk   (0x1ul << I2C_BUSCTL_ACKM9SI_Pos)

I2C_T::BUSCTL: ACKM9SI Mask

Definition at line 3846 of file M471M_R1_S.h.

◆ I2C_BUSCTL_ACKM9SI_Pos

#define I2C_BUSCTL_ACKM9SI_Pos   (11)

I2C_T::BUSCTL: ACKM9SI Position

Definition at line 3845 of file M471M_R1_S.h.

◆ I2C_BUSCTL_ACKMEN_Msk

#define I2C_BUSCTL_ACKMEN_Msk   (0x1ul << I2C_BUSCTL_ACKMEN_Pos)

I2C_T::BUSCTL: ACKMEN Mask

Definition at line 3813 of file M471M_R1_S.h.

◆ I2C_BUSCTL_ACKMEN_Pos

#define I2C_BUSCTL_ACKMEN_Pos   (0)

I2C_T::BUSCTL: ACKMEN Position

Definition at line 3812 of file M471M_R1_S.h.

◆ I2C_BUSCTL_ALERTEN_Msk

#define I2C_BUSCTL_ALERTEN_Msk   (0x1ul << I2C_BUSCTL_ALERTEN_Pos)

I2C_T::BUSCTL: ALERTEN Mask

Definition at line 3825 of file M471M_R1_S.h.

◆ I2C_BUSCTL_ALERTEN_Pos

#define I2C_BUSCTL_ALERTEN_Pos   (4)

I2C_T::BUSCTL: ALERTEN Position

Definition at line 3824 of file M471M_R1_S.h.

◆ I2C_BUSCTL_BMDEN_Msk

#define I2C_BUSCTL_BMDEN_Msk   (0x1ul << I2C_BUSCTL_BMDEN_Pos)

I2C_T::BUSCTL: BMDEN Mask

Definition at line 3819 of file M471M_R1_S.h.

◆ I2C_BUSCTL_BMDEN_Pos

#define I2C_BUSCTL_BMDEN_Pos   (2)

I2C_T::BUSCTL: BMDEN Position

Definition at line 3818 of file M471M_R1_S.h.

◆ I2C_BUSCTL_BMHEN_Msk

#define I2C_BUSCTL_BMHEN_Msk   (0x1ul << I2C_BUSCTL_BMHEN_Pos)

I2C_T::BUSCTL: BMHEN Mask

Definition at line 3822 of file M471M_R1_S.h.

◆ I2C_BUSCTL_BMHEN_Pos

#define I2C_BUSCTL_BMHEN_Pos   (3)

I2C_T::BUSCTL: BMHEN Position

Definition at line 3821 of file M471M_R1_S.h.

◆ I2C_BUSCTL_BUSEN_Msk

#define I2C_BUSCTL_BUSEN_Msk   (0x1ul << I2C_BUSCTL_BUSEN_Pos)

I2C_T::BUSCTL: BUSEN Mask

Definition at line 3834 of file M471M_R1_S.h.

◆ I2C_BUSCTL_BUSEN_Pos

#define I2C_BUSCTL_BUSEN_Pos   (7)

I2C_T::BUSCTL: BUSEN Position

Definition at line 3833 of file M471M_R1_S.h.

◆ I2C_BUSCTL_PECCLR_Msk

#define I2C_BUSCTL_PECCLR_Msk   (0x1ul << I2C_BUSCTL_PECCLR_Pos)

I2C_T::BUSCTL: PECCLR Mask

Definition at line 3843 of file M471M_R1_S.h.

◆ I2C_BUSCTL_PECCLR_Pos

#define I2C_BUSCTL_PECCLR_Pos   (10)

I2C_T::BUSCTL: PECCLR Position

Definition at line 3842 of file M471M_R1_S.h.

◆ I2C_BUSCTL_PECEN_Msk

#define I2C_BUSCTL_PECEN_Msk   (0x1ul << I2C_BUSCTL_PECEN_Pos)

I2C_T::BUSCTL: PECEN Mask

Definition at line 3816 of file M471M_R1_S.h.

◆ I2C_BUSCTL_PECEN_Pos

#define I2C_BUSCTL_PECEN_Pos   (1)

I2C_T::BUSCTL: PECEN Position

Definition at line 3815 of file M471M_R1_S.h.

◆ I2C_BUSCTL_PECTXEN_Msk

#define I2C_BUSCTL_PECTXEN_Msk   (0x1ul << I2C_BUSCTL_PECTXEN_Pos)

I2C_T::BUSCTL: PECTXEN Mask

Definition at line 3837 of file M471M_R1_S.h.

◆ I2C_BUSCTL_PECTXEN_Pos

#define I2C_BUSCTL_PECTXEN_Pos   (8)

I2C_T::BUSCTL: PECTXEN Position

Definition at line 3836 of file M471M_R1_S.h.

◆ I2C_BUSCTL_SCTLOEN_Msk

#define I2C_BUSCTL_SCTLOEN_Msk   (0x1ul << I2C_BUSCTL_SCTLOEN_Pos)

I2C_T::BUSCTL: SCTLOEN Mask

Definition at line 3831 of file M471M_R1_S.h.

◆ I2C_BUSCTL_SCTLOEN_Pos

#define I2C_BUSCTL_SCTLOEN_Pos   (6)

I2C_T::BUSCTL: SCTLOEN Position

Definition at line 3830 of file M471M_R1_S.h.

◆ I2C_BUSCTL_SCTLOSTS_Msk

#define I2C_BUSCTL_SCTLOSTS_Msk   (0x1ul << I2C_BUSCTL_SCTLOSTS_Pos)

I2C_T::BUSCTL: SCTLOSTS Mask

Definition at line 3828 of file M471M_R1_S.h.

◆ I2C_BUSCTL_SCTLOSTS_Pos

#define I2C_BUSCTL_SCTLOSTS_Pos   (5)

I2C_T::BUSCTL: SCTLOSTS Position

Definition at line 3827 of file M471M_R1_S.h.

◆ I2C_BUSCTL_TIDLE_Msk

#define I2C_BUSCTL_TIDLE_Msk   (0x1ul << I2C_BUSCTL_TIDLE_Pos)

I2C_T::BUSCTL: TIDLE Mask

Definition at line 3840 of file M471M_R1_S.h.

◆ I2C_BUSCTL_TIDLE_Pos

#define I2C_BUSCTL_TIDLE_Pos   (9)

I2C_T::BUSCTL: TIDLE Position

Definition at line 3839 of file M471M_R1_S.h.

◆ I2C_BUSSTS_ALERT_Msk

#define I2C_BUSSTS_ALERT_Msk   (0x1ul << I2C_BUSSTS_ALERT_Pos)

I2C_T::BUSSTS: ALERT Mask

Definition at line 3876 of file M471M_R1_S.h.

◆ I2C_BUSSTS_ALERT_Pos

#define I2C_BUSSTS_ALERT_Pos   (3)

I2C_T::BUSSTS: ALERT Position

Definition at line 3875 of file M471M_R1_S.h.

◆ I2C_BUSSTS_BCDONE_Msk

#define I2C_BUSSTS_BCDONE_Msk   (0x1ul << I2C_BUSSTS_BCDONE_Pos)

I2C_T::BUSSTS: BCDONE Mask

Definition at line 3870 of file M471M_R1_S.h.

◆ I2C_BUSSTS_BCDONE_Pos

#define I2C_BUSSTS_BCDONE_Pos   (1)

I2C_T::BUSSTS: BCDONE Position

Definition at line 3869 of file M471M_R1_S.h.

◆ I2C_BUSSTS_BUSTO_Msk

#define I2C_BUSSTS_BUSTO_Msk   (0x1ul << I2C_BUSSTS_BUSTO_Pos)

I2C_T::BUSSTS: BUSTO Mask

Definition at line 3882 of file M471M_R1_S.h.

◆ I2C_BUSSTS_BUSTO_Pos

#define I2C_BUSSTS_BUSTO_Pos   (5)

I2C_T::BUSSTS: BUSTO Position

Definition at line 3881 of file M471M_R1_S.h.

◆ I2C_BUSSTS_BUSY_Msk

#define I2C_BUSSTS_BUSY_Msk   (0x1ul << I2C_BUSSTS_BUSY_Pos)

I2C_T::BUSSTS: BUSY Mask

Definition at line 3867 of file M471M_R1_S.h.

◆ I2C_BUSSTS_BUSY_Pos

#define I2C_BUSSTS_BUSY_Pos   (0)

I2C_T::BUSSTS: BUSY Position

Definition at line 3866 of file M471M_R1_S.h.

◆ I2C_BUSSTS_CLKTO_Msk

#define I2C_BUSSTS_CLKTO_Msk   (0x1ul << I2C_BUSSTS_CLKTO_Pos)

I2C_T::BUSSTS: CLKTO Mask

Definition at line 3885 of file M471M_R1_S.h.

◆ I2C_BUSSTS_CLKTO_Pos

#define I2C_BUSSTS_CLKTO_Pos   (6)

I2C_T::BUSSTS: CLKTO Position

Definition at line 3884 of file M471M_R1_S.h.

◆ I2C_BUSSTS_PECERR_Msk

#define I2C_BUSSTS_PECERR_Msk   (0x1ul << I2C_BUSSTS_PECERR_Pos)

I2C_T::BUSSTS: PECERR Mask

Definition at line 3873 of file M471M_R1_S.h.

◆ I2C_BUSSTS_PECERR_Pos

#define I2C_BUSSTS_PECERR_Pos   (2)

I2C_T::BUSSTS: PECERR Position

Definition at line 3872 of file M471M_R1_S.h.

◆ I2C_BUSSTS_SCTLDIN_Msk

#define I2C_BUSSTS_SCTLDIN_Msk   (0x1ul << I2C_BUSSTS_SCTLDIN_Pos)

I2C_T::BUSSTS: SCTLDIN Mask

Definition at line 3879 of file M471M_R1_S.h.

◆ I2C_BUSSTS_SCTLDIN_Pos

#define I2C_BUSSTS_SCTLDIN_Pos   (4)

I2C_T::BUSSTS: SCTLDIN Position

Definition at line 3878 of file M471M_R1_S.h.

◆ I2C_BUSTCTL_BUSTOEN_Msk

#define I2C_BUSTCTL_BUSTOEN_Msk   (0x1ul << I2C_BUSTCTL_BUSTOEN_Pos)

I2C_T::BUSTCTL: BUSTOEN Mask

Definition at line 3849 of file M471M_R1_S.h.

◆ I2C_BUSTCTL_BUSTOEN_Pos

#define I2C_BUSTCTL_BUSTOEN_Pos   (0)

I2C_T::BUSTCTL: BUSTOEN Position

Definition at line 3848 of file M471M_R1_S.h.

◆ I2C_BUSTCTL_BUSTOIEN_Msk

#define I2C_BUSTCTL_BUSTOIEN_Msk   (0x1ul << I2C_BUSTCTL_BUSTOIEN_Pos)

I2C_T::BUSTCTL: BUSTOIEN Mask

Definition at line 3855 of file M471M_R1_S.h.

◆ I2C_BUSTCTL_BUSTOIEN_Pos

#define I2C_BUSTCTL_BUSTOIEN_Pos   (2)

I2C_T::BUSTCTL: BUSTOIEN Position

Definition at line 3854 of file M471M_R1_S.h.

◆ I2C_BUSTCTL_CLKTOEN_Msk

#define I2C_BUSTCTL_CLKTOEN_Msk   (0x1ul << I2C_BUSTCTL_CLKTOEN_Pos)

I2C_T::BUSTCTL: CLKTOEN Mask

Definition at line 3852 of file M471M_R1_S.h.

◆ I2C_BUSTCTL_CLKTOEN_Pos

#define I2C_BUSTCTL_CLKTOEN_Pos   (1)

I2C_T::BUSTCTL: CLKTOEN Position

Definition at line 3851 of file M471M_R1_S.h.

◆ I2C_BUSTCTL_CLKTOIEN_Msk

#define I2C_BUSTCTL_CLKTOIEN_Msk   (0x1ul << I2C_BUSTCTL_CLKTOIEN_Pos)

I2C_T::BUSTCTL: CLKTOIEN Mask

Definition at line 3858 of file M471M_R1_S.h.

◆ I2C_BUSTCTL_CLKTOIEN_Pos

#define I2C_BUSTCTL_CLKTOIEN_Pos   (3)

I2C_T::BUSTCTL: CLKTOIEN Position

Definition at line 3857 of file M471M_R1_S.h.

◆ I2C_BUSTCTL_PECIEN_Msk

#define I2C_BUSTCTL_PECIEN_Msk   (0x1ul << I2C_BUSTCTL_PECIEN_Pos)

I2C_T::BUSTCTL: PECIEN Mask

Definition at line 3864 of file M471M_R1_S.h.

◆ I2C_BUSTCTL_PECIEN_Pos

#define I2C_BUSTCTL_PECIEN_Pos   (5)

I2C_T::BUSTCTL: PECIEN Position

Definition at line 3863 of file M471M_R1_S.h.

◆ I2C_BUSTCTL_TORSTEN_Msk

#define I2C_BUSTCTL_TORSTEN_Msk   (0x1ul << I2C_BUSTCTL_TORSTEN_Pos)

I2C_T::BUSTCTL: TORSTEN Mask

Definition at line 3861 of file M471M_R1_S.h.

◆ I2C_BUSTCTL_TORSTEN_Pos

#define I2C_BUSTCTL_TORSTEN_Pos   (4)

I2C_T::BUSTCTL: TORSTEN Position

Definition at line 3860 of file M471M_R1_S.h.

◆ I2C_BUSTOUT_BUSTO_Msk

#define I2C_BUSTOUT_BUSTO_Msk   (0xfful << I2C_BUSTOUT_BUSTO_Pos)

I2C_T::BUSTOUT: BUSTO Mask

Definition at line 3894 of file M471M_R1_S.h.

◆ I2C_BUSTOUT_BUSTO_Pos

#define I2C_BUSTOUT_BUSTO_Pos   (0)

I2C_T::BUSTOUT: BUSTO Position

Definition at line 3893 of file M471M_R1_S.h.

◆ I2C_CLKDIV_DIVIDER_Msk

#define I2C_CLKDIV_DIVIDER_Msk   (0xfful << I2C_CLKDIV_DIVIDER_Pos)

I2C_T::CLKDIV: DIVIDER Mask

Definition at line 3765 of file M471M_R1_S.h.

◆ I2C_CLKDIV_DIVIDER_Pos

#define I2C_CLKDIV_DIVIDER_Pos   (0)

I2C_T::CLKDIV: DIVIDER Position

Definition at line 3764 of file M471M_R1_S.h.

◆ I2C_CLKTOUT_CLKTO_Msk

#define I2C_CLKTOUT_CLKTO_Msk   (0xfful << I2C_CLKTOUT_CLKTO_Pos)

I2C_T::CLKTOUT: CLKTO Mask

Definition at line 3897 of file M471M_R1_S.h.

◆ I2C_CLKTOUT_CLKTO_Pos

#define I2C_CLKTOUT_CLKTO_Pos   (0)

I2C_T::CLKTOUT: CLKTO Position

Definition at line 3896 of file M471M_R1_S.h.

◆ I2C_CTL_AA_Msk

#define I2C_CTL_AA_Msk   (0x1ul << I2C_CTL_AA_Pos)

I2C_T::CTL: AA Mask

Definition at line 3735 of file M471M_R1_S.h.

◆ I2C_CTL_AA_Pos

#define I2C_CTL_AA_Pos   (2)
@addtogroup I2C_CONST I2C Bit Field Definition
Constant Definitions for I2C Controller

I2C_T::CTL: AA Position

Definition at line 3734 of file M471M_R1_S.h.

◆ I2C_CTL_I2CEN_Msk

#define I2C_CTL_I2CEN_Msk   (0x1ul << I2C_CTL_I2CEN_Pos)

I2C_T::CTL: I2CEN Mask

Definition at line 3747 of file M471M_R1_S.h.

◆ I2C_CTL_I2CEN_Pos

#define I2C_CTL_I2CEN_Pos   (6)

I2C_T::CTL: I2CEN Position

Definition at line 3746 of file M471M_R1_S.h.

◆ I2C_CTL_INTEN_Msk

#define I2C_CTL_INTEN_Msk   (0x1ul << I2C_CTL_INTEN_Pos)

I2C_T::CTL: INTEN Mask

Definition at line 3750 of file M471M_R1_S.h.

◆ I2C_CTL_INTEN_Pos

#define I2C_CTL_INTEN_Pos   (7)

I2C_T::CTL: INTEN Position

Definition at line 3749 of file M471M_R1_S.h.

◆ I2C_CTL_SI_Msk

#define I2C_CTL_SI_Msk   (0x1ul << I2C_CTL_SI_Pos)

I2C_T::CTL: SI Mask

Definition at line 3738 of file M471M_R1_S.h.

◆ I2C_CTL_SI_Pos

#define I2C_CTL_SI_Pos   (3)

I2C_T::CTL: SI Position

Definition at line 3737 of file M471M_R1_S.h.

◆ I2C_CTL_STA_Msk

#define I2C_CTL_STA_Msk   (0x1ul << I2C_CTL_STA_Pos)

I2C_T::CTL: STA Mask

Definition at line 3744 of file M471M_R1_S.h.

◆ I2C_CTL_STA_Pos

#define I2C_CTL_STA_Pos   (5)

I2C_T::CTL: STA Position

Definition at line 3743 of file M471M_R1_S.h.

◆ I2C_CTL_STO_Msk

#define I2C_CTL_STO_Msk   (0x1ul << I2C_CTL_STO_Pos)

I2C_T::CTL: STO Mask

Definition at line 3741 of file M471M_R1_S.h.

◆ I2C_CTL_STO_Pos

#define I2C_CTL_STO_Pos   (4)

I2C_T::CTL: STO Position

Definition at line 3740 of file M471M_R1_S.h.

◆ I2C_DAT_DAT_Msk

#define I2C_DAT_DAT_Msk   (0xfful << I2C_DAT_DAT_Pos)

I2C_T::DAT: DAT Mask

Definition at line 3759 of file M471M_R1_S.h.

◆ I2C_DAT_DAT_Pos

#define I2C_DAT_DAT_Pos   (0)

I2C_T::DAT: DAT Position

Definition at line 3758 of file M471M_R1_S.h.

◆ I2C_PKTCRC_PECCRC_Msk

#define I2C_PKTCRC_PECCRC_Msk   (0xfful << I2C_PKTCRC_PECCRC_Pos)

I2C_T::PKTCRC: PECCRC Mask

Definition at line 3891 of file M471M_R1_S.h.

◆ I2C_PKTCRC_PECCRC_Pos

#define I2C_PKTCRC_PECCRC_Pos   (0)

I2C_T::PKTCRC: PECCRC Position

Definition at line 3890 of file M471M_R1_S.h.

◆ I2C_PKTSIZE_PLDSIZE_Msk

#define I2C_PKTSIZE_PLDSIZE_Msk   (0xfful << I2C_PKTSIZE_PLDSIZE_Pos)

I2C_T::PKTSIZE: PLDSIZE Mask

Definition at line 3888 of file M471M_R1_S.h.

◆ I2C_PKTSIZE_PLDSIZE_Pos

#define I2C_PKTSIZE_PLDSIZE_Pos   (0)

I2C_T::PKTSIZE: PLDSIZE Position

Definition at line 3887 of file M471M_R1_S.h.

◆ I2C_STATUS_STATUS_Msk

#define I2C_STATUS_STATUS_Msk   (0xfful << I2C_STATUS_STATUS_Pos)

I2C_T::STATUS: STATUS Mask

Definition at line 3762 of file M471M_R1_S.h.

◆ I2C_STATUS_STATUS_Pos

#define I2C_STATUS_STATUS_Pos   (0)

I2C_T::STATUS: STATUS Position

Definition at line 3761 of file M471M_R1_S.h.

◆ I2C_TOCTL_TOCDIV4_Msk

#define I2C_TOCTL_TOCDIV4_Msk   (0x1ul << I2C_TOCTL_TOCDIV4_Pos)

I2C_T::TOCTL: TOCDIV4 Mask

Definition at line 3771 of file M471M_R1_S.h.

◆ I2C_TOCTL_TOCDIV4_Pos

#define I2C_TOCTL_TOCDIV4_Pos   (1)

I2C_T::TOCTL: TOCDIV4 Position

Definition at line 3770 of file M471M_R1_S.h.

◆ I2C_TOCTL_TOCEN_Msk

#define I2C_TOCTL_TOCEN_Msk   (0x1ul << I2C_TOCTL_TOCEN_Pos)

I2C_T::TOCTL: TOCEN Mask

Definition at line 3774 of file M471M_R1_S.h.

◆ I2C_TOCTL_TOCEN_Pos

#define I2C_TOCTL_TOCEN_Pos   (2)

I2C_T::TOCTL: TOCEN Position

Definition at line 3773 of file M471M_R1_S.h.

◆ I2C_TOCTL_TOIF_Msk

#define I2C_TOCTL_TOIF_Msk   (0x1ul << I2C_TOCTL_TOIF_Pos)

I2C_T::TOCTL: TOIF Mask

Definition at line 3768 of file M471M_R1_S.h.

◆ I2C_TOCTL_TOIF_Pos

#define I2C_TOCTL_TOIF_Pos   (0)

I2C_T::TOCTL: TOIF Position

Definition at line 3767 of file M471M_R1_S.h.

◆ I2C_WKCTL_WKEN_Msk

#define I2C_WKCTL_WKEN_Msk   (0x1ul << I2C_WKCTL_WKEN_Pos)

I2C_T::WKCTL: WKEN Mask

Definition at line 3807 of file M471M_R1_S.h.

◆ I2C_WKCTL_WKEN_Pos

#define I2C_WKCTL_WKEN_Pos   (0)

I2C_T::WKCTL: WKEN Position

Definition at line 3806 of file M471M_R1_S.h.

◆ I2C_WKSTS_WKIF_Msk

#define I2C_WKSTS_WKIF_Msk   (0x1ul << I2C_WKSTS_WKIF_Pos)

I2C_T::WKSTS: WKIF Mask

Definition at line 3810 of file M471M_R1_S.h.

◆ I2C_WKSTS_WKIF_Pos

#define I2C_WKSTS_WKIF_Pos   (0)

I2C_T::WKSTS: WKIF Position

Definition at line 3809 of file M471M_R1_S.h.

◆ PDMA_ABTSTS_ABTIFn_Msk

#define PDMA_ABTSTS_ABTIFn_Msk   (0xffful << PDMA_ABTSTS_ABTIFn_Pos)

PDMA_T::ABTSTS: ABTIFn Mask

Definition at line 4429 of file M471M_R1_S.h.

◆ PDMA_ABTSTS_ABTIFn_Pos

#define PDMA_ABTSTS_ABTIFn_Pos   (0)

PDMA_T::ABTSTS: ABTIFn Position

Definition at line 4428 of file M471M_R1_S.h.

◆ PDMA_CHCTL_CHENn_Msk

#define PDMA_CHCTL_CHENn_Msk   (0xffful << PDMA_CHCTL_CHENn_Pos)

PDMA_T::CHCTL: CHENn Mask

Definition at line 4396 of file M471M_R1_S.h.

◆ PDMA_CHCTL_CHENn_Pos

#define PDMA_CHCTL_CHENn_Pos   (0)

PDMA_T::CHCTL: CHENn Position

Definition at line 4395 of file M471M_R1_S.h.

◆ PDMA_CURSCAT_CURADDR_Msk

#define PDMA_CURSCAT_CURADDR_Msk   (0xfffffffful << PDMA_CURSCAT_CURADDR_Pos)

PDMA_T::CURSCAT: CURADDR Mask

Definition at line 4393 of file M471M_R1_S.h.

◆ PDMA_CURSCAT_CURADDR_Pos

#define PDMA_CURSCAT_CURADDR_Pos   (0)

PDMA_T::CURSCAT: CURADDR Position

Definition at line 4392 of file M471M_R1_S.h.

◆ PDMA_DSCT_CTL_BURSIZE_Msk

#define PDMA_DSCT_CTL_BURSIZE_Msk   (0x7ul << PDMA_DSCT_CTL_BURSIZE_Pos)

DSCT_T::CTL: BURSIZE Mask

Definition at line 4366 of file M471M_R1_S.h.

◆ PDMA_DSCT_CTL_BURSIZE_Pos

#define PDMA_DSCT_CTL_BURSIZE_Pos   (4)

DSCT_T::CTL: BURSIZE Position

Definition at line 4365 of file M471M_R1_S.h.

◆ PDMA_DSCT_CTL_DAINC_Msk

#define PDMA_DSCT_CTL_DAINC_Msk   (0x3ul << PDMA_DSCT_CTL_DAINC_Pos)

DSCT_T::CTL: DAINC Mask

Definition at line 4375 of file M471M_R1_S.h.

◆ PDMA_DSCT_CTL_DAINC_Pos

#define PDMA_DSCT_CTL_DAINC_Pos   (10)

DSCT_T::CTL: DAINC Position

Definition at line 4374 of file M471M_R1_S.h.

◆ PDMA_DSCT_CTL_OPMODE_Msk

#define PDMA_DSCT_CTL_OPMODE_Msk   (0x3ul << PDMA_DSCT_CTL_OPMODE_Pos)

DSCT_T::CTL: OPMODE Mask

Definition at line 4360 of file M471M_R1_S.h.

◆ PDMA_DSCT_CTL_OPMODE_Pos

#define PDMA_DSCT_CTL_OPMODE_Pos   (0)
@addtogroup PDMA_CONST PDMA Bit Field Definition
Constant Definitions for PDMA Controller

DSCT_T::CTL: OPMODE Position

Definition at line 4359 of file M471M_R1_S.h.

◆ PDMA_DSCT_CTL_SAINC_Msk

#define PDMA_DSCT_CTL_SAINC_Msk   (0x3ul << PDMA_DSCT_CTL_SAINC_Pos)

DSCT_T::CTL: SAINC Mask

Definition at line 4372 of file M471M_R1_S.h.

◆ PDMA_DSCT_CTL_SAINC_Pos

#define PDMA_DSCT_CTL_SAINC_Pos   (8)

DSCT_T::CTL: SAINC Position

Definition at line 4371 of file M471M_R1_S.h.

◆ PDMA_DSCT_CTL_TBINTDIS_Msk

#define PDMA_DSCT_CTL_TBINTDIS_Msk   (1ul << PDMA_DSCT_CTL_TBINTDIS_Pos)

DSCT_T::CTL: TBINTDIS Mask

Definition at line 4369 of file M471M_R1_S.h.

◆ PDMA_DSCT_CTL_TBINTDIS_Pos

#define PDMA_DSCT_CTL_TBINTDIS_Pos   (7)

DSCT_T::CTL: TBINTDIS Position

Definition at line 4368 of file M471M_R1_S.h.

◆ PDMA_DSCT_CTL_TXCNT_Msk

#define PDMA_DSCT_CTL_TXCNT_Msk   (0x3FFFul << PDMA_DSCT_CTL_TXCNT_Pos)

DSCT_T::CTL: TXCNT Mask

Definition at line 4381 of file M471M_R1_S.h.

◆ PDMA_DSCT_CTL_TXCNT_Pos

#define PDMA_DSCT_CTL_TXCNT_Pos   (16)

DSCT_T::CTL: TXCNT Position

Definition at line 4380 of file M471M_R1_S.h.

◆ PDMA_DSCT_CTL_TXTYPE_Msk

#define PDMA_DSCT_CTL_TXTYPE_Msk   (1ul << PDMA_DSCT_CTL_TXTYPE_Pos)

DSCT_T::CTL: TXTYPE Mask

Definition at line 4363 of file M471M_R1_S.h.

◆ PDMA_DSCT_CTL_TXTYPE_Pos

#define PDMA_DSCT_CTL_TXTYPE_Pos   (2)

DSCT_T::CTL: TXTYPE Position

Definition at line 4362 of file M471M_R1_S.h.

◆ PDMA_DSCT_CTL_TXWIDTH_Msk

#define PDMA_DSCT_CTL_TXWIDTH_Msk   (0x3ul << PDMA_DSCT_CTL_TXWIDTH_Pos)

DSCT_T::CTL: TXWIDTH Mask

Definition at line 4378 of file M471M_R1_S.h.

◆ PDMA_DSCT_CTL_TXWIDTH_Pos

#define PDMA_DSCT_CTL_TXWIDTH_Pos   (12)

DSCT_T::CTL: TXWIDTH Position

Definition at line 4377 of file M471M_R1_S.h.

◆ PDMA_DSCT_DA_DA_Msk

#define PDMA_DSCT_DA_DA_Msk   (0xFFFFFFFFul << PDMA_DSCT_DA_DA_Pos)

DSCT_T::DA: DA Mask

Definition at line 4387 of file M471M_R1_S.h.

◆ PDMA_DSCT_DA_DA_Pos

#define PDMA_DSCT_DA_DA_Pos   (0)

DSCT_T::DA: DA Position

Definition at line 4386 of file M471M_R1_S.h.

◆ PDMA_DSCT_NEXT_NEXT_Msk

#define PDMA_DSCT_NEXT_NEXT_Msk   (0xFFFFul << PDMA_DSCT_NEXT_NEXT_Pos)

DSCT_T::NEXT: NEXT Mask

Definition at line 4390 of file M471M_R1_S.h.

◆ PDMA_DSCT_NEXT_NEXT_Pos

#define PDMA_DSCT_NEXT_NEXT_Pos   (0)

DSCT_T::NEXT: NEXT Position

Definition at line 4389 of file M471M_R1_S.h.

◆ PDMA_DSCT_SA_SA_Msk

#define PDMA_DSCT_SA_SA_Msk   (0xFFFFFFFFul << PDMA_DSCT_SA_SA_Pos)

DSCT_T::SA: SA Mask

Definition at line 4384 of file M471M_R1_S.h.

◆ PDMA_DSCT_SA_SA_Pos

#define PDMA_DSCT_SA_SA_Pos   (0)

DSCT_T::SA: SA Position

Definition at line 4383 of file M471M_R1_S.h.

◆ PDMA_INTEN_INTENn_Msk

#define PDMA_INTEN_INTENn_Msk   (0xffful << PDMA_INTEN_INTENn_Pos)

PDMA_T::INTEN: INTENn Mask

Definition at line 4414 of file M471M_R1_S.h.

◆ PDMA_INTEN_INTENn_Pos

#define PDMA_INTEN_INTENn_Pos   (0)

PDMA_T::INTEN: INTENn Position

Definition at line 4413 of file M471M_R1_S.h.

◆ PDMA_INTSTS_ABTIF_Msk

#define PDMA_INTSTS_ABTIF_Msk   (0x1ul << PDMA_INTSTS_ABTIF_Pos)

PDMA_T::INTSTS: ABTIF Mask

Definition at line 4417 of file M471M_R1_S.h.

◆ PDMA_INTSTS_ABTIF_Pos

#define PDMA_INTSTS_ABTIF_Pos   (0)

PDMA_T::INTSTS: ABTIF Position

Definition at line 4416 of file M471M_R1_S.h.

◆ PDMA_INTSTS_REQTOFn_Msk

#define PDMA_INTSTS_REQTOFn_Msk   (0xfful << PDMA_INTSTS_REQTOFn_Pos)

PDMA_T::INTSTS: REQTOFn Mask

Definition at line 4426 of file M471M_R1_S.h.

◆ PDMA_INTSTS_REQTOFn_Pos

#define PDMA_INTSTS_REQTOFn_Pos   (8)

PDMA_T::INTSTS: REQTOFn Position

Definition at line 4425 of file M471M_R1_S.h.

◆ PDMA_INTSTS_TDIF_Msk

#define PDMA_INTSTS_TDIF_Msk   (0x1ul << PDMA_INTSTS_TDIF_Pos)

PDMA_T::INTSTS: TDIF Mask

Definition at line 4420 of file M471M_R1_S.h.

◆ PDMA_INTSTS_TDIF_Pos

#define PDMA_INTSTS_TDIF_Pos   (1)

PDMA_T::INTSTS: TDIF Position

Definition at line 4419 of file M471M_R1_S.h.

◆ PDMA_INTSTS_TEIF_Msk

#define PDMA_INTSTS_TEIF_Msk   (0x1ul << PDMA_INTSTS_TEIF_Pos)

PDMA_T::INTSTS: TEIF Mask

Definition at line 4423 of file M471M_R1_S.h.

◆ PDMA_INTSTS_TEIF_Pos

#define PDMA_INTSTS_TEIF_Pos   (2)

PDMA_T::INTSTS: TEIF Position

Definition at line 4422 of file M471M_R1_S.h.

◆ PDMA_PRICLR_FPRICLRn_Msk

#define PDMA_PRICLR_FPRICLRn_Msk   (0xffful << PDMA_PRICLR_FPRICLRn_Pos)

PDMA_T::PRICLR: FPRICLRn Mask

Definition at line 4411 of file M471M_R1_S.h.

◆ PDMA_PRICLR_FPRICLRn_Pos

#define PDMA_PRICLR_FPRICLRn_Pos   (0)

PDMA_T::PRICLR: FPRICLRn Position

Definition at line 4410 of file M471M_R1_S.h.

◆ PDMA_PRISET_FPRISETn_Msk

#define PDMA_PRISET_FPRISETn_Msk   (0xffful << PDMA_PRISET_FPRISETn_Pos)

PDMA_T::PRISET: FPRISETn Mask

Definition at line 4408 of file M471M_R1_S.h.

◆ PDMA_PRISET_FPRISETn_Pos

#define PDMA_PRISET_FPRISETn_Pos   (0)

PDMA_T::PRISET: FPRISETn Position

Definition at line 4407 of file M471M_R1_S.h.

◆ PDMA_REQSEL0_3_REQSRC0_Msk

#define PDMA_REQSEL0_3_REQSRC0_Msk   (0x1ful << PDMA_REQSEL0_3_REQSRC0_Pos)

PDMA_T::REQSEL0_3: REQSRC0 Mask

Definition at line 4474 of file M471M_R1_S.h.

◆ PDMA_REQSEL0_3_REQSRC0_Pos

#define PDMA_REQSEL0_3_REQSRC0_Pos   (0)

PDMA_T::REQSEL0_3: REQSRC0 Position

Definition at line 4473 of file M471M_R1_S.h.

◆ PDMA_REQSEL0_3_REQSRC1_Msk

#define PDMA_REQSEL0_3_REQSRC1_Msk   (0x1ful << PDMA_REQSEL0_3_REQSRC1_Pos)

PDMA_T::REQSEL0_3: REQSRC1 Mask

Definition at line 4477 of file M471M_R1_S.h.

◆ PDMA_REQSEL0_3_REQSRC1_Pos

#define PDMA_REQSEL0_3_REQSRC1_Pos   (8)

PDMA_T::REQSEL0_3: REQSRC1 Position

Definition at line 4476 of file M471M_R1_S.h.

◆ PDMA_REQSEL0_3_REQSRC2_Msk

#define PDMA_REQSEL0_3_REQSRC2_Msk   (0x1ful << PDMA_REQSEL0_3_REQSRC2_Pos)

PDMA_T::REQSEL0_3: REQSRC2 Mask

Definition at line 4480 of file M471M_R1_S.h.

◆ PDMA_REQSEL0_3_REQSRC2_Pos

#define PDMA_REQSEL0_3_REQSRC2_Pos   (16)

PDMA_T::REQSEL0_3: REQSRC2 Position

Definition at line 4479 of file M471M_R1_S.h.

◆ PDMA_REQSEL0_3_REQSRC3_Msk

#define PDMA_REQSEL0_3_REQSRC3_Msk   (0x1ful << PDMA_REQSEL0_3_REQSRC3_Pos)

PDMA_T::REQSEL0_3: REQSRC3 Mask

Definition at line 4483 of file M471M_R1_S.h.

◆ PDMA_REQSEL0_3_REQSRC3_Pos

#define PDMA_REQSEL0_3_REQSRC3_Pos   (24)

PDMA_T::REQSEL0_3: REQSRC3 Position

Definition at line 4482 of file M471M_R1_S.h.

◆ PDMA_REQSEL4_7_REQSRC4_Msk

#define PDMA_REQSEL4_7_REQSRC4_Msk   (0x1ful << PDMA_REQSEL4_7_REQSRC4_Pos)

PDMA_T::REQSEL4_7: REQSRC4 Mask

Definition at line 4486 of file M471M_R1_S.h.

◆ PDMA_REQSEL4_7_REQSRC4_Pos

#define PDMA_REQSEL4_7_REQSRC4_Pos   (0)

PDMA_T::REQSEL4_7: REQSRC4 Position

Definition at line 4485 of file M471M_R1_S.h.

◆ PDMA_REQSEL4_7_REQSRC5_Msk

#define PDMA_REQSEL4_7_REQSRC5_Msk   (0x1ful << PDMA_REQSEL4_7_REQSRC5_Pos)

PDMA_T::REQSEL4_7: REQSRC5 Mask

Definition at line 4489 of file M471M_R1_S.h.

◆ PDMA_REQSEL4_7_REQSRC5_Pos

#define PDMA_REQSEL4_7_REQSRC5_Pos   (8)

PDMA_T::REQSEL4_7: REQSRC5 Position

Definition at line 4488 of file M471M_R1_S.h.

◆ PDMA_REQSEL4_7_REQSRC6_Msk

#define PDMA_REQSEL4_7_REQSRC6_Msk   (0x1ful << PDMA_REQSEL4_7_REQSRC6_Pos)

PDMA_T::REQSEL4_7: REQSRC6 Mask

Definition at line 4492 of file M471M_R1_S.h.

◆ PDMA_REQSEL4_7_REQSRC6_Pos

#define PDMA_REQSEL4_7_REQSRC6_Pos   (16)

PDMA_T::REQSEL4_7: REQSRC6 Position

Definition at line 4491 of file M471M_R1_S.h.

◆ PDMA_REQSEL4_7_REQSRC7_Msk

#define PDMA_REQSEL4_7_REQSRC7_Msk   (0x1ful << PDMA_REQSEL4_7_REQSRC7_Pos)

PDMA_T::REQSEL4_7: REQSRC7 Mask

Definition at line 4495 of file M471M_R1_S.h.

◆ PDMA_REQSEL4_7_REQSRC7_Pos

#define PDMA_REQSEL4_7_REQSRC7_Pos   (24)

PDMA_T::REQSEL4_7: REQSRC7 Position

Definition at line 4494 of file M471M_R1_S.h.

◆ PDMA_REQSEL8_11_REQSRC10_Msk

#define PDMA_REQSEL8_11_REQSRC10_Msk   (0x1ful << PDMA_REQSEL8_11_REQSRC10_Pos)

PDMA_T::REQSEL8_11: REQSRC10 Mask

Definition at line 4504 of file M471M_R1_S.h.

◆ PDMA_REQSEL8_11_REQSRC10_Pos

#define PDMA_REQSEL8_11_REQSRC10_Pos   (16)

PDMA_T::REQSEL8_11: REQSRC10 Position

Definition at line 4503 of file M471M_R1_S.h.

◆ PDMA_REQSEL8_11_REQSRC11_Msk

#define PDMA_REQSEL8_11_REQSRC11_Msk   (0x1ful << PDMA_REQSEL8_11_REQSRC11_Pos)

PDMA_T::REQSEL8_11: REQSRC11 Mask

Definition at line 4507 of file M471M_R1_S.h.

◆ PDMA_REQSEL8_11_REQSRC11_Pos

#define PDMA_REQSEL8_11_REQSRC11_Pos   (24)

PDMA_T::REQSEL8_11: REQSRC11 Position

Definition at line 4506 of file M471M_R1_S.h.

◆ PDMA_REQSEL8_11_REQSRC8_Msk

#define PDMA_REQSEL8_11_REQSRC8_Msk   (0x1ful << PDMA_REQSEL8_11_REQSRC8_Pos)

PDMA_T::REQSEL8_11: REQSRC8 Mask

Definition at line 4498 of file M471M_R1_S.h.

◆ PDMA_REQSEL8_11_REQSRC8_Pos

#define PDMA_REQSEL8_11_REQSRC8_Pos   (0)

PDMA_T::REQSEL8_11: REQSRC8 Position

Definition at line 4497 of file M471M_R1_S.h.

◆ PDMA_REQSEL8_11_REQSRC9_Msk

#define PDMA_REQSEL8_11_REQSRC9_Msk   (0x1ful << PDMA_REQSEL8_11_REQSRC9_Pos)

PDMA_T::REQSEL8_11: REQSRC9 Mask

Definition at line 4501 of file M471M_R1_S.h.

◆ PDMA_REQSEL8_11_REQSRC9_Pos

#define PDMA_REQSEL8_11_REQSRC9_Pos   (8)

PDMA_T::REQSEL8_11: REQSRC9 Position

Definition at line 4500 of file M471M_R1_S.h.

◆ PDMA_SCATBA_SCATBA_Msk

#define PDMA_SCATBA_SCATBA_Msk   (0xfffful << PDMA_SCATBA_SCATBA_Pos)

PDMA_T::SCATBA: SCATBA Mask

Definition at line 4447 of file M471M_R1_S.h.

◆ PDMA_SCATBA_SCATBA_Pos

#define PDMA_SCATBA_SCATBA_Pos   (16)

PDMA_T::SCATBA: SCATBA Position

Definition at line 4446 of file M471M_R1_S.h.

◆ PDMA_SCATSTS_TEMPTYFn_Msk

#define PDMA_SCATSTS_TEMPTYFn_Msk   (0xffful << PDMA_SCATSTS_TEMPTYFn_Pos)

PDMA_T::SCATSTS: TEMPTYFn Mask

Definition at line 4435 of file M471M_R1_S.h.

◆ PDMA_SCATSTS_TEMPTYFn_Pos

#define PDMA_SCATSTS_TEMPTYFn_Pos   (0)

PDMA_T::SCATSTS: TEMPTYFn Position

Definition at line 4434 of file M471M_R1_S.h.

◆ PDMA_STOP_STOPn_Msk

#define PDMA_STOP_STOPn_Msk   (0xffful << PDMA_STOP_STOPn_Pos)

PDMA_T::STOP: STOPn Mask

Definition at line 4399 of file M471M_R1_S.h.

◆ PDMA_STOP_STOPn_Pos

#define PDMA_STOP_STOPn_Pos   (0)

PDMA_T::STOP: STOPn Position

Definition at line 4398 of file M471M_R1_S.h.

◆ PDMA_SWREQ_SWREQn_Msk

#define PDMA_SWREQ_SWREQn_Msk   (0xffful << PDMA_SWREQ_SWREQn_Pos)

PDMA_T::SWREQ: SWREQn Mask

Definition at line 4402 of file M471M_R1_S.h.

◆ PDMA_SWREQ_SWREQn_Pos

#define PDMA_SWREQ_SWREQn_Pos   (0)

PDMA_T::SWREQ: SWREQn Position

Definition at line 4401 of file M471M_R1_S.h.

◆ PDMA_TACTSTS_TXACTFn_Msk

#define PDMA_TACTSTS_TXACTFn_Msk   (0xffful << PDMA_TACTSTS_TXACTFn_Pos)

PDMA_T::TACTSTS: TXACTFn Mask

Definition at line 4438 of file M471M_R1_S.h.

◆ PDMA_TACTSTS_TXACTFn_Pos

#define PDMA_TACTSTS_TXACTFn_Pos   (0)

PDMA_T::TACTSTS: TXACTFn Position

Definition at line 4437 of file M471M_R1_S.h.

◆ PDMA_TDSTS_TDIFn_Msk

#define PDMA_TDSTS_TDIFn_Msk   (0xffful << PDMA_TDSTS_TDIFn_Pos)

PDMA_T::TDSTS: TDIFn Mask

Definition at line 4432 of file M471M_R1_S.h.

◆ PDMA_TDSTS_TDIFn_Pos

#define PDMA_TDSTS_TDIFn_Pos   (0)

PDMA_T::TDSTS: TDIFn Position

Definition at line 4431 of file M471M_R1_S.h.

◆ PDMA_TOC0_1_TOC0_Msk

#define PDMA_TOC0_1_TOC0_Msk   (0xfffful << PDMA_TOC0_1_TOC0_Pos)

PDMA_T::TOC0_1: TOC0 Mask

Definition at line 4450 of file M471M_R1_S.h.

◆ PDMA_TOC0_1_TOC0_Pos

#define PDMA_TOC0_1_TOC0_Pos   (0)

PDMA_T::TOC0_1: TOC0 Position

Definition at line 4449 of file M471M_R1_S.h.

◆ PDMA_TOC0_1_TOC1_Msk

#define PDMA_TOC0_1_TOC1_Msk   (0xfffful << PDMA_TOC0_1_TOC1_Pos)

PDMA_T::TOC0_1: TOC1 Mask

Definition at line 4453 of file M471M_R1_S.h.

◆ PDMA_TOC0_1_TOC1_Pos

#define PDMA_TOC0_1_TOC1_Pos   (16)

PDMA_T::TOC0_1: TOC1 Position

Definition at line 4452 of file M471M_R1_S.h.

◆ PDMA_TOC2_3_TOC2_Msk

#define PDMA_TOC2_3_TOC2_Msk   (0xfffful << PDMA_TOC2_3_TOC2_Pos)

PDMA_T::TOC2_3: TOC2 Mask

Definition at line 4456 of file M471M_R1_S.h.

◆ PDMA_TOC2_3_TOC2_Pos

#define PDMA_TOC2_3_TOC2_Pos   (0)

PDMA_T::TOC2_3: TOC2 Position

Definition at line 4455 of file M471M_R1_S.h.

◆ PDMA_TOC2_3_TOC3_Msk

#define PDMA_TOC2_3_TOC3_Msk   (0xfffful << PDMA_TOC2_3_TOC3_Pos)

PDMA_T::TOC2_3: TOC3 Mask

Definition at line 4459 of file M471M_R1_S.h.

◆ PDMA_TOC2_3_TOC3_Pos

#define PDMA_TOC2_3_TOC3_Pos   (16)

PDMA_T::TOC2_3: TOC3 Position

Definition at line 4458 of file M471M_R1_S.h.

◆ PDMA_TOC4_5_TOC4_Msk

#define PDMA_TOC4_5_TOC4_Msk   (0xfffful << PDMA_TOC4_5_TOC4_Pos)

PDMA_T::TOC4_5: TOC4 Mask

Definition at line 4462 of file M471M_R1_S.h.

◆ PDMA_TOC4_5_TOC4_Pos

#define PDMA_TOC4_5_TOC4_Pos   (0)

PDMA_T::TOC4_5: TOC4 Position

Definition at line 4461 of file M471M_R1_S.h.

◆ PDMA_TOC4_5_TOC5_Msk

#define PDMA_TOC4_5_TOC5_Msk   (0xfffful << PDMA_TOC4_5_TOC5_Pos)

PDMA_T::TOC4_5: TOC5 Mask

Definition at line 4465 of file M471M_R1_S.h.

◆ PDMA_TOC4_5_TOC5_Pos

#define PDMA_TOC4_5_TOC5_Pos   (16)

PDMA_T::TOC4_5: TOC5 Position

Definition at line 4464 of file M471M_R1_S.h.

◆ PDMA_TOC6_7_TOC6_Msk

#define PDMA_TOC6_7_TOC6_Msk   (0xfffful << PDMA_TOC6_7_TOC6_Pos)

PDMA_T::TOC6_7: TOC6 Mask

Definition at line 4468 of file M471M_R1_S.h.

◆ PDMA_TOC6_7_TOC6_Pos

#define PDMA_TOC6_7_TOC6_Pos   (0)

PDMA_T::TOC6_7: TOC6 Position

Definition at line 4467 of file M471M_R1_S.h.

◆ PDMA_TOC6_7_TOC7_Msk

#define PDMA_TOC6_7_TOC7_Msk   (0xfffful << PDMA_TOC6_7_TOC7_Pos)

PDMA_T::TOC6_7: TOC7 Mask

Definition at line 4471 of file M471M_R1_S.h.

◆ PDMA_TOC6_7_TOC7_Pos

#define PDMA_TOC6_7_TOC7_Pos   (16)

PDMA_T::TOC6_7: TOC7 Position

Definition at line 4470 of file M471M_R1_S.h.

◆ PDMA_TOUTEN_TOUTENn_Msk

#define PDMA_TOUTEN_TOUTENn_Msk   (0xfful << PDMA_TOUTEN_TOUTENn_Pos)

PDMA_T::TOUTEN: TOUTENn Mask

Definition at line 4441 of file M471M_R1_S.h.

◆ PDMA_TOUTEN_TOUTENn_Pos

#define PDMA_TOUTEN_TOUTENn_Pos   (0)

PDMA_T::TOUTEN: TOUTENn Position

Definition at line 4440 of file M471M_R1_S.h.

◆ PDMA_TOUTIEN_TOUTIENn_Msk

#define PDMA_TOUTIEN_TOUTIENn_Msk   (0xfful << PDMA_TOUTIEN_TOUTIENn_Pos)

PDMA_T::TOUTIEN: TOUTIENn Mask

Definition at line 4444 of file M471M_R1_S.h.

◆ PDMA_TOUTIEN_TOUTIENn_Pos

#define PDMA_TOUTIEN_TOUTIENn_Pos   (0)

PDMA_T::TOUTIEN: TOUTIENn Position

Definition at line 4443 of file M471M_R1_S.h.

◆ PDMA_TRGSTS_REQSTSn_Msk

#define PDMA_TRGSTS_REQSTSn_Msk   (0xffful << PDMA_TRGSTS_REQSTSn_Pos)

PDMA_T::TRGSTS: REQSTSn Mask

Definition at line 4405 of file M471M_R1_S.h.

◆ PDMA_TRGSTS_REQSTSn_Pos

#define PDMA_TRGSTS_REQSTSn_Pos   (0)

PDMA_T::TRGSTS: REQSTSn Position

Definition at line 4404 of file M471M_R1_S.h.

◆ PWM_BNF_BK0SRC_Msk

#define PWM_BNF_BK0SRC_Msk   (0x1ul << PWM_BNF_BK0SRC_Pos)

PWM_T::BNF: BK0SRC Mask

Definition at line 6376 of file M471M_R1_S.h.

◆ PWM_BNF_BK0SRC_Pos

#define PWM_BNF_BK0SRC_Pos   (16)

PWM_T::BNF: BK0SRC Position

Definition at line 6375 of file M471M_R1_S.h.

◆ PWM_BNF_BK1SRC_Msk

#define PWM_BNF_BK1SRC_Msk   (0x1ul << PWM_BNF_BK1SRC_Pos)

PWM_T::BNF: BK1SRC Mask

Definition at line 6379 of file M471M_R1_S.h.

◆ PWM_BNF_BK1SRC_Pos

#define PWM_BNF_BK1SRC_Pos   (24)

PWM_T::BNF: BK1SRC Position

Definition at line 6378 of file M471M_R1_S.h.

◆ PWM_BNF_BRK0FCNT_Msk

#define PWM_BNF_BRK0FCNT_Msk   (0x7ul << PWM_BNF_BRK0FCNT_Pos)

PWM_T::BNF: BRK0FCNT Mask

Definition at line 6358 of file M471M_R1_S.h.

◆ PWM_BNF_BRK0FCNT_Pos

#define PWM_BNF_BRK0FCNT_Pos   (4)

PWM_T::BNF: BRK0FCNT Position

Definition at line 6357 of file M471M_R1_S.h.

◆ PWM_BNF_BRK0NFEN_Msk

#define PWM_BNF_BRK0NFEN_Msk   (0x1ul << PWM_BNF_BRK0NFEN_Pos)

PWM_T::BNF: BRK0NFEN Mask

Definition at line 6352 of file M471M_R1_S.h.

◆ PWM_BNF_BRK0NFEN_Pos

#define PWM_BNF_BRK0NFEN_Pos   (0)

PWM_T::BNF: BRK0NFEN Position

Definition at line 6351 of file M471M_R1_S.h.

◆ PWM_BNF_BRK0NFSEL_Msk

#define PWM_BNF_BRK0NFSEL_Msk   (0x7ul << PWM_BNF_BRK0NFSEL_Pos)

PWM_T::BNF: BRK0NFSEL Mask

Definition at line 6355 of file M471M_R1_S.h.

◆ PWM_BNF_BRK0NFSEL_Pos

#define PWM_BNF_BRK0NFSEL_Pos   (1)

PWM_T::BNF: BRK0NFSEL Position

Definition at line 6354 of file M471M_R1_S.h.

◆ PWM_BNF_BRK0PINV_Msk

#define PWM_BNF_BRK0PINV_Msk   (0x1ul << PWM_BNF_BRK0PINV_Pos)

PWM_T::BNF: BRK0PINV Mask

Definition at line 6361 of file M471M_R1_S.h.

◆ PWM_BNF_BRK0PINV_Pos

#define PWM_BNF_BRK0PINV_Pos   (7)

PWM_T::BNF: BRK0PINV Position

Definition at line 6360 of file M471M_R1_S.h.

◆ PWM_BNF_BRK1FCNT_Msk

#define PWM_BNF_BRK1FCNT_Msk   (0x7ul << PWM_BNF_BRK1FCNT_Pos)

PWM_T::BNF: BRK1FCNT Mask

Definition at line 6370 of file M471M_R1_S.h.

◆ PWM_BNF_BRK1FCNT_Pos

#define PWM_BNF_BRK1FCNT_Pos   (12)

PWM_T::BNF: BRK1FCNT Position

Definition at line 6369 of file M471M_R1_S.h.

◆ PWM_BNF_BRK1NFEN_Msk

#define PWM_BNF_BRK1NFEN_Msk   (0x1ul << PWM_BNF_BRK1NFEN_Pos)

PWM_T::BNF: BRK1NFEN Mask

Definition at line 6364 of file M471M_R1_S.h.

◆ PWM_BNF_BRK1NFEN_Pos

#define PWM_BNF_BRK1NFEN_Pos   (8)

PWM_T::BNF: BRK1NFEN Position

Definition at line 6363 of file M471M_R1_S.h.

◆ PWM_BNF_BRK1NFSEL_Msk

#define PWM_BNF_BRK1NFSEL_Msk   (0x7ul << PWM_BNF_BRK1NFSEL_Pos)

PWM_T::BNF: BRK1NFSEL Mask

Definition at line 6367 of file M471M_R1_S.h.

◆ PWM_BNF_BRK1NFSEL_Pos

#define PWM_BNF_BRK1NFSEL_Pos   (9)

PWM_T::BNF: BRK1NFSEL Position

Definition at line 6366 of file M471M_R1_S.h.

◆ PWM_BNF_BRK1PINV_Msk

#define PWM_BNF_BRK1PINV_Msk   (0x1ul << PWM_BNF_BRK1PINV_Pos)

PWM_T::BNF: BRK1PINV Mask

Definition at line 6373 of file M471M_R1_S.h.

◆ PWM_BNF_BRK1PINV_Pos

#define PWM_BNF_BRK1PINV_Pos   (15)

PWM_T::BNF: BRK1PINV Position

Definition at line 6372 of file M471M_R1_S.h.

◆ PWM_BRKCTL0_1_BRKAEVEN_Msk

#define PWM_BRKCTL0_1_BRKAEVEN_Msk   (0x3ul << PWM_BRKCTL0_1_BRKAEVEN_Pos)

PWM_T::BRKCTL0_1: BRKAEVEN Mask

Definition at line 6409 of file M471M_R1_S.h.

◆ PWM_BRKCTL0_1_BRKAEVEN_Pos

#define PWM_BRKCTL0_1_BRKAEVEN_Pos   (16)

PWM_T::BRKCTL0_1: BRKAEVEN Position

Definition at line 6408 of file M471M_R1_S.h.

◆ PWM_BRKCTL0_1_BRKAODD_Msk

#define PWM_BRKCTL0_1_BRKAODD_Msk   (0x3ul << PWM_BRKCTL0_1_BRKAODD_Pos)

PWM_T::BRKCTL0_1: BRKAODD Mask

Definition at line 6412 of file M471M_R1_S.h.

◆ PWM_BRKCTL0_1_BRKAODD_Pos

#define PWM_BRKCTL0_1_BRKAODD_Pos   (18)

PWM_T::BRKCTL0_1: BRKAODD Position

Definition at line 6411 of file M471M_R1_S.h.

◆ PWM_BRKCTL0_1_BRKP0EEN_Msk

#define PWM_BRKCTL0_1_BRKP0EEN_Msk   (0x1ul << PWM_BRKCTL0_1_BRKP0EEN_Pos)

PWM_T::BRKCTL0_1: BRKP0EEN Mask

Definition at line 6391 of file M471M_R1_S.h.

◆ PWM_BRKCTL0_1_BRKP0EEN_Pos

#define PWM_BRKCTL0_1_BRKP0EEN_Pos   (4)

PWM_T::BRKCTL0_1: BRKP0EEN Position

Definition at line 6390 of file M471M_R1_S.h.

◆ PWM_BRKCTL0_1_BRKP0LEN_Msk

#define PWM_BRKCTL0_1_BRKP0LEN_Msk   (0x1ul << PWM_BRKCTL0_1_BRKP0LEN_Pos)

PWM_T::BRKCTL0_1: BRKP0LEN Mask

Definition at line 6400 of file M471M_R1_S.h.

◆ PWM_BRKCTL0_1_BRKP0LEN_Pos

#define PWM_BRKCTL0_1_BRKP0LEN_Pos   (12)

PWM_T::BRKCTL0_1: BRKP0LEN Position

Definition at line 6399 of file M471M_R1_S.h.

◆ PWM_BRKCTL0_1_BRKP1EEN_Msk

#define PWM_BRKCTL0_1_BRKP1EEN_Msk   (0x1ul << PWM_BRKCTL0_1_BRKP1EEN_Pos)

PWM_T::BRKCTL0_1: BRKP1EEN Mask

Definition at line 6394 of file M471M_R1_S.h.

◆ PWM_BRKCTL0_1_BRKP1EEN_Pos

#define PWM_BRKCTL0_1_BRKP1EEN_Pos   (5)

PWM_T::BRKCTL0_1: BRKP1EEN Position

Definition at line 6393 of file M471M_R1_S.h.

◆ PWM_BRKCTL0_1_BRKP1LEN_Msk

#define PWM_BRKCTL0_1_BRKP1LEN_Msk   (0x1ul << PWM_BRKCTL0_1_BRKP1LEN_Pos)

PWM_T::BRKCTL0_1: BRKP1LEN Mask

Definition at line 6403 of file M471M_R1_S.h.

◆ PWM_BRKCTL0_1_BRKP1LEN_Pos

#define PWM_BRKCTL0_1_BRKP1LEN_Pos   (13)

PWM_T::BRKCTL0_1: BRKP1LEN Position

Definition at line 6402 of file M471M_R1_S.h.

◆ PWM_BRKCTL0_1_SYSEBEN_Msk

#define PWM_BRKCTL0_1_SYSEBEN_Msk   (0x1ul << PWM_BRKCTL0_1_SYSEBEN_Pos)

PWM_T::BRKCTL0_1: SYSEBEN Mask

Definition at line 6397 of file M471M_R1_S.h.

◆ PWM_BRKCTL0_1_SYSEBEN_Pos

#define PWM_BRKCTL0_1_SYSEBEN_Pos   (7)

PWM_T::BRKCTL0_1: SYSEBEN Position

Definition at line 6396 of file M471M_R1_S.h.

◆ PWM_BRKCTL0_1_SYSLBEN_Msk

#define PWM_BRKCTL0_1_SYSLBEN_Msk   (0x1ul << PWM_BRKCTL0_1_SYSLBEN_Pos)

PWM_T::BRKCTL0_1: SYSLBEN Mask

Definition at line 6406 of file M471M_R1_S.h.

◆ PWM_BRKCTL0_1_SYSLBEN_Pos

#define PWM_BRKCTL0_1_SYSLBEN_Pos   (15)

PWM_T::BRKCTL0_1: SYSLBEN Position

Definition at line 6405 of file M471M_R1_S.h.

◆ PWM_BRKCTL2_3_BRKAEVEN_Msk

#define PWM_BRKCTL2_3_BRKAEVEN_Msk   (0x3ul << PWM_BRKCTL2_3_BRKAEVEN_Pos)

PWM_T::BRKCTL2_3: BRKAEVEN Mask

Definition at line 6433 of file M471M_R1_S.h.

◆ PWM_BRKCTL2_3_BRKAEVEN_Pos

#define PWM_BRKCTL2_3_BRKAEVEN_Pos   (16)

PWM_T::BRKCTL2_3: BRKAEVEN Position

Definition at line 6432 of file M471M_R1_S.h.

◆ PWM_BRKCTL2_3_BRKAODD_Msk

#define PWM_BRKCTL2_3_BRKAODD_Msk   (0x3ul << PWM_BRKCTL2_3_BRKAODD_Pos)

PWM_T::BRKCTL2_3: BRKAODD Mask

Definition at line 6436 of file M471M_R1_S.h.

◆ PWM_BRKCTL2_3_BRKAODD_Pos

#define PWM_BRKCTL2_3_BRKAODD_Pos   (18)

PWM_T::BRKCTL2_3: BRKAODD Position

Definition at line 6435 of file M471M_R1_S.h.

◆ PWM_BRKCTL2_3_BRKP0EEN_Msk

#define PWM_BRKCTL2_3_BRKP0EEN_Msk   (0x1ul << PWM_BRKCTL2_3_BRKP0EEN_Pos)

PWM_T::BRKCTL2_3: BRKP0EEN Mask

Definition at line 6415 of file M471M_R1_S.h.

◆ PWM_BRKCTL2_3_BRKP0EEN_Pos

#define PWM_BRKCTL2_3_BRKP0EEN_Pos   (4)

PWM_T::BRKCTL2_3: BRKP0EEN Position

Definition at line 6414 of file M471M_R1_S.h.

◆ PWM_BRKCTL2_3_BRKP0LEN_Msk

#define PWM_BRKCTL2_3_BRKP0LEN_Msk   (0x1ul << PWM_BRKCTL2_3_BRKP0LEN_Pos)

PWM_T::BRKCTL2_3: BRKP0LEN Mask

Definition at line 6424 of file M471M_R1_S.h.

◆ PWM_BRKCTL2_3_BRKP0LEN_Pos

#define PWM_BRKCTL2_3_BRKP0LEN_Pos   (12)

PWM_T::BRKCTL2_3: BRKP0LEN Position

Definition at line 6423 of file M471M_R1_S.h.

◆ PWM_BRKCTL2_3_BRKP1EEN_Msk

#define PWM_BRKCTL2_3_BRKP1EEN_Msk   (0x1ul << PWM_BRKCTL2_3_BRKP1EEN_Pos)

PWM_T::BRKCTL2_3: BRKP1EEN Mask

Definition at line 6418 of file M471M_R1_S.h.

◆ PWM_BRKCTL2_3_BRKP1EEN_Pos

#define PWM_BRKCTL2_3_BRKP1EEN_Pos   (5)

PWM_T::BRKCTL2_3: BRKP1EEN Position

Definition at line 6417 of file M471M_R1_S.h.

◆ PWM_BRKCTL2_3_BRKP1LEN_Msk

#define PWM_BRKCTL2_3_BRKP1LEN_Msk   (0x1ul << PWM_BRKCTL2_3_BRKP1LEN_Pos)

PWM_T::BRKCTL2_3: BRKP1LEN Mask

Definition at line 6427 of file M471M_R1_S.h.

◆ PWM_BRKCTL2_3_BRKP1LEN_Pos

#define PWM_BRKCTL2_3_BRKP1LEN_Pos   (13)

PWM_T::BRKCTL2_3: BRKP1LEN Position

Definition at line 6426 of file M471M_R1_S.h.

◆ PWM_BRKCTL2_3_SYSEBEN_Msk

#define PWM_BRKCTL2_3_SYSEBEN_Msk   (0x1ul << PWM_BRKCTL2_3_SYSEBEN_Pos)

PWM_T::BRKCTL2_3: SYSEBEN Mask

Definition at line 6421 of file M471M_R1_S.h.

◆ PWM_BRKCTL2_3_SYSEBEN_Pos

#define PWM_BRKCTL2_3_SYSEBEN_Pos   (7)

PWM_T::BRKCTL2_3: SYSEBEN Position

Definition at line 6420 of file M471M_R1_S.h.

◆ PWM_BRKCTL2_3_SYSLBEN_Msk

#define PWM_BRKCTL2_3_SYSLBEN_Msk   (0x1ul << PWM_BRKCTL2_3_SYSLBEN_Pos)

PWM_T::BRKCTL2_3: SYSLBEN Mask

Definition at line 6430 of file M471M_R1_S.h.

◆ PWM_BRKCTL2_3_SYSLBEN_Pos

#define PWM_BRKCTL2_3_SYSLBEN_Pos   (15)

PWM_T::BRKCTL2_3: SYSLBEN Position

Definition at line 6429 of file M471M_R1_S.h.

◆ PWM_BRKCTL4_5_BRKAEVEN_Msk

#define PWM_BRKCTL4_5_BRKAEVEN_Msk   (0x3ul << PWM_BRKCTL4_5_BRKAEVEN_Pos)

PWM_T::BRKCTL4_5: BRKAEVEN Mask

Definition at line 6457 of file M471M_R1_S.h.

◆ PWM_BRKCTL4_5_BRKAEVEN_Pos

#define PWM_BRKCTL4_5_BRKAEVEN_Pos   (16)

PWM_T::BRKCTL4_5: BRKAEVEN Position

Definition at line 6456 of file M471M_R1_S.h.

◆ PWM_BRKCTL4_5_BRKAODD_Msk

#define PWM_BRKCTL4_5_BRKAODD_Msk   (0x3ul << PWM_BRKCTL4_5_BRKAODD_Pos)

PWM_T::BRKCTL4_5: BRKAODD Mask

Definition at line 6460 of file M471M_R1_S.h.

◆ PWM_BRKCTL4_5_BRKAODD_Pos

#define PWM_BRKCTL4_5_BRKAODD_Pos   (18)

PWM_T::BRKCTL4_5: BRKAODD Position

Definition at line 6459 of file M471M_R1_S.h.

◆ PWM_BRKCTL4_5_BRKP0EEN_Msk

#define PWM_BRKCTL4_5_BRKP0EEN_Msk   (0x1ul << PWM_BRKCTL4_5_BRKP0EEN_Pos)

PWM_T::BRKCTL4_5: BRKP0EEN Mask

Definition at line 6439 of file M471M_R1_S.h.

◆ PWM_BRKCTL4_5_BRKP0EEN_Pos

#define PWM_BRKCTL4_5_BRKP0EEN_Pos   (4)

PWM_T::BRKCTL4_5: BRKP0EEN Position

Definition at line 6438 of file M471M_R1_S.h.

◆ PWM_BRKCTL4_5_BRKP0LEN_Msk

#define PWM_BRKCTL4_5_BRKP0LEN_Msk   (0x1ul << PWM_BRKCTL4_5_BRKP0LEN_Pos)

PWM_T::BRKCTL4_5: BRKP0LEN Mask

Definition at line 6448 of file M471M_R1_S.h.

◆ PWM_BRKCTL4_5_BRKP0LEN_Pos

#define PWM_BRKCTL4_5_BRKP0LEN_Pos   (12)

PWM_T::BRKCTL4_5: BRKP0LEN Position

Definition at line 6447 of file M471M_R1_S.h.

◆ PWM_BRKCTL4_5_BRKP1EEN_Msk

#define PWM_BRKCTL4_5_BRKP1EEN_Msk   (0x1ul << PWM_BRKCTL4_5_BRKP1EEN_Pos)

PWM_T::BRKCTL4_5: BRKP1EEN Mask

Definition at line 6442 of file M471M_R1_S.h.

◆ PWM_BRKCTL4_5_BRKP1EEN_Pos

#define PWM_BRKCTL4_5_BRKP1EEN_Pos   (5)

PWM_T::BRKCTL4_5: BRKP1EEN Position

Definition at line 6441 of file M471M_R1_S.h.

◆ PWM_BRKCTL4_5_BRKP1LEN_Msk

#define PWM_BRKCTL4_5_BRKP1LEN_Msk   (0x1ul << PWM_BRKCTL4_5_BRKP1LEN_Pos)

PWM_T::BRKCTL4_5: BRKP1LEN Mask

Definition at line 6451 of file M471M_R1_S.h.

◆ PWM_BRKCTL4_5_BRKP1LEN_Pos

#define PWM_BRKCTL4_5_BRKP1LEN_Pos   (13)

PWM_T::BRKCTL4_5: BRKP1LEN Position

Definition at line 6450 of file M471M_R1_S.h.

◆ PWM_BRKCTL4_5_SYSEBEN_Msk

#define PWM_BRKCTL4_5_SYSEBEN_Msk   (0x1ul << PWM_BRKCTL4_5_SYSEBEN_Pos)

PWM_T::BRKCTL4_5: SYSEBEN Mask

Definition at line 6445 of file M471M_R1_S.h.

◆ PWM_BRKCTL4_5_SYSEBEN_Pos

#define PWM_BRKCTL4_5_SYSEBEN_Pos   (7)

PWM_T::BRKCTL4_5: SYSEBEN Position

Definition at line 6444 of file M471M_R1_S.h.

◆ PWM_BRKCTL4_5_SYSLBEN_Msk

#define PWM_BRKCTL4_5_SYSLBEN_Msk   (0x1ul << PWM_BRKCTL4_5_SYSLBEN_Pos)

PWM_T::BRKCTL4_5: SYSLBEN Mask

Definition at line 6454 of file M471M_R1_S.h.

◆ PWM_BRKCTL4_5_SYSLBEN_Pos

#define PWM_BRKCTL4_5_SYSLBEN_Pos   (15)

PWM_T::BRKCTL4_5: SYSLBEN Position

Definition at line 6453 of file M471M_R1_S.h.

◆ PWM_CAPCTL_CAPEN0_Msk

#define PWM_CAPCTL_CAPEN0_Msk   (0x1ul << PWM_CAPCTL_CAPEN0_Pos)

PWM_T::CAPCTL: CAPEN0 Mask

Definition at line 6985 of file M471M_R1_S.h.

◆ PWM_CAPCTL_CAPEN0_Pos

#define PWM_CAPCTL_CAPEN0_Pos   (0)

PWM_T::CAPCTL: CAPEN0 Position

Definition at line 6984 of file M471M_R1_S.h.

◆ PWM_CAPCTL_CAPEN1_Msk

#define PWM_CAPCTL_CAPEN1_Msk   (0x1ul << PWM_CAPCTL_CAPEN1_Pos)

PWM_T::CAPCTL: CAPEN1 Mask

Definition at line 6988 of file M471M_R1_S.h.

◆ PWM_CAPCTL_CAPEN1_Pos

#define PWM_CAPCTL_CAPEN1_Pos   (1)

PWM_T::CAPCTL: CAPEN1 Position

Definition at line 6987 of file M471M_R1_S.h.

◆ PWM_CAPCTL_CAPEN2_Msk

#define PWM_CAPCTL_CAPEN2_Msk   (0x1ul << PWM_CAPCTL_CAPEN2_Pos)

PWM_T::CAPCTL: CAPEN2 Mask

Definition at line 6991 of file M471M_R1_S.h.

◆ PWM_CAPCTL_CAPEN2_Pos

#define PWM_CAPCTL_CAPEN2_Pos   (2)

PWM_T::CAPCTL: CAPEN2 Position

Definition at line 6990 of file M471M_R1_S.h.

◆ PWM_CAPCTL_CAPEN3_Msk

#define PWM_CAPCTL_CAPEN3_Msk   (0x1ul << PWM_CAPCTL_CAPEN3_Pos)

PWM_T::CAPCTL: CAPEN3 Mask

Definition at line 6994 of file M471M_R1_S.h.

◆ PWM_CAPCTL_CAPEN3_Pos

#define PWM_CAPCTL_CAPEN3_Pos   (3)

PWM_T::CAPCTL: CAPEN3 Position

Definition at line 6993 of file M471M_R1_S.h.

◆ PWM_CAPCTL_CAPEN4_Msk

#define PWM_CAPCTL_CAPEN4_Msk   (0x1ul << PWM_CAPCTL_CAPEN4_Pos)

PWM_T::CAPCTL: CAPEN4 Mask

Definition at line 6997 of file M471M_R1_S.h.

◆ PWM_CAPCTL_CAPEN4_Pos

#define PWM_CAPCTL_CAPEN4_Pos   (4)

PWM_T::CAPCTL: CAPEN4 Position

Definition at line 6996 of file M471M_R1_S.h.

◆ PWM_CAPCTL_CAPEN5_Msk

#define PWM_CAPCTL_CAPEN5_Msk   (0x1ul << PWM_CAPCTL_CAPEN5_Pos)

PWM_T::CAPCTL: CAPEN5 Mask

Definition at line 7000 of file M471M_R1_S.h.

◆ PWM_CAPCTL_CAPEN5_Pos

#define PWM_CAPCTL_CAPEN5_Pos   (5)

PWM_T::CAPCTL: CAPEN5 Position

Definition at line 6999 of file M471M_R1_S.h.

◆ PWM_CAPCTL_CAPENn_Msk

#define PWM_CAPCTL_CAPENn_Msk   (0x3ful << PWM_CAPCTL_CAPENn_Pos)

PWM_T::CAPCTL: CAPENn Mask

Definition at line 6982 of file M471M_R1_S.h.

◆ PWM_CAPCTL_CAPENn_Pos

#define PWM_CAPCTL_CAPENn_Pos   (0)

PWM_T::CAPCTL: CAPENn Position

Definition at line 6981 of file M471M_R1_S.h.

◆ PWM_CAPCTL_CAPINV0_Msk

#define PWM_CAPCTL_CAPINV0_Msk   (0x1ul << PWM_CAPCTL_CAPINV0_Pos)

PWM_T::CAPCTL: CAPINV0 Mask

Definition at line 7006 of file M471M_R1_S.h.

◆ PWM_CAPCTL_CAPINV0_Pos

#define PWM_CAPCTL_CAPINV0_Pos   (8)

PWM_T::CAPCTL: CAPINV0 Position

Definition at line 7005 of file M471M_R1_S.h.

◆ PWM_CAPCTL_CAPINV1_Msk

#define PWM_CAPCTL_CAPINV1_Msk   (0x1ul << PWM_CAPCTL_CAPINV1_Pos)

PWM_T::CAPCTL: CAPINV1 Mask

Definition at line 7009 of file M471M_R1_S.h.

◆ PWM_CAPCTL_CAPINV1_Pos

#define PWM_CAPCTL_CAPINV1_Pos   (9)

PWM_T::CAPCTL: CAPINV1 Position

Definition at line 7008 of file M471M_R1_S.h.

◆ PWM_CAPCTL_CAPINV2_Msk

#define PWM_CAPCTL_CAPINV2_Msk   (0x1ul << PWM_CAPCTL_CAPINV2_Pos)

PWM_T::CAPCTL: CAPINV2 Mask

Definition at line 7012 of file M471M_R1_S.h.

◆ PWM_CAPCTL_CAPINV2_Pos

#define PWM_CAPCTL_CAPINV2_Pos   (10)

PWM_T::CAPCTL: CAPINV2 Position

Definition at line 7011 of file M471M_R1_S.h.

◆ PWM_CAPCTL_CAPINV3_Msk

#define PWM_CAPCTL_CAPINV3_Msk   (0x1ul << PWM_CAPCTL_CAPINV3_Pos)

PWM_T::CAPCTL: CAPINV3 Mask

Definition at line 7015 of file M471M_R1_S.h.

◆ PWM_CAPCTL_CAPINV3_Pos

#define PWM_CAPCTL_CAPINV3_Pos   (11)

PWM_T::CAPCTL: CAPINV3 Position

Definition at line 7014 of file M471M_R1_S.h.

◆ PWM_CAPCTL_CAPINV4_Msk

#define PWM_CAPCTL_CAPINV4_Msk   (0x1ul << PWM_CAPCTL_CAPINV4_Pos)

PWM_T::CAPCTL: CAPINV4 Mask

Definition at line 7018 of file M471M_R1_S.h.

◆ PWM_CAPCTL_CAPINV4_Pos

#define PWM_CAPCTL_CAPINV4_Pos   (12)

PWM_T::CAPCTL: CAPINV4 Position

Definition at line 7017 of file M471M_R1_S.h.

◆ PWM_CAPCTL_CAPINV5_Msk

#define PWM_CAPCTL_CAPINV5_Msk   (0x1ul << PWM_CAPCTL_CAPINV5_Pos)

PWM_T::CAPCTL: CAPINV5 Mask

Definition at line 7021 of file M471M_R1_S.h.

◆ PWM_CAPCTL_CAPINV5_Pos

#define PWM_CAPCTL_CAPINV5_Pos   (13)

PWM_T::CAPCTL: CAPINV5 Position

Definition at line 7020 of file M471M_R1_S.h.

◆ PWM_CAPCTL_CAPINVn_Msk

#define PWM_CAPCTL_CAPINVn_Msk   (0x3ful << PWM_CAPCTL_CAPINVn_Pos)

PWM_T::CAPCTL: CAPINVn Mask

Definition at line 7003 of file M471M_R1_S.h.

◆ PWM_CAPCTL_CAPINVn_Pos

#define PWM_CAPCTL_CAPINVn_Pos   (8)

PWM_T::CAPCTL: CAPINVn Position

Definition at line 7002 of file M471M_R1_S.h.

◆ PWM_CAPCTL_FCRLDEN0_Msk

#define PWM_CAPCTL_FCRLDEN0_Msk   (0x1ul << PWM_CAPCTL_FCRLDEN0_Pos)

PWM_T::CAPCTL: FCRLDEN0 Mask

Definition at line 7048 of file M471M_R1_S.h.

◆ PWM_CAPCTL_FCRLDEN0_Pos

#define PWM_CAPCTL_FCRLDEN0_Pos   (24)

PWM_T::CAPCTL: FCRLDEN0 Position

Definition at line 7047 of file M471M_R1_S.h.

◆ PWM_CAPCTL_FCRLDEN1_Msk

#define PWM_CAPCTL_FCRLDEN1_Msk   (0x1ul << PWM_CAPCTL_FCRLDEN1_Pos)

PWM_T::CAPCTL: FCRLDEN1 Mask

Definition at line 7051 of file M471M_R1_S.h.

◆ PWM_CAPCTL_FCRLDEN1_Pos

#define PWM_CAPCTL_FCRLDEN1_Pos   (25)

PWM_T::CAPCTL: FCRLDEN1 Position

Definition at line 7050 of file M471M_R1_S.h.

◆ PWM_CAPCTL_FCRLDEN2_Msk

#define PWM_CAPCTL_FCRLDEN2_Msk   (0x1ul << PWM_CAPCTL_FCRLDEN2_Pos)

PWM_T::CAPCTL: FCRLDEN2 Mask

Definition at line 7054 of file M471M_R1_S.h.

◆ PWM_CAPCTL_FCRLDEN2_Pos

#define PWM_CAPCTL_FCRLDEN2_Pos   (26)

PWM_T::CAPCTL: FCRLDEN2 Position

Definition at line 7053 of file M471M_R1_S.h.

◆ PWM_CAPCTL_FCRLDEN3_Msk

#define PWM_CAPCTL_FCRLDEN3_Msk   (0x1ul << PWM_CAPCTL_FCRLDEN3_Pos)

PWM_T::CAPCTL: FCRLDEN3 Mask

Definition at line 7057 of file M471M_R1_S.h.

◆ PWM_CAPCTL_FCRLDEN3_Pos

#define PWM_CAPCTL_FCRLDEN3_Pos   (27)

PWM_T::CAPCTL: FCRLDEN3 Position

Definition at line 7056 of file M471M_R1_S.h.

◆ PWM_CAPCTL_FCRLDEN4_Msk

#define PWM_CAPCTL_FCRLDEN4_Msk   (0x1ul << PWM_CAPCTL_FCRLDEN4_Pos)

PWM_T::CAPCTL: FCRLDEN4 Mask

Definition at line 7060 of file M471M_R1_S.h.

◆ PWM_CAPCTL_FCRLDEN4_Pos

#define PWM_CAPCTL_FCRLDEN4_Pos   (28)

PWM_T::CAPCTL: FCRLDEN4 Position

Definition at line 7059 of file M471M_R1_S.h.

◆ PWM_CAPCTL_FCRLDEN5_Msk

#define PWM_CAPCTL_FCRLDEN5_Msk   (0x1ul << PWM_CAPCTL_FCRLDEN5_Pos)

PWM_T::CAPCTL: FCRLDEN5 Mask

Definition at line 7063 of file M471M_R1_S.h.

◆ PWM_CAPCTL_FCRLDEN5_Pos

#define PWM_CAPCTL_FCRLDEN5_Pos   (29)

PWM_T::CAPCTL: FCRLDEN5 Position

Definition at line 7062 of file M471M_R1_S.h.

◆ PWM_CAPCTL_FCRLDENn_Msk

#define PWM_CAPCTL_FCRLDENn_Msk   (0x3ful << PWM_CAPCTL_FCRLDENn_Pos)

PWM_T::CAPCTL: FCRLDENn Mask

Definition at line 7045 of file M471M_R1_S.h.

◆ PWM_CAPCTL_FCRLDENn_Pos

#define PWM_CAPCTL_FCRLDENn_Pos   (24)

PWM_T::CAPCTL: FCRLDENn Position

Definition at line 7044 of file M471M_R1_S.h.

◆ PWM_CAPCTL_RCRLDEN0_Msk

#define PWM_CAPCTL_RCRLDEN0_Msk   (0x1ul << PWM_CAPCTL_RCRLDEN0_Pos)

PWM_T::CAPCTL: RCRLDEN0 Mask

Definition at line 7027 of file M471M_R1_S.h.

◆ PWM_CAPCTL_RCRLDEN0_Pos

#define PWM_CAPCTL_RCRLDEN0_Pos   (16)

PWM_T::CAPCTL: RCRLDEN0 Position

Definition at line 7026 of file M471M_R1_S.h.

◆ PWM_CAPCTL_RCRLDEN1_Msk

#define PWM_CAPCTL_RCRLDEN1_Msk   (0x1ul << PWM_CAPCTL_RCRLDEN1_Pos)

PWM_T::CAPCTL: RCRLDEN1 Mask

Definition at line 7030 of file M471M_R1_S.h.

◆ PWM_CAPCTL_RCRLDEN1_Pos

#define PWM_CAPCTL_RCRLDEN1_Pos   (17)

PWM_T::CAPCTL: RCRLDEN1 Position

Definition at line 7029 of file M471M_R1_S.h.

◆ PWM_CAPCTL_RCRLDEN2_Msk

#define PWM_CAPCTL_RCRLDEN2_Msk   (0x1ul << PWM_CAPCTL_RCRLDEN2_Pos)

PWM_T::CAPCTL: RCRLDEN2 Mask

Definition at line 7033 of file M471M_R1_S.h.

◆ PWM_CAPCTL_RCRLDEN2_Pos

#define PWM_CAPCTL_RCRLDEN2_Pos   (18)

PWM_T::CAPCTL: RCRLDEN2 Position

Definition at line 7032 of file M471M_R1_S.h.

◆ PWM_CAPCTL_RCRLDEN3_Msk

#define PWM_CAPCTL_RCRLDEN3_Msk   (0x1ul << PWM_CAPCTL_RCRLDEN3_Pos)

PWM_T::CAPCTL: RCRLDEN3 Mask

Definition at line 7036 of file M471M_R1_S.h.

◆ PWM_CAPCTL_RCRLDEN3_Pos

#define PWM_CAPCTL_RCRLDEN3_Pos   (19)

PWM_T::CAPCTL: RCRLDEN3 Position

Definition at line 7035 of file M471M_R1_S.h.

◆ PWM_CAPCTL_RCRLDEN4_Msk

#define PWM_CAPCTL_RCRLDEN4_Msk   (0x1ul << PWM_CAPCTL_RCRLDEN4_Pos)

PWM_T::CAPCTL: RCRLDEN4 Mask

Definition at line 7039 of file M471M_R1_S.h.

◆ PWM_CAPCTL_RCRLDEN4_Pos

#define PWM_CAPCTL_RCRLDEN4_Pos   (20)

PWM_T::CAPCTL: RCRLDEN4 Position

Definition at line 7038 of file M471M_R1_S.h.

◆ PWM_CAPCTL_RCRLDEN5_Msk

#define PWM_CAPCTL_RCRLDEN5_Msk   (0x1ul << PWM_CAPCTL_RCRLDEN5_Pos)

PWM_T::CAPCTL: RCRLDEN5 Mask

Definition at line 7042 of file M471M_R1_S.h.

◆ PWM_CAPCTL_RCRLDEN5_Pos

#define PWM_CAPCTL_RCRLDEN5_Pos   (21)

PWM_T::CAPCTL: RCRLDEN5 Position

Definition at line 7041 of file M471M_R1_S.h.

◆ PWM_CAPCTL_RCRLDENn_Msk

#define PWM_CAPCTL_RCRLDENn_Msk   (0x3ful << PWM_CAPCTL_RCRLDENn_Pos)

PWM_T::CAPCTL: RCRLDENn Mask

Definition at line 7024 of file M471M_R1_S.h.

◆ PWM_CAPCTL_RCRLDENn_Pos

#define PWM_CAPCTL_RCRLDENn_Pos   (16)

PWM_T::CAPCTL: RCRLDENn Position

Definition at line 7023 of file M471M_R1_S.h.

◆ PWM_CAPIEN_CAPFIEN0_Msk

#define PWM_CAPIEN_CAPFIEN0_Msk   (0x1ul << PWM_CAPIEN_CAPFIEN0_Pos)

PWM_T::CAPIEN: CAPFIEN0 Mask

Definition at line 7213 of file M471M_R1_S.h.

◆ PWM_CAPIEN_CAPFIEN0_Pos

#define PWM_CAPIEN_CAPFIEN0_Pos   (8)

PWM_T::CAPIEN: CAPFIEN0 Position

Definition at line 7212 of file M471M_R1_S.h.

◆ PWM_CAPIEN_CAPFIEN1_Msk

#define PWM_CAPIEN_CAPFIEN1_Msk   (0x1ul << PWM_CAPIEN_CAPFIEN1_Pos)

PWM_T::CAPIEN: CAPFIEN1 Mask

Definition at line 7216 of file M471M_R1_S.h.

◆ PWM_CAPIEN_CAPFIEN1_Pos

#define PWM_CAPIEN_CAPFIEN1_Pos   (9)

PWM_T::CAPIEN: CAPFIEN1 Position

Definition at line 7215 of file M471M_R1_S.h.

◆ PWM_CAPIEN_CAPFIEN2_Msk

#define PWM_CAPIEN_CAPFIEN2_Msk   (0x1ul << PWM_CAPIEN_CAPFIEN2_Pos)

PWM_T::CAPIEN: CAPFIEN2 Mask

Definition at line 7219 of file M471M_R1_S.h.

◆ PWM_CAPIEN_CAPFIEN2_Pos

#define PWM_CAPIEN_CAPFIEN2_Pos   (10)

PWM_T::CAPIEN: CAPFIEN2 Position

Definition at line 7218 of file M471M_R1_S.h.

◆ PWM_CAPIEN_CAPFIEN3_Msk

#define PWM_CAPIEN_CAPFIEN3_Msk   (0x1ul << PWM_CAPIEN_CAPFIEN3_Pos)

PWM_T::CAPIEN: CAPFIEN3 Mask

Definition at line 7222 of file M471M_R1_S.h.

◆ PWM_CAPIEN_CAPFIEN3_Pos

#define PWM_CAPIEN_CAPFIEN3_Pos   (11)

PWM_T::CAPIEN: CAPFIEN3 Position

Definition at line 7221 of file M471M_R1_S.h.

◆ PWM_CAPIEN_CAPFIEN4_Msk

#define PWM_CAPIEN_CAPFIEN4_Msk   (0x1ul << PWM_CAPIEN_CAPFIEN4_Pos)

PWM_T::CAPIEN: CAPFIEN4 Mask

Definition at line 7225 of file M471M_R1_S.h.

◆ PWM_CAPIEN_CAPFIEN4_Pos

#define PWM_CAPIEN_CAPFIEN4_Pos   (12)

PWM_T::CAPIEN: CAPFIEN4 Position

Definition at line 7224 of file M471M_R1_S.h.

◆ PWM_CAPIEN_CAPFIEN5_Msk

#define PWM_CAPIEN_CAPFIEN5_Msk   (0x1ul << PWM_CAPIEN_CAPFIEN5_Pos)

PWM_T::CAPIEN: CAPFIEN5 Mask

Definition at line 7228 of file M471M_R1_S.h.

◆ PWM_CAPIEN_CAPFIEN5_Pos

#define PWM_CAPIEN_CAPFIEN5_Pos   (13)

PWM_T::CAPIEN: CAPFIEN5 Position

Definition at line 7227 of file M471M_R1_S.h.

◆ PWM_CAPIEN_CAPFIENn_Msk

#define PWM_CAPIEN_CAPFIENn_Msk   (0x3ful << PWM_CAPIEN_CAPFIENn_Pos)

PWM_T::CAPIEN: CAPFIENn Mask

Definition at line 7210 of file M471M_R1_S.h.

◆ PWM_CAPIEN_CAPFIENn_Pos

#define PWM_CAPIEN_CAPFIENn_Pos   (8)

PWM_T::CAPIEN: CAPFIENn Position

Definition at line 7209 of file M471M_R1_S.h.

◆ PWM_CAPIEN_CAPRIEN0_Msk

#define PWM_CAPIEN_CAPRIEN0_Msk   (0x1ul << PWM_CAPIEN_CAPRIEN0_Pos)

PWM_T::CAPIEN: CAPRIEN0 Mask

Definition at line 7192 of file M471M_R1_S.h.

◆ PWM_CAPIEN_CAPRIEN0_Pos

#define PWM_CAPIEN_CAPRIEN0_Pos   (0)

PWM_T::CAPIEN: CAPRIEN0 Position

Definition at line 7191 of file M471M_R1_S.h.

◆ PWM_CAPIEN_CAPRIEN1_Msk

#define PWM_CAPIEN_CAPRIEN1_Msk   (0x1ul << PWM_CAPIEN_CAPRIEN1_Pos)

PWM_T::CAPIEN: CAPRIEN1 Mask

Definition at line 7195 of file M471M_R1_S.h.

◆ PWM_CAPIEN_CAPRIEN1_Pos

#define PWM_CAPIEN_CAPRIEN1_Pos   (1)

PWM_T::CAPIEN: CAPRIEN1 Position

Definition at line 7194 of file M471M_R1_S.h.

◆ PWM_CAPIEN_CAPRIEN2_Msk

#define PWM_CAPIEN_CAPRIEN2_Msk   (0x1ul << PWM_CAPIEN_CAPRIEN2_Pos)

PWM_T::CAPIEN: CAPRIEN2 Mask

Definition at line 7198 of file M471M_R1_S.h.

◆ PWM_CAPIEN_CAPRIEN2_Pos

#define PWM_CAPIEN_CAPRIEN2_Pos   (2)

PWM_T::CAPIEN: CAPRIEN2 Position

Definition at line 7197 of file M471M_R1_S.h.

◆ PWM_CAPIEN_CAPRIEN3_Msk

#define PWM_CAPIEN_CAPRIEN3_Msk   (0x1ul << PWM_CAPIEN_CAPRIEN3_Pos)

PWM_T::CAPIEN: CAPRIEN3 Mask

Definition at line 7201 of file M471M_R1_S.h.

◆ PWM_CAPIEN_CAPRIEN3_Pos

#define PWM_CAPIEN_CAPRIEN3_Pos   (3)

PWM_T::CAPIEN: CAPRIEN3 Position

Definition at line 7200 of file M471M_R1_S.h.

◆ PWM_CAPIEN_CAPRIEN4_Msk

#define PWM_CAPIEN_CAPRIEN4_Msk   (0x1ul << PWM_CAPIEN_CAPRIEN4_Pos)

PWM_T::CAPIEN: CAPRIEN4 Mask

Definition at line 7204 of file M471M_R1_S.h.

◆ PWM_CAPIEN_CAPRIEN4_Pos

#define PWM_CAPIEN_CAPRIEN4_Pos   (4)

PWM_T::CAPIEN: CAPRIEN4 Position

Definition at line 7203 of file M471M_R1_S.h.

◆ PWM_CAPIEN_CAPRIEN5_Msk

#define PWM_CAPIEN_CAPRIEN5_Msk   (0x1ul << PWM_CAPIEN_CAPRIEN5_Pos)

PWM_T::CAPIEN: CAPRIEN5 Mask

Definition at line 7207 of file M471M_R1_S.h.

◆ PWM_CAPIEN_CAPRIEN5_Pos

#define PWM_CAPIEN_CAPRIEN5_Pos   (5)

PWM_T::CAPIEN: CAPRIEN5 Position

Definition at line 7206 of file M471M_R1_S.h.

◆ PWM_CAPIEN_CAPRIENn_Msk

#define PWM_CAPIEN_CAPRIENn_Msk   (0x3ful << PWM_CAPIEN_CAPRIENn_Pos)

PWM_T::CAPIEN: CAPRIENn Mask

Definition at line 7189 of file M471M_R1_S.h.

◆ PWM_CAPIEN_CAPRIENn_Pos

#define PWM_CAPIEN_CAPRIENn_Pos   (0)

PWM_T::CAPIEN: CAPRIENn Position

Definition at line 7188 of file M471M_R1_S.h.

◆ PWM_CAPIF_CFLIF0_Msk

#define PWM_CAPIF_CFLIF0_Msk   (0x1ul << PWM_CAPIF_CFLIF0_Pos)

PWM_T::CAPIF: CFLIF0 Mask

Definition at line 7255 of file M471M_R1_S.h.

◆ PWM_CAPIF_CFLIF0_Pos

#define PWM_CAPIF_CFLIF0_Pos   (8)

PWM_T::CAPIF: CFLIF0 Position

Definition at line 7254 of file M471M_R1_S.h.

◆ PWM_CAPIF_CFLIF1_Msk

#define PWM_CAPIF_CFLIF1_Msk   (0x1ul << PWM_CAPIF_CFLIF1_Pos)

PWM_T::CAPIF: CFLIF1 Mask

Definition at line 7258 of file M471M_R1_S.h.

◆ PWM_CAPIF_CFLIF1_Pos

#define PWM_CAPIF_CFLIF1_Pos   (9)

PWM_T::CAPIF: CFLIF1 Position

Definition at line 7257 of file M471M_R1_S.h.

◆ PWM_CAPIF_CFLIF2_Msk

#define PWM_CAPIF_CFLIF2_Msk   (0x1ul << PWM_CAPIF_CFLIF2_Pos)

PWM_T::CAPIF: CFLIF2 Mask

Definition at line 7261 of file M471M_R1_S.h.

◆ PWM_CAPIF_CFLIF2_Pos

#define PWM_CAPIF_CFLIF2_Pos   (10)

PWM_T::CAPIF: CFLIF2 Position

Definition at line 7260 of file M471M_R1_S.h.

◆ PWM_CAPIF_CFLIF3_Msk

#define PWM_CAPIF_CFLIF3_Msk   (0x1ul << PWM_CAPIF_CFLIF3_Pos)

PWM_T::CAPIF: CFLIF3 Mask

Definition at line 7264 of file M471M_R1_S.h.

◆ PWM_CAPIF_CFLIF3_Pos

#define PWM_CAPIF_CFLIF3_Pos   (11)

PWM_T::CAPIF: CFLIF3 Position

Definition at line 7263 of file M471M_R1_S.h.

◆ PWM_CAPIF_CFLIF4_Msk

#define PWM_CAPIF_CFLIF4_Msk   (0x1ul << PWM_CAPIF_CFLIF4_Pos)

PWM_T::CAPIF: CFLIF4 Mask

Definition at line 7267 of file M471M_R1_S.h.

◆ PWM_CAPIF_CFLIF4_Pos

#define PWM_CAPIF_CFLIF4_Pos   (12)

PWM_T::CAPIF: CFLIF4 Position

Definition at line 7266 of file M471M_R1_S.h.

◆ PWM_CAPIF_CFLIF5_Msk

#define PWM_CAPIF_CFLIF5_Msk   (0x1ul << PWM_CAPIF_CFLIF5_Pos)

PWM_T::CAPIF: CFLIF5 Mask

Definition at line 7270 of file M471M_R1_S.h.

◆ PWM_CAPIF_CFLIF5_Pos

#define PWM_CAPIF_CFLIF5_Pos   (13)

PWM_T::CAPIF: CFLIF5 Position

Definition at line 7269 of file M471M_R1_S.h.

◆ PWM_CAPIF_CFLIFn_Msk

#define PWM_CAPIF_CFLIFn_Msk   (0x3ful << PWM_CAPIF_CFLIFn_Pos)

PWM_T::CAPIF: CFLIFn Mask

Definition at line 7252 of file M471M_R1_S.h.

◆ PWM_CAPIF_CFLIFn_Pos

#define PWM_CAPIF_CFLIFn_Pos   (8)

PWM_T::CAPIF: CFLIFn Position

Definition at line 7251 of file M471M_R1_S.h.

◆ PWM_CAPIF_CRLIF0_Msk

#define PWM_CAPIF_CRLIF0_Msk   (0x1ul << PWM_CAPIF_CRLIF0_Pos)

PWM_T::CAPIF: CRLIF0 Mask

Definition at line 7234 of file M471M_R1_S.h.

◆ PWM_CAPIF_CRLIF0_Pos

#define PWM_CAPIF_CRLIF0_Pos   (0)

PWM_T::CAPIF: CRLIF0 Position

Definition at line 7233 of file M471M_R1_S.h.

◆ PWM_CAPIF_CRLIF1_Msk

#define PWM_CAPIF_CRLIF1_Msk   (0x1ul << PWM_CAPIF_CRLIF1_Pos)

PWM_T::CAPIF: CRLIF1 Mask

Definition at line 7237 of file M471M_R1_S.h.

◆ PWM_CAPIF_CRLIF1_Pos

#define PWM_CAPIF_CRLIF1_Pos   (1)

PWM_T::CAPIF: CRLIF1 Position

Definition at line 7236 of file M471M_R1_S.h.

◆ PWM_CAPIF_CRLIF2_Msk

#define PWM_CAPIF_CRLIF2_Msk   (0x1ul << PWM_CAPIF_CRLIF2_Pos)

PWM_T::CAPIF: CRLIF2 Mask

Definition at line 7240 of file M471M_R1_S.h.

◆ PWM_CAPIF_CRLIF2_Pos

#define PWM_CAPIF_CRLIF2_Pos   (2)

PWM_T::CAPIF: CRLIF2 Position

Definition at line 7239 of file M471M_R1_S.h.

◆ PWM_CAPIF_CRLIF3_Msk

#define PWM_CAPIF_CRLIF3_Msk   (0x1ul << PWM_CAPIF_CRLIF3_Pos)

PWM_T::CAPIF: CRLIF3 Mask

Definition at line 7243 of file M471M_R1_S.h.

◆ PWM_CAPIF_CRLIF3_Pos

#define PWM_CAPIF_CRLIF3_Pos   (3)

PWM_T::CAPIF: CRLIF3 Position

Definition at line 7242 of file M471M_R1_S.h.

◆ PWM_CAPIF_CRLIF4_Msk

#define PWM_CAPIF_CRLIF4_Msk   (0x1ul << PWM_CAPIF_CRLIF4_Pos)

PWM_T::CAPIF: CRLIF4 Mask

Definition at line 7246 of file M471M_R1_S.h.

◆ PWM_CAPIF_CRLIF4_Pos

#define PWM_CAPIF_CRLIF4_Pos   (4)

PWM_T::CAPIF: CRLIF4 Position

Definition at line 7245 of file M471M_R1_S.h.

◆ PWM_CAPIF_CRLIF5_Msk

#define PWM_CAPIF_CRLIF5_Msk   (0x1ul << PWM_CAPIF_CRLIF5_Pos)

PWM_T::CAPIF: CRLIF5 Mask

Definition at line 7249 of file M471M_R1_S.h.

◆ PWM_CAPIF_CRLIF5_Pos

#define PWM_CAPIF_CRLIF5_Pos   (5)

PWM_T::CAPIF: CRLIF5 Position

Definition at line 7248 of file M471M_R1_S.h.

◆ PWM_CAPIF_CRLIFn_Msk

#define PWM_CAPIF_CRLIFn_Msk   (0x3ful << PWM_CAPIF_CRLIFn_Pos)

PWM_T::CAPIF: CRLIFn Mask

Definition at line 7231 of file M471M_R1_S.h.

◆ PWM_CAPIF_CRLIFn_Pos

#define PWM_CAPIF_CRLIFn_Pos   (0)

PWM_T::CAPIF: CRLIFn Position

Definition at line 7230 of file M471M_R1_S.h.

◆ PWM_CAPINEN_CAPINEN0_Msk

#define PWM_CAPINEN_CAPINEN0_Msk   (0x1ul << PWM_CAPINEN_CAPINEN0_Pos)

PWM_T::CAPINEN: CAPINEN0 Mask

Definition at line 6964 of file M471M_R1_S.h.

◆ PWM_CAPINEN_CAPINEN0_Pos

#define PWM_CAPINEN_CAPINEN0_Pos   (0)

PWM_T::CAPINEN: CAPINEN0 Position

Definition at line 6963 of file M471M_R1_S.h.

◆ PWM_CAPINEN_CAPINEN1_Msk

#define PWM_CAPINEN_CAPINEN1_Msk   (0x1ul << PWM_CAPINEN_CAPINEN1_Pos)

PWM_T::CAPINEN: CAPINEN1 Mask

Definition at line 6967 of file M471M_R1_S.h.

◆ PWM_CAPINEN_CAPINEN1_Pos

#define PWM_CAPINEN_CAPINEN1_Pos   (1)

PWM_T::CAPINEN: CAPINEN1 Position

Definition at line 6966 of file M471M_R1_S.h.

◆ PWM_CAPINEN_CAPINEN2_Msk

#define PWM_CAPINEN_CAPINEN2_Msk   (0x1ul << PWM_CAPINEN_CAPINEN2_Pos)

PWM_T::CAPINEN: CAPINEN2 Mask

Definition at line 6970 of file M471M_R1_S.h.

◆ PWM_CAPINEN_CAPINEN2_Pos

#define PWM_CAPINEN_CAPINEN2_Pos   (2)

PWM_T::CAPINEN: CAPINEN2 Position

Definition at line 6969 of file M471M_R1_S.h.

◆ PWM_CAPINEN_CAPINEN3_Msk

#define PWM_CAPINEN_CAPINEN3_Msk   (0x1ul << PWM_CAPINEN_CAPINEN3_Pos)

PWM_T::CAPINEN: CAPINEN3 Mask

Definition at line 6973 of file M471M_R1_S.h.

◆ PWM_CAPINEN_CAPINEN3_Pos

#define PWM_CAPINEN_CAPINEN3_Pos   (3)

PWM_T::CAPINEN: CAPINEN3 Position

Definition at line 6972 of file M471M_R1_S.h.

◆ PWM_CAPINEN_CAPINEN4_Msk

#define PWM_CAPINEN_CAPINEN4_Msk   (0x1ul << PWM_CAPINEN_CAPINEN4_Pos)

PWM_T::CAPINEN: CAPINEN4 Mask

Definition at line 6976 of file M471M_R1_S.h.

◆ PWM_CAPINEN_CAPINEN4_Pos

#define PWM_CAPINEN_CAPINEN4_Pos   (4)

PWM_T::CAPINEN: CAPINEN4 Position

Definition at line 6975 of file M471M_R1_S.h.

◆ PWM_CAPINEN_CAPINEN5_Msk

#define PWM_CAPINEN_CAPINEN5_Msk   (0x1ul << PWM_CAPINEN_CAPINEN5_Pos)

PWM_T::CAPINEN: CAPINEN5 Mask

Definition at line 6979 of file M471M_R1_S.h.

◆ PWM_CAPINEN_CAPINEN5_Pos

#define PWM_CAPINEN_CAPINEN5_Pos   (5)

PWM_T::CAPINEN: CAPINEN5 Position

Definition at line 6978 of file M471M_R1_S.h.

◆ PWM_CAPINEN_CAPINENn_Msk

#define PWM_CAPINEN_CAPINENn_Msk   (0x3ful << PWM_CAPINEN_CAPINENn_Pos)

PWM_T::CAPINEN: CAPINENn Mask

Definition at line 6961 of file M471M_R1_S.h.

◆ PWM_CAPINEN_CAPINENn_Pos

#define PWM_CAPINEN_CAPINENn_Pos   (0)

PWM_T::CAPINEN: CAPINENn Position

Definition at line 6960 of file M471M_R1_S.h.

◆ PWM_CAPSTS_CFLIFOV0_Msk

#define PWM_CAPSTS_CFLIFOV0_Msk   (0x1ul << PWM_CAPSTS_CFLIFOV0_Pos)

PWM_T::CAPSTS: CFLIFOV0 Mask

Definition at line 7090 of file M471M_R1_S.h.

◆ PWM_CAPSTS_CFLIFOV0_Pos

#define PWM_CAPSTS_CFLIFOV0_Pos   (8)

PWM_T::CAPSTS: CFLIFOV0 Position

Definition at line 7089 of file M471M_R1_S.h.

◆ PWM_CAPSTS_CFLIFOV1_Msk

#define PWM_CAPSTS_CFLIFOV1_Msk   (0x1ul << PWM_CAPSTS_CFLIFOV1_Pos)

PWM_T::CAPSTS: CFLIFOV1 Mask

Definition at line 7093 of file M471M_R1_S.h.

◆ PWM_CAPSTS_CFLIFOV1_Pos

#define PWM_CAPSTS_CFLIFOV1_Pos   (9)

PWM_T::CAPSTS: CFLIFOV1 Position

Definition at line 7092 of file M471M_R1_S.h.

◆ PWM_CAPSTS_CFLIFOV2_Msk

#define PWM_CAPSTS_CFLIFOV2_Msk   (0x1ul << PWM_CAPSTS_CFLIFOV2_Pos)

PWM_T::CAPSTS: CFLIFOV2 Mask

Definition at line 7096 of file M471M_R1_S.h.

◆ PWM_CAPSTS_CFLIFOV2_Pos

#define PWM_CAPSTS_CFLIFOV2_Pos   (10)

PWM_T::CAPSTS: CFLIFOV2 Position

Definition at line 7095 of file M471M_R1_S.h.

◆ PWM_CAPSTS_CFLIFOV3_Msk

#define PWM_CAPSTS_CFLIFOV3_Msk   (0x1ul << PWM_CAPSTS_CFLIFOV3_Pos)

PWM_T::CAPSTS: CFLIFOV3 Mask

Definition at line 7099 of file M471M_R1_S.h.

◆ PWM_CAPSTS_CFLIFOV3_Pos

#define PWM_CAPSTS_CFLIFOV3_Pos   (11)

PWM_T::CAPSTS: CFLIFOV3 Position

Definition at line 7098 of file M471M_R1_S.h.

◆ PWM_CAPSTS_CFLIFOV4_Msk

#define PWM_CAPSTS_CFLIFOV4_Msk   (0x1ul << PWM_CAPSTS_CFLIFOV4_Pos)

PWM_T::CAPSTS: CFLIFOV4 Mask

Definition at line 7102 of file M471M_R1_S.h.

◆ PWM_CAPSTS_CFLIFOV4_Pos

#define PWM_CAPSTS_CFLIFOV4_Pos   (12)

PWM_T::CAPSTS: CFLIFOV4 Position

Definition at line 7101 of file M471M_R1_S.h.

◆ PWM_CAPSTS_CFLIFOV5_Msk

#define PWM_CAPSTS_CFLIFOV5_Msk   (0x1ul << PWM_CAPSTS_CFLIFOV5_Pos)

PWM_T::CAPSTS: CFLIFOV5 Mask

Definition at line 7105 of file M471M_R1_S.h.

◆ PWM_CAPSTS_CFLIFOV5_Pos

#define PWM_CAPSTS_CFLIFOV5_Pos   (13)

PWM_T::CAPSTS: CFLIFOV5 Position

Definition at line 7104 of file M471M_R1_S.h.

◆ PWM_CAPSTS_CFLIFOVn_Msk

#define PWM_CAPSTS_CFLIFOVn_Msk   (0x3ful << PWM_CAPSTS_CFLIFOVn_Pos)

PWM_T::CAPSTS: CFLIFOVn Mask

Definition at line 7087 of file M471M_R1_S.h.

◆ PWM_CAPSTS_CFLIFOVn_Pos

#define PWM_CAPSTS_CFLIFOVn_Pos   (8)

PWM_T::CAPSTS: CFLIFOVn Position

Definition at line 7086 of file M471M_R1_S.h.

◆ PWM_CAPSTS_CRLIFOV0_Msk

#define PWM_CAPSTS_CRLIFOV0_Msk   (0x1ul << PWM_CAPSTS_CRLIFOV0_Pos)

PWM_T::CAPSTS: CRLIFOV0 Mask

Definition at line 7069 of file M471M_R1_S.h.

◆ PWM_CAPSTS_CRLIFOV0_Pos

#define PWM_CAPSTS_CRLIFOV0_Pos   (0)

PWM_T::CAPSTS: CRLIFOV0 Position

Definition at line 7068 of file M471M_R1_S.h.

◆ PWM_CAPSTS_CRLIFOV1_Msk

#define PWM_CAPSTS_CRLIFOV1_Msk   (0x1ul << PWM_CAPSTS_CRLIFOV1_Pos)

PWM_T::CAPSTS: CRLIFOV1 Mask

Definition at line 7072 of file M471M_R1_S.h.

◆ PWM_CAPSTS_CRLIFOV1_Pos

#define PWM_CAPSTS_CRLIFOV1_Pos   (1)

PWM_T::CAPSTS: CRLIFOV1 Position

Definition at line 7071 of file M471M_R1_S.h.

◆ PWM_CAPSTS_CRLIFOV2_Msk

#define PWM_CAPSTS_CRLIFOV2_Msk   (0x1ul << PWM_CAPSTS_CRLIFOV2_Pos)

PWM_T::CAPSTS: CRLIFOV2 Mask

Definition at line 7075 of file M471M_R1_S.h.

◆ PWM_CAPSTS_CRLIFOV2_Pos

#define PWM_CAPSTS_CRLIFOV2_Pos   (2)

PWM_T::CAPSTS: CRLIFOV2 Position

Definition at line 7074 of file M471M_R1_S.h.

◆ PWM_CAPSTS_CRLIFOV3_Msk

#define PWM_CAPSTS_CRLIFOV3_Msk   (0x1ul << PWM_CAPSTS_CRLIFOV3_Pos)

PWM_T::CAPSTS: CRLIFOV3 Mask

Definition at line 7078 of file M471M_R1_S.h.

◆ PWM_CAPSTS_CRLIFOV3_Pos

#define PWM_CAPSTS_CRLIFOV3_Pos   (3)

PWM_T::CAPSTS: CRLIFOV3 Position

Definition at line 7077 of file M471M_R1_S.h.

◆ PWM_CAPSTS_CRLIFOV4_Msk

#define PWM_CAPSTS_CRLIFOV4_Msk   (0x1ul << PWM_CAPSTS_CRLIFOV4_Pos)

PWM_T::CAPSTS: CRLIFOV4 Mask

Definition at line 7081 of file M471M_R1_S.h.

◆ PWM_CAPSTS_CRLIFOV4_Pos

#define PWM_CAPSTS_CRLIFOV4_Pos   (4)

PWM_T::CAPSTS: CRLIFOV4 Position

Definition at line 7080 of file M471M_R1_S.h.

◆ PWM_CAPSTS_CRLIFOV5_Msk

#define PWM_CAPSTS_CRLIFOV5_Msk   (0x1ul << PWM_CAPSTS_CRLIFOV5_Pos)

PWM_T::CAPSTS: CRLIFOV5 Mask

Definition at line 7084 of file M471M_R1_S.h.

◆ PWM_CAPSTS_CRLIFOV5_Pos

#define PWM_CAPSTS_CRLIFOV5_Pos   (5)

PWM_T::CAPSTS: CRLIFOV5 Position

Definition at line 7083 of file M471M_R1_S.h.

◆ PWM_CAPSTS_CRLIFOVn_Msk

#define PWM_CAPSTS_CRLIFOVn_Msk   (0x3ful << PWM_CAPSTS_CRLIFOVn_Pos)

PWM_T::CAPSTS: CRLIFOVn Mask

Definition at line 7066 of file M471M_R1_S.h.

◆ PWM_CAPSTS_CRLIFOVn_Pos

#define PWM_CAPSTS_CRLIFOVn_Pos   (0)

PWM_T::CAPSTS: CRLIFOVn Position

Definition at line 7065 of file M471M_R1_S.h.

◆ PWM_CLKPSC0_1_CLKPSC_Msk

#define PWM_CLKPSC0_1_CLKPSC_Msk   (0xffful << PWM_CLKPSC0_1_CLKPSC_Pos)

PWM_T::CLKPSC0_1: CLKPSC Mask

Definition at line 6106 of file M471M_R1_S.h.

◆ PWM_CLKPSC0_1_CLKPSC_Pos

#define PWM_CLKPSC0_1_CLKPSC_Pos   (0)

PWM_T::CLKPSC0_1: CLKPSC Position

Definition at line 6105 of file M471M_R1_S.h.

◆ PWM_CLKPSC2_3_CLKPSC_Msk

#define PWM_CLKPSC2_3_CLKPSC_Msk   (0xffful << PWM_CLKPSC2_3_CLKPSC_Pos)

PWM_T::CLKPSC2_3: CLKPSC Mask

Definition at line 6109 of file M471M_R1_S.h.

◆ PWM_CLKPSC2_3_CLKPSC_Pos

#define PWM_CLKPSC2_3_CLKPSC_Pos   (0)

PWM_T::CLKPSC2_3: CLKPSC Position

Definition at line 6108 of file M471M_R1_S.h.

◆ PWM_CLKPSC4_5_CLKPSC_Msk

#define PWM_CLKPSC4_5_CLKPSC_Msk   (0xffful << PWM_CLKPSC4_5_CLKPSC_Pos)

PWM_T::CLKPSC4_5: CLKPSC Mask

Definition at line 6112 of file M471M_R1_S.h.

◆ PWM_CLKPSC4_5_CLKPSC_Pos

#define PWM_CLKPSC4_5_CLKPSC_Pos   (0)

PWM_T::CLKPSC4_5: CLKPSC Position

Definition at line 6111 of file M471M_R1_S.h.

◆ PWM_CLKSRC_ECLKSRC0_Msk

#define PWM_CLKSRC_ECLKSRC0_Msk   (0x7ul << PWM_CLKSRC_ECLKSRC0_Pos)

PWM_T::CLKSRC: ECLKSRC0 Mask

Definition at line 6097 of file M471M_R1_S.h.

◆ PWM_CLKSRC_ECLKSRC0_Pos

#define PWM_CLKSRC_ECLKSRC0_Pos   (0)

PWM_T::CLKSRC: ECLKSRC0 Position

Definition at line 6096 of file M471M_R1_S.h.

◆ PWM_CLKSRC_ECLKSRC2_Msk

#define PWM_CLKSRC_ECLKSRC2_Msk   (0x7ul << PWM_CLKSRC_ECLKSRC2_Pos)

PWM_T::CLKSRC: ECLKSRC2 Mask

Definition at line 6100 of file M471M_R1_S.h.

◆ PWM_CLKSRC_ECLKSRC2_Pos

#define PWM_CLKSRC_ECLKSRC2_Pos   (8)

PWM_T::CLKSRC: ECLKSRC2 Position

Definition at line 6099 of file M471M_R1_S.h.

◆ PWM_CLKSRC_ECLKSRC4_Msk

#define PWM_CLKSRC_ECLKSRC4_Msk   (0x7ul << PWM_CLKSRC_ECLKSRC4_Pos)

PWM_T::CLKSRC: ECLKSRC4 Mask

Definition at line 6103 of file M471M_R1_S.h.

◆ PWM_CLKSRC_ECLKSRC4_Pos

#define PWM_CLKSRC_ECLKSRC4_Pos   (16)

PWM_T::CLKSRC: ECLKSRC4 Position

Definition at line 6102 of file M471M_R1_S.h.

◆ PWM_CMPBUF_CMPBUF_Msk

#define PWM_CMPBUF_CMPBUF_Msk   (0xfffful << PWM_CMPBUF_CMPBUF_Pos)

PWM_T::CMPBUF: CMPBUF Mask

Definition at line 7276 of file M471M_R1_S.h.

◆ PWM_CMPBUF_CMPBUF_Pos

#define PWM_CMPBUF_CMPBUF_Pos   (0)

PWM_T::CMPBUF: CMPBUF Position

Definition at line 7275 of file M471M_R1_S.h.

◆ PWM_CMPDAT_CMP_Msk

#define PWM_CMPDAT_CMP_Msk   (0xfffful << PWM_CMPDAT_CMP_Pos)

PWM_T::CMPDAT: CMP Mask

Definition at line 6181 of file M471M_R1_S.h.

◆ PWM_CMPDAT_CMP_Pos

#define PWM_CMPDAT_CMP_Pos   (0)

PWM_T::CMPDAT: CMP Position

Definition at line 6180 of file M471M_R1_S.h.

◆ PWM_CNT_CNT_Msk

#define PWM_CNT_CNT_Msk   (0xfffful << PWM_CNT_CNT_Pos)

PWM_T::CNT: CNT Mask

Definition at line 6220 of file M471M_R1_S.h.

◆ PWM_CNT_CNT_Pos

#define PWM_CNT_CNT_Pos   (0)

PWM_T::CNT: CNT Position

Definition at line 6219 of file M471M_R1_S.h.

◆ PWM_CNT_DIRF_Msk

#define PWM_CNT_DIRF_Msk   (0x1ul << PWM_CNT_DIRF_Pos)

PWM_T::CNT: DIRF Mask

Definition at line 6223 of file M471M_R1_S.h.

◆ PWM_CNT_DIRF_Pos

#define PWM_CNT_DIRF_Pos   (16)

PWM_T::CNT: DIRF Position

Definition at line 6222 of file M471M_R1_S.h.

◆ PWM_CNTCLR_CNTCLR0_Msk

#define PWM_CNTCLR_CNTCLR0_Msk   (0x1ul << PWM_CNTCLR_CNTCLR0_Pos)

PWM_T::CNTCLR: CNTCLR0 Mask

Definition at line 6139 of file M471M_R1_S.h.

◆ PWM_CNTCLR_CNTCLR0_Pos

#define PWM_CNTCLR_CNTCLR0_Pos   (0)

PWM_T::CNTCLR: CNTCLR0 Position

Definition at line 6138 of file M471M_R1_S.h.

◆ PWM_CNTCLR_CNTCLR1_Msk

#define PWM_CNTCLR_CNTCLR1_Msk   (0x1ul << PWM_CNTCLR_CNTCLR1_Pos)

PWM_T::CNTCLR: CNTCLR1 Mask

Definition at line 6142 of file M471M_R1_S.h.

◆ PWM_CNTCLR_CNTCLR1_Pos

#define PWM_CNTCLR_CNTCLR1_Pos   (1)

PWM_T::CNTCLR: CNTCLR1 Position

Definition at line 6141 of file M471M_R1_S.h.

◆ PWM_CNTCLR_CNTCLR2_Msk

#define PWM_CNTCLR_CNTCLR2_Msk   (0x1ul << PWM_CNTCLR_CNTCLR2_Pos)

PWM_T::CNTCLR: CNTCLR2 Mask

Definition at line 6145 of file M471M_R1_S.h.

◆ PWM_CNTCLR_CNTCLR2_Pos

#define PWM_CNTCLR_CNTCLR2_Pos   (2)

PWM_T::CNTCLR: CNTCLR2 Position

Definition at line 6144 of file M471M_R1_S.h.

◆ PWM_CNTCLR_CNTCLR3_Msk

#define PWM_CNTCLR_CNTCLR3_Msk   (0x1ul << PWM_CNTCLR_CNTCLR3_Pos)

PWM_T::CNTCLR: CNTCLR3 Mask

Definition at line 6148 of file M471M_R1_S.h.

◆ PWM_CNTCLR_CNTCLR3_Pos

#define PWM_CNTCLR_CNTCLR3_Pos   (3)

PWM_T::CNTCLR: CNTCLR3 Position

Definition at line 6147 of file M471M_R1_S.h.

◆ PWM_CNTCLR_CNTCLR4_Msk

#define PWM_CNTCLR_CNTCLR4_Msk   (0x1ul << PWM_CNTCLR_CNTCLR4_Pos)

PWM_T::CNTCLR: CNTCLR4 Mask

Definition at line 6151 of file M471M_R1_S.h.

◆ PWM_CNTCLR_CNTCLR4_Pos

#define PWM_CNTCLR_CNTCLR4_Pos   (4)

PWM_T::CNTCLR: CNTCLR4 Position

Definition at line 6150 of file M471M_R1_S.h.

◆ PWM_CNTCLR_CNTCLR5_Msk

#define PWM_CNTCLR_CNTCLR5_Msk   (0x1ul << PWM_CNTCLR_CNTCLR5_Pos)

PWM_T::CNTCLR: CNTCLR5 Mask

Definition at line 6154 of file M471M_R1_S.h.

◆ PWM_CNTCLR_CNTCLR5_Pos

#define PWM_CNTCLR_CNTCLR5_Pos   (5)

PWM_T::CNTCLR: CNTCLR5 Position

Definition at line 6153 of file M471M_R1_S.h.

◆ PWM_CNTCLR_CNTCLRn_Msk

#define PWM_CNTCLR_CNTCLRn_Msk   (0x3ful << PWM_CNTCLR_CNTCLRn_Pos)

PWM_T::CNTCLR: CNTCLRn Mask

Definition at line 6136 of file M471M_R1_S.h.

◆ PWM_CNTCLR_CNTCLRn_Pos

#define PWM_CNTCLR_CNTCLRn_Pos   (0)

PWM_T::CNTCLR: CNTCLRn Position

Definition at line 6135 of file M471M_R1_S.h.

◆ PWM_CNTEN_CNTEN0_Msk

#define PWM_CNTEN_CNTEN0_Msk   (0x1ul << PWM_CNTEN_CNTEN0_Pos)

PWM_T::CNTEN: CNTEN0 Mask

Definition at line 6118 of file M471M_R1_S.h.

◆ PWM_CNTEN_CNTEN0_Pos

#define PWM_CNTEN_CNTEN0_Pos   (0)

PWM_T::CNTEN: CNTEN0 Position

Definition at line 6117 of file M471M_R1_S.h.

◆ PWM_CNTEN_CNTEN1_Msk

#define PWM_CNTEN_CNTEN1_Msk   (0x1ul << PWM_CNTEN_CNTEN1_Pos)

PWM_T::CNTEN: CNTEN1 Mask

Definition at line 6121 of file M471M_R1_S.h.

◆ PWM_CNTEN_CNTEN1_Pos

#define PWM_CNTEN_CNTEN1_Pos   (1)

PWM_T::CNTEN: CNTEN1 Position

Definition at line 6120 of file M471M_R1_S.h.

◆ PWM_CNTEN_CNTEN2_Msk

#define PWM_CNTEN_CNTEN2_Msk   (0x1ul << PWM_CNTEN_CNTEN2_Pos)

PWM_T::CNTEN: CNTEN2 Mask

Definition at line 6124 of file M471M_R1_S.h.

◆ PWM_CNTEN_CNTEN2_Pos

#define PWM_CNTEN_CNTEN2_Pos   (2)

PWM_T::CNTEN: CNTEN2 Position

Definition at line 6123 of file M471M_R1_S.h.

◆ PWM_CNTEN_CNTEN3_Msk

#define PWM_CNTEN_CNTEN3_Msk   (0x1ul << PWM_CNTEN_CNTEN3_Pos)

PWM_T::CNTEN: CNTEN3 Mask

Definition at line 6127 of file M471M_R1_S.h.

◆ PWM_CNTEN_CNTEN3_Pos

#define PWM_CNTEN_CNTEN3_Pos   (3)

PWM_T::CNTEN: CNTEN3 Position

Definition at line 6126 of file M471M_R1_S.h.

◆ PWM_CNTEN_CNTEN4_Msk

#define PWM_CNTEN_CNTEN4_Msk   (0x1ul << PWM_CNTEN_CNTEN4_Pos)

PWM_T::CNTEN: CNTEN4 Mask

Definition at line 6130 of file M471M_R1_S.h.

◆ PWM_CNTEN_CNTEN4_Pos

#define PWM_CNTEN_CNTEN4_Pos   (4)

PWM_T::CNTEN: CNTEN4 Position

Definition at line 6129 of file M471M_R1_S.h.

◆ PWM_CNTEN_CNTEN5_Msk

#define PWM_CNTEN_CNTEN5_Msk   (0x1ul << PWM_CNTEN_CNTEN5_Pos)

PWM_T::CNTEN: CNTEN5 Mask

Definition at line 6133 of file M471M_R1_S.h.

◆ PWM_CNTEN_CNTEN5_Pos

#define PWM_CNTEN_CNTEN5_Pos   (5)

PWM_T::CNTEN: CNTEN5 Position

Definition at line 6132 of file M471M_R1_S.h.

◆ PWM_CNTEN_CNTENn_Msk

#define PWM_CNTEN_CNTENn_Msk   (0x3ful << PWM_CNTEN_CNTENn_Pos)

PWM_T::CNTEN: CNTENn Mask

Definition at line 6115 of file M471M_R1_S.h.

◆ PWM_CNTEN_CNTENn_Pos

#define PWM_CNTEN_CNTENn_Pos   (0)

PWM_T::CNTEN: CNTENn Position

Definition at line 6114 of file M471M_R1_S.h.

◆ PWM_CTL0_CTRLD0_Msk

#define PWM_CTL0_CTRLD0_Msk   (0x1ul << PWM_CTL0_CTRLD0_Pos)

PWM_T::CTL0: CTRLD0 Mask

Definition at line 5914 of file M471M_R1_S.h.

◆ PWM_CTL0_CTRLD0_Pos

#define PWM_CTL0_CTRLD0_Pos   (0)

PWM_T::CTL0: CTRLD0 Position

Definition at line 5913 of file M471M_R1_S.h.

◆ PWM_CTL0_CTRLD1_Msk

#define PWM_CTL0_CTRLD1_Msk   (0x1ul << PWM_CTL0_CTRLD1_Pos)

PWM_T::CTL0: CTRLD1 Mask

Definition at line 5917 of file M471M_R1_S.h.

◆ PWM_CTL0_CTRLD1_Pos

#define PWM_CTL0_CTRLD1_Pos   (1)

PWM_T::CTL0: CTRLD1 Position

Definition at line 5916 of file M471M_R1_S.h.

◆ PWM_CTL0_CTRLD2_Msk

#define PWM_CTL0_CTRLD2_Msk   (0x1ul << PWM_CTL0_CTRLD2_Pos)

PWM_T::CTL0: CTRLD2 Mask

Definition at line 5920 of file M471M_R1_S.h.

◆ PWM_CTL0_CTRLD2_Pos

#define PWM_CTL0_CTRLD2_Pos   (2)

PWM_T::CTL0: CTRLD2 Position

Definition at line 5919 of file M471M_R1_S.h.

◆ PWM_CTL0_CTRLD3_Msk

#define PWM_CTL0_CTRLD3_Msk   (0x1ul << PWM_CTL0_CTRLD3_Pos)

PWM_T::CTL0: CTRLD3 Mask

Definition at line 5923 of file M471M_R1_S.h.

◆ PWM_CTL0_CTRLD3_Pos

#define PWM_CTL0_CTRLD3_Pos   (3)

PWM_T::CTL0: CTRLD3 Position

Definition at line 5922 of file M471M_R1_S.h.

◆ PWM_CTL0_CTRLD4_Msk

#define PWM_CTL0_CTRLD4_Msk   (0x1ul << PWM_CTL0_CTRLD4_Pos)

PWM_T::CTL0: CTRLD4 Mask

Definition at line 5926 of file M471M_R1_S.h.

◆ PWM_CTL0_CTRLD4_Pos

#define PWM_CTL0_CTRLD4_Pos   (4)

PWM_T::CTL0: CTRLD4 Position

Definition at line 5925 of file M471M_R1_S.h.

◆ PWM_CTL0_CTRLD5_Msk

#define PWM_CTL0_CTRLD5_Msk   (0x1ul << PWM_CTL0_CTRLD5_Pos)

PWM_T::CTL0: CTRLD5 Mask

Definition at line 5929 of file M471M_R1_S.h.

◆ PWM_CTL0_CTRLD5_Pos

#define PWM_CTL0_CTRLD5_Pos   (5)

PWM_T::CTL0: CTRLD5 Position

Definition at line 5928 of file M471M_R1_S.h.

◆ PWM_CTL0_CTRLDn_Msk

#define PWM_CTL0_CTRLDn_Msk   (0x3ful << PWM_CTL0_CTRLDn_Pos)

PWM_T::CTL0: CTRLDn Mask

Definition at line 5911 of file M471M_R1_S.h.

◆ PWM_CTL0_CTRLDn_Pos

#define PWM_CTL0_CTRLDn_Pos   (0)
@addtogroup PWM_CONST PWM Bit Field Definition
Constant Definitions for PWM Controller

PWM_T::CTL0: CTRLDn Position

Definition at line 5910 of file M471M_R1_S.h.

◆ PWM_CTL0_DBGHALT_Msk

#define PWM_CTL0_DBGHALT_Msk   (0x1ul << PWM_CTL0_DBGHALT_Pos)

PWM_T::CTL0: DBGHALT Mask

Definition at line 5977 of file M471M_R1_S.h.

◆ PWM_CTL0_DBGHALT_Pos

#define PWM_CTL0_DBGHALT_Pos   (30)

PWM_T::CTL0: DBGHALT Position

Definition at line 5976 of file M471M_R1_S.h.

◆ PWM_CTL0_DBGTRIOFF_Msk

#define PWM_CTL0_DBGTRIOFF_Msk   (0x1ul << PWM_CTL0_DBGTRIOFF_Pos)

PWM_T::CTL0: DBGTRIOFF Mask

Definition at line 5980 of file M471M_R1_S.h.

◆ PWM_CTL0_DBGTRIOFF_Pos

#define PWM_CTL0_DBGTRIOFF_Pos   (31)

PWM_T::CTL0: DBGTRIOFF Position

Definition at line 5979 of file M471M_R1_S.h.

◆ PWM_CTL0_GROUPEN_Msk

#define PWM_CTL0_GROUPEN_Msk   (0x1ul << PWM_CTL0_GROUPEN_Pos)

PWM_T::CTL0: GROUPEN Mask

Definition at line 5974 of file M471M_R1_S.h.

◆ PWM_CTL0_GROUPEN_Pos

#define PWM_CTL0_GROUPEN_Pos   (24)

PWM_T::CTL0: GROUPEN Position

Definition at line 5973 of file M471M_R1_S.h.

◆ PWM_CTL0_IMMLDEN0_Msk

#define PWM_CTL0_IMMLDEN0_Msk   (0x1ul << PWM_CTL0_IMMLDEN0_Pos)

PWM_T::CTL0: IMMLDEN0 Mask

Definition at line 5956 of file M471M_R1_S.h.

◆ PWM_CTL0_IMMLDEN0_Pos

#define PWM_CTL0_IMMLDEN0_Pos   (16)

PWM_T::CTL0: IMMLDEN0 Position

Definition at line 5955 of file M471M_R1_S.h.

◆ PWM_CTL0_IMMLDEN1_Msk

#define PWM_CTL0_IMMLDEN1_Msk   (0x1ul << PWM_CTL0_IMMLDEN1_Pos)

PWM_T::CTL0: IMMLDEN1 Mask

Definition at line 5959 of file M471M_R1_S.h.

◆ PWM_CTL0_IMMLDEN1_Pos

#define PWM_CTL0_IMMLDEN1_Pos   (17)

PWM_T::CTL0: IMMLDEN1 Position

Definition at line 5958 of file M471M_R1_S.h.

◆ PWM_CTL0_IMMLDEN2_Msk

#define PWM_CTL0_IMMLDEN2_Msk   (0x1ul << PWM_CTL0_IMMLDEN2_Pos)

PWM_T::CTL0: IMMLDEN2 Mask

Definition at line 5962 of file M471M_R1_S.h.

◆ PWM_CTL0_IMMLDEN2_Pos

#define PWM_CTL0_IMMLDEN2_Pos   (18)

PWM_T::CTL0: IMMLDEN2 Position

Definition at line 5961 of file M471M_R1_S.h.

◆ PWM_CTL0_IMMLDEN3_Msk

#define PWM_CTL0_IMMLDEN3_Msk   (0x1ul << PWM_CTL0_IMMLDEN3_Pos)

PWM_T::CTL0: IMMLDEN3 Mask

Definition at line 5965 of file M471M_R1_S.h.

◆ PWM_CTL0_IMMLDEN3_Pos

#define PWM_CTL0_IMMLDEN3_Pos   (19)

PWM_T::CTL0: IMMLDEN3 Position

Definition at line 5964 of file M471M_R1_S.h.

◆ PWM_CTL0_IMMLDEN4_Msk

#define PWM_CTL0_IMMLDEN4_Msk   (0x1ul << PWM_CTL0_IMMLDEN4_Pos)

PWM_T::CTL0: IMMLDEN4 Mask

Definition at line 5968 of file M471M_R1_S.h.

◆ PWM_CTL0_IMMLDEN4_Pos

#define PWM_CTL0_IMMLDEN4_Pos   (20)

PWM_T::CTL0: IMMLDEN4 Position

Definition at line 5967 of file M471M_R1_S.h.

◆ PWM_CTL0_IMMLDEN5_Msk

#define PWM_CTL0_IMMLDEN5_Msk   (0x1ul << PWM_CTL0_IMMLDEN5_Pos)

PWM_T::CTL0: IMMLDEN5 Mask

Definition at line 5971 of file M471M_R1_S.h.

◆ PWM_CTL0_IMMLDEN5_Pos

#define PWM_CTL0_IMMLDEN5_Pos   (21)

PWM_T::CTL0: IMMLDEN5 Position

Definition at line 5970 of file M471M_R1_S.h.

◆ PWM_CTL0_IMMLDENn_Msk

#define PWM_CTL0_IMMLDENn_Msk   (0x3ful << PWM_CTL0_IMMLDENn_Pos)

PWM_T::CTL0: IMMLDENn Mask

Definition at line 5953 of file M471M_R1_S.h.

◆ PWM_CTL0_IMMLDENn_Pos

#define PWM_CTL0_IMMLDENn_Pos   (16)

PWM_T::CTL0: IMMLDENn Position

Definition at line 5952 of file M471M_R1_S.h.

◆ PWM_CTL0_WINLDEN0_Msk

#define PWM_CTL0_WINLDEN0_Msk   (0x1ul << PWM_CTL0_WINLDEN0_Pos)

PWM_T::CTL0: WINLDEN0 Mask

Definition at line 5935 of file M471M_R1_S.h.

◆ PWM_CTL0_WINLDEN0_Pos

#define PWM_CTL0_WINLDEN0_Pos   (8)

PWM_T::CTL0: WINLDEN0 Position

Definition at line 5934 of file M471M_R1_S.h.

◆ PWM_CTL0_WINLDEN1_Msk

#define PWM_CTL0_WINLDEN1_Msk   (0x1ul << PWM_CTL0_WINLDEN1_Pos)

PWM_T::CTL0: WINLDEN1 Mask

Definition at line 5938 of file M471M_R1_S.h.

◆ PWM_CTL0_WINLDEN1_Pos

#define PWM_CTL0_WINLDEN1_Pos   (9)

PWM_T::CTL0: WINLDEN1 Position

Definition at line 5937 of file M471M_R1_S.h.

◆ PWM_CTL0_WINLDEN2_Msk

#define PWM_CTL0_WINLDEN2_Msk   (0x1ul << PWM_CTL0_WINLDEN2_Pos)

PWM_T::CTL0: WINLDEN2 Mask

Definition at line 5941 of file M471M_R1_S.h.

◆ PWM_CTL0_WINLDEN2_Pos

#define PWM_CTL0_WINLDEN2_Pos   (10)

PWM_T::CTL0: WINLDEN2 Position

Definition at line 5940 of file M471M_R1_S.h.

◆ PWM_CTL0_WINLDEN3_Msk

#define PWM_CTL0_WINLDEN3_Msk   (0x1ul << PWM_CTL0_WINLDEN3_Pos)

PWM_T::CTL0: WINLDEN3 Mask

Definition at line 5944 of file M471M_R1_S.h.

◆ PWM_CTL0_WINLDEN3_Pos

#define PWM_CTL0_WINLDEN3_Pos   (11)

PWM_T::CTL0: WINLDEN3 Position

Definition at line 5943 of file M471M_R1_S.h.

◆ PWM_CTL0_WINLDEN4_Msk

#define PWM_CTL0_WINLDEN4_Msk   (0x1ul << PWM_CTL0_WINLDEN4_Pos)

PWM_T::CTL0: WINLDEN4 Mask

Definition at line 5947 of file M471M_R1_S.h.

◆ PWM_CTL0_WINLDEN4_Pos

#define PWM_CTL0_WINLDEN4_Pos   (12)

PWM_T::CTL0: WINLDEN4 Position

Definition at line 5946 of file M471M_R1_S.h.

◆ PWM_CTL0_WINLDEN5_Msk

#define PWM_CTL0_WINLDEN5_Msk   (0x1ul << PWM_CTL0_WINLDEN5_Pos)

PWM_T::CTL0: WINLDEN5 Mask

Definition at line 5950 of file M471M_R1_S.h.

◆ PWM_CTL0_WINLDEN5_Pos

#define PWM_CTL0_WINLDEN5_Pos   (13)

PWM_T::CTL0: WINLDEN5 Position

Definition at line 5949 of file M471M_R1_S.h.

◆ PWM_CTL0_WINLDENn_Msk

#define PWM_CTL0_WINLDENn_Msk   (0x3ful << PWM_CTL0_WINLDENn_Pos)

PWM_T::CTL0: WINLDENn Mask

Definition at line 5932 of file M471M_R1_S.h.

◆ PWM_CTL0_WINLDENn_Pos

#define PWM_CTL0_WINLDENn_Pos   (8)

PWM_T::CTL0: WINLDENn Position

Definition at line 5931 of file M471M_R1_S.h.

◆ PWM_CTL1_CNTMODE0_Msk

#define PWM_CTL1_CNTMODE0_Msk   (0x1ul << PWM_CTL1_CNTMODE0_Pos)

PWM_T::CTL1: CNTMODE0 Mask

Definition at line 6007 of file M471M_R1_S.h.

◆ PWM_CTL1_CNTMODE0_Pos

#define PWM_CTL1_CNTMODE0_Pos   (16)

PWM_T::CTL1: CNTMODE0 Position

Definition at line 6006 of file M471M_R1_S.h.

◆ PWM_CTL1_CNTMODE1_Msk

#define PWM_CTL1_CNTMODE1_Msk   (0x1ul << PWM_CTL1_CNTMODE1_Pos)

PWM_T::CTL1: CNTMODE1 Mask

Definition at line 6010 of file M471M_R1_S.h.

◆ PWM_CTL1_CNTMODE1_Pos

#define PWM_CTL1_CNTMODE1_Pos   (17)

PWM_T::CTL1: CNTMODE1 Position

Definition at line 6009 of file M471M_R1_S.h.

◆ PWM_CTL1_CNTMODE2_Msk

#define PWM_CTL1_CNTMODE2_Msk   (0x1ul << PWM_CTL1_CNTMODE2_Pos)

PWM_T::CTL1: CNTMODE2 Mask

Definition at line 6013 of file M471M_R1_S.h.

◆ PWM_CTL1_CNTMODE2_Pos

#define PWM_CTL1_CNTMODE2_Pos   (18)

PWM_T::CTL1: CNTMODE2 Position

Definition at line 6012 of file M471M_R1_S.h.

◆ PWM_CTL1_CNTMODE3_Msk

#define PWM_CTL1_CNTMODE3_Msk   (0x1ul << PWM_CTL1_CNTMODE3_Pos)

PWM_T::CTL1: CNTMODE3 Mask

Definition at line 6016 of file M471M_R1_S.h.

◆ PWM_CTL1_CNTMODE3_Pos

#define PWM_CTL1_CNTMODE3_Pos   (19)

PWM_T::CTL1: CNTMODE3 Position

Definition at line 6015 of file M471M_R1_S.h.

◆ PWM_CTL1_CNTMODE4_Msk

#define PWM_CTL1_CNTMODE4_Msk   (0x1ul << PWM_CTL1_CNTMODE4_Pos)

PWM_T::CTL1: CNTMODE4 Mask

Definition at line 6019 of file M471M_R1_S.h.

◆ PWM_CTL1_CNTMODE4_Pos

#define PWM_CTL1_CNTMODE4_Pos   (20)

PWM_T::CTL1: CNTMODE4 Position

Definition at line 6018 of file M471M_R1_S.h.

◆ PWM_CTL1_CNTMODE5_Msk

#define PWM_CTL1_CNTMODE5_Msk   (0x1ul << PWM_CTL1_CNTMODE5_Pos)

PWM_T::CTL1: CNTMODE5 Mask

Definition at line 6022 of file M471M_R1_S.h.

◆ PWM_CTL1_CNTMODE5_Pos

#define PWM_CTL1_CNTMODE5_Pos   (21)

PWM_T::CTL1: CNTMODE5 Position

Definition at line 6021 of file M471M_R1_S.h.

◆ PWM_CTL1_CNTMODEn_Msk

#define PWM_CTL1_CNTMODEn_Msk   (0x3ful << PWM_CTL1_CNTMODEn_Pos)

PWM_T::CTL1: CNTMODEn Mask

Definition at line 6004 of file M471M_R1_S.h.

◆ PWM_CTL1_CNTMODEn_Pos

#define PWM_CTL1_CNTMODEn_Pos   (16)

PWM_T::CTL1: CNTMODEn Position

Definition at line 6003 of file M471M_R1_S.h.

◆ PWM_CTL1_CNTTYPE0_Msk

#define PWM_CTL1_CNTTYPE0_Msk   (0x3ul << PWM_CTL1_CNTTYPE0_Pos)

PWM_T::CTL1: CNTTYPE0 Mask

Definition at line 5986 of file M471M_R1_S.h.

◆ PWM_CTL1_CNTTYPE0_Pos

#define PWM_CTL1_CNTTYPE0_Pos   (0)

PWM_T::CTL1: CNTTYPE0 Position

Definition at line 5985 of file M471M_R1_S.h.

◆ PWM_CTL1_CNTTYPE1_Msk

#define PWM_CTL1_CNTTYPE1_Msk   (0x3ul << PWM_CTL1_CNTTYPE1_Pos)

PWM_T::CTL1: CNTTYPE1 Mask

Definition at line 5989 of file M471M_R1_S.h.

◆ PWM_CTL1_CNTTYPE1_Pos

#define PWM_CTL1_CNTTYPE1_Pos   (2)

PWM_T::CTL1: CNTTYPE1 Position

Definition at line 5988 of file M471M_R1_S.h.

◆ PWM_CTL1_CNTTYPE2_Msk

#define PWM_CTL1_CNTTYPE2_Msk   (0x3ul << PWM_CTL1_CNTTYPE2_Pos)

PWM_T::CTL1: CNTTYPE2 Mask

Definition at line 5992 of file M471M_R1_S.h.

◆ PWM_CTL1_CNTTYPE2_Pos

#define PWM_CTL1_CNTTYPE2_Pos   (4)

PWM_T::CTL1: CNTTYPE2 Position

Definition at line 5991 of file M471M_R1_S.h.

◆ PWM_CTL1_CNTTYPE3_Msk

#define PWM_CTL1_CNTTYPE3_Msk   (0x3ul << PWM_CTL1_CNTTYPE3_Pos)

PWM_T::CTL1: CNTTYPE3 Mask

Definition at line 5995 of file M471M_R1_S.h.

◆ PWM_CTL1_CNTTYPE3_Pos

#define PWM_CTL1_CNTTYPE3_Pos   (6)

PWM_T::CTL1: CNTTYPE3 Position

Definition at line 5994 of file M471M_R1_S.h.

◆ PWM_CTL1_CNTTYPE4_Msk

#define PWM_CTL1_CNTTYPE4_Msk   (0x3ul << PWM_CTL1_CNTTYPE4_Pos)

PWM_T::CTL1: CNTTYPE4 Mask

Definition at line 5998 of file M471M_R1_S.h.

◆ PWM_CTL1_CNTTYPE4_Pos

#define PWM_CTL1_CNTTYPE4_Pos   (8)

PWM_T::CTL1: CNTTYPE4 Position

Definition at line 5997 of file M471M_R1_S.h.

◆ PWM_CTL1_CNTTYPE5_Msk

#define PWM_CTL1_CNTTYPE5_Msk   (0x3ul << PWM_CTL1_CNTTYPE5_Pos)

PWM_T::CTL1: CNTTYPE5 Mask

Definition at line 6001 of file M471M_R1_S.h.

◆ PWM_CTL1_CNTTYPE5_Pos

#define PWM_CTL1_CNTTYPE5_Pos   (10)

PWM_T::CTL1: CNTTYPE5 Position

Definition at line 6000 of file M471M_R1_S.h.

◆ PWM_CTL1_CNTTYPEn_Msk

#define PWM_CTL1_CNTTYPEn_Msk   (0xffful << PWM_CTL1_CNTTYPEn_Pos)

PWM_T::CTL1: CNTTYPEn Mask

Definition at line 5983 of file M471M_R1_S.h.

◆ PWM_CTL1_CNTTYPEn_Pos

#define PWM_CTL1_CNTTYPEn_Pos   (0)

PWM_T::CTL1: CNTTYPEn Position

Definition at line 5982 of file M471M_R1_S.h.

◆ PWM_CTL1_OUTMODE0_Msk

#define PWM_CTL1_OUTMODE0_Msk   (0x1ul << PWM_CTL1_OUTMODE0_Pos)

PWM_T::CTL1: OUTMODE0 Mask

Definition at line 6028 of file M471M_R1_S.h.

◆ PWM_CTL1_OUTMODE0_Pos

#define PWM_CTL1_OUTMODE0_Pos   (24)

PWM_T::CTL1: OUTMODE0 Position

Definition at line 6027 of file M471M_R1_S.h.

◆ PWM_CTL1_OUTMODE2_Msk

#define PWM_CTL1_OUTMODE2_Msk   (0x1ul << PWM_CTL1_OUTMODE2_Pos)

PWM_T::CTL1: OUTMODE2 Mask

Definition at line 6031 of file M471M_R1_S.h.

◆ PWM_CTL1_OUTMODE2_Pos

#define PWM_CTL1_OUTMODE2_Pos   (25)

PWM_T::CTL1: OUTMODE2 Position

Definition at line 6030 of file M471M_R1_S.h.

◆ PWM_CTL1_OUTMODE4_Msk

#define PWM_CTL1_OUTMODE4_Msk   (0x1ul << PWM_CTL1_OUTMODE4_Pos)

PWM_T::CTL1: OUTMODE4 Mask

Definition at line 6034 of file M471M_R1_S.h.

◆ PWM_CTL1_OUTMODE4_Pos

#define PWM_CTL1_OUTMODE4_Pos   (26)

PWM_T::CTL1: OUTMODE4 Position

Definition at line 6033 of file M471M_R1_S.h.

◆ PWM_CTL1_OUTMODEn_Msk

#define PWM_CTL1_OUTMODEn_Msk   (0x7ul << PWM_CTL1_OUTMODEn_Pos)

PWM_T::CTL1: OUTMODEn Mask

Definition at line 6025 of file M471M_R1_S.h.

◆ PWM_CTL1_OUTMODEn_Pos

#define PWM_CTL1_OUTMODEn_Pos   (24)

PWM_T::CTL1: OUTMODEn Position

Definition at line 6024 of file M471M_R1_S.h.

◆ PWM_DTCTL0_1_DTCKSEL_Msk

#define PWM_DTCTL0_1_DTCKSEL_Msk   (0x1ul << PWM_DTCTL0_1_DTCKSEL_Pos)

PWM_T::DTCTL0_1: DTCKSEL Mask

Definition at line 6190 of file M471M_R1_S.h.

◆ PWM_DTCTL0_1_DTCKSEL_Pos

#define PWM_DTCTL0_1_DTCKSEL_Pos   (24)

PWM_T::DTCTL0_1: DTCKSEL Position

Definition at line 6189 of file M471M_R1_S.h.

◆ PWM_DTCTL0_1_DTCNT_Msk

#define PWM_DTCTL0_1_DTCNT_Msk   (0xffful << PWM_DTCTL0_1_DTCNT_Pos)

PWM_T::DTCTL0_1: DTCNT Mask

Definition at line 6184 of file M471M_R1_S.h.

◆ PWM_DTCTL0_1_DTCNT_Pos

#define PWM_DTCTL0_1_DTCNT_Pos   (0)

PWM_T::DTCTL0_1: DTCNT Position

Definition at line 6183 of file M471M_R1_S.h.

◆ PWM_DTCTL0_1_DTEN_Msk

#define PWM_DTCTL0_1_DTEN_Msk   (0x1ul << PWM_DTCTL0_1_DTEN_Pos)

PWM_T::DTCTL0_1: DTEN Mask

Definition at line 6187 of file M471M_R1_S.h.

◆ PWM_DTCTL0_1_DTEN_Pos

#define PWM_DTCTL0_1_DTEN_Pos   (16)

PWM_T::DTCTL0_1: DTEN Position

Definition at line 6186 of file M471M_R1_S.h.

◆ PWM_DTCTL2_3_DTCKSEL_Msk

#define PWM_DTCTL2_3_DTCKSEL_Msk   (0x1ul << PWM_DTCTL2_3_DTCKSEL_Pos)

PWM_T::DTCTL2_3: DTCKSEL Mask

Definition at line 6199 of file M471M_R1_S.h.

◆ PWM_DTCTL2_3_DTCKSEL_Pos

#define PWM_DTCTL2_3_DTCKSEL_Pos   (24)

PWM_T::DTCTL2_3: DTCKSEL Position

Definition at line 6198 of file M471M_R1_S.h.

◆ PWM_DTCTL2_3_DTCNT_Msk

#define PWM_DTCTL2_3_DTCNT_Msk   (0xffful << PWM_DTCTL2_3_DTCNT_Pos)

PWM_T::DTCTL2_3: DTCNT Mask

Definition at line 6193 of file M471M_R1_S.h.

◆ PWM_DTCTL2_3_DTCNT_Pos

#define PWM_DTCTL2_3_DTCNT_Pos   (0)

PWM_T::DTCTL2_3: DTCNT Position

Definition at line 6192 of file M471M_R1_S.h.

◆ PWM_DTCTL2_3_DTEN_Msk

#define PWM_DTCTL2_3_DTEN_Msk   (0x1ul << PWM_DTCTL2_3_DTEN_Pos)

PWM_T::DTCTL2_3: DTEN Mask

Definition at line 6196 of file M471M_R1_S.h.

◆ PWM_DTCTL2_3_DTEN_Pos

#define PWM_DTCTL2_3_DTEN_Pos   (16)

PWM_T::DTCTL2_3: DTEN Position

Definition at line 6195 of file M471M_R1_S.h.

◆ PWM_DTCTL4_5_DTCKSEL_Msk

#define PWM_DTCTL4_5_DTCKSEL_Msk   (0x1ul << PWM_DTCTL4_5_DTCKSEL_Pos)

PWM_T::DTCTL4_5: DTCKSEL Mask

Definition at line 6208 of file M471M_R1_S.h.

◆ PWM_DTCTL4_5_DTCKSEL_Pos

#define PWM_DTCTL4_5_DTCKSEL_Pos   (24)

PWM_T::DTCTL4_5: DTCKSEL Position

Definition at line 6207 of file M471M_R1_S.h.

◆ PWM_DTCTL4_5_DTCNT_Msk

#define PWM_DTCTL4_5_DTCNT_Msk   (0xffful << PWM_DTCTL4_5_DTCNT_Pos)

PWM_T::DTCTL4_5: DTCNT Mask

Definition at line 6202 of file M471M_R1_S.h.

◆ PWM_DTCTL4_5_DTCNT_Pos

#define PWM_DTCTL4_5_DTCNT_Pos   (0)

PWM_T::DTCTL4_5: DTCNT Position

Definition at line 6201 of file M471M_R1_S.h.

◆ PWM_DTCTL4_5_DTEN_Msk

#define PWM_DTCTL4_5_DTEN_Msk   (0x1ul << PWM_DTCTL4_5_DTEN_Pos)

PWM_T::DTCTL4_5: DTEN Mask

Definition at line 6205 of file M471M_R1_S.h.

◆ PWM_DTCTL4_5_DTEN_Pos

#define PWM_DTCTL4_5_DTEN_Pos   (16)

PWM_T::DTCTL4_5: DTEN Position

Definition at line 6204 of file M471M_R1_S.h.

◆ PWM_EADCTS0_TRGEN0_Msk

#define PWM_EADCTS0_TRGEN0_Msk   (0x1ul << PWM_EADCTS0_TRGEN0_Pos)

PWM_T::EADCTS0: TRGEN0 Mask

Definition at line 6841 of file M471M_R1_S.h.

◆ PWM_EADCTS0_TRGEN0_Pos

#define PWM_EADCTS0_TRGEN0_Pos   (7)

PWM_T::EADCTS0: TRGEN0 Position

Definition at line 6840 of file M471M_R1_S.h.

◆ PWM_EADCTS0_TRGEN1_Msk

#define PWM_EADCTS0_TRGEN1_Msk   (0x1ul << PWM_EADCTS0_TRGEN1_Pos)

PWM_T::EADCTS0: TRGEN1 Mask

Definition at line 6847 of file M471M_R1_S.h.

◆ PWM_EADCTS0_TRGEN1_Pos

#define PWM_EADCTS0_TRGEN1_Pos   (15)

PWM_T::EADCTS0: TRGEN1 Position

Definition at line 6846 of file M471M_R1_S.h.

◆ PWM_EADCTS0_TRGEN2_Msk

#define PWM_EADCTS0_TRGEN2_Msk   (0x1ul << PWM_EADCTS0_TRGEN2_Pos)

PWM_T::EADCTS0: TRGEN2 Mask

Definition at line 6853 of file M471M_R1_S.h.

◆ PWM_EADCTS0_TRGEN2_Pos

#define PWM_EADCTS0_TRGEN2_Pos   (23)

PWM_T::EADCTS0: TRGEN2 Position

Definition at line 6852 of file M471M_R1_S.h.

◆ PWM_EADCTS0_TRGEN3_Msk

#define PWM_EADCTS0_TRGEN3_Msk   (0x1ul << PWM_EADCTS0_TRGEN3_Pos)

PWM_T::EADCTS0: TRGEN3 Mask

Definition at line 6859 of file M471M_R1_S.h.

◆ PWM_EADCTS0_TRGEN3_Pos

#define PWM_EADCTS0_TRGEN3_Pos   (31)

PWM_T::EADCTS0: TRGEN3 Position

Definition at line 6858 of file M471M_R1_S.h.

◆ PWM_EADCTS0_TRGSEL0_Msk

#define PWM_EADCTS0_TRGSEL0_Msk   (0xful << PWM_EADCTS0_TRGSEL0_Pos)

PWM_T::EADCTS0: TRGSEL0 Mask

Definition at line 6838 of file M471M_R1_S.h.

◆ PWM_EADCTS0_TRGSEL0_Pos

#define PWM_EADCTS0_TRGSEL0_Pos   (0)

PWM_T::EADCTS0: TRGSEL0 Position

Definition at line 6837 of file M471M_R1_S.h.

◆ PWM_EADCTS0_TRGSEL1_Msk

#define PWM_EADCTS0_TRGSEL1_Msk   (0xful << PWM_EADCTS0_TRGSEL1_Pos)

PWM_T::EADCTS0: TRGSEL1 Mask

Definition at line 6844 of file M471M_R1_S.h.

◆ PWM_EADCTS0_TRGSEL1_Pos

#define PWM_EADCTS0_TRGSEL1_Pos   (8)

PWM_T::EADCTS0: TRGSEL1 Position

Definition at line 6843 of file M471M_R1_S.h.

◆ PWM_EADCTS0_TRGSEL2_Msk

#define PWM_EADCTS0_TRGSEL2_Msk   (0xful << PWM_EADCTS0_TRGSEL2_Pos)

PWM_T::EADCTS0: TRGSEL2 Mask

Definition at line 6850 of file M471M_R1_S.h.

◆ PWM_EADCTS0_TRGSEL2_Pos

#define PWM_EADCTS0_TRGSEL2_Pos   (16)

PWM_T::EADCTS0: TRGSEL2 Position

Definition at line 6849 of file M471M_R1_S.h.

◆ PWM_EADCTS0_TRGSEL3_Msk

#define PWM_EADCTS0_TRGSEL3_Msk   (0xful << PWM_EADCTS0_TRGSEL3_Pos)

PWM_T::EADCTS0: TRGSEL3 Mask

Definition at line 6856 of file M471M_R1_S.h.

◆ PWM_EADCTS0_TRGSEL3_Pos

#define PWM_EADCTS0_TRGSEL3_Pos   (24)

PWM_T::EADCTS0: TRGSEL3 Position

Definition at line 6855 of file M471M_R1_S.h.

◆ PWM_EADCTS1_TRGEN4_Msk

#define PWM_EADCTS1_TRGEN4_Msk   (0x1ul << PWM_EADCTS1_TRGEN4_Pos)

PWM_T::EADCTS1: TRGEN4 Mask

Definition at line 6865 of file M471M_R1_S.h.

◆ PWM_EADCTS1_TRGEN4_Pos

#define PWM_EADCTS1_TRGEN4_Pos   (7)

PWM_T::EADCTS1: TRGEN4 Position

Definition at line 6864 of file M471M_R1_S.h.

◆ PWM_EADCTS1_TRGEN5_Msk

#define PWM_EADCTS1_TRGEN5_Msk   (0x1ul << PWM_EADCTS1_TRGEN5_Pos)

PWM_T::EADCTS1: TRGEN5 Mask

Definition at line 6871 of file M471M_R1_S.h.

◆ PWM_EADCTS1_TRGEN5_Pos

#define PWM_EADCTS1_TRGEN5_Pos   (15)

PWM_T::EADCTS1: TRGEN5 Position

Definition at line 6870 of file M471M_R1_S.h.

◆ PWM_EADCTS1_TRGSEL4_Msk

#define PWM_EADCTS1_TRGSEL4_Msk   (0xful << PWM_EADCTS1_TRGSEL4_Pos)

PWM_T::EADCTS1: TRGSEL4 Mask

Definition at line 6862 of file M471M_R1_S.h.

◆ PWM_EADCTS1_TRGSEL4_Pos

#define PWM_EADCTS1_TRGSEL4_Pos   (0)

PWM_T::EADCTS1: TRGSEL4 Position

Definition at line 6861 of file M471M_R1_S.h.

◆ PWM_EADCTS1_TRGSEL5_Msk

#define PWM_EADCTS1_TRGSEL5_Msk   (0xful << PWM_EADCTS1_TRGSEL5_Pos)

PWM_T::EADCTS1: TRGSEL5 Mask

Definition at line 6868 of file M471M_R1_S.h.

◆ PWM_EADCTS1_TRGSEL5_Pos

#define PWM_EADCTS1_TRGSEL5_Pos   (8)

PWM_T::EADCTS1: TRGSEL5 Position

Definition at line 6867 of file M471M_R1_S.h.

◆ PWM_FAILBRK_BODBRKEN_Msk

#define PWM_FAILBRK_BODBRKEN_Msk   (0x1ul << PWM_FAILBRK_BODBRKEN_Pos)

PWM_T::FAILBRK: BODBRKEN Mask

Definition at line 6385 of file M471M_R1_S.h.

◆ PWM_FAILBRK_BODBRKEN_Pos

#define PWM_FAILBRK_BODBRKEN_Pos   (1)

PWM_T::FAILBRK: BODBRKEN Position

Definition at line 6384 of file M471M_R1_S.h.

◆ PWM_FAILBRK_CORBRKEN_Msk

#define PWM_FAILBRK_CORBRKEN_Msk   (0x1ul << PWM_FAILBRK_CORBRKEN_Pos)

PWM_T::FAILBRK: CORBRKEN Mask

Definition at line 6388 of file M471M_R1_S.h.

◆ PWM_FAILBRK_CORBRKEN_Pos

#define PWM_FAILBRK_CORBRKEN_Pos   (3)

PWM_T::FAILBRK: CORBRKEN Position

Definition at line 6387 of file M471M_R1_S.h.

◆ PWM_FAILBRK_CSSBRKEN_Msk

#define PWM_FAILBRK_CSSBRKEN_Msk   (0x1ul << PWM_FAILBRK_CSSBRKEN_Pos)

PWM_T::FAILBRK: CSSBRKEN Mask

Definition at line 6382 of file M471M_R1_S.h.

◆ PWM_FAILBRK_CSSBRKEN_Pos

#define PWM_FAILBRK_CSSBRKEN_Pos   (0)

PWM_T::FAILBRK: CSSBRKEN Position

Definition at line 6381 of file M471M_R1_S.h.

◆ PWM_FCAPDAT0_FCAPDAT_Msk

#define PWM_FCAPDAT0_FCAPDAT_Msk   (0xfffful << PWM_FCAPDAT0_FCAPDAT_Pos)

PWM_T::FCAPDAT0: FCAPDAT Mask

Definition at line 7111 of file M471M_R1_S.h.

◆ PWM_FCAPDAT0_FCAPDAT_Pos

#define PWM_FCAPDAT0_FCAPDAT_Pos   (0)

PWM_T::FCAPDAT0: FCAPDAT Position

Definition at line 7110 of file M471M_R1_S.h.

◆ PWM_FCAPDAT1_FCAPDAT_Msk

#define PWM_FCAPDAT1_FCAPDAT_Msk   (0xfffful << PWM_FCAPDAT1_FCAPDAT_Pos)

PWM_T::FCAPDAT1: FCAPDAT Mask

Definition at line 7117 of file M471M_R1_S.h.

◆ PWM_FCAPDAT1_FCAPDAT_Pos

#define PWM_FCAPDAT1_FCAPDAT_Pos   (0)

PWM_T::FCAPDAT1: FCAPDAT Position

Definition at line 7116 of file M471M_R1_S.h.

◆ PWM_FCAPDAT2_FCAPDAT_Msk

#define PWM_FCAPDAT2_FCAPDAT_Msk   (0xfffful << PWM_FCAPDAT2_FCAPDAT_Pos)

PWM_T::FCAPDAT2: FCAPDAT Mask

Definition at line 7123 of file M471M_R1_S.h.

◆ PWM_FCAPDAT2_FCAPDAT_Pos

#define PWM_FCAPDAT2_FCAPDAT_Pos   (0)

PWM_T::FCAPDAT2: FCAPDAT Position

Definition at line 7122 of file M471M_R1_S.h.

◆ PWM_FCAPDAT3_FCAPDAT_Msk

#define PWM_FCAPDAT3_FCAPDAT_Msk   (0xfffful << PWM_FCAPDAT3_FCAPDAT_Pos)

PWM_T::FCAPDAT3: FCAPDAT Mask

Definition at line 7129 of file M471M_R1_S.h.

◆ PWM_FCAPDAT3_FCAPDAT_Pos

#define PWM_FCAPDAT3_FCAPDAT_Pos   (0)

PWM_T::FCAPDAT3: FCAPDAT Position

Definition at line 7128 of file M471M_R1_S.h.

◆ PWM_FCAPDAT4_FCAPDAT_Msk

#define PWM_FCAPDAT4_FCAPDAT_Msk   (0xfffful << PWM_FCAPDAT4_FCAPDAT_Pos)

PWM_T::FCAPDAT4: FCAPDAT Mask

Definition at line 7135 of file M471M_R1_S.h.

◆ PWM_FCAPDAT4_FCAPDAT_Pos

#define PWM_FCAPDAT4_FCAPDAT_Pos   (0)

PWM_T::FCAPDAT4: FCAPDAT Position

Definition at line 7134 of file M471M_R1_S.h.

◆ PWM_FCAPDAT5_FCAPDAT_Msk

#define PWM_FCAPDAT5_FCAPDAT_Msk   (0xfffful << PWM_FCAPDAT5_FCAPDAT_Pos)

PWM_T::FCAPDAT5: FCAPDAT Mask

Definition at line 7141 of file M471M_R1_S.h.

◆ PWM_FCAPDAT5_FCAPDAT_Pos

#define PWM_FCAPDAT5_FCAPDAT_Pos   (0)

PWM_T::FCAPDAT5: FCAPDAT Position

Definition at line 7140 of file M471M_R1_S.h.

◆ PWM_FTCBUF0_1_FTCMPBUF_Msk

#define PWM_FTCBUF0_1_FTCMPBUF_Msk   (0xfffful << PWM_FTCBUF0_1_FTCMPBUF_Pos)

PWM_T::FTCBUF0_1: FTCMPBUF Mask

Definition at line 7279 of file M471M_R1_S.h.

◆ PWM_FTCBUF0_1_FTCMPBUF_Pos

#define PWM_FTCBUF0_1_FTCMPBUF_Pos   (0)

PWM_T::FTCBUF0_1: FTCMPBUF Position

Definition at line 7278 of file M471M_R1_S.h.

◆ PWM_FTCBUF2_3_FTCMPBUF_Msk

#define PWM_FTCBUF2_3_FTCMPBUF_Msk   (0xfffful << PWM_FTCBUF2_3_FTCMPBUF_Pos)

PWM_T::FTCBUF2_3: FTCMPBUF Mask

Definition at line 7282 of file M471M_R1_S.h.

◆ PWM_FTCBUF2_3_FTCMPBUF_Pos

#define PWM_FTCBUF2_3_FTCMPBUF_Pos   (0)

PWM_T::FTCBUF2_3: FTCMPBUF Position

Definition at line 7281 of file M471M_R1_S.h.

◆ PWM_FTCBUF4_5_FTCMPBUF_Msk

#define PWM_FTCBUF4_5_FTCMPBUF_Msk   (0xfffful << PWM_FTCBUF4_5_FTCMPBUF_Pos)

PWM_T::FTCBUF4_5: FTCMPBUF Mask

Definition at line 7285 of file M471M_R1_S.h.

◆ PWM_FTCBUF4_5_FTCMPBUF_Pos

#define PWM_FTCBUF4_5_FTCMPBUF_Pos   (0)

PWM_T::FTCBUF4_5: FTCMPBUF Position

Definition at line 7284 of file M471M_R1_S.h.

◆ PWM_FTCI_FTCMD0_Msk

#define PWM_FTCI_FTCMD0_Msk   (0x1ul << PWM_FTCI_FTCMD0_Pos)

PWM_T::FTCI: FTCMD0 Mask

Definition at line 7303 of file M471M_R1_S.h.

◆ PWM_FTCI_FTCMD0_Pos

#define PWM_FTCI_FTCMD0_Pos   (8)

PWM_T::FTCI: FTCMD0 Position

Definition at line 7302 of file M471M_R1_S.h.

◆ PWM_FTCI_FTCMD2_Msk

#define PWM_FTCI_FTCMD2_Msk   (0x1ul << PWM_FTCI_FTCMD2_Pos)

PWM_T::FTCI: FTCMD2 Mask

Definition at line 7306 of file M471M_R1_S.h.

◆ PWM_FTCI_FTCMD2_Pos

#define PWM_FTCI_FTCMD2_Pos   (9)

PWM_T::FTCI: FTCMD2 Position

Definition at line 7305 of file M471M_R1_S.h.

◆ PWM_FTCI_FTCMD4_Msk

#define PWM_FTCI_FTCMD4_Msk   (0x1ul << PWM_FTCI_FTCMD4_Pos)

PWM_T::FTCI: FTCMD4 Mask

Definition at line 7309 of file M471M_R1_S.h.

◆ PWM_FTCI_FTCMD4_Pos

#define PWM_FTCI_FTCMD4_Pos   (10)

PWM_T::FTCI: FTCMD4 Position

Definition at line 7308 of file M471M_R1_S.h.

◆ PWM_FTCI_FTCMDn_Msk

#define PWM_FTCI_FTCMDn_Msk   (0x7ul << PWM_FTCI_FTCMDn_Pos)

PWM_T::FTCI: FTCMDn Mask

Definition at line 7300 of file M471M_R1_S.h.

◆ PWM_FTCI_FTCMDn_Pos

#define PWM_FTCI_FTCMDn_Pos   (8)

PWM_T::FTCI: FTCMDn Position

Definition at line 7299 of file M471M_R1_S.h.

◆ PWM_FTCI_FTCMU0_Msk

#define PWM_FTCI_FTCMU0_Msk   (0x1ul << PWM_FTCI_FTCMU0_Pos)

PWM_T::FTCI: FTCMU0 Mask

Definition at line 7291 of file M471M_R1_S.h.

◆ PWM_FTCI_FTCMU0_Pos

#define PWM_FTCI_FTCMU0_Pos   (0)

PWM_T::FTCI: FTCMU0 Position

Definition at line 7290 of file M471M_R1_S.h.

◆ PWM_FTCI_FTCMU2_Msk

#define PWM_FTCI_FTCMU2_Msk   (0x1ul << PWM_FTCI_FTCMU2_Pos)

PWM_T::FTCI: FTCMU2 Mask

Definition at line 7294 of file M471M_R1_S.h.

◆ PWM_FTCI_FTCMU2_Pos

#define PWM_FTCI_FTCMU2_Pos   (1)

PWM_T::FTCI: FTCMU2 Position

Definition at line 7293 of file M471M_R1_S.h.

◆ PWM_FTCI_FTCMU4_Msk

#define PWM_FTCI_FTCMU4_Msk   (0x1ul << PWM_FTCI_FTCMU4_Pos)

PWM_T::FTCI: FTCMU4 Mask

Definition at line 7297 of file M471M_R1_S.h.

◆ PWM_FTCI_FTCMU4_Pos

#define PWM_FTCI_FTCMU4_Pos   (2)

PWM_T::FTCI: FTCMU4 Position

Definition at line 7296 of file M471M_R1_S.h.

◆ PWM_FTCI_FTCMUn_Msk

#define PWM_FTCI_FTCMUn_Msk   (0x7ul << PWM_FTCI_FTCMUn_Pos)

PWM_T::FTCI: FTCMUn Mask

Definition at line 7288 of file M471M_R1_S.h.

◆ PWM_FTCI_FTCMUn_Pos

#define PWM_FTCI_FTCMUn_Pos   (0)

PWM_T::FTCI: FTCMUn Position

Definition at line 7287 of file M471M_R1_S.h.

◆ PWM_FTCMPDAT0_1_FTCMP_Msk

#define PWM_FTCMPDAT0_1_FTCMP_Msk   (0xfffful << PWM_FTCMPDAT0_1_FTCMP_Pos)

PWM_T::FTCMPDAT0_1: FTCMP Mask

Definition at line 6874 of file M471M_R1_S.h.

◆ PWM_FTCMPDAT0_1_FTCMP_Pos

#define PWM_FTCMPDAT0_1_FTCMP_Pos   (0)

PWM_T::FTCMPDAT0_1: FTCMP Position

Definition at line 6873 of file M471M_R1_S.h.

◆ PWM_FTCMPDAT2_3_FTCMP_Msk

#define PWM_FTCMPDAT2_3_FTCMP_Msk   (0xfffful << PWM_FTCMPDAT2_3_FTCMP_Pos)

PWM_T::FTCMPDAT2_3: FTCMP Mask

Definition at line 6877 of file M471M_R1_S.h.

◆ PWM_FTCMPDAT2_3_FTCMP_Pos

#define PWM_FTCMPDAT2_3_FTCMP_Pos   (0)

PWM_T::FTCMPDAT2_3: FTCMP Position

Definition at line 6876 of file M471M_R1_S.h.

◆ PWM_FTCMPDAT4_5_FTCMP_Msk

#define PWM_FTCMPDAT4_5_FTCMP_Msk   (0xfffful << PWM_FTCMPDAT4_5_FTCMP_Pos)

PWM_T::FTCMPDAT4_5: FTCMP Mask

Definition at line 6880 of file M471M_R1_S.h.

◆ PWM_FTCMPDAT4_5_FTCMP_Pos

#define PWM_FTCMPDAT4_5_FTCMP_Pos   (0)

PWM_T::FTCMPDAT4_5: FTCMP Position

Definition at line 6879 of file M471M_R1_S.h.

◆ PWM_IFA_IFAEN0_1_Msk

#define PWM_IFA_IFAEN0_1_Msk   (0x1ul << PWM_IFA_IFAEN0_1_Pos)

PWM_T::IFA: IFAEN0_1 Mask

Definition at line 6817 of file M471M_R1_S.h.

◆ PWM_IFA_IFAEN0_1_Pos

#define PWM_IFA_IFAEN0_1_Pos   (7)

PWM_T::IFA: IFAEN0_1 Position

Definition at line 6816 of file M471M_R1_S.h.

◆ PWM_IFA_IFAEN2_3_Msk

#define PWM_IFA_IFAEN2_3_Msk   (0x1ul << PWM_IFA_IFAEN2_3_Pos)

PWM_T::IFA: IFAEN2_3 Mask

Definition at line 6826 of file M471M_R1_S.h.

◆ PWM_IFA_IFAEN2_3_Pos

#define PWM_IFA_IFAEN2_3_Pos   (15)

PWM_T::IFA: IFAEN2_3 Position

Definition at line 6825 of file M471M_R1_S.h.

◆ PWM_IFA_IFAEN4_5_Msk

#define PWM_IFA_IFAEN4_5_Msk   (0x1ul << PWM_IFA_IFAEN4_5_Pos)

PWM_T::IFA: IFAEN4_5 Mask

Definition at line 6835 of file M471M_R1_S.h.

◆ PWM_IFA_IFAEN4_5_Pos

#define PWM_IFA_IFAEN4_5_Pos   (23)

PWM_T::IFA: IFAEN4_5 Position

Definition at line 6834 of file M471M_R1_S.h.

◆ PWM_IFA_IFCNT0_1_Msk

#define PWM_IFA_IFCNT0_1_Msk   (0xful << PWM_IFA_IFCNT0_1_Pos)

PWM_T::IFA: IFCNT0_1 Mask

Definition at line 6811 of file M471M_R1_S.h.

◆ PWM_IFA_IFCNT0_1_Pos

#define PWM_IFA_IFCNT0_1_Pos   (0)

PWM_T::IFA: IFCNT0_1 Position

Definition at line 6810 of file M471M_R1_S.h.

◆ PWM_IFA_IFCNT2_3_Msk

#define PWM_IFA_IFCNT2_3_Msk   (0xful << PWM_IFA_IFCNT2_3_Pos)

PWM_T::IFA: IFCNT2_3 Mask

Definition at line 6820 of file M471M_R1_S.h.

◆ PWM_IFA_IFCNT2_3_Pos

#define PWM_IFA_IFCNT2_3_Pos   (8)

PWM_T::IFA: IFCNT2_3 Position

Definition at line 6819 of file M471M_R1_S.h.

◆ PWM_IFA_IFCNT4_5_Msk

#define PWM_IFA_IFCNT4_5_Msk   (0xful << PWM_IFA_IFCNT4_5_Pos)

PWM_T::IFA: IFCNT4_5 Mask

Definition at line 6829 of file M471M_R1_S.h.

◆ PWM_IFA_IFCNT4_5_Pos

#define PWM_IFA_IFCNT4_5_Pos   (16)

PWM_T::IFA: IFCNT4_5 Position

Definition at line 6828 of file M471M_R1_S.h.

◆ PWM_IFA_IFSEL0_1_Msk

#define PWM_IFA_IFSEL0_1_Msk   (0x7ul << PWM_IFA_IFSEL0_1_Pos)

PWM_T::IFA: IFSEL0_1 Mask

Definition at line 6814 of file M471M_R1_S.h.

◆ PWM_IFA_IFSEL0_1_Pos

#define PWM_IFA_IFSEL0_1_Pos   (4)

PWM_T::IFA: IFSEL0_1 Position

Definition at line 6813 of file M471M_R1_S.h.

◆ PWM_IFA_IFSEL2_3_Msk

#define PWM_IFA_IFSEL2_3_Msk   (0x7ul << PWM_IFA_IFSEL2_3_Pos)

PWM_T::IFA: IFSEL2_3 Mask

Definition at line 6823 of file M471M_R1_S.h.

◆ PWM_IFA_IFSEL2_3_Pos

#define PWM_IFA_IFSEL2_3_Pos   (12)

PWM_T::IFA: IFSEL2_3 Position

Definition at line 6822 of file M471M_R1_S.h.

◆ PWM_IFA_IFSEL4_5_Msk

#define PWM_IFA_IFSEL4_5_Msk   (0x7ul << PWM_IFA_IFSEL4_5_Pos)

PWM_T::IFA: IFSEL4_5 Mask

Definition at line 6832 of file M471M_R1_S.h.

◆ PWM_IFA_IFSEL4_5_Pos

#define PWM_IFA_IFSEL4_5_Pos   (20)

PWM_T::IFA: IFSEL4_5 Position

Definition at line 6831 of file M471M_R1_S.h.

◆ PWM_INTEN0_CMPDIEN0_Msk

#define PWM_INTEN0_CMPDIEN0_Msk   (0x1ul << PWM_INTEN0_CMPDIEN0_Pos)

PWM_T::INTEN0: CMPDIEN0 Mask

Definition at line 6604 of file M471M_R1_S.h.

◆ PWM_INTEN0_CMPDIEN0_Pos

#define PWM_INTEN0_CMPDIEN0_Pos   (24)

PWM_T::INTEN0: CMPDIEN0 Position

Definition at line 6603 of file M471M_R1_S.h.

◆ PWM_INTEN0_CMPDIEN1_Msk

#define PWM_INTEN0_CMPDIEN1_Msk   (0x1ul << PWM_INTEN0_CMPDIEN1_Pos)

PWM_T::INTEN0: CMPDIEN1 Mask

Definition at line 6607 of file M471M_R1_S.h.

◆ PWM_INTEN0_CMPDIEN1_Pos

#define PWM_INTEN0_CMPDIEN1_Pos   (25)

PWM_T::INTEN0: CMPDIEN1 Position

Definition at line 6606 of file M471M_R1_S.h.

◆ PWM_INTEN0_CMPDIEN2_Msk

#define PWM_INTEN0_CMPDIEN2_Msk   (0x1ul << PWM_INTEN0_CMPDIEN2_Pos)

PWM_T::INTEN0: CMPDIEN2 Mask

Definition at line 6610 of file M471M_R1_S.h.

◆ PWM_INTEN0_CMPDIEN2_Pos

#define PWM_INTEN0_CMPDIEN2_Pos   (26)

PWM_T::INTEN0: CMPDIEN2 Position

Definition at line 6609 of file M471M_R1_S.h.

◆ PWM_INTEN0_CMPDIEN3_Msk

#define PWM_INTEN0_CMPDIEN3_Msk   (0x1ul << PWM_INTEN0_CMPDIEN3_Pos)

PWM_T::INTEN0: CMPDIEN3 Mask

Definition at line 6613 of file M471M_R1_S.h.

◆ PWM_INTEN0_CMPDIEN3_Pos

#define PWM_INTEN0_CMPDIEN3_Pos   (27)

PWM_T::INTEN0: CMPDIEN3 Position

Definition at line 6612 of file M471M_R1_S.h.

◆ PWM_INTEN0_CMPDIEN4_Msk

#define PWM_INTEN0_CMPDIEN4_Msk   (0x1ul << PWM_INTEN0_CMPDIEN4_Pos)

PWM_T::INTEN0: CMPDIEN4 Mask

Definition at line 6616 of file M471M_R1_S.h.

◆ PWM_INTEN0_CMPDIEN4_Pos

#define PWM_INTEN0_CMPDIEN4_Pos   (28)

PWM_T::INTEN0: CMPDIEN4 Position

Definition at line 6615 of file M471M_R1_S.h.

◆ PWM_INTEN0_CMPDIEN5_Msk

#define PWM_INTEN0_CMPDIEN5_Msk   (0x1ul << PWM_INTEN0_CMPDIEN5_Pos)

PWM_T::INTEN0: CMPDIEN5 Mask

Definition at line 6619 of file M471M_R1_S.h.

◆ PWM_INTEN0_CMPDIEN5_Pos

#define PWM_INTEN0_CMPDIEN5_Pos   (29)

PWM_T::INTEN0: CMPDIEN5 Position

Definition at line 6618 of file M471M_R1_S.h.

◆ PWM_INTEN0_CMPDIENn_Msk

#define PWM_INTEN0_CMPDIENn_Msk   (0x3ful << PWM_INTEN0_CMPDIENn_Pos)

PWM_T::INTEN0: CMPDIENn Mask

Definition at line 6601 of file M471M_R1_S.h.

◆ PWM_INTEN0_CMPDIENn_Pos

#define PWM_INTEN0_CMPDIENn_Pos   (24)

PWM_T::INTEN0: CMPDIENn Position

Definition at line 6600 of file M471M_R1_S.h.

◆ PWM_INTEN0_CMPUIEN0_Msk

#define PWM_INTEN0_CMPUIEN0_Msk   (0x1ul << PWM_INTEN0_CMPUIEN0_Pos)

PWM_T::INTEN0: CMPUIEN0 Mask

Definition at line 6580 of file M471M_R1_S.h.

◆ PWM_INTEN0_CMPUIEN0_Pos

#define PWM_INTEN0_CMPUIEN0_Pos   (16)

PWM_T::INTEN0: CMPUIEN0 Position

Definition at line 6579 of file M471M_R1_S.h.

◆ PWM_INTEN0_CMPUIEN1_Msk

#define PWM_INTEN0_CMPUIEN1_Msk   (0x1ul << PWM_INTEN0_CMPUIEN1_Pos)

PWM_T::INTEN0: CMPUIEN1 Mask

Definition at line 6583 of file M471M_R1_S.h.

◆ PWM_INTEN0_CMPUIEN1_Pos

#define PWM_INTEN0_CMPUIEN1_Pos   (17)

PWM_T::INTEN0: CMPUIEN1 Position

Definition at line 6582 of file M471M_R1_S.h.

◆ PWM_INTEN0_CMPUIEN2_Msk

#define PWM_INTEN0_CMPUIEN2_Msk   (0x1ul << PWM_INTEN0_CMPUIEN2_Pos)

PWM_T::INTEN0: CMPUIEN2 Mask

Definition at line 6586 of file M471M_R1_S.h.

◆ PWM_INTEN0_CMPUIEN2_Pos

#define PWM_INTEN0_CMPUIEN2_Pos   (18)

PWM_T::INTEN0: CMPUIEN2 Position

Definition at line 6585 of file M471M_R1_S.h.

◆ PWM_INTEN0_CMPUIEN3_Msk

#define PWM_INTEN0_CMPUIEN3_Msk   (0x1ul << PWM_INTEN0_CMPUIEN3_Pos)

PWM_T::INTEN0: CMPUIEN3 Mask

Definition at line 6589 of file M471M_R1_S.h.

◆ PWM_INTEN0_CMPUIEN3_Pos

#define PWM_INTEN0_CMPUIEN3_Pos   (19)

PWM_T::INTEN0: CMPUIEN3 Position

Definition at line 6588 of file M471M_R1_S.h.

◆ PWM_INTEN0_CMPUIEN4_Msk

#define PWM_INTEN0_CMPUIEN4_Msk   (0x1ul << PWM_INTEN0_CMPUIEN4_Pos)

PWM_T::INTEN0: CMPUIEN4 Mask

Definition at line 6592 of file M471M_R1_S.h.

◆ PWM_INTEN0_CMPUIEN4_Pos

#define PWM_INTEN0_CMPUIEN4_Pos   (20)

PWM_T::INTEN0: CMPUIEN4 Position

Definition at line 6591 of file M471M_R1_S.h.

◆ PWM_INTEN0_CMPUIEN5_Msk

#define PWM_INTEN0_CMPUIEN5_Msk   (0x1ul << PWM_INTEN0_CMPUIEN5_Pos)

PWM_T::INTEN0: CMPUIEN5 Mask

Definition at line 6595 of file M471M_R1_S.h.

◆ PWM_INTEN0_CMPUIEN5_Pos

#define PWM_INTEN0_CMPUIEN5_Pos   (21)

PWM_T::INTEN0: CMPUIEN5 Position

Definition at line 6594 of file M471M_R1_S.h.

◆ PWM_INTEN0_CMPUIENn_Msk

#define PWM_INTEN0_CMPUIENn_Msk   (0x3ful << PWM_INTEN0_CMPUIENn_Pos)

PWM_T::INTEN0: CMPUIENn Mask

Definition at line 6577 of file M471M_R1_S.h.

◆ PWM_INTEN0_CMPUIENn_Pos

#define PWM_INTEN0_CMPUIENn_Pos   (16)

PWM_T::INTEN0: CMPUIENn Position

Definition at line 6576 of file M471M_R1_S.h.

◆ PWM_INTEN0_IFAIEN0_1_Msk

#define PWM_INTEN0_IFAIEN0_1_Msk   (0x1ul << PWM_INTEN0_IFAIEN0_1_Pos)

PWM_T::INTEN0: IFAIEN0_1 Mask

Definition at line 6550 of file M471M_R1_S.h.

◆ PWM_INTEN0_IFAIEN0_1_Pos

#define PWM_INTEN0_IFAIEN0_1_Pos   (7)

PWM_T::INTEN0: IFAIEN0_1 Position

Definition at line 6549 of file M471M_R1_S.h.

◆ PWM_INTEN0_IFAIEN2_3_Msk

#define PWM_INTEN0_IFAIEN2_3_Msk   (0x1ul << PWM_INTEN0_IFAIEN2_3_Pos)

PWM_T::INTEN0: IFAIEN2_3 Mask

Definition at line 6574 of file M471M_R1_S.h.

◆ PWM_INTEN0_IFAIEN2_3_Pos

#define PWM_INTEN0_IFAIEN2_3_Pos   (15)

PWM_T::INTEN0: IFAIEN2_3 Position

Definition at line 6573 of file M471M_R1_S.h.

◆ PWM_INTEN0_IFAIEN4_5_Msk

#define PWM_INTEN0_IFAIEN4_5_Msk   (0x1ul << PWM_INTEN0_IFAIEN4_5_Pos)

PWM_T::INTEN0: IFAIEN4_5 Mask

Definition at line 6598 of file M471M_R1_S.h.

◆ PWM_INTEN0_IFAIEN4_5_Pos

#define PWM_INTEN0_IFAIEN4_5_Pos   (23)

PWM_T::INTEN0: IFAIEN4_5 Position

Definition at line 6597 of file M471M_R1_S.h.

◆ PWM_INTEN0_PIEN0_Msk

#define PWM_INTEN0_PIEN0_Msk   (0x1ul << PWM_INTEN0_PIEN0_Pos)

PWM_T::INTEN0: PIEN0 Mask

Definition at line 6556 of file M471M_R1_S.h.

◆ PWM_INTEN0_PIEN0_Pos

#define PWM_INTEN0_PIEN0_Pos   (8)

PWM_T::INTEN0: PIEN0 Position

Definition at line 6555 of file M471M_R1_S.h.

◆ PWM_INTEN0_PIEN1_Msk

#define PWM_INTEN0_PIEN1_Msk   (0x1ul << PWM_INTEN0_PIEN1_Pos)

PWM_T::INTEN0: PIEN1 Mask

Definition at line 6559 of file M471M_R1_S.h.

◆ PWM_INTEN0_PIEN1_Pos

#define PWM_INTEN0_PIEN1_Pos   (9)

PWM_T::INTEN0: PIEN1 Position

Definition at line 6558 of file M471M_R1_S.h.

◆ PWM_INTEN0_PIEN2_Msk

#define PWM_INTEN0_PIEN2_Msk   (0x1ul << PWM_INTEN0_PIEN2_Pos)

PWM_T::INTEN0: PIEN2 Mask

Definition at line 6562 of file M471M_R1_S.h.

◆ PWM_INTEN0_PIEN2_Pos

#define PWM_INTEN0_PIEN2_Pos   (10)

PWM_T::INTEN0: PIEN2 Position

Definition at line 6561 of file M471M_R1_S.h.

◆ PWM_INTEN0_PIEN3_Msk

#define PWM_INTEN0_PIEN3_Msk   (0x1ul << PWM_INTEN0_PIEN3_Pos)

PWM_T::INTEN0: PIEN3 Mask

Definition at line 6565 of file M471M_R1_S.h.

◆ PWM_INTEN0_PIEN3_Pos

#define PWM_INTEN0_PIEN3_Pos   (11)

PWM_T::INTEN0: PIEN3 Position

Definition at line 6564 of file M471M_R1_S.h.

◆ PWM_INTEN0_PIEN4_Msk

#define PWM_INTEN0_PIEN4_Msk   (0x1ul << PWM_INTEN0_PIEN4_Pos)

PWM_T::INTEN0: PIEN4 Mask

Definition at line 6568 of file M471M_R1_S.h.

◆ PWM_INTEN0_PIEN4_Pos

#define PWM_INTEN0_PIEN4_Pos   (12)

PWM_T::INTEN0: PIEN4 Position

Definition at line 6567 of file M471M_R1_S.h.

◆ PWM_INTEN0_PIEN5_Msk

#define PWM_INTEN0_PIEN5_Msk   (0x1ul << PWM_INTEN0_PIEN5_Pos)

PWM_T::INTEN0: PIEN5 Mask

Definition at line 6571 of file M471M_R1_S.h.

◆ PWM_INTEN0_PIEN5_Pos

#define PWM_INTEN0_PIEN5_Pos   (13)

PWM_T::INTEN0: PIEN5 Position

Definition at line 6570 of file M471M_R1_S.h.

◆ PWM_INTEN0_PIENn_Msk

#define PWM_INTEN0_PIENn_Msk   (0x3ful << PWM_INTEN0_PIENn_Pos)

PWM_T::INTEN0: PIENn Mask

Definition at line 6553 of file M471M_R1_S.h.

◆ PWM_INTEN0_PIENn_Pos

#define PWM_INTEN0_PIENn_Pos   (8)

PWM_T::INTEN0: PIENn Position

Definition at line 6552 of file M471M_R1_S.h.

◆ PWM_INTEN0_ZIEN0_Msk

#define PWM_INTEN0_ZIEN0_Msk   (0x1ul << PWM_INTEN0_ZIEN0_Pos)

PWM_T::INTEN0: ZIEN0 Mask

Definition at line 6532 of file M471M_R1_S.h.

◆ PWM_INTEN0_ZIEN0_Pos

#define PWM_INTEN0_ZIEN0_Pos   (0)

PWM_T::INTEN0: ZIEN0 Position

Definition at line 6531 of file M471M_R1_S.h.

◆ PWM_INTEN0_ZIEN1_Msk

#define PWM_INTEN0_ZIEN1_Msk   (0x1ul << PWM_INTEN0_ZIEN1_Pos)

PWM_T::INTEN0: ZIEN1 Mask

Definition at line 6535 of file M471M_R1_S.h.

◆ PWM_INTEN0_ZIEN1_Pos

#define PWM_INTEN0_ZIEN1_Pos   (1)

PWM_T::INTEN0: ZIEN1 Position

Definition at line 6534 of file M471M_R1_S.h.

◆ PWM_INTEN0_ZIEN2_Msk

#define PWM_INTEN0_ZIEN2_Msk   (0x1ul << PWM_INTEN0_ZIEN2_Pos)

PWM_T::INTEN0: ZIEN2 Mask

Definition at line 6538 of file M471M_R1_S.h.

◆ PWM_INTEN0_ZIEN2_Pos

#define PWM_INTEN0_ZIEN2_Pos   (2)

PWM_T::INTEN0: ZIEN2 Position

Definition at line 6537 of file M471M_R1_S.h.

◆ PWM_INTEN0_ZIEN3_Msk

#define PWM_INTEN0_ZIEN3_Msk   (0x1ul << PWM_INTEN0_ZIEN3_Pos)

PWM_T::INTEN0: ZIEN3 Mask

Definition at line 6541 of file M471M_R1_S.h.

◆ PWM_INTEN0_ZIEN3_Pos

#define PWM_INTEN0_ZIEN3_Pos   (3)

PWM_T::INTEN0: ZIEN3 Position

Definition at line 6540 of file M471M_R1_S.h.

◆ PWM_INTEN0_ZIEN4_Msk

#define PWM_INTEN0_ZIEN4_Msk   (0x1ul << PWM_INTEN0_ZIEN4_Pos)

PWM_T::INTEN0: ZIEN4 Mask

Definition at line 6544 of file M471M_R1_S.h.

◆ PWM_INTEN0_ZIEN4_Pos

#define PWM_INTEN0_ZIEN4_Pos   (4)

PWM_T::INTEN0: ZIEN4 Position

Definition at line 6543 of file M471M_R1_S.h.

◆ PWM_INTEN0_ZIEN5_Msk

#define PWM_INTEN0_ZIEN5_Msk   (0x1ul << PWM_INTEN0_ZIEN5_Pos)

PWM_T::INTEN0: ZIEN5 Mask

Definition at line 6547 of file M471M_R1_S.h.

◆ PWM_INTEN0_ZIEN5_Pos

#define PWM_INTEN0_ZIEN5_Pos   (5)

PWM_T::INTEN0: ZIEN5 Position

Definition at line 6546 of file M471M_R1_S.h.

◆ PWM_INTEN0_ZIENn_Msk

#define PWM_INTEN0_ZIENn_Msk   (0x3ful << PWM_INTEN0_ZIENn_Pos)

PWM_T::INTEN0: ZIENn Mask

Definition at line 6529 of file M471M_R1_S.h.

◆ PWM_INTEN0_ZIENn_Pos

#define PWM_INTEN0_ZIENn_Pos   (0)

PWM_T::INTEN0: ZIENn Position

Definition at line 6528 of file M471M_R1_S.h.

◆ PWM_INTEN1_BRKEIEN0_1_Msk

#define PWM_INTEN1_BRKEIEN0_1_Msk   (0x1ul << PWM_INTEN1_BRKEIEN0_1_Pos)

PWM_T::INTEN1: BRKEIEN0_1 Mask

Definition at line 6622 of file M471M_R1_S.h.

◆ PWM_INTEN1_BRKEIEN0_1_Pos

#define PWM_INTEN1_BRKEIEN0_1_Pos   (0)

PWM_T::INTEN1: BRKEIEN0_1 Position

Definition at line 6621 of file M471M_R1_S.h.

◆ PWM_INTEN1_BRKEIEN2_3_Msk

#define PWM_INTEN1_BRKEIEN2_3_Msk   (0x1ul << PWM_INTEN1_BRKEIEN2_3_Pos)

PWM_T::INTEN1: BRKEIEN2_3 Mask

Definition at line 6625 of file M471M_R1_S.h.

◆ PWM_INTEN1_BRKEIEN2_3_Pos

#define PWM_INTEN1_BRKEIEN2_3_Pos   (1)

PWM_T::INTEN1: BRKEIEN2_3 Position

Definition at line 6624 of file M471M_R1_S.h.

◆ PWM_INTEN1_BRKEIEN4_5_Msk

#define PWM_INTEN1_BRKEIEN4_5_Msk   (0x1ul << PWM_INTEN1_BRKEIEN4_5_Pos)

PWM_T::INTEN1: BRKEIEN4_5 Mask

Definition at line 6628 of file M471M_R1_S.h.

◆ PWM_INTEN1_BRKEIEN4_5_Pos

#define PWM_INTEN1_BRKEIEN4_5_Pos   (2)

PWM_T::INTEN1: BRKEIEN4_5 Position

Definition at line 6627 of file M471M_R1_S.h.

◆ PWM_INTEN1_BRKLIEN0_1_Msk

#define PWM_INTEN1_BRKLIEN0_1_Msk   (0x1ul << PWM_INTEN1_BRKLIEN0_1_Pos)

PWM_T::INTEN1: BRKLIEN0_1 Mask

Definition at line 6631 of file M471M_R1_S.h.

◆ PWM_INTEN1_BRKLIEN0_1_Pos

#define PWM_INTEN1_BRKLIEN0_1_Pos   (8)

PWM_T::INTEN1: BRKLIEN0_1 Position

Definition at line 6630 of file M471M_R1_S.h.

◆ PWM_INTEN1_BRKLIEN2_3_Msk

#define PWM_INTEN1_BRKLIEN2_3_Msk   (0x1ul << PWM_INTEN1_BRKLIEN2_3_Pos)

PWM_T::INTEN1: BRKLIEN2_3 Mask

Definition at line 6634 of file M471M_R1_S.h.

◆ PWM_INTEN1_BRKLIEN2_3_Pos

#define PWM_INTEN1_BRKLIEN2_3_Pos   (9)

PWM_T::INTEN1: BRKLIEN2_3 Position

Definition at line 6633 of file M471M_R1_S.h.

◆ PWM_INTEN1_BRKLIEN4_5_Msk

#define PWM_INTEN1_BRKLIEN4_5_Msk   (0x1ul << PWM_INTEN1_BRKLIEN4_5_Pos)

PWM_T::INTEN1: BRKLIEN4_5 Mask

Definition at line 6637 of file M471M_R1_S.h.

◆ PWM_INTEN1_BRKLIEN4_5_Pos

#define PWM_INTEN1_BRKLIEN4_5_Pos   (10)

PWM_T::INTEN1: BRKLIEN4_5 Position

Definition at line 6636 of file M471M_R1_S.h.

◆ PWM_INTSTS0_CMPDIF0_Msk

#define PWM_INTSTS0_CMPDIF0_Msk   (0x1ul << PWM_INTSTS0_CMPDIF0_Pos)

PWM_T::INTSTS0: CMPDIF0 Mask

Definition at line 6715 of file M471M_R1_S.h.

◆ PWM_INTSTS0_CMPDIF0_Pos

#define PWM_INTSTS0_CMPDIF0_Pos   (24)

PWM_T::INTSTS0: CMPDIF0 Position

Definition at line 6714 of file M471M_R1_S.h.

◆ PWM_INTSTS0_CMPDIF1_Msk

#define PWM_INTSTS0_CMPDIF1_Msk   (0x1ul << PWM_INTSTS0_CMPDIF1_Pos)

PWM_T::INTSTS0: CMPDIF1 Mask

Definition at line 6718 of file M471M_R1_S.h.

◆ PWM_INTSTS0_CMPDIF1_Pos

#define PWM_INTSTS0_CMPDIF1_Pos   (25)

PWM_T::INTSTS0: CMPDIF1 Position

Definition at line 6717 of file M471M_R1_S.h.

◆ PWM_INTSTS0_CMPDIF2_Msk

#define PWM_INTSTS0_CMPDIF2_Msk   (0x1ul << PWM_INTSTS0_CMPDIF2_Pos)

PWM_T::INTSTS0: CMPDIF2 Mask

Definition at line 6721 of file M471M_R1_S.h.

◆ PWM_INTSTS0_CMPDIF2_Pos

#define PWM_INTSTS0_CMPDIF2_Pos   (26)

PWM_T::INTSTS0: CMPDIF2 Position

Definition at line 6720 of file M471M_R1_S.h.

◆ PWM_INTSTS0_CMPDIF3_Msk

#define PWM_INTSTS0_CMPDIF3_Msk   (0x1ul << PWM_INTSTS0_CMPDIF3_Pos)

PWM_T::INTSTS0: CMPDIF3 Mask

Definition at line 6724 of file M471M_R1_S.h.

◆ PWM_INTSTS0_CMPDIF3_Pos

#define PWM_INTSTS0_CMPDIF3_Pos   (27)

PWM_T::INTSTS0: CMPDIF3 Position

Definition at line 6723 of file M471M_R1_S.h.

◆ PWM_INTSTS0_CMPDIF4_Msk

#define PWM_INTSTS0_CMPDIF4_Msk   (0x1ul << PWM_INTSTS0_CMPDIF4_Pos)

PWM_T::INTSTS0: CMPDIF4 Mask

Definition at line 6727 of file M471M_R1_S.h.

◆ PWM_INTSTS0_CMPDIF4_Pos

#define PWM_INTSTS0_CMPDIF4_Pos   (28)

PWM_T::INTSTS0: CMPDIF4 Position

Definition at line 6726 of file M471M_R1_S.h.

◆ PWM_INTSTS0_CMPDIF5_Msk

#define PWM_INTSTS0_CMPDIF5_Msk   (0x1ul << PWM_INTSTS0_CMPDIF5_Pos)

PWM_T::INTSTS0: CMPDIF5 Mask

Definition at line 6730 of file M471M_R1_S.h.

◆ PWM_INTSTS0_CMPDIF5_Pos

#define PWM_INTSTS0_CMPDIF5_Pos   (29)

PWM_T::INTSTS0: CMPDIF5 Position

Definition at line 6729 of file M471M_R1_S.h.

◆ PWM_INTSTS0_CMPDIFn_Msk

#define PWM_INTSTS0_CMPDIFn_Msk   (0x3ful << PWM_INTSTS0_CMPDIFn_Pos)

PWM_T::INTSTS0: CMPDIFn Mask

Definition at line 6712 of file M471M_R1_S.h.

◆ PWM_INTSTS0_CMPDIFn_Pos

#define PWM_INTSTS0_CMPDIFn_Pos   (24)

PWM_T::INTSTS0: CMPDIFn Position

Definition at line 6711 of file M471M_R1_S.h.

◆ PWM_INTSTS0_CMPUIF0_Msk

#define PWM_INTSTS0_CMPUIF0_Msk   (0x1ul << PWM_INTSTS0_CMPUIF0_Pos)

PWM_T::INTSTS0: CMPUIF0 Mask

Definition at line 6691 of file M471M_R1_S.h.

◆ PWM_INTSTS0_CMPUIF0_Pos

#define PWM_INTSTS0_CMPUIF0_Pos   (16)

PWM_T::INTSTS0: CMPUIF0 Position

Definition at line 6690 of file M471M_R1_S.h.

◆ PWM_INTSTS0_CMPUIF1_Msk

#define PWM_INTSTS0_CMPUIF1_Msk   (0x1ul << PWM_INTSTS0_CMPUIF1_Pos)

PWM_T::INTSTS0: CMPUIF1 Mask

Definition at line 6694 of file M471M_R1_S.h.

◆ PWM_INTSTS0_CMPUIF1_Pos

#define PWM_INTSTS0_CMPUIF1_Pos   (17)

PWM_T::INTSTS0: CMPUIF1 Position

Definition at line 6693 of file M471M_R1_S.h.

◆ PWM_INTSTS0_CMPUIF2_Msk

#define PWM_INTSTS0_CMPUIF2_Msk   (0x1ul << PWM_INTSTS0_CMPUIF2_Pos)

PWM_T::INTSTS0: CMPUIF2 Mask

Definition at line 6697 of file M471M_R1_S.h.

◆ PWM_INTSTS0_CMPUIF2_Pos

#define PWM_INTSTS0_CMPUIF2_Pos   (18)

PWM_T::INTSTS0: CMPUIF2 Position

Definition at line 6696 of file M471M_R1_S.h.

◆ PWM_INTSTS0_CMPUIF3_Msk

#define PWM_INTSTS0_CMPUIF3_Msk   (0x1ul << PWM_INTSTS0_CMPUIF3_Pos)

PWM_T::INTSTS0: CMPUIF3 Mask

Definition at line 6700 of file M471M_R1_S.h.

◆ PWM_INTSTS0_CMPUIF3_Pos

#define PWM_INTSTS0_CMPUIF3_Pos   (19)

PWM_T::INTSTS0: CMPUIF3 Position

Definition at line 6699 of file M471M_R1_S.h.

◆ PWM_INTSTS0_CMPUIF4_Msk

#define PWM_INTSTS0_CMPUIF4_Msk   (0x1ul << PWM_INTSTS0_CMPUIF4_Pos)

PWM_T::INTSTS0: CMPUIF4 Mask

Definition at line 6703 of file M471M_R1_S.h.

◆ PWM_INTSTS0_CMPUIF4_Pos

#define PWM_INTSTS0_CMPUIF4_Pos   (20)

PWM_T::INTSTS0: CMPUIF4 Position

Definition at line 6702 of file M471M_R1_S.h.

◆ PWM_INTSTS0_CMPUIF5_Msk

#define PWM_INTSTS0_CMPUIF5_Msk   (0x1ul << PWM_INTSTS0_CMPUIF5_Pos)

PWM_T::INTSTS0: CMPUIF5 Mask

Definition at line 6706 of file M471M_R1_S.h.

◆ PWM_INTSTS0_CMPUIF5_Pos

#define PWM_INTSTS0_CMPUIF5_Pos   (21)

PWM_T::INTSTS0: CMPUIF5 Position

Definition at line 6705 of file M471M_R1_S.h.

◆ PWM_INTSTS0_CMPUIFn_Msk

#define PWM_INTSTS0_CMPUIFn_Msk   (0x3ful << PWM_INTSTS0_CMPUIFn_Pos)

PWM_T::INTSTS0: CMPUIFn Mask

Definition at line 6688 of file M471M_R1_S.h.

◆ PWM_INTSTS0_CMPUIFn_Pos

#define PWM_INTSTS0_CMPUIFn_Pos   (16)

PWM_T::INTSTS0: CMPUIFn Position

Definition at line 6687 of file M471M_R1_S.h.

◆ PWM_INTSTS0_IFAIF0_1_Msk

#define PWM_INTSTS0_IFAIF0_1_Msk   (0x1ul << PWM_INTSTS0_IFAIF0_1_Pos)

PWM_T::INTSTS0: IFAIF0_1 Mask

Definition at line 6661 of file M471M_R1_S.h.

◆ PWM_INTSTS0_IFAIF0_1_Pos

#define PWM_INTSTS0_IFAIF0_1_Pos   (7)

PWM_T::INTSTS0: IFAIF0_1 Position

Definition at line 6660 of file M471M_R1_S.h.

◆ PWM_INTSTS0_IFAIF2_3_Msk

#define PWM_INTSTS0_IFAIF2_3_Msk   (0x1ul << PWM_INTSTS0_IFAIF2_3_Pos)

PWM_T::INTSTS0: IFAIF2_3 Mask

Definition at line 6685 of file M471M_R1_S.h.

◆ PWM_INTSTS0_IFAIF2_3_Pos

#define PWM_INTSTS0_IFAIF2_3_Pos   (15)

PWM_T::INTSTS0: IFAIF2_3 Position

Definition at line 6684 of file M471M_R1_S.h.

◆ PWM_INTSTS0_IFAIF4_5_Msk

#define PWM_INTSTS0_IFAIF4_5_Msk   (0x1ul << PWM_INTSTS0_IFAIF4_5_Pos)

PWM_T::INTSTS0: IFAIF4_5 Mask

Definition at line 6709 of file M471M_R1_S.h.

◆ PWM_INTSTS0_IFAIF4_5_Pos

#define PWM_INTSTS0_IFAIF4_5_Pos   (23)

PWM_T::INTSTS0: IFAIF4_5 Position

Definition at line 6708 of file M471M_R1_S.h.

◆ PWM_INTSTS0_PIF0_Msk

#define PWM_INTSTS0_PIF0_Msk   (0x1ul << PWM_INTSTS0_PIF0_Pos)

PWM_T::INTSTS0: PIF0 Mask

Definition at line 6667 of file M471M_R1_S.h.

◆ PWM_INTSTS0_PIF0_Pos

#define PWM_INTSTS0_PIF0_Pos   (8)

PWM_T::INTSTS0: PIF0 Position

Definition at line 6666 of file M471M_R1_S.h.

◆ PWM_INTSTS0_PIF1_Msk

#define PWM_INTSTS0_PIF1_Msk   (0x1ul << PWM_INTSTS0_PIF1_Pos)

PWM_T::INTSTS0: PIF1 Mask

Definition at line 6670 of file M471M_R1_S.h.

◆ PWM_INTSTS0_PIF1_Pos

#define PWM_INTSTS0_PIF1_Pos   (9)

PWM_T::INTSTS0: PIF1 Position

Definition at line 6669 of file M471M_R1_S.h.

◆ PWM_INTSTS0_PIF2_Msk

#define PWM_INTSTS0_PIF2_Msk   (0x1ul << PWM_INTSTS0_PIF2_Pos)

PWM_T::INTSTS0: PIF2 Mask

Definition at line 6673 of file M471M_R1_S.h.

◆ PWM_INTSTS0_PIF2_Pos

#define PWM_INTSTS0_PIF2_Pos   (10)

PWM_T::INTSTS0: PIF2 Position

Definition at line 6672 of file M471M_R1_S.h.

◆ PWM_INTSTS0_PIF3_Msk

#define PWM_INTSTS0_PIF3_Msk   (0x1ul << PWM_INTSTS0_PIF3_Pos)

PWM_T::INTSTS0: PIF3 Mask

Definition at line 6676 of file M471M_R1_S.h.

◆ PWM_INTSTS0_PIF3_Pos

#define PWM_INTSTS0_PIF3_Pos   (11)

PWM_T::INTSTS0: PIF3 Position

Definition at line 6675 of file M471M_R1_S.h.

◆ PWM_INTSTS0_PIF4_Msk

#define PWM_INTSTS0_PIF4_Msk   (0x1ul << PWM_INTSTS0_PIF4_Pos)

PWM_T::INTSTS0: PIF4 Mask

Definition at line 6679 of file M471M_R1_S.h.

◆ PWM_INTSTS0_PIF4_Pos

#define PWM_INTSTS0_PIF4_Pos   (12)

PWM_T::INTSTS0: PIF4 Position

Definition at line 6678 of file M471M_R1_S.h.

◆ PWM_INTSTS0_PIF5_Msk

#define PWM_INTSTS0_PIF5_Msk   (0x1ul << PWM_INTSTS0_PIF5_Pos)

PWM_T::INTSTS0: PIF5 Mask

Definition at line 6682 of file M471M_R1_S.h.

◆ PWM_INTSTS0_PIF5_Pos

#define PWM_INTSTS0_PIF5_Pos   (13)

PWM_T::INTSTS0: PIF5 Position

Definition at line 6681 of file M471M_R1_S.h.

◆ PWM_INTSTS0_PIFn_Msk

#define PWM_INTSTS0_PIFn_Msk   (0x3ful << PWM_INTSTS0_PIFn_Pos)

PWM_T::INTSTS0: PIFn Mask

Definition at line 6664 of file M471M_R1_S.h.

◆ PWM_INTSTS0_PIFn_Pos

#define PWM_INTSTS0_PIFn_Pos   (8)

PWM_T::INTSTS0: PIFn Position

Definition at line 6663 of file M471M_R1_S.h.

◆ PWM_INTSTS0_ZIF0_Msk

#define PWM_INTSTS0_ZIF0_Msk   (0x1ul << PWM_INTSTS0_ZIF0_Pos)

PWM_T::INTSTS0: ZIF0 Mask

Definition at line 6643 of file M471M_R1_S.h.

◆ PWM_INTSTS0_ZIF0_Pos

#define PWM_INTSTS0_ZIF0_Pos   (0)

PWM_T::INTSTS0: ZIF0 Position

Definition at line 6642 of file M471M_R1_S.h.

◆ PWM_INTSTS0_ZIF1_Msk

#define PWM_INTSTS0_ZIF1_Msk   (0x1ul << PWM_INTSTS0_ZIF1_Pos)

PWM_T::INTSTS0: ZIF1 Mask

Definition at line 6646 of file M471M_R1_S.h.

◆ PWM_INTSTS0_ZIF1_Pos

#define PWM_INTSTS0_ZIF1_Pos   (1)

PWM_T::INTSTS0: ZIF1 Position

Definition at line 6645 of file M471M_R1_S.h.

◆ PWM_INTSTS0_ZIF2_Msk

#define PWM_INTSTS0_ZIF2_Msk   (0x1ul << PWM_INTSTS0_ZIF2_Pos)

PWM_T::INTSTS0: ZIF2 Mask

Definition at line 6649 of file M471M_R1_S.h.

◆ PWM_INTSTS0_ZIF2_Pos

#define PWM_INTSTS0_ZIF2_Pos   (2)

PWM_T::INTSTS0: ZIF2 Position

Definition at line 6648 of file M471M_R1_S.h.

◆ PWM_INTSTS0_ZIF3_Msk

#define PWM_INTSTS0_ZIF3_Msk   (0x1ul << PWM_INTSTS0_ZIF3_Pos)

PWM_T::INTSTS0: ZIF3 Mask

Definition at line 6652 of file M471M_R1_S.h.

◆ PWM_INTSTS0_ZIF3_Pos

#define PWM_INTSTS0_ZIF3_Pos   (3)

PWM_T::INTSTS0: ZIF3 Position

Definition at line 6651 of file M471M_R1_S.h.

◆ PWM_INTSTS0_ZIF4_Msk

#define PWM_INTSTS0_ZIF4_Msk   (0x1ul << PWM_INTSTS0_ZIF4_Pos)

PWM_T::INTSTS0: ZIF4 Mask

Definition at line 6655 of file M471M_R1_S.h.

◆ PWM_INTSTS0_ZIF4_Pos

#define PWM_INTSTS0_ZIF4_Pos   (4)

PWM_T::INTSTS0: ZIF4 Position

Definition at line 6654 of file M471M_R1_S.h.

◆ PWM_INTSTS0_ZIF5_Msk

#define PWM_INTSTS0_ZIF5_Msk   (0x1ul << PWM_INTSTS0_ZIF5_Pos)

PWM_T::INTSTS0: ZIF5 Mask

Definition at line 6658 of file M471M_R1_S.h.

◆ PWM_INTSTS0_ZIF5_Pos

#define PWM_INTSTS0_ZIF5_Pos   (5)

PWM_T::INTSTS0: ZIF5 Position

Definition at line 6657 of file M471M_R1_S.h.

◆ PWM_INTSTS0_ZIFn_Msk

#define PWM_INTSTS0_ZIFn_Msk   (0x3ful << PWM_INTSTS0_ZIFn_Pos)

PWM_T::INTSTS0: ZIFn Mask

Definition at line 6640 of file M471M_R1_S.h.

◆ PWM_INTSTS0_ZIFn_Pos

#define PWM_INTSTS0_ZIFn_Pos   (0)

PWM_T::INTSTS0: ZIFn Position

Definition at line 6639 of file M471M_R1_S.h.

◆ PWM_INTSTS1_BRKEIF0_Msk

#define PWM_INTSTS1_BRKEIF0_Msk   (0x1ul << PWM_INTSTS1_BRKEIF0_Pos)

PWM_T::INTSTS1: BRKEIF0 Mask

Definition at line 6736 of file M471M_R1_S.h.

◆ PWM_INTSTS1_BRKEIF0_Pos

#define PWM_INTSTS1_BRKEIF0_Pos   (0)

PWM_T::INTSTS1: BRKEIF0 Position

Definition at line 6735 of file M471M_R1_S.h.

◆ PWM_INTSTS1_BRKEIF1_Msk

#define PWM_INTSTS1_BRKEIF1_Msk   (0x1ul << PWM_INTSTS1_BRKEIF1_Pos)

PWM_T::INTSTS1: BRKEIF1 Mask

Definition at line 6739 of file M471M_R1_S.h.

◆ PWM_INTSTS1_BRKEIF1_Pos

#define PWM_INTSTS1_BRKEIF1_Pos   (1)

PWM_T::INTSTS1: BRKEIF1 Position

Definition at line 6738 of file M471M_R1_S.h.

◆ PWM_INTSTS1_BRKEIF2_Msk

#define PWM_INTSTS1_BRKEIF2_Msk   (0x1ul << PWM_INTSTS1_BRKEIF2_Pos)

PWM_T::INTSTS1: BRKEIF2 Mask

Definition at line 6742 of file M471M_R1_S.h.

◆ PWM_INTSTS1_BRKEIF2_Pos

#define PWM_INTSTS1_BRKEIF2_Pos   (2)

PWM_T::INTSTS1: BRKEIF2 Position

Definition at line 6741 of file M471M_R1_S.h.

◆ PWM_INTSTS1_BRKEIF3_Msk

#define PWM_INTSTS1_BRKEIF3_Msk   (0x1ul << PWM_INTSTS1_BRKEIF3_Pos)

PWM_T::INTSTS1: BRKEIF3 Mask

Definition at line 6745 of file M471M_R1_S.h.

◆ PWM_INTSTS1_BRKEIF3_Pos

#define PWM_INTSTS1_BRKEIF3_Pos   (3)

PWM_T::INTSTS1: BRKEIF3 Position

Definition at line 6744 of file M471M_R1_S.h.

◆ PWM_INTSTS1_BRKEIF4_Msk

#define PWM_INTSTS1_BRKEIF4_Msk   (0x1ul << PWM_INTSTS1_BRKEIF4_Pos)

PWM_T::INTSTS1: BRKEIF4 Mask

Definition at line 6748 of file M471M_R1_S.h.

◆ PWM_INTSTS1_BRKEIF4_Pos

#define PWM_INTSTS1_BRKEIF4_Pos   (4)

PWM_T::INTSTS1: BRKEIF4 Position

Definition at line 6747 of file M471M_R1_S.h.

◆ PWM_INTSTS1_BRKEIF5_Msk

#define PWM_INTSTS1_BRKEIF5_Msk   (0x1ul << PWM_INTSTS1_BRKEIF5_Pos)

PWM_T::INTSTS1: BRKEIF5 Mask

Definition at line 6751 of file M471M_R1_S.h.

◆ PWM_INTSTS1_BRKEIF5_Pos

#define PWM_INTSTS1_BRKEIF5_Pos   (5)

PWM_T::INTSTS1: BRKEIF5 Position

Definition at line 6750 of file M471M_R1_S.h.

◆ PWM_INTSTS1_BRKEIFn_Msk

#define PWM_INTSTS1_BRKEIFn_Msk   (0x3ful << PWM_INTSTS1_BRKEIFn_Pos)

PWM_T::INTSTS1: BRKEIFn Mask

Definition at line 6733 of file M471M_R1_S.h.

◆ PWM_INTSTS1_BRKEIFn_Pos

#define PWM_INTSTS1_BRKEIFn_Pos   (0)

PWM_T::INTSTS1: BRKEIFn Position

Definition at line 6732 of file M471M_R1_S.h.

◆ PWM_INTSTS1_BRKESTS0_Msk

#define PWM_INTSTS1_BRKESTS0_Msk   (0x1ul << PWM_INTSTS1_BRKESTS0_Pos)

PWM_T::INTSTS1: BRKESTS0 Mask

Definition at line 6775 of file M471M_R1_S.h.

◆ PWM_INTSTS1_BRKESTS0_Pos

#define PWM_INTSTS1_BRKESTS0_Pos   (16)

PWM_T::INTSTS1: BRKESTS0 Position

Definition at line 6774 of file M471M_R1_S.h.

◆ PWM_INTSTS1_BRKESTS1_Msk

#define PWM_INTSTS1_BRKESTS1_Msk   (0x1ul << PWM_INTSTS1_BRKESTS1_Pos)

PWM_T::INTSTS1: BRKESTS1 Mask

Definition at line 6778 of file M471M_R1_S.h.

◆ PWM_INTSTS1_BRKESTS1_Pos

#define PWM_INTSTS1_BRKESTS1_Pos   (17)

PWM_T::INTSTS1: BRKESTS1 Position

Definition at line 6777 of file M471M_R1_S.h.

◆ PWM_INTSTS1_BRKESTS2_Msk

#define PWM_INTSTS1_BRKESTS2_Msk   (0x1ul << PWM_INTSTS1_BRKESTS2_Pos)

PWM_T::INTSTS1: BRKESTS2 Mask

Definition at line 6781 of file M471M_R1_S.h.

◆ PWM_INTSTS1_BRKESTS2_Pos

#define PWM_INTSTS1_BRKESTS2_Pos   (18)

PWM_T::INTSTS1: BRKESTS2 Position

Definition at line 6780 of file M471M_R1_S.h.

◆ PWM_INTSTS1_BRKESTS3_Msk

#define PWM_INTSTS1_BRKESTS3_Msk   (0x1ul << PWM_INTSTS1_BRKESTS3_Pos)

PWM_T::INTSTS1: BRKESTS3 Mask

Definition at line 6784 of file M471M_R1_S.h.

◆ PWM_INTSTS1_BRKESTS3_Pos

#define PWM_INTSTS1_BRKESTS3_Pos   (19)

PWM_T::INTSTS1: BRKESTS3 Position

Definition at line 6783 of file M471M_R1_S.h.

◆ PWM_INTSTS1_BRKESTS4_Msk

#define PWM_INTSTS1_BRKESTS4_Msk   (0x1ul << PWM_INTSTS1_BRKESTS4_Pos)

PWM_T::INTSTS1: BRKESTS4 Mask

Definition at line 6787 of file M471M_R1_S.h.

◆ PWM_INTSTS1_BRKESTS4_Pos

#define PWM_INTSTS1_BRKESTS4_Pos   (20)

PWM_T::INTSTS1: BRKESTS4 Position

Definition at line 6786 of file M471M_R1_S.h.

◆ PWM_INTSTS1_BRKESTS5_Msk

#define PWM_INTSTS1_BRKESTS5_Msk   (0x1ul << PWM_INTSTS1_BRKESTS5_Pos)

PWM_T::INTSTS1: BRKESTS5 Mask

Definition at line 6790 of file M471M_R1_S.h.

◆ PWM_INTSTS1_BRKESTS5_Pos

#define PWM_INTSTS1_BRKESTS5_Pos   (21)

PWM_T::INTSTS1: BRKESTS5 Position

Definition at line 6789 of file M471M_R1_S.h.

◆ PWM_INTSTS1_BRKLIF0_Msk

#define PWM_INTSTS1_BRKLIF0_Msk   (0x1ul << PWM_INTSTS1_BRKLIF0_Pos)

PWM_T::INTSTS1: BRKLIF0 Mask

Definition at line 6757 of file M471M_R1_S.h.

◆ PWM_INTSTS1_BRKLIF0_Pos

#define PWM_INTSTS1_BRKLIF0_Pos   (8)

PWM_T::INTSTS1: BRKLIF0 Position

Definition at line 6756 of file M471M_R1_S.h.

◆ PWM_INTSTS1_BRKLIF1_Msk

#define PWM_INTSTS1_BRKLIF1_Msk   (0x1ul << PWM_INTSTS1_BRKLIF1_Pos)

PWM_T::INTSTS1: BRKLIF1 Mask

Definition at line 6760 of file M471M_R1_S.h.

◆ PWM_INTSTS1_BRKLIF1_Pos

#define PWM_INTSTS1_BRKLIF1_Pos   (9)

PWM_T::INTSTS1: BRKLIF1 Position

Definition at line 6759 of file M471M_R1_S.h.

◆ PWM_INTSTS1_BRKLIF2_Msk

#define PWM_INTSTS1_BRKLIF2_Msk   (0x1ul << PWM_INTSTS1_BRKLIF2_Pos)

PWM_T::INTSTS1: BRKLIF2 Mask

Definition at line 6763 of file M471M_R1_S.h.

◆ PWM_INTSTS1_BRKLIF2_Pos

#define PWM_INTSTS1_BRKLIF2_Pos   (10)

PWM_T::INTSTS1: BRKLIF2 Position

Definition at line 6762 of file M471M_R1_S.h.

◆ PWM_INTSTS1_BRKLIF3_Msk

#define PWM_INTSTS1_BRKLIF3_Msk   (0x1ul << PWM_INTSTS1_BRKLIF3_Pos)

PWM_T::INTSTS1: BRKLIF3 Mask

Definition at line 6766 of file M471M_R1_S.h.

◆ PWM_INTSTS1_BRKLIF3_Pos

#define PWM_INTSTS1_BRKLIF3_Pos   (11)

PWM_T::INTSTS1: BRKLIF3 Position

Definition at line 6765 of file M471M_R1_S.h.

◆ PWM_INTSTS1_BRKLIF4_Msk

#define PWM_INTSTS1_BRKLIF4_Msk   (0x1ul << PWM_INTSTS1_BRKLIF4_Pos)

PWM_T::INTSTS1: BRKLIF4 Mask

Definition at line 6769 of file M471M_R1_S.h.

◆ PWM_INTSTS1_BRKLIF4_Pos

#define PWM_INTSTS1_BRKLIF4_Pos   (12)

PWM_T::INTSTS1: BRKLIF4 Position

Definition at line 6768 of file M471M_R1_S.h.

◆ PWM_INTSTS1_BRKLIF5_Msk

#define PWM_INTSTS1_BRKLIF5_Msk   (0x1ul << PWM_INTSTS1_BRKLIF5_Pos)

PWM_T::INTSTS1: BRKLIF5 Mask

Definition at line 6772 of file M471M_R1_S.h.

◆ PWM_INTSTS1_BRKLIF5_Pos

#define PWM_INTSTS1_BRKLIF5_Pos   (13)

PWM_T::INTSTS1: BRKLIF5 Position

Definition at line 6771 of file M471M_R1_S.h.

◆ PWM_INTSTS1_BRKLIFn_Msk

#define PWM_INTSTS1_BRKLIFn_Msk   (0x3ful << PWM_INTSTS1_BRKLIFn_Pos)

PWM_T::INTSTS1: BRKLIFn Mask

Definition at line 6754 of file M471M_R1_S.h.

◆ PWM_INTSTS1_BRKLIFn_Pos

#define PWM_INTSTS1_BRKLIFn_Pos   (8)

PWM_T::INTSTS1: BRKLIFn Position

Definition at line 6753 of file M471M_R1_S.h.

◆ PWM_INTSTS1_BRKLSTS0_Msk

#define PWM_INTSTS1_BRKLSTS0_Msk   (0x1ul << PWM_INTSTS1_BRKLSTS0_Pos)

PWM_T::INTSTS1: BRKLSTS0 Mask

Definition at line 6793 of file M471M_R1_S.h.

◆ PWM_INTSTS1_BRKLSTS0_Pos

#define PWM_INTSTS1_BRKLSTS0_Pos   (24)

PWM_T::INTSTS1: BRKLSTS0 Position

Definition at line 6792 of file M471M_R1_S.h.

◆ PWM_INTSTS1_BRKLSTS1_Msk

#define PWM_INTSTS1_BRKLSTS1_Msk   (0x1ul << PWM_INTSTS1_BRKLSTS1_Pos)

PWM_T::INTSTS1: BRKLSTS1 Mask

Definition at line 6796 of file M471M_R1_S.h.

◆ PWM_INTSTS1_BRKLSTS1_Pos

#define PWM_INTSTS1_BRKLSTS1_Pos   (25)

PWM_T::INTSTS1: BRKLSTS1 Position

Definition at line 6795 of file M471M_R1_S.h.

◆ PWM_INTSTS1_BRKLSTS2_Msk

#define PWM_INTSTS1_BRKLSTS2_Msk   (0x1ul << PWM_INTSTS1_BRKLSTS2_Pos)

PWM_T::INTSTS1: BRKLSTS2 Mask

Definition at line 6799 of file M471M_R1_S.h.

◆ PWM_INTSTS1_BRKLSTS2_Pos

#define PWM_INTSTS1_BRKLSTS2_Pos   (26)

PWM_T::INTSTS1: BRKLSTS2 Position

Definition at line 6798 of file M471M_R1_S.h.

◆ PWM_INTSTS1_BRKLSTS3_Msk

#define PWM_INTSTS1_BRKLSTS3_Msk   (0x1ul << PWM_INTSTS1_BRKLSTS3_Pos)

PWM_T::INTSTS1: BRKLSTS3 Mask

Definition at line 6802 of file M471M_R1_S.h.

◆ PWM_INTSTS1_BRKLSTS3_Pos

#define PWM_INTSTS1_BRKLSTS3_Pos   (27)

PWM_T::INTSTS1: BRKLSTS3 Position

Definition at line 6801 of file M471M_R1_S.h.

◆ PWM_INTSTS1_BRKLSTS4_Msk

#define PWM_INTSTS1_BRKLSTS4_Msk   (0x1ul << PWM_INTSTS1_BRKLSTS4_Pos)

PWM_T::INTSTS1: BRKLSTS4 Mask

Definition at line 6805 of file M471M_R1_S.h.

◆ PWM_INTSTS1_BRKLSTS4_Pos

#define PWM_INTSTS1_BRKLSTS4_Pos   (28)

PWM_T::INTSTS1: BRKLSTS4 Position

Definition at line 6804 of file M471M_R1_S.h.

◆ PWM_INTSTS1_BRKLSTS5_Msk

#define PWM_INTSTS1_BRKLSTS5_Msk   (0x1ul << PWM_INTSTS1_BRKLSTS5_Pos)

PWM_T::INTSTS1: BRKLSTS5 Mask

Definition at line 6808 of file M471M_R1_S.h.

◆ PWM_INTSTS1_BRKLSTS5_Pos

#define PWM_INTSTS1_BRKLSTS5_Pos   (29)

PWM_T::INTSTS1: BRKLSTS5 Position

Definition at line 6807 of file M471M_R1_S.h.

◆ PWM_LOAD_LOAD0_Msk

#define PWM_LOAD_LOAD0_Msk   (0x1ul << PWM_LOAD_LOAD0_Pos)

PWM_T::LOAD: LOAD0 Mask

Definition at line 6160 of file M471M_R1_S.h.

◆ PWM_LOAD_LOAD0_Pos

#define PWM_LOAD_LOAD0_Pos   (0)

PWM_T::LOAD: LOAD0 Position

Definition at line 6159 of file M471M_R1_S.h.

◆ PWM_LOAD_LOAD1_Msk

#define PWM_LOAD_LOAD1_Msk   (0x1ul << PWM_LOAD_LOAD1_Pos)

PWM_T::LOAD: LOAD1 Mask

Definition at line 6163 of file M471M_R1_S.h.

◆ PWM_LOAD_LOAD1_Pos

#define PWM_LOAD_LOAD1_Pos   (1)

PWM_T::LOAD: LOAD1 Position

Definition at line 6162 of file M471M_R1_S.h.

◆ PWM_LOAD_LOAD2_Msk

#define PWM_LOAD_LOAD2_Msk   (0x1ul << PWM_LOAD_LOAD2_Pos)

PWM_T::LOAD: LOAD2 Mask

Definition at line 6166 of file M471M_R1_S.h.

◆ PWM_LOAD_LOAD2_Pos

#define PWM_LOAD_LOAD2_Pos   (2)

PWM_T::LOAD: LOAD2 Position

Definition at line 6165 of file M471M_R1_S.h.

◆ PWM_LOAD_LOAD3_Msk

#define PWM_LOAD_LOAD3_Msk   (0x1ul << PWM_LOAD_LOAD3_Pos)

PWM_T::LOAD: LOAD3 Mask

Definition at line 6169 of file M471M_R1_S.h.

◆ PWM_LOAD_LOAD3_Pos

#define PWM_LOAD_LOAD3_Pos   (3)

PWM_T::LOAD: LOAD3 Position

Definition at line 6168 of file M471M_R1_S.h.

◆ PWM_LOAD_LOAD4_Msk

#define PWM_LOAD_LOAD4_Msk   (0x1ul << PWM_LOAD_LOAD4_Pos)

PWM_T::LOAD: LOAD4 Mask

Definition at line 6172 of file M471M_R1_S.h.

◆ PWM_LOAD_LOAD4_Pos

#define PWM_LOAD_LOAD4_Pos   (4)

PWM_T::LOAD: LOAD4 Position

Definition at line 6171 of file M471M_R1_S.h.

◆ PWM_LOAD_LOAD5_Msk

#define PWM_LOAD_LOAD5_Msk   (0x1ul << PWM_LOAD_LOAD5_Pos)

PWM_T::LOAD: LOAD5 Mask

Definition at line 6175 of file M471M_R1_S.h.

◆ PWM_LOAD_LOAD5_Pos

#define PWM_LOAD_LOAD5_Pos   (5)

PWM_T::LOAD: LOAD5 Position

Definition at line 6174 of file M471M_R1_S.h.

◆ PWM_LOAD_LOADn_Msk

#define PWM_LOAD_LOADn_Msk   (0x3ful << PWM_LOAD_LOADn_Pos)

PWM_T::LOAD: LOADn Mask

Definition at line 6157 of file M471M_R1_S.h.

◆ PWM_LOAD_LOADn_Pos

#define PWM_LOAD_LOADn_Pos   (0)

PWM_T::LOAD: LOADn Position

Definition at line 6156 of file M471M_R1_S.h.

◆ PWM_MSK_MSKDAT0_Msk

#define PWM_MSK_MSKDAT0_Msk   (0x1ul << PWM_MSK_MSKDAT0_Pos)

PWM_T::MSK: MSKDAT0 Mask

Definition at line 6334 of file M471M_R1_S.h.

◆ PWM_MSK_MSKDAT0_Pos

#define PWM_MSK_MSKDAT0_Pos   (0)

PWM_T::MSK: MSKDAT0 Position

Definition at line 6333 of file M471M_R1_S.h.

◆ PWM_MSK_MSKDAT1_Msk

#define PWM_MSK_MSKDAT1_Msk   (0x1ul << PWM_MSK_MSKDAT1_Pos)

PWM_T::MSK: MSKDAT1 Mask

Definition at line 6337 of file M471M_R1_S.h.

◆ PWM_MSK_MSKDAT1_Pos

#define PWM_MSK_MSKDAT1_Pos   (1)

PWM_T::MSK: MSKDAT1 Position

Definition at line 6336 of file M471M_R1_S.h.

◆ PWM_MSK_MSKDAT2_Msk

#define PWM_MSK_MSKDAT2_Msk   (0x1ul << PWM_MSK_MSKDAT2_Pos)

PWM_T::MSK: MSKDAT2 Mask

Definition at line 6340 of file M471M_R1_S.h.

◆ PWM_MSK_MSKDAT2_Pos

#define PWM_MSK_MSKDAT2_Pos   (2)

PWM_T::MSK: MSKDAT2 Position

Definition at line 6339 of file M471M_R1_S.h.

◆ PWM_MSK_MSKDAT3_Msk

#define PWM_MSK_MSKDAT3_Msk   (0x1ul << PWM_MSK_MSKDAT3_Pos)

PWM_T::MSK: MSKDAT3 Mask

Definition at line 6343 of file M471M_R1_S.h.

◆ PWM_MSK_MSKDAT3_Pos

#define PWM_MSK_MSKDAT3_Pos   (3)

PWM_T::MSK: MSKDAT3 Position

Definition at line 6342 of file M471M_R1_S.h.

◆ PWM_MSK_MSKDAT4_Msk

#define PWM_MSK_MSKDAT4_Msk   (0x1ul << PWM_MSK_MSKDAT4_Pos)

PWM_T::MSK: MSKDAT4 Mask

Definition at line 6346 of file M471M_R1_S.h.

◆ PWM_MSK_MSKDAT4_Pos

#define PWM_MSK_MSKDAT4_Pos   (4)

PWM_T::MSK: MSKDAT4 Position

Definition at line 6345 of file M471M_R1_S.h.

◆ PWM_MSK_MSKDAT5_Msk

#define PWM_MSK_MSKDAT5_Msk   (0x1ul << PWM_MSK_MSKDAT5_Pos)

PWM_T::MSK: MSKDAT5 Mask

Definition at line 6349 of file M471M_R1_S.h.

◆ PWM_MSK_MSKDAT5_Pos

#define PWM_MSK_MSKDAT5_Pos   (5)

PWM_T::MSK: MSKDAT5 Position

Definition at line 6348 of file M471M_R1_S.h.

◆ PWM_MSK_MSKDATn_Msk

#define PWM_MSK_MSKDATn_Msk   (0x3ful << PWM_MSK_MSKDATn_Pos)

PWM_T::MSK: MSKDATn Mask

Definition at line 6331 of file M471M_R1_S.h.

◆ PWM_MSK_MSKDATn_Pos

#define PWM_MSK_MSKDATn_Pos   (0)

PWM_T::MSK: MSKDATn Position

Definition at line 6330 of file M471M_R1_S.h.

◆ PWM_MSKEN_MSKEN0_Msk

#define PWM_MSKEN_MSKEN0_Msk   (0x1ul << PWM_MSKEN_MSKEN0_Pos)

PWM_T::MSKEN: MSKEN0 Mask

Definition at line 6313 of file M471M_R1_S.h.

◆ PWM_MSKEN_MSKEN0_Pos

#define PWM_MSKEN_MSKEN0_Pos   (0)

PWM_T::MSKEN: MSKEN0 Position

Definition at line 6312 of file M471M_R1_S.h.

◆ PWM_MSKEN_MSKEN1_Msk

#define PWM_MSKEN_MSKEN1_Msk   (0x1ul << PWM_MSKEN_MSKEN1_Pos)

PWM_T::MSKEN: MSKEN1 Mask

Definition at line 6316 of file M471M_R1_S.h.

◆ PWM_MSKEN_MSKEN1_Pos

#define PWM_MSKEN_MSKEN1_Pos   (1)

PWM_T::MSKEN: MSKEN1 Position

Definition at line 6315 of file M471M_R1_S.h.

◆ PWM_MSKEN_MSKEN2_Msk

#define PWM_MSKEN_MSKEN2_Msk   (0x1ul << PWM_MSKEN_MSKEN2_Pos)

PWM_T::MSKEN: MSKEN2 Mask

Definition at line 6319 of file M471M_R1_S.h.

◆ PWM_MSKEN_MSKEN2_Pos

#define PWM_MSKEN_MSKEN2_Pos   (2)

PWM_T::MSKEN: MSKEN2 Position

Definition at line 6318 of file M471M_R1_S.h.

◆ PWM_MSKEN_MSKEN3_Msk

#define PWM_MSKEN_MSKEN3_Msk   (0x1ul << PWM_MSKEN_MSKEN3_Pos)

PWM_T::MSKEN: MSKEN3 Mask

Definition at line 6322 of file M471M_R1_S.h.

◆ PWM_MSKEN_MSKEN3_Pos

#define PWM_MSKEN_MSKEN3_Pos   (3)

PWM_T::MSKEN: MSKEN3 Position

Definition at line 6321 of file M471M_R1_S.h.

◆ PWM_MSKEN_MSKEN4_Msk

#define PWM_MSKEN_MSKEN4_Msk   (0x1ul << PWM_MSKEN_MSKEN4_Pos)

PWM_T::MSKEN: MSKEN4 Mask

Definition at line 6325 of file M471M_R1_S.h.

◆ PWM_MSKEN_MSKEN4_Pos

#define PWM_MSKEN_MSKEN4_Pos   (4)

PWM_T::MSKEN: MSKEN4 Position

Definition at line 6324 of file M471M_R1_S.h.

◆ PWM_MSKEN_MSKEN5_Msk

#define PWM_MSKEN_MSKEN5_Msk   (0x1ul << PWM_MSKEN_MSKEN5_Pos)

PWM_T::MSKEN: MSKEN5 Mask

Definition at line 6328 of file M471M_R1_S.h.

◆ PWM_MSKEN_MSKEN5_Pos

#define PWM_MSKEN_MSKEN5_Pos   (5)

PWM_T::MSKEN: MSKEN5 Position

Definition at line 6327 of file M471M_R1_S.h.

◆ PWM_MSKEN_MSKENn_Msk

#define PWM_MSKEN_MSKENn_Msk   (0x3ful << PWM_MSKEN_MSKENn_Pos)

PWM_T::MSKEN: MSKENn Mask

Definition at line 6310 of file M471M_R1_S.h.

◆ PWM_MSKEN_MSKENn_Pos

#define PWM_MSKEN_MSKENn_Pos   (0)

PWM_T::MSKEN: MSKENn Position

Definition at line 6309 of file M471M_R1_S.h.

◆ PWM_PBUF_PBUF_Msk

#define PWM_PBUF_PBUF_Msk   (0xfffful << PWM_PBUF_PBUF_Pos)

PWM_T::PBUF: PBUF Mask

Definition at line 7273 of file M471M_R1_S.h.

◆ PWM_PBUF_PBUF_Pos

#define PWM_PBUF_PBUF_Pos   (0)

PWM_T::PBUF: PBUF Position

Definition at line 7272 of file M471M_R1_S.h.

◆ PWM_PDMACAP0_1_CAPBUF_Msk

#define PWM_PDMACAP0_1_CAPBUF_Msk   (0xfffful << PWM_PDMACAP0_1_CAPBUF_Pos)

PWM_T::PDMACAP0_1: CAPBUF Mask

Definition at line 7180 of file M471M_R1_S.h.

◆ PWM_PDMACAP0_1_CAPBUF_Pos

#define PWM_PDMACAP0_1_CAPBUF_Pos   (0)

PWM_T::PDMACAP0_1: CAPBUF Position

Definition at line 7179 of file M471M_R1_S.h.

◆ PWM_PDMACAP2_3_CAPBUF_Msk

#define PWM_PDMACAP2_3_CAPBUF_Msk   (0xfffful << PWM_PDMACAP2_3_CAPBUF_Pos)

PWM_T::PDMACAP2_3: CAPBUF Mask

Definition at line 7183 of file M471M_R1_S.h.

◆ PWM_PDMACAP2_3_CAPBUF_Pos

#define PWM_PDMACAP2_3_CAPBUF_Pos   (0)

PWM_T::PDMACAP2_3: CAPBUF Position

Definition at line 7182 of file M471M_R1_S.h.

◆ PWM_PDMACAP4_5_CAPBUF_Msk

#define PWM_PDMACAP4_5_CAPBUF_Msk   (0xfffful << PWM_PDMACAP4_5_CAPBUF_Pos)

PWM_T::PDMACAP4_5: CAPBUF Mask

Definition at line 7186 of file M471M_R1_S.h.

◆ PWM_PDMACAP4_5_CAPBUF_Pos

#define PWM_PDMACAP4_5_CAPBUF_Pos   (0)

PWM_T::PDMACAP4_5: CAPBUF Position

Definition at line 7185 of file M471M_R1_S.h.

◆ PWM_PDMACTL_CAPMOD0_1_Msk

#define PWM_PDMACTL_CAPMOD0_1_Msk   (0x3ul << PWM_PDMACTL_CAPMOD0_1_Pos)

PWM_T::PDMACTL: CAPMOD0_1 Mask

Definition at line 7147 of file M471M_R1_S.h.

◆ PWM_PDMACTL_CAPMOD0_1_Pos

#define PWM_PDMACTL_CAPMOD0_1_Pos   (1)

PWM_T::PDMACTL: CAPMOD0_1 Position

Definition at line 7146 of file M471M_R1_S.h.

◆ PWM_PDMACTL_CAPMOD2_3_Msk

#define PWM_PDMACTL_CAPMOD2_3_Msk   (0x3ul << PWM_PDMACTL_CAPMOD2_3_Pos)

PWM_T::PDMACTL: CAPMOD2_3 Mask

Definition at line 7159 of file M471M_R1_S.h.

◆ PWM_PDMACTL_CAPMOD2_3_Pos

#define PWM_PDMACTL_CAPMOD2_3_Pos   (9)

PWM_T::PDMACTL: CAPMOD2_3 Position

Definition at line 7158 of file M471M_R1_S.h.

◆ PWM_PDMACTL_CAPMOD4_5_Msk

#define PWM_PDMACTL_CAPMOD4_5_Msk   (0x3ul << PWM_PDMACTL_CAPMOD4_5_Pos)

PWM_T::PDMACTL: CAPMOD4_5 Mask

Definition at line 7171 of file M471M_R1_S.h.

◆ PWM_PDMACTL_CAPMOD4_5_Pos

#define PWM_PDMACTL_CAPMOD4_5_Pos   (17)

PWM_T::PDMACTL: CAPMOD4_5 Position

Definition at line 7170 of file M471M_R1_S.h.

◆ PWM_PDMACTL_CAPORD0_1_Msk

#define PWM_PDMACTL_CAPORD0_1_Msk   (0x1ul << PWM_PDMACTL_CAPORD0_1_Pos)

PWM_T::PDMACTL: CAPORD0_1 Mask

Definition at line 7150 of file M471M_R1_S.h.

◆ PWM_PDMACTL_CAPORD0_1_Pos

#define PWM_PDMACTL_CAPORD0_1_Pos   (3)

PWM_T::PDMACTL: CAPORD0_1 Position

Definition at line 7149 of file M471M_R1_S.h.

◆ PWM_PDMACTL_CAPORD2_3_Msk

#define PWM_PDMACTL_CAPORD2_3_Msk   (0x1ul << PWM_PDMACTL_CAPORD2_3_Pos)

PWM_T::PDMACTL: CAPORD2_3 Mask

Definition at line 7162 of file M471M_R1_S.h.

◆ PWM_PDMACTL_CAPORD2_3_Pos

#define PWM_PDMACTL_CAPORD2_3_Pos   (11)

PWM_T::PDMACTL: CAPORD2_3 Position

Definition at line 7161 of file M471M_R1_S.h.

◆ PWM_PDMACTL_CAPORD4_5_Msk

#define PWM_PDMACTL_CAPORD4_5_Msk   (0x1ul << PWM_PDMACTL_CAPORD4_5_Pos)

PWM_T::PDMACTL: CAPORD4_5 Mask

Definition at line 7174 of file M471M_R1_S.h.

◆ PWM_PDMACTL_CAPORD4_5_Pos

#define PWM_PDMACTL_CAPORD4_5_Pos   (19)

PWM_T::PDMACTL: CAPORD4_5 Position

Definition at line 7173 of file M471M_R1_S.h.

◆ PWM_PDMACTL_CHEN0_1_Msk

#define PWM_PDMACTL_CHEN0_1_Msk   (0x1ul << PWM_PDMACTL_CHEN0_1_Pos)

PWM_T::PDMACTL: CHEN0_1 Mask

Definition at line 7144 of file M471M_R1_S.h.

◆ PWM_PDMACTL_CHEN0_1_Pos

#define PWM_PDMACTL_CHEN0_1_Pos   (0)

PWM_T::PDMACTL: CHEN0_1 Position

Definition at line 7143 of file M471M_R1_S.h.

◆ PWM_PDMACTL_CHEN2_3_Msk

#define PWM_PDMACTL_CHEN2_3_Msk   (0x1ul << PWM_PDMACTL_CHEN2_3_Pos)

PWM_T::PDMACTL: CHEN2_3 Mask

Definition at line 7156 of file M471M_R1_S.h.

◆ PWM_PDMACTL_CHEN2_3_Pos

#define PWM_PDMACTL_CHEN2_3_Pos   (8)

PWM_T::PDMACTL: CHEN2_3 Position

Definition at line 7155 of file M471M_R1_S.h.

◆ PWM_PDMACTL_CHEN4_5_Msk

#define PWM_PDMACTL_CHEN4_5_Msk   (0x1ul << PWM_PDMACTL_CHEN4_5_Pos)

PWM_T::PDMACTL: CHEN4_5 Mask

Definition at line 7168 of file M471M_R1_S.h.

◆ PWM_PDMACTL_CHEN4_5_Pos

#define PWM_PDMACTL_CHEN4_5_Pos   (16)

PWM_T::PDMACTL: CHEN4_5 Position

Definition at line 7167 of file M471M_R1_S.h.

◆ PWM_PDMACTL_CHSEL0_1_Msk

#define PWM_PDMACTL_CHSEL0_1_Msk   (0x1ul << PWM_PDMACTL_CHSEL0_1_Pos)

PWM_T::PDMACTL: CHSEL0_1 Mask

Definition at line 7153 of file M471M_R1_S.h.

◆ PWM_PDMACTL_CHSEL0_1_Pos

#define PWM_PDMACTL_CHSEL0_1_Pos   (4)

PWM_T::PDMACTL: CHSEL0_1 Position

Definition at line 7152 of file M471M_R1_S.h.

◆ PWM_PDMACTL_CHSEL2_3_Msk

#define PWM_PDMACTL_CHSEL2_3_Msk   (0x1ul << PWM_PDMACTL_CHSEL2_3_Pos)

PWM_T::PDMACTL: CHSEL2_3 Mask

Definition at line 7165 of file M471M_R1_S.h.

◆ PWM_PDMACTL_CHSEL2_3_Pos

#define PWM_PDMACTL_CHSEL2_3_Pos   (12)

PWM_T::PDMACTL: CHSEL2_3 Position

Definition at line 7164 of file M471M_R1_S.h.

◆ PWM_PDMACTL_CHSEL4_5_Msk

#define PWM_PDMACTL_CHSEL4_5_Msk   (0x1ul << PWM_PDMACTL_CHSEL4_5_Pos)

PWM_T::PDMACTL: CHSEL4_5 Mask

Definition at line 7177 of file M471M_R1_S.h.

◆ PWM_PDMACTL_CHSEL4_5_Pos

#define PWM_PDMACTL_CHSEL4_5_Pos   (20)

PWM_T::PDMACTL: CHSEL4_5 Position

Definition at line 7176 of file M471M_R1_S.h.

◆ PWM_PERIOD_PERIOD_Msk

#define PWM_PERIOD_PERIOD_Msk   (0xfffful << PWM_PERIOD_PERIOD_Pos)

PWM_T::PERIOD: PERIOD Mask

Definition at line 6178 of file M471M_R1_S.h.

◆ PWM_PERIOD_PERIOD_Pos

#define PWM_PERIOD_PERIOD_Pos   (0)

PWM_T::PERIOD: PERIOD Position

Definition at line 6177 of file M471M_R1_S.h.

◆ PWM_PHS0_1_PHS_Msk

#define PWM_PHS0_1_PHS_Msk   (0xfffful << PWM_PHS0_1_PHS_Pos)

PWM_T::PHS0_1: PHS Mask

Definition at line 6211 of file M471M_R1_S.h.

◆ PWM_PHS0_1_PHS_Pos

#define PWM_PHS0_1_PHS_Pos   (0)

PWM_T::PHS0_1: PHS Position

Definition at line 6210 of file M471M_R1_S.h.

◆ PWM_PHS2_3_PHS_Msk

#define PWM_PHS2_3_PHS_Msk   (0xfffful << PWM_PHS2_3_PHS_Pos)

PWM_T::PHS2_3: PHS Mask

Definition at line 6214 of file M471M_R1_S.h.

◆ PWM_PHS2_3_PHS_Pos

#define PWM_PHS2_3_PHS_Pos   (0)

PWM_T::PHS2_3: PHS Position

Definition at line 6213 of file M471M_R1_S.h.

◆ PWM_PHS4_5_PHS_Msk

#define PWM_PHS4_5_PHS_Msk   (0xfffful << PWM_PHS4_5_PHS_Pos)

PWM_T::PHS4_5: PHS Mask

Definition at line 6217 of file M471M_R1_S.h.

◆ PWM_PHS4_5_PHS_Pos

#define PWM_PHS4_5_PHS_Pos   (0)

PWM_T::PHS4_5: PHS Position

Definition at line 6216 of file M471M_R1_S.h.

◆ PWM_POEN_POEN0_Msk

#define PWM_POEN_POEN0_Msk   (0x1ul << PWM_POEN_POEN0_Pos)

PWM_T::POEN: POEN0 Mask

Definition at line 6487 of file M471M_R1_S.h.

◆ PWM_POEN_POEN0_Pos

#define PWM_POEN_POEN0_Pos   (0)

PWM_T::POEN: POEN0 Position

Definition at line 6486 of file M471M_R1_S.h.

◆ PWM_POEN_POEN1_Msk

#define PWM_POEN_POEN1_Msk   (0x1ul << PWM_POEN_POEN1_Pos)

PWM_T::POEN: POEN1 Mask

Definition at line 6490 of file M471M_R1_S.h.

◆ PWM_POEN_POEN1_Pos

#define PWM_POEN_POEN1_Pos   (1)

PWM_T::POEN: POEN1 Position

Definition at line 6489 of file M471M_R1_S.h.

◆ PWM_POEN_POEN2_Msk

#define PWM_POEN_POEN2_Msk   (0x1ul << PWM_POEN_POEN2_Pos)

PWM_T::POEN: POEN2 Mask

Definition at line 6493 of file M471M_R1_S.h.

◆ PWM_POEN_POEN2_Pos

#define PWM_POEN_POEN2_Pos   (2)

PWM_T::POEN: POEN2 Position

Definition at line 6492 of file M471M_R1_S.h.

◆ PWM_POEN_POEN3_Msk

#define PWM_POEN_POEN3_Msk   (0x1ul << PWM_POEN_POEN3_Pos)

PWM_T::POEN: POEN3 Mask

Definition at line 6496 of file M471M_R1_S.h.

◆ PWM_POEN_POEN3_Pos

#define PWM_POEN_POEN3_Pos   (3)

PWM_T::POEN: POEN3 Position

Definition at line 6495 of file M471M_R1_S.h.

◆ PWM_POEN_POEN4_Msk

#define PWM_POEN_POEN4_Msk   (0x1ul << PWM_POEN_POEN4_Pos)

PWM_T::POEN: POEN4 Mask

Definition at line 6499 of file M471M_R1_S.h.

◆ PWM_POEN_POEN4_Pos

#define PWM_POEN_POEN4_Pos   (4)

PWM_T::POEN: POEN4 Position

Definition at line 6498 of file M471M_R1_S.h.

◆ PWM_POEN_POEN5_Msk

#define PWM_POEN_POEN5_Msk   (0x1ul << PWM_POEN_POEN5_Pos)

PWM_T::POEN: POEN5 Mask

Definition at line 6502 of file M471M_R1_S.h.

◆ PWM_POEN_POEN5_Pos

#define PWM_POEN_POEN5_Pos   (5)

PWM_T::POEN: POEN5 Position

Definition at line 6501 of file M471M_R1_S.h.

◆ PWM_POEN_POENn_Msk

#define PWM_POEN_POENn_Msk   (0x3ful << PWM_POEN_POENn_Pos)

PWM_T::POEN: POENn Mask

Definition at line 6484 of file M471M_R1_S.h.

◆ PWM_POEN_POENn_Pos

#define PWM_POEN_POENn_Pos   (0)

PWM_T::POEN: POENn Position

Definition at line 6483 of file M471M_R1_S.h.

◆ PWM_POLCTL_PINV0_Msk

#define PWM_POLCTL_PINV0_Msk   (0x1ul << PWM_POLCTL_PINV0_Pos)

PWM_T::POLCTL: PINV0 Mask

Definition at line 6466 of file M471M_R1_S.h.

◆ PWM_POLCTL_PINV0_Pos

#define PWM_POLCTL_PINV0_Pos   (0)

PWM_T::POLCTL: PINV0 Position

Definition at line 6465 of file M471M_R1_S.h.

◆ PWM_POLCTL_PINV1_Msk

#define PWM_POLCTL_PINV1_Msk   (0x1ul << PWM_POLCTL_PINV1_Pos)

PWM_T::POLCTL: PINV1 Mask

Definition at line 6469 of file M471M_R1_S.h.

◆ PWM_POLCTL_PINV1_Pos

#define PWM_POLCTL_PINV1_Pos   (1)

PWM_T::POLCTL: PINV1 Position

Definition at line 6468 of file M471M_R1_S.h.

◆ PWM_POLCTL_PINV2_Msk

#define PWM_POLCTL_PINV2_Msk   (0x1ul << PWM_POLCTL_PINV2_Pos)

PWM_T::POLCTL: PINV2 Mask

Definition at line 6472 of file M471M_R1_S.h.

◆ PWM_POLCTL_PINV2_Pos

#define PWM_POLCTL_PINV2_Pos   (2)

PWM_T::POLCTL: PINV2 Position

Definition at line 6471 of file M471M_R1_S.h.

◆ PWM_POLCTL_PINV3_Msk

#define PWM_POLCTL_PINV3_Msk   (0x1ul << PWM_POLCTL_PINV3_Pos)

PWM_T::POLCTL: PINV3 Mask

Definition at line 6475 of file M471M_R1_S.h.

◆ PWM_POLCTL_PINV3_Pos

#define PWM_POLCTL_PINV3_Pos   (3)

PWM_T::POLCTL: PINV3 Position

Definition at line 6474 of file M471M_R1_S.h.

◆ PWM_POLCTL_PINV4_Msk

#define PWM_POLCTL_PINV4_Msk   (0x1ul << PWM_POLCTL_PINV4_Pos)

PWM_T::POLCTL: PINV4 Mask

Definition at line 6478 of file M471M_R1_S.h.

◆ PWM_POLCTL_PINV4_Pos

#define PWM_POLCTL_PINV4_Pos   (4)

PWM_T::POLCTL: PINV4 Position

Definition at line 6477 of file M471M_R1_S.h.

◆ PWM_POLCTL_PINV5_Msk

#define PWM_POLCTL_PINV5_Msk   (0x1ul << PWM_POLCTL_PINV5_Pos)

PWM_T::POLCTL: PINV5 Mask

Definition at line 6481 of file M471M_R1_S.h.

◆ PWM_POLCTL_PINV5_Pos

#define PWM_POLCTL_PINV5_Pos   (5)

PWM_T::POLCTL: PINV5 Position

Definition at line 6480 of file M471M_R1_S.h.

◆ PWM_POLCTL_PINVn_Msk

#define PWM_POLCTL_PINVn_Msk   (0x3ful << PWM_POLCTL_PINVn_Pos)

PWM_T::POLCTL: PINVn Mask

Definition at line 6463 of file M471M_R1_S.h.

◆ PWM_POLCTL_PINVn_Pos

#define PWM_POLCTL_PINVn_Pos   (0)

PWM_T::POLCTL: PINVn Position

Definition at line 6462 of file M471M_R1_S.h.

◆ PWM_RCAPDAT0_RCAPDAT_Msk

#define PWM_RCAPDAT0_RCAPDAT_Msk   (0xfffful << PWM_RCAPDAT0_RCAPDAT_Pos)

PWM_T::RCAPDAT0: RCAPDAT Mask

Definition at line 7108 of file M471M_R1_S.h.

◆ PWM_RCAPDAT0_RCAPDAT_Pos

#define PWM_RCAPDAT0_RCAPDAT_Pos   (0)

PWM_T::RCAPDAT0: RCAPDAT Position

Definition at line 7107 of file M471M_R1_S.h.

◆ PWM_RCAPDAT1_RCAPDAT_Msk

#define PWM_RCAPDAT1_RCAPDAT_Msk   (0xfffful << PWM_RCAPDAT1_RCAPDAT_Pos)

PWM_T::RCAPDAT1: RCAPDAT Mask

Definition at line 7114 of file M471M_R1_S.h.

◆ PWM_RCAPDAT1_RCAPDAT_Pos

#define PWM_RCAPDAT1_RCAPDAT_Pos   (0)

PWM_T::RCAPDAT1: RCAPDAT Position

Definition at line 7113 of file M471M_R1_S.h.

◆ PWM_RCAPDAT2_RCAPDAT_Msk

#define PWM_RCAPDAT2_RCAPDAT_Msk   (0xfffful << PWM_RCAPDAT2_RCAPDAT_Pos)

PWM_T::RCAPDAT2: RCAPDAT Mask

Definition at line 7120 of file M471M_R1_S.h.

◆ PWM_RCAPDAT2_RCAPDAT_Pos

#define PWM_RCAPDAT2_RCAPDAT_Pos   (0)

PWM_T::RCAPDAT2: RCAPDAT Position

Definition at line 7119 of file M471M_R1_S.h.

◆ PWM_RCAPDAT3_RCAPDAT_Msk

#define PWM_RCAPDAT3_RCAPDAT_Msk   (0xfffful << PWM_RCAPDAT3_RCAPDAT_Pos)

PWM_T::RCAPDAT3: RCAPDAT Mask

Definition at line 7126 of file M471M_R1_S.h.

◆ PWM_RCAPDAT3_RCAPDAT_Pos

#define PWM_RCAPDAT3_RCAPDAT_Pos   (0)

PWM_T::RCAPDAT3: RCAPDAT Position

Definition at line 7125 of file M471M_R1_S.h.

◆ PWM_RCAPDAT4_RCAPDAT_Msk

#define PWM_RCAPDAT4_RCAPDAT_Msk   (0xfffful << PWM_RCAPDAT4_RCAPDAT_Pos)

PWM_T::RCAPDAT4: RCAPDAT Mask

Definition at line 7132 of file M471M_R1_S.h.

◆ PWM_RCAPDAT4_RCAPDAT_Pos

#define PWM_RCAPDAT4_RCAPDAT_Pos   (0)

PWM_T::RCAPDAT4: RCAPDAT Position

Definition at line 7131 of file M471M_R1_S.h.

◆ PWM_RCAPDAT5_RCAPDAT_Msk

#define PWM_RCAPDAT5_RCAPDAT_Msk   (0xfffful << PWM_RCAPDAT5_RCAPDAT_Pos)

PWM_T::RCAPDAT5: RCAPDAT Mask

Definition at line 7138 of file M471M_R1_S.h.

◆ PWM_RCAPDAT5_RCAPDAT_Pos

#define PWM_RCAPDAT5_RCAPDAT_Pos   (0)

PWM_T::RCAPDAT5: RCAPDAT Position

Definition at line 7137 of file M471M_R1_S.h.

◆ PWM_SSCTL_SSEN0_Msk

#define PWM_SSCTL_SSEN0_Msk   (0x1ul << PWM_SSCTL_SSEN0_Pos)

PWM_T::SSCTL: SSEN0 Mask

Definition at line 6886 of file M471M_R1_S.h.

◆ PWM_SSCTL_SSEN0_Pos

#define PWM_SSCTL_SSEN0_Pos   (0)

PWM_T::SSCTL: SSEN0 Position

Definition at line 6885 of file M471M_R1_S.h.

◆ PWM_SSCTL_SSEN1_Msk

#define PWM_SSCTL_SSEN1_Msk   (0x1ul << PWM_SSCTL_SSEN1_Pos)

PWM_T::SSCTL: SSEN1 Mask

Definition at line 6889 of file M471M_R1_S.h.

◆ PWM_SSCTL_SSEN1_Pos

#define PWM_SSCTL_SSEN1_Pos   (1)

PWM_T::SSCTL: SSEN1 Position

Definition at line 6888 of file M471M_R1_S.h.

◆ PWM_SSCTL_SSEN2_Msk

#define PWM_SSCTL_SSEN2_Msk   (0x1ul << PWM_SSCTL_SSEN2_Pos)

PWM_T::SSCTL: SSEN2 Mask

Definition at line 6892 of file M471M_R1_S.h.

◆ PWM_SSCTL_SSEN2_Pos

#define PWM_SSCTL_SSEN2_Pos   (2)

PWM_T::SSCTL: SSEN2 Position

Definition at line 6891 of file M471M_R1_S.h.

◆ PWM_SSCTL_SSEN3_Msk

#define PWM_SSCTL_SSEN3_Msk   (0x1ul << PWM_SSCTL_SSEN3_Pos)

PWM_T::SSCTL: SSEN3 Mask

Definition at line 6895 of file M471M_R1_S.h.

◆ PWM_SSCTL_SSEN3_Pos

#define PWM_SSCTL_SSEN3_Pos   (3)

PWM_T::SSCTL: SSEN3 Position

Definition at line 6894 of file M471M_R1_S.h.

◆ PWM_SSCTL_SSEN4_Msk

#define PWM_SSCTL_SSEN4_Msk   (0x1ul << PWM_SSCTL_SSEN4_Pos)

PWM_T::SSCTL: SSEN4 Mask

Definition at line 6898 of file M471M_R1_S.h.

◆ PWM_SSCTL_SSEN4_Pos

#define PWM_SSCTL_SSEN4_Pos   (4)

PWM_T::SSCTL: SSEN4 Position

Definition at line 6897 of file M471M_R1_S.h.

◆ PWM_SSCTL_SSEN5_Msk

#define PWM_SSCTL_SSEN5_Msk   (0x1ul << PWM_SSCTL_SSEN5_Pos)

PWM_T::SSCTL: SSEN5 Mask

Definition at line 6901 of file M471M_R1_S.h.

◆ PWM_SSCTL_SSEN5_Pos

#define PWM_SSCTL_SSEN5_Pos   (5)

PWM_T::SSCTL: SSEN5 Position

Definition at line 6900 of file M471M_R1_S.h.

◆ PWM_SSCTL_SSENn_Msk

#define PWM_SSCTL_SSENn_Msk   (0x3ful << PWM_SSCTL_SSENn_Pos)

PWM_T::SSCTL: SSENn Mask

Definition at line 6883 of file M471M_R1_S.h.

◆ PWM_SSCTL_SSENn_Pos

#define PWM_SSCTL_SSENn_Pos   (0)

PWM_T::SSCTL: SSENn Position

Definition at line 6882 of file M471M_R1_S.h.

◆ PWM_SSTRG_CNTSEN_Msk

#define PWM_SSTRG_CNTSEN_Msk   (0x1ul << PWM_SSTRG_CNTSEN_Pos)

PWM_T::SSTRG: CNTSEN Mask

Definition at line 6904 of file M471M_R1_S.h.

◆ PWM_SSTRG_CNTSEN_Pos

#define PWM_SSTRG_CNTSEN_Pos   (0)

PWM_T::SSTRG: CNTSEN Position

Definition at line 6903 of file M471M_R1_S.h.

◆ PWM_STATUS_ADCTRGF0_Msk

#define PWM_STATUS_ADCTRGF0_Msk   (0x1ul << PWM_STATUS_ADCTRGF0_Pos)

PWM_T::STATUS: ADCTRGF0 Mask

Definition at line 6943 of file M471M_R1_S.h.

◆ PWM_STATUS_ADCTRGF0_Pos

#define PWM_STATUS_ADCTRGF0_Pos   (16)

PWM_T::STATUS: ADCTRGF0 Position

Definition at line 6942 of file M471M_R1_S.h.

◆ PWM_STATUS_ADCTRGF1_Msk

#define PWM_STATUS_ADCTRGF1_Msk   (0x1ul << PWM_STATUS_ADCTRGF1_Pos)

PWM_T::STATUS: ADCTRGF1 Mask

Definition at line 6946 of file M471M_R1_S.h.

◆ PWM_STATUS_ADCTRGF1_Pos

#define PWM_STATUS_ADCTRGF1_Pos   (17)

PWM_T::STATUS: ADCTRGF1 Position

Definition at line 6945 of file M471M_R1_S.h.

◆ PWM_STATUS_ADCTRGF2_Msk

#define PWM_STATUS_ADCTRGF2_Msk   (0x1ul << PWM_STATUS_ADCTRGF2_Pos)

PWM_T::STATUS: ADCTRGF2 Mask

Definition at line 6949 of file M471M_R1_S.h.

◆ PWM_STATUS_ADCTRGF2_Pos

#define PWM_STATUS_ADCTRGF2_Pos   (18)

PWM_T::STATUS: ADCTRGF2 Position

Definition at line 6948 of file M471M_R1_S.h.

◆ PWM_STATUS_ADCTRGF3_Msk

#define PWM_STATUS_ADCTRGF3_Msk   (0x1ul << PWM_STATUS_ADCTRGF3_Pos)

PWM_T::STATUS: ADCTRGF3 Mask

Definition at line 6952 of file M471M_R1_S.h.

◆ PWM_STATUS_ADCTRGF3_Pos

#define PWM_STATUS_ADCTRGF3_Pos   (19)

PWM_T::STATUS: ADCTRGF3 Position

Definition at line 6951 of file M471M_R1_S.h.

◆ PWM_STATUS_ADCTRGF4_Msk

#define PWM_STATUS_ADCTRGF4_Msk   (0x1ul << PWM_STATUS_ADCTRGF4_Pos)

PWM_T::STATUS: ADCTRGF4 Mask

Definition at line 6955 of file M471M_R1_S.h.

◆ PWM_STATUS_ADCTRGF4_Pos

#define PWM_STATUS_ADCTRGF4_Pos   (20)

PWM_T::STATUS: ADCTRGF4 Position

Definition at line 6954 of file M471M_R1_S.h.

◆ PWM_STATUS_ADCTRGF5_Msk

#define PWM_STATUS_ADCTRGF5_Msk   (0x1ul << PWM_STATUS_ADCTRGF5_Pos)

PWM_T::STATUS: ADCTRGF5 Mask

Definition at line 6958 of file M471M_R1_S.h.

◆ PWM_STATUS_ADCTRGF5_Pos

#define PWM_STATUS_ADCTRGF5_Pos   (21)

PWM_T::STATUS: ADCTRGF5 Position

Definition at line 6957 of file M471M_R1_S.h.

◆ PWM_STATUS_ADCTRGFn_Msk

#define PWM_STATUS_ADCTRGFn_Msk   (0x3ful << PWM_STATUS_ADCTRGFn_Pos)

PWM_T::STATUS: ADCTRGFn Mask

Definition at line 6940 of file M471M_R1_S.h.

◆ PWM_STATUS_ADCTRGFn_Pos

#define PWM_STATUS_ADCTRGFn_Pos   (16)

PWM_T::STATUS: ADCTRGFn Position

Definition at line 6939 of file M471M_R1_S.h.

◆ PWM_STATUS_CNTMAXF0_Msk

#define PWM_STATUS_CNTMAXF0_Msk   (0x1ul << PWM_STATUS_CNTMAXF0_Pos)

PWM_T::STATUS: CNTMAXF0 Mask

Definition at line 6910 of file M471M_R1_S.h.

◆ PWM_STATUS_CNTMAXF0_Pos

#define PWM_STATUS_CNTMAXF0_Pos   (0)

PWM_T::STATUS: CNTMAXF0 Position

Definition at line 6909 of file M471M_R1_S.h.

◆ PWM_STATUS_CNTMAXF1_Msk

#define PWM_STATUS_CNTMAXF1_Msk   (0x1ul << PWM_STATUS_CNTMAXF1_Pos)

PWM_T::STATUS: CNTMAXF1 Mask

Definition at line 6913 of file M471M_R1_S.h.

◆ PWM_STATUS_CNTMAXF1_Pos

#define PWM_STATUS_CNTMAXF1_Pos   (1)

PWM_T::STATUS: CNTMAXF1 Position

Definition at line 6912 of file M471M_R1_S.h.

◆ PWM_STATUS_CNTMAXF2_Msk

#define PWM_STATUS_CNTMAXF2_Msk   (0x1ul << PWM_STATUS_CNTMAXF2_Pos)

PWM_T::STATUS: CNTMAXF2 Mask

Definition at line 6916 of file M471M_R1_S.h.

◆ PWM_STATUS_CNTMAXF2_Pos

#define PWM_STATUS_CNTMAXF2_Pos   (2)

PWM_T::STATUS: CNTMAXF2 Position

Definition at line 6915 of file M471M_R1_S.h.

◆ PWM_STATUS_CNTMAXF3_Msk

#define PWM_STATUS_CNTMAXF3_Msk   (0x1ul << PWM_STATUS_CNTMAXF3_Pos)

PWM_T::STATUS: CNTMAXF3 Mask

Definition at line 6919 of file M471M_R1_S.h.

◆ PWM_STATUS_CNTMAXF3_Pos

#define PWM_STATUS_CNTMAXF3_Pos   (3)

PWM_T::STATUS: CNTMAXF3 Position

Definition at line 6918 of file M471M_R1_S.h.

◆ PWM_STATUS_CNTMAXF4_Msk

#define PWM_STATUS_CNTMAXF4_Msk   (0x1ul << PWM_STATUS_CNTMAXF4_Pos)

PWM_T::STATUS: CNTMAXF4 Mask

Definition at line 6922 of file M471M_R1_S.h.

◆ PWM_STATUS_CNTMAXF4_Pos

#define PWM_STATUS_CNTMAXF4_Pos   (4)

PWM_T::STATUS: CNTMAXF4 Position

Definition at line 6921 of file M471M_R1_S.h.

◆ PWM_STATUS_CNTMAXF5_Msk

#define PWM_STATUS_CNTMAXF5_Msk   (0x1ul << PWM_STATUS_CNTMAXF5_Pos)

PWM_T::STATUS: CNTMAXF5 Mask

Definition at line 6925 of file M471M_R1_S.h.

◆ PWM_STATUS_CNTMAXF5_Pos

#define PWM_STATUS_CNTMAXF5_Pos   (5)

PWM_T::STATUS: CNTMAXF5 Position

Definition at line 6924 of file M471M_R1_S.h.

◆ PWM_STATUS_CNTMAXFn_Msk

#define PWM_STATUS_CNTMAXFn_Msk   (0x3ful << PWM_STATUS_CNTMAXFn_Pos)

PWM_T::STATUS: CNTMAXFn Mask

Definition at line 6907 of file M471M_R1_S.h.

◆ PWM_STATUS_CNTMAXFn_Pos

#define PWM_STATUS_CNTMAXFn_Pos   (0)

PWM_T::STATUS: CNTMAXFn Position

Definition at line 6906 of file M471M_R1_S.h.

◆ PWM_STATUS_SYNCINF0_Msk

#define PWM_STATUS_SYNCINF0_Msk   (0x1ul << PWM_STATUS_SYNCINF0_Pos)

PWM_T::STATUS: SYNCINF0 Mask

Definition at line 6931 of file M471M_R1_S.h.

◆ PWM_STATUS_SYNCINF0_Pos

#define PWM_STATUS_SYNCINF0_Pos   (8)

PWM_T::STATUS: SYNCINF0 Position

Definition at line 6930 of file M471M_R1_S.h.

◆ PWM_STATUS_SYNCINF2_Msk

#define PWM_STATUS_SYNCINF2_Msk   (0x1ul << PWM_STATUS_SYNCINF2_Pos)

PWM_T::STATUS: SYNCINF2 Mask

Definition at line 6934 of file M471M_R1_S.h.

◆ PWM_STATUS_SYNCINF2_Pos

#define PWM_STATUS_SYNCINF2_Pos   (9)

PWM_T::STATUS: SYNCINF2 Position

Definition at line 6933 of file M471M_R1_S.h.

◆ PWM_STATUS_SYNCINF4_Msk

#define PWM_STATUS_SYNCINF4_Msk   (0x1ul << PWM_STATUS_SYNCINF4_Pos)

PWM_T::STATUS: SYNCINF4 Mask

Definition at line 6937 of file M471M_R1_S.h.

◆ PWM_STATUS_SYNCINF4_Pos

#define PWM_STATUS_SYNCINF4_Pos   (10)

PWM_T::STATUS: SYNCINF4 Position

Definition at line 6936 of file M471M_R1_S.h.

◆ PWM_STATUS_SYNCINFn_Msk

#define PWM_STATUS_SYNCINFn_Msk   (0x7ul << PWM_STATUS_SYNCINFn_Pos)

PWM_T::STATUS: SYNCINFn Mask

Definition at line 6928 of file M471M_R1_S.h.

◆ PWM_STATUS_SYNCINFn_Pos

#define PWM_STATUS_SYNCINFn_Pos   (8)

PWM_T::STATUS: SYNCINFn Position

Definition at line 6927 of file M471M_R1_S.h.

◆ PWM_SWBRK_BRKETRG0_Msk

#define PWM_SWBRK_BRKETRG0_Msk   (0x1ul << PWM_SWBRK_BRKETRG0_Pos)

PWM_T::SWBRK: BRKETRG0 Mask

Definition at line 6508 of file M471M_R1_S.h.

◆ PWM_SWBRK_BRKETRG0_Pos

#define PWM_SWBRK_BRKETRG0_Pos   (0)

PWM_T::SWBRK: BRKETRG0 Position

Definition at line 6507 of file M471M_R1_S.h.

◆ PWM_SWBRK_BRKETRG2_Msk

#define PWM_SWBRK_BRKETRG2_Msk   (0x1ul << PWM_SWBRK_BRKETRG2_Pos)

PWM_T::SWBRK: BRKETRG2 Mask

Definition at line 6511 of file M471M_R1_S.h.

◆ PWM_SWBRK_BRKETRG2_Pos

#define PWM_SWBRK_BRKETRG2_Pos   (1)

PWM_T::SWBRK: BRKETRG2 Position

Definition at line 6510 of file M471M_R1_S.h.

◆ PWM_SWBRK_BRKETRG4_Msk

#define PWM_SWBRK_BRKETRG4_Msk   (0x1ul << PWM_SWBRK_BRKETRG4_Pos)

PWM_T::SWBRK: BRKETRG4 Mask

Definition at line 6514 of file M471M_R1_S.h.

◆ PWM_SWBRK_BRKETRG4_Pos

#define PWM_SWBRK_BRKETRG4_Pos   (2)

PWM_T::SWBRK: BRKETRG4 Position

Definition at line 6513 of file M471M_R1_S.h.

◆ PWM_SWBRK_BRKETRGn_Msk

#define PWM_SWBRK_BRKETRGn_Msk   (0x7ul << PWM_SWBRK_BRKETRGn_Pos)

PWM_T::SWBRK: BRKETRGn Mask

Definition at line 6505 of file M471M_R1_S.h.

◆ PWM_SWBRK_BRKETRGn_Pos

#define PWM_SWBRK_BRKETRGn_Pos   (0)

PWM_T::SWBRK: BRKETRGn Position

Definition at line 6504 of file M471M_R1_S.h.

◆ PWM_SWBRK_BRKLTRG0_Msk

#define PWM_SWBRK_BRKLTRG0_Msk   (0x1ul << PWM_SWBRK_BRKLTRG0_Pos)

PWM_T::SWBRK: BRKLTRG0 Mask

Definition at line 6520 of file M471M_R1_S.h.

◆ PWM_SWBRK_BRKLTRG0_Pos

#define PWM_SWBRK_BRKLTRG0_Pos   (8)

PWM_T::SWBRK: BRKLTRG0 Position

Definition at line 6519 of file M471M_R1_S.h.

◆ PWM_SWBRK_BRKLTRG2_Msk

#define PWM_SWBRK_BRKLTRG2_Msk   (0x1ul << PWM_SWBRK_BRKLTRG2_Pos)

PWM_T::SWBRK: BRKLTRG2 Mask

Definition at line 6523 of file M471M_R1_S.h.

◆ PWM_SWBRK_BRKLTRG2_Pos

#define PWM_SWBRK_BRKLTRG2_Pos   (9)

PWM_T::SWBRK: BRKLTRG2 Position

Definition at line 6522 of file M471M_R1_S.h.

◆ PWM_SWBRK_BRKLTRG4_Msk

#define PWM_SWBRK_BRKLTRG4_Msk   (0x1ul << PWM_SWBRK_BRKLTRG4_Pos)

PWM_T::SWBRK: BRKLTRG4 Mask

Definition at line 6526 of file M471M_R1_S.h.

◆ PWM_SWBRK_BRKLTRG4_Pos

#define PWM_SWBRK_BRKLTRG4_Pos   (10)

PWM_T::SWBRK: BRKLTRG4 Position

Definition at line 6525 of file M471M_R1_S.h.

◆ PWM_SWBRK_BRKLTRGn_Msk

#define PWM_SWBRK_BRKLTRGn_Msk   (0x7ul << PWM_SWBRK_BRKLTRGn_Pos)

PWM_T::SWBRK: BRKLTRGn Mask

Definition at line 6517 of file M471M_R1_S.h.

◆ PWM_SWBRK_BRKLTRGn_Pos

#define PWM_SWBRK_BRKLTRGn_Pos   (8)

PWM_T::SWBRK: BRKLTRGn Position

Definition at line 6516 of file M471M_R1_S.h.

◆ PWM_SWSYNC_SWSYNC0_Msk

#define PWM_SWSYNC_SWSYNC0_Msk   (0x1ul << PWM_SWSYNC_SWSYNC0_Pos)

PWM_T::SWSYNC: SWSYNC0 Mask

Definition at line 6088 of file M471M_R1_S.h.

◆ PWM_SWSYNC_SWSYNC0_Pos

#define PWM_SWSYNC_SWSYNC0_Pos   (0)

PWM_T::SWSYNC: SWSYNC0 Position

Definition at line 6087 of file M471M_R1_S.h.

◆ PWM_SWSYNC_SWSYNC2_Msk

#define PWM_SWSYNC_SWSYNC2_Msk   (0x1ul << PWM_SWSYNC_SWSYNC2_Pos)

PWM_T::SWSYNC: SWSYNC2 Mask

Definition at line 6091 of file M471M_R1_S.h.

◆ PWM_SWSYNC_SWSYNC2_Pos

#define PWM_SWSYNC_SWSYNC2_Pos   (1)

PWM_T::SWSYNC: SWSYNC2 Position

Definition at line 6090 of file M471M_R1_S.h.

◆ PWM_SWSYNC_SWSYNC4_Msk

#define PWM_SWSYNC_SWSYNC4_Msk   (0x1ul << PWM_SWSYNC_SWSYNC4_Pos)

PWM_T::SWSYNC: SWSYNC4 Mask

Definition at line 6094 of file M471M_R1_S.h.

◆ PWM_SWSYNC_SWSYNC4_Pos

#define PWM_SWSYNC_SWSYNC4_Pos   (2)

PWM_T::SWSYNC: SWSYNC4 Position

Definition at line 6093 of file M471M_R1_S.h.

◆ PWM_SWSYNC_SWSYNCn_Msk

#define PWM_SWSYNC_SWSYNCn_Msk   (0x7ul << PWM_SWSYNC_SWSYNCn_Pos)

PWM_T::SWSYNC: SWSYNCn Mask

Definition at line 6085 of file M471M_R1_S.h.

◆ PWM_SWSYNC_SWSYNCn_Pos

#define PWM_SWSYNC_SWSYNCn_Pos   (0)

PWM_T::SWSYNC: SWSYNCn Position

Definition at line 6084 of file M471M_R1_S.h.

◆ PWM_SYNC_PHSDIR0_Msk

#define PWM_SYNC_PHSDIR0_Msk   (0x1ul << PWM_SYNC_PHSDIR0_Pos)

PWM_T::SYNC: PHSDIR0 Mask

Definition at line 6076 of file M471M_R1_S.h.

◆ PWM_SYNC_PHSDIR0_Pos

#define PWM_SYNC_PHSDIR0_Pos   (24)

PWM_T::SYNC: PHSDIR0 Position

Definition at line 6075 of file M471M_R1_S.h.

◆ PWM_SYNC_PHSDIR2_Msk

#define PWM_SYNC_PHSDIR2_Msk   (0x1ul << PWM_SYNC_PHSDIR2_Pos)

PWM_T::SYNC: PHSDIR2 Mask

Definition at line 6079 of file M471M_R1_S.h.

◆ PWM_SYNC_PHSDIR2_Pos

#define PWM_SYNC_PHSDIR2_Pos   (25)

PWM_T::SYNC: PHSDIR2 Position

Definition at line 6078 of file M471M_R1_S.h.

◆ PWM_SYNC_PHSDIR4_Msk

#define PWM_SYNC_PHSDIR4_Msk   (0x1ul << PWM_SYNC_PHSDIR4_Pos)

PWM_T::SYNC: PHSDIR4 Mask

Definition at line 6082 of file M471M_R1_S.h.

◆ PWM_SYNC_PHSDIR4_Pos

#define PWM_SYNC_PHSDIR4_Pos   (26)

PWM_T::SYNC: PHSDIR4 Position

Definition at line 6081 of file M471M_R1_S.h.

◆ PWM_SYNC_PHSDIRn_Msk

#define PWM_SYNC_PHSDIRn_Msk   (0x7ul << PWM_SYNC_PHSDIRn_Pos)

PWM_T::SYNC: PHSDIRn Mask

Definition at line 6073 of file M471M_R1_S.h.

◆ PWM_SYNC_PHSDIRn_Pos

#define PWM_SYNC_PHSDIRn_Pos   (24)

PWM_T::SYNC: PHSDIRn Position

Definition at line 6072 of file M471M_R1_S.h.

◆ PWM_SYNC_PHSEN0_Msk

#define PWM_SYNC_PHSEN0_Msk   (0x1ul << PWM_SYNC_PHSEN0_Pos)

PWM_T::SYNC: PHSEN0 Mask

Definition at line 6040 of file M471M_R1_S.h.

◆ PWM_SYNC_PHSEN0_Pos

#define PWM_SYNC_PHSEN0_Pos   (0)

PWM_T::SYNC: PHSEN0 Position

Definition at line 6039 of file M471M_R1_S.h.

◆ PWM_SYNC_PHSEN2_Msk

#define PWM_SYNC_PHSEN2_Msk   (0x1ul << PWM_SYNC_PHSEN2_Pos)

PWM_T::SYNC: PHSEN2 Mask

Definition at line 6043 of file M471M_R1_S.h.

◆ PWM_SYNC_PHSEN2_Pos

#define PWM_SYNC_PHSEN2_Pos   (1)

PWM_T::SYNC: PHSEN2 Position

Definition at line 6042 of file M471M_R1_S.h.

◆ PWM_SYNC_PHSEN4_Msk

#define PWM_SYNC_PHSEN4_Msk   (0x1ul << PWM_SYNC_PHSEN4_Pos)

PWM_T::SYNC: PHSEN4 Mask

Definition at line 6046 of file M471M_R1_S.h.

◆ PWM_SYNC_PHSEN4_Pos

#define PWM_SYNC_PHSEN4_Pos   (2)

PWM_T::SYNC: PHSEN4 Position

Definition at line 6045 of file M471M_R1_S.h.

◆ PWM_SYNC_PHSENn_Msk

#define PWM_SYNC_PHSENn_Msk   (0x7ul << PWM_SYNC_PHSENn_Pos)

PWM_T::SYNC: PHSENn Mask

Definition at line 6037 of file M471M_R1_S.h.

◆ PWM_SYNC_PHSENn_Pos

#define PWM_SYNC_PHSENn_Pos   (0)

PWM_T::SYNC: PHSENn Position

Definition at line 6036 of file M471M_R1_S.h.

◆ PWM_SYNC_SFLTCNT_Msk

#define PWM_SYNC_SFLTCNT_Msk   (0x7ul << PWM_SYNC_SFLTCNT_Pos)

PWM_T::SYNC: SFLTCNT Mask

Definition at line 6067 of file M471M_R1_S.h.

◆ PWM_SYNC_SFLTCNT_Pos

#define PWM_SYNC_SFLTCNT_Pos   (20)

PWM_T::SYNC: SFLTCNT Position

Definition at line 6066 of file M471M_R1_S.h.

◆ PWM_SYNC_SFLTCSEL_Msk

#define PWM_SYNC_SFLTCSEL_Msk   (0x7ul << PWM_SYNC_SFLTCSEL_Pos)

PWM_T::SYNC: SFLTCSEL Mask

Definition at line 6064 of file M471M_R1_S.h.

◆ PWM_SYNC_SFLTCSEL_Pos

#define PWM_SYNC_SFLTCSEL_Pos   (17)

PWM_T::SYNC: SFLTCSEL Position

Definition at line 6063 of file M471M_R1_S.h.

◆ PWM_SYNC_SINPINV_Msk

#define PWM_SYNC_SINPINV_Msk   (0x1ul << PWM_SYNC_SINPINV_Pos)

PWM_T::SYNC: SINPINV Mask

Definition at line 6070 of file M471M_R1_S.h.

◆ PWM_SYNC_SINPINV_Pos

#define PWM_SYNC_SINPINV_Pos   (23)

PWM_T::SYNC: SINPINV Position

Definition at line 6069 of file M471M_R1_S.h.

◆ PWM_SYNC_SINSRC0_Msk

#define PWM_SYNC_SINSRC0_Msk   (0x3ul << PWM_SYNC_SINSRC0_Pos)

PWM_T::SYNC: SINSRC0 Mask

Definition at line 6052 of file M471M_R1_S.h.

◆ PWM_SYNC_SINSRC0_Pos

#define PWM_SYNC_SINSRC0_Pos   (8)

PWM_T::SYNC: SINSRC0 Position

Definition at line 6051 of file M471M_R1_S.h.

◆ PWM_SYNC_SINSRC2_Msk

#define PWM_SYNC_SINSRC2_Msk   (0x3ul << PWM_SYNC_SINSRC2_Pos)

PWM_T::SYNC: SINSRC2 Mask

Definition at line 6055 of file M471M_R1_S.h.

◆ PWM_SYNC_SINSRC2_Pos

#define PWM_SYNC_SINSRC2_Pos   (10)

PWM_T::SYNC: SINSRC2 Position

Definition at line 6054 of file M471M_R1_S.h.

◆ PWM_SYNC_SINSRC4_Msk

#define PWM_SYNC_SINSRC4_Msk   (0x3ul << PWM_SYNC_SINSRC4_Pos)

PWM_T::SYNC: SINSRC4 Mask

Definition at line 6058 of file M471M_R1_S.h.

◆ PWM_SYNC_SINSRC4_Pos

#define PWM_SYNC_SINSRC4_Pos   (12)

PWM_T::SYNC: SINSRC4 Position

Definition at line 6057 of file M471M_R1_S.h.

◆ PWM_SYNC_SINSRCn_Msk

#define PWM_SYNC_SINSRCn_Msk   (0x3ful << PWM_SYNC_SINSRCn_Pos)

PWM_T::SYNC: SINSRCn Mask

Definition at line 6049 of file M471M_R1_S.h.

◆ PWM_SYNC_SINSRCn_Pos

#define PWM_SYNC_SINSRCn_Pos   (8)

PWM_T::SYNC: SINSRCn Position

Definition at line 6048 of file M471M_R1_S.h.

◆ PWM_SYNC_SNFLTEN_Msk

#define PWM_SYNC_SNFLTEN_Msk   (0x1ul << PWM_SYNC_SNFLTEN_Pos)

PWM_T::SYNC: SNFLTEN Mask

Definition at line 6061 of file M471M_R1_S.h.

◆ PWM_SYNC_SNFLTEN_Pos

#define PWM_SYNC_SNFLTEN_Pos   (16)

PWM_T::SYNC: SNFLTEN Position

Definition at line 6060 of file M471M_R1_S.h.

◆ PWM_WGCTL0_PRDPCTL0_Msk

#define PWM_WGCTL0_PRDPCTL0_Msk   (0x3ul << PWM_WGCTL0_PRDPCTL0_Pos)

PWM_T::WGCTL0: PRDPCTL0 Mask

Definition at line 6250 of file M471M_R1_S.h.

◆ PWM_WGCTL0_PRDPCTL0_Pos

#define PWM_WGCTL0_PRDPCTL0_Pos   (16)

PWM_T::WGCTL0: PRDPCTL0 Position

Definition at line 6249 of file M471M_R1_S.h.

◆ PWM_WGCTL0_PRDPCTL1_Msk

#define PWM_WGCTL0_PRDPCTL1_Msk   (0x3ul << PWM_WGCTL0_PRDPCTL1_Pos)

PWM_T::WGCTL0: PRDPCTL1 Mask

Definition at line 6253 of file M471M_R1_S.h.

◆ PWM_WGCTL0_PRDPCTL1_Pos

#define PWM_WGCTL0_PRDPCTL1_Pos   (18)

PWM_T::WGCTL0: PRDPCTL1 Position

Definition at line 6252 of file M471M_R1_S.h.

◆ PWM_WGCTL0_PRDPCTL2_Msk

#define PWM_WGCTL0_PRDPCTL2_Msk   (0x3ul << PWM_WGCTL0_PRDPCTL2_Pos)

PWM_T::WGCTL0: PRDPCTL2 Mask

Definition at line 6256 of file M471M_R1_S.h.

◆ PWM_WGCTL0_PRDPCTL2_Pos

#define PWM_WGCTL0_PRDPCTL2_Pos   (20)

PWM_T::WGCTL0: PRDPCTL2 Position

Definition at line 6255 of file M471M_R1_S.h.

◆ PWM_WGCTL0_PRDPCTL3_Msk

#define PWM_WGCTL0_PRDPCTL3_Msk   (0x3ul << PWM_WGCTL0_PRDPCTL3_Pos)

PWM_T::WGCTL0: PRDPCTL3 Mask

Definition at line 6259 of file M471M_R1_S.h.

◆ PWM_WGCTL0_PRDPCTL3_Pos

#define PWM_WGCTL0_PRDPCTL3_Pos   (22)

PWM_T::WGCTL0: PRDPCTL3 Position

Definition at line 6258 of file M471M_R1_S.h.

◆ PWM_WGCTL0_PRDPCTL4_Msk

#define PWM_WGCTL0_PRDPCTL4_Msk   (0x3ul << PWM_WGCTL0_PRDPCTL4_Pos)

PWM_T::WGCTL0: PRDPCTL4 Mask

Definition at line 6262 of file M471M_R1_S.h.

◆ PWM_WGCTL0_PRDPCTL4_Pos

#define PWM_WGCTL0_PRDPCTL4_Pos   (24)

PWM_T::WGCTL0: PRDPCTL4 Position

Definition at line 6261 of file M471M_R1_S.h.

◆ PWM_WGCTL0_PRDPCTL5_Msk

#define PWM_WGCTL0_PRDPCTL5_Msk   (0x3ul << PWM_WGCTL0_PRDPCTL5_Pos)

PWM_T::WGCTL0: PRDPCTL5 Mask

Definition at line 6265 of file M471M_R1_S.h.

◆ PWM_WGCTL0_PRDPCTL5_Pos

#define PWM_WGCTL0_PRDPCTL5_Pos   (26)

PWM_T::WGCTL0: PRDPCTL5 Position

Definition at line 6264 of file M471M_R1_S.h.

◆ PWM_WGCTL0_PRDPCTLn_Msk

#define PWM_WGCTL0_PRDPCTLn_Msk   (0xffful << PWM_WGCTL0_PRDPCTLn_Pos)

PWM_T::WGCTL0: PRDPCTLn Mask

Definition at line 6247 of file M471M_R1_S.h.

◆ PWM_WGCTL0_PRDPCTLn_Pos

#define PWM_WGCTL0_PRDPCTLn_Pos   (16)

PWM_T::WGCTL0: PRDPCTLn Position

Definition at line 6246 of file M471M_R1_S.h.

◆ PWM_WGCTL0_ZPCTL0_Msk

#define PWM_WGCTL0_ZPCTL0_Msk   (0x3ul << PWM_WGCTL0_ZPCTL0_Pos)

PWM_T::WGCTL0: ZPCTL0 Mask

Definition at line 6229 of file M471M_R1_S.h.

◆ PWM_WGCTL0_ZPCTL0_Pos

#define PWM_WGCTL0_ZPCTL0_Pos   (0)

PWM_T::WGCTL0: ZPCTL0 Position

Definition at line 6228 of file M471M_R1_S.h.

◆ PWM_WGCTL0_ZPCTL1_Msk

#define PWM_WGCTL0_ZPCTL1_Msk   (0x3ul << PWM_WGCTL0_ZPCTL1_Pos)

PWM_T::WGCTL0: ZPCTL1 Mask

Definition at line 6232 of file M471M_R1_S.h.

◆ PWM_WGCTL0_ZPCTL1_Pos

#define PWM_WGCTL0_ZPCTL1_Pos   (2)

PWM_T::WGCTL0: ZPCTL1 Position

Definition at line 6231 of file M471M_R1_S.h.

◆ PWM_WGCTL0_ZPCTL2_Msk

#define PWM_WGCTL0_ZPCTL2_Msk   (0x3ul << PWM_WGCTL0_ZPCTL2_Pos)

PWM_T::WGCTL0: ZPCTL2 Mask

Definition at line 6235 of file M471M_R1_S.h.

◆ PWM_WGCTL0_ZPCTL2_Pos

#define PWM_WGCTL0_ZPCTL2_Pos   (4)

PWM_T::WGCTL0: ZPCTL2 Position

Definition at line 6234 of file M471M_R1_S.h.

◆ PWM_WGCTL0_ZPCTL3_Msk

#define PWM_WGCTL0_ZPCTL3_Msk   (0x3ul << PWM_WGCTL0_ZPCTL3_Pos)

PWM_T::WGCTL0: ZPCTL3 Mask

Definition at line 6238 of file M471M_R1_S.h.

◆ PWM_WGCTL0_ZPCTL3_Pos

#define PWM_WGCTL0_ZPCTL3_Pos   (6)

PWM_T::WGCTL0: ZPCTL3 Position

Definition at line 6237 of file M471M_R1_S.h.

◆ PWM_WGCTL0_ZPCTL4_Msk

#define PWM_WGCTL0_ZPCTL4_Msk   (0x3ul << PWM_WGCTL0_ZPCTL4_Pos)

PWM_T::WGCTL0: ZPCTL4 Mask

Definition at line 6241 of file M471M_R1_S.h.

◆ PWM_WGCTL0_ZPCTL4_Pos

#define PWM_WGCTL0_ZPCTL4_Pos   (8)

PWM_T::WGCTL0: ZPCTL4 Position

Definition at line 6240 of file M471M_R1_S.h.

◆ PWM_WGCTL0_ZPCTL5_Msk

#define PWM_WGCTL0_ZPCTL5_Msk   (0x3ul << PWM_WGCTL0_ZPCTL5_Pos)

PWM_T::WGCTL0: ZPCTL5 Mask

Definition at line 6244 of file M471M_R1_S.h.

◆ PWM_WGCTL0_ZPCTL5_Pos

#define PWM_WGCTL0_ZPCTL5_Pos   (10)

PWM_T::WGCTL0: ZPCTL5 Position

Definition at line 6243 of file M471M_R1_S.h.

◆ PWM_WGCTL0_ZPCTLn_Msk

#define PWM_WGCTL0_ZPCTLn_Msk   (0xffful << PWM_WGCTL0_ZPCTLn_Pos)

PWM_T::WGCTL0: ZPCTLn Mask

Definition at line 6226 of file M471M_R1_S.h.

◆ PWM_WGCTL0_ZPCTLn_Pos

#define PWM_WGCTL0_ZPCTLn_Pos   (0)

PWM_T::WGCTL0: ZPCTLn Position

Definition at line 6225 of file M471M_R1_S.h.

◆ PWM_WGCTL1_CMPDCTL0_Msk

#define PWM_WGCTL1_CMPDCTL0_Msk   (0x3ul << PWM_WGCTL1_CMPDCTL0_Pos)

PWM_T::WGCTL1: CMPDCTL0 Mask

Definition at line 6292 of file M471M_R1_S.h.

◆ PWM_WGCTL1_CMPDCTL0_Pos

#define PWM_WGCTL1_CMPDCTL0_Pos   (16)

PWM_T::WGCTL1: CMPDCTL0 Position

Definition at line 6291 of file M471M_R1_S.h.

◆ PWM_WGCTL1_CMPDCTL1_Msk

#define PWM_WGCTL1_CMPDCTL1_Msk   (0x3ul << PWM_WGCTL1_CMPDCTL1_Pos)

PWM_T::WGCTL1: CMPDCTL1 Mask

Definition at line 6295 of file M471M_R1_S.h.

◆ PWM_WGCTL1_CMPDCTL1_Pos

#define PWM_WGCTL1_CMPDCTL1_Pos   (18)

PWM_T::WGCTL1: CMPDCTL1 Position

Definition at line 6294 of file M471M_R1_S.h.

◆ PWM_WGCTL1_CMPDCTL2_Msk

#define PWM_WGCTL1_CMPDCTL2_Msk   (0x3ul << PWM_WGCTL1_CMPDCTL2_Pos)

PWM_T::WGCTL1: CMPDCTL2 Mask

Definition at line 6298 of file M471M_R1_S.h.

◆ PWM_WGCTL1_CMPDCTL2_Pos

#define PWM_WGCTL1_CMPDCTL2_Pos   (20)

PWM_T::WGCTL1: CMPDCTL2 Position

Definition at line 6297 of file M471M_R1_S.h.

◆ PWM_WGCTL1_CMPDCTL3_Msk

#define PWM_WGCTL1_CMPDCTL3_Msk   (0x3ul << PWM_WGCTL1_CMPDCTL3_Pos)

PWM_T::WGCTL1: CMPDCTL3 Mask

Definition at line 6301 of file M471M_R1_S.h.

◆ PWM_WGCTL1_CMPDCTL3_Pos

#define PWM_WGCTL1_CMPDCTL3_Pos   (22)

PWM_T::WGCTL1: CMPDCTL3 Position

Definition at line 6300 of file M471M_R1_S.h.

◆ PWM_WGCTL1_CMPDCTL4_Msk

#define PWM_WGCTL1_CMPDCTL4_Msk   (0x3ul << PWM_WGCTL1_CMPDCTL4_Pos)

PWM_T::WGCTL1: CMPDCTL4 Mask

Definition at line 6304 of file M471M_R1_S.h.

◆ PWM_WGCTL1_CMPDCTL4_Pos

#define PWM_WGCTL1_CMPDCTL4_Pos   (24)

PWM_T::WGCTL1: CMPDCTL4 Position

Definition at line 6303 of file M471M_R1_S.h.

◆ PWM_WGCTL1_CMPDCTL5_Msk

#define PWM_WGCTL1_CMPDCTL5_Msk   (0x3ul << PWM_WGCTL1_CMPDCTL5_Pos)

PWM_T::WGCTL1: CMPDCTL5 Mask

Definition at line 6307 of file M471M_R1_S.h.

◆ PWM_WGCTL1_CMPDCTL5_Pos

#define PWM_WGCTL1_CMPDCTL5_Pos   (26)

PWM_T::WGCTL1: CMPDCTL5 Position

Definition at line 6306 of file M471M_R1_S.h.

◆ PWM_WGCTL1_CMPDCTLn_Msk

#define PWM_WGCTL1_CMPDCTLn_Msk   (0xffful << PWM_WGCTL1_CMPDCTLn_Pos)

PWM_T::WGCTL1: CMPDCTLn Mask

Definition at line 6289 of file M471M_R1_S.h.

◆ PWM_WGCTL1_CMPDCTLn_Pos

#define PWM_WGCTL1_CMPDCTLn_Pos   (16)

PWM_T::WGCTL1: CMPDCTLn Position

Definition at line 6288 of file M471M_R1_S.h.

◆ PWM_WGCTL1_CMPUCTL0_Msk

#define PWM_WGCTL1_CMPUCTL0_Msk   (0x3ul << PWM_WGCTL1_CMPUCTL0_Pos)

PWM_T::WGCTL1: CMPUCTL0 Mask

Definition at line 6271 of file M471M_R1_S.h.

◆ PWM_WGCTL1_CMPUCTL0_Pos

#define PWM_WGCTL1_CMPUCTL0_Pos   (0)

PWM_T::WGCTL1: CMPUCTL0 Position

Definition at line 6270 of file M471M_R1_S.h.

◆ PWM_WGCTL1_CMPUCTL1_Msk

#define PWM_WGCTL1_CMPUCTL1_Msk   (0x3ul << PWM_WGCTL1_CMPUCTL1_Pos)

PWM_T::WGCTL1: CMPUCTL1 Mask

Definition at line 6274 of file M471M_R1_S.h.

◆ PWM_WGCTL1_CMPUCTL1_Pos

#define PWM_WGCTL1_CMPUCTL1_Pos   (2)

PWM_T::WGCTL1: CMPUCTL1 Position

Definition at line 6273 of file M471M_R1_S.h.

◆ PWM_WGCTL1_CMPUCTL2_Msk

#define PWM_WGCTL1_CMPUCTL2_Msk   (0x3ul << PWM_WGCTL1_CMPUCTL2_Pos)

PWM_T::WGCTL1: CMPUCTL2 Mask

Definition at line 6277 of file M471M_R1_S.h.

◆ PWM_WGCTL1_CMPUCTL2_Pos

#define PWM_WGCTL1_CMPUCTL2_Pos   (4)

PWM_T::WGCTL1: CMPUCTL2 Position

Definition at line 6276 of file M471M_R1_S.h.

◆ PWM_WGCTL1_CMPUCTL3_Msk

#define PWM_WGCTL1_CMPUCTL3_Msk   (0x3ul << PWM_WGCTL1_CMPUCTL3_Pos)

PWM_T::WGCTL1: CMPUCTL3 Mask

Definition at line 6280 of file M471M_R1_S.h.

◆ PWM_WGCTL1_CMPUCTL3_Pos

#define PWM_WGCTL1_CMPUCTL3_Pos   (6)

PWM_T::WGCTL1: CMPUCTL3 Position

Definition at line 6279 of file M471M_R1_S.h.

◆ PWM_WGCTL1_CMPUCTL4_Msk

#define PWM_WGCTL1_CMPUCTL4_Msk   (0x3ul << PWM_WGCTL1_CMPUCTL4_Pos)

PWM_T::WGCTL1: CMPUCTL4 Mask

Definition at line 6283 of file M471M_R1_S.h.

◆ PWM_WGCTL1_CMPUCTL4_Pos

#define PWM_WGCTL1_CMPUCTL4_Pos   (8)

PWM_T::WGCTL1: CMPUCTL4 Position

Definition at line 6282 of file M471M_R1_S.h.

◆ PWM_WGCTL1_CMPUCTL5_Msk

#define PWM_WGCTL1_CMPUCTL5_Msk   (0x3ul << PWM_WGCTL1_CMPUCTL5_Pos)

PWM_T::WGCTL1: CMPUCTL5 Mask

Definition at line 6286 of file M471M_R1_S.h.

◆ PWM_WGCTL1_CMPUCTL5_Pos

#define PWM_WGCTL1_CMPUCTL5_Pos   (10)

PWM_T::WGCTL1: CMPUCTL5 Position

Definition at line 6285 of file M471M_R1_S.h.

◆ PWM_WGCTL1_CMPUCTLn_Msk

#define PWM_WGCTL1_CMPUCTLn_Msk   (0xffful << PWM_WGCTL1_CMPUCTLn_Pos)

PWM_T::WGCTL1: CMPUCTLn Mask

Definition at line 6268 of file M471M_R1_S.h.

◆ PWM_WGCTL1_CMPUCTLn_Pos

#define PWM_WGCTL1_CMPUCTLn_Pos   (0)

PWM_T::WGCTL1: CMPUCTLn Position

Definition at line 6267 of file M471M_R1_S.h.

◆ RTC_CAL_DAY_Msk

#define RTC_CAL_DAY_Msk   (0xful << RTC_CAL_DAY_Pos)

RTC_T::CAL: DAY Mask

Definition at line 7706 of file M471M_R1_S.h.

◆ RTC_CAL_DAY_Pos

#define RTC_CAL_DAY_Pos   (0)

RTC_T::CAL: DAY Position

Definition at line 7705 of file M471M_R1_S.h.

◆ RTC_CAL_MON_Msk

#define RTC_CAL_MON_Msk   (0xful << RTC_CAL_MON_Pos)

RTC_T::CAL: MON Mask

Definition at line 7712 of file M471M_R1_S.h.

◆ RTC_CAL_MON_Pos

#define RTC_CAL_MON_Pos   (8)

RTC_T::CAL: MON Position

Definition at line 7711 of file M471M_R1_S.h.

◆ RTC_CAL_TENDAY_Msk

#define RTC_CAL_TENDAY_Msk   (0x3ul << RTC_CAL_TENDAY_Pos)

RTC_T::CAL: TENDAY Mask

Definition at line 7709 of file M471M_R1_S.h.

◆ RTC_CAL_TENDAY_Pos

#define RTC_CAL_TENDAY_Pos   (4)

RTC_T::CAL: TENDAY Position

Definition at line 7708 of file M471M_R1_S.h.

◆ RTC_CAL_TENMON_Msk

#define RTC_CAL_TENMON_Msk   (0x1ul << RTC_CAL_TENMON_Pos)

RTC_T::CAL: TENMON Mask

Definition at line 7715 of file M471M_R1_S.h.

◆ RTC_CAL_TENMON_Pos

#define RTC_CAL_TENMON_Pos   (12)

RTC_T::CAL: TENMON Position

Definition at line 7714 of file M471M_R1_S.h.

◆ RTC_CAL_TENYEAR_Msk

#define RTC_CAL_TENYEAR_Msk   (0xful << RTC_CAL_TENYEAR_Pos)

RTC_T::CAL: TENYEAR Mask

Definition at line 7721 of file M471M_R1_S.h.

◆ RTC_CAL_TENYEAR_Pos

#define RTC_CAL_TENYEAR_Pos   (20)

RTC_T::CAL: TENYEAR Position

Definition at line 7720 of file M471M_R1_S.h.

◆ RTC_CAL_YEAR_Msk

#define RTC_CAL_YEAR_Msk   (0xful << RTC_CAL_YEAR_Pos)

RTC_T::CAL: YEAR Mask

Definition at line 7718 of file M471M_R1_S.h.

◆ RTC_CAL_YEAR_Pos

#define RTC_CAL_YEAR_Pos   (16)

RTC_T::CAL: YEAR Position

Definition at line 7717 of file M471M_R1_S.h.

◆ RTC_CALM_DAY_Msk

#define RTC_CALM_DAY_Msk   (0xful << RTC_CALM_DAY_Pos)

RTC_T::CALM: DAY Mask

Definition at line 7748 of file M471M_R1_S.h.

◆ RTC_CALM_DAY_Pos

#define RTC_CALM_DAY_Pos   (0)

RTC_T::CALM: DAY Position

Definition at line 7747 of file M471M_R1_S.h.

◆ RTC_CALM_MON_Msk

#define RTC_CALM_MON_Msk   (0xful << RTC_CALM_MON_Pos)

RTC_T::CALM: MON Mask

Definition at line 7754 of file M471M_R1_S.h.

◆ RTC_CALM_MON_Pos

#define RTC_CALM_MON_Pos   (8)

RTC_T::CALM: MON Position

Definition at line 7753 of file M471M_R1_S.h.

◆ RTC_CALM_TENDAY_Msk

#define RTC_CALM_TENDAY_Msk   (0x3ul << RTC_CALM_TENDAY_Pos)

RTC_T::CALM: TENDAY Mask

Definition at line 7751 of file M471M_R1_S.h.

◆ RTC_CALM_TENDAY_Pos

#define RTC_CALM_TENDAY_Pos   (4)

RTC_T::CALM: TENDAY Position

Definition at line 7750 of file M471M_R1_S.h.

◆ RTC_CALM_TENMON_Msk

#define RTC_CALM_TENMON_Msk   (0x1ul << RTC_CALM_TENMON_Pos)

RTC_T::CALM: TENMON Mask

Definition at line 7757 of file M471M_R1_S.h.

◆ RTC_CALM_TENMON_Pos

#define RTC_CALM_TENMON_Pos   (12)

RTC_T::CALM: TENMON Position

Definition at line 7756 of file M471M_R1_S.h.

◆ RTC_CALM_TENYEAR_Msk

#define RTC_CALM_TENYEAR_Msk   (0xful << RTC_CALM_TENYEAR_Pos)

RTC_T::CALM: TENYEAR Mask

Definition at line 7763 of file M471M_R1_S.h.

◆ RTC_CALM_TENYEAR_Pos

#define RTC_CALM_TENYEAR_Pos   (20)

RTC_T::CALM: TENYEAR Position

Definition at line 7762 of file M471M_R1_S.h.

◆ RTC_CALM_YEAR_Msk

#define RTC_CALM_YEAR_Msk   (0xful << RTC_CALM_YEAR_Pos)

RTC_T::CALM: YEAR Mask

Definition at line 7760 of file M471M_R1_S.h.

◆ RTC_CALM_YEAR_Pos

#define RTC_CALM_YEAR_Pos   (16)

RTC_T::CALM: YEAR Position

Definition at line 7759 of file M471M_R1_S.h.

◆ RTC_CAMSK_MDAY_Msk

#define RTC_CAMSK_MDAY_Msk   (0x1ul << RTC_CAMSK_MDAY_Pos)

RTC_T::CAMSK: MDAY Mask

Definition at line 7808 of file M471M_R1_S.h.

◆ RTC_CAMSK_MDAY_Pos

#define RTC_CAMSK_MDAY_Pos   (0)

RTC_T::CAMSK: MDAY Position

Definition at line 7807 of file M471M_R1_S.h.

◆ RTC_CAMSK_MMON_Msk

#define RTC_CAMSK_MMON_Msk   (0x1ul << RTC_CAMSK_MMON_Pos)

RTC_T::CAMSK: MMON Mask

Definition at line 7814 of file M471M_R1_S.h.

◆ RTC_CAMSK_MMON_Pos

#define RTC_CAMSK_MMON_Pos   (2)

RTC_T::CAMSK: MMON Position

Definition at line 7813 of file M471M_R1_S.h.

◆ RTC_CAMSK_MTENDAY_Msk

#define RTC_CAMSK_MTENDAY_Msk   (0x1ul << RTC_CAMSK_MTENDAY_Pos)

RTC_T::CAMSK: MTENDAY Mask

Definition at line 7811 of file M471M_R1_S.h.

◆ RTC_CAMSK_MTENDAY_Pos

#define RTC_CAMSK_MTENDAY_Pos   (1)

RTC_T::CAMSK: MTENDAY Position

Definition at line 7810 of file M471M_R1_S.h.

◆ RTC_CAMSK_MTENMON_Msk

#define RTC_CAMSK_MTENMON_Msk   (0x1ul << RTC_CAMSK_MTENMON_Pos)

RTC_T::CAMSK: MTENMON Mask

Definition at line 7817 of file M471M_R1_S.h.

◆ RTC_CAMSK_MTENMON_Pos

#define RTC_CAMSK_MTENMON_Pos   (3)

RTC_T::CAMSK: MTENMON Position

Definition at line 7816 of file M471M_R1_S.h.

◆ RTC_CAMSK_MTENYEAR_Msk

#define RTC_CAMSK_MTENYEAR_Msk   (0x1ul << RTC_CAMSK_MTENYEAR_Pos)

RTC_T::CAMSK: MTENYEAR Mask

Definition at line 7823 of file M471M_R1_S.h.

◆ RTC_CAMSK_MTENYEAR_Pos

#define RTC_CAMSK_MTENYEAR_Pos   (5)

RTC_T::CAMSK: MTENYEAR Position

Definition at line 7822 of file M471M_R1_S.h.

◆ RTC_CAMSK_MYEAR_Msk

#define RTC_CAMSK_MYEAR_Msk   (0x1ul << RTC_CAMSK_MYEAR_Pos)

RTC_T::CAMSK: MYEAR Mask

Definition at line 7820 of file M471M_R1_S.h.

◆ RTC_CAMSK_MYEAR_Pos

#define RTC_CAMSK_MYEAR_Pos   (4)

RTC_T::CAMSK: MYEAR Position

Definition at line 7819 of file M471M_R1_S.h.

◆ RTC_CLKFMT_24HEN_Msk

#define RTC_CLKFMT_24HEN_Msk   (0x1ul << RTC_CLKFMT_24HEN_Pos)

RTC_T::CLKFMT: 24HEN Mask

Definition at line 7724 of file M471M_R1_S.h.

◆ RTC_CLKFMT_24HEN_Pos

#define RTC_CLKFMT_24HEN_Pos   (0)

RTC_T::CLKFMT: 24HEN Position

Definition at line 7723 of file M471M_R1_S.h.

◆ RTC_FREQADJ_FRACTION_Msk

#define RTC_FREQADJ_FRACTION_Msk   (0x3ful << RTC_FREQADJ_FRACTION_Pos)

RTC_T::FREQADJ: FRACTION Mask

Definition at line 7682 of file M471M_R1_S.h.

◆ RTC_FREQADJ_FRACTION_Pos

#define RTC_FREQADJ_FRACTION_Pos   (0)

RTC_T::FREQADJ: FRACTION Position

Definition at line 7681 of file M471M_R1_S.h.

◆ RTC_FREQADJ_INTEGER_Msk

#define RTC_FREQADJ_INTEGER_Msk   (0xful << RTC_FREQADJ_INTEGER_Pos)

RTC_T::FREQADJ: INTEGER Mask

Definition at line 7685 of file M471M_R1_S.h.

◆ RTC_FREQADJ_INTEGER_Pos

#define RTC_FREQADJ_INTEGER_Pos   (8)

RTC_T::FREQADJ: INTEGER Position

Definition at line 7684 of file M471M_R1_S.h.

◆ RTC_INIT_ACTIVE_Msk

#define RTC_INIT_ACTIVE_Msk   (0x1ul << RTC_INIT_ACTIVE_Pos)

RTC_T::INIT: ACTIVE Mask

Definition at line 7670 of file M471M_R1_S.h.

◆ RTC_INIT_ACTIVE_Pos

#define RTC_INIT_ACTIVE_Pos   (0)
@addtogroup RTC_CONST RTC Bit Field Definition
Constant Definitions for RTC Controller

RTC_T::INIT: ACTIVE Position

Definition at line 7669 of file M471M_R1_S.h.

◆ RTC_INIT_INIT_Msk

#define RTC_INIT_INIT_Msk   (0xfffffffful << RTC_INIT_INIT_Pos)

RTC_T::INIT: INIT Mask

Definition at line 7673 of file M471M_R1_S.h.

◆ RTC_INIT_INIT_Pos

#define RTC_INIT_INIT_Pos   (0)

RTC_T::INIT: INIT Position

Definition at line 7672 of file M471M_R1_S.h.

◆ RTC_INTEN_ALMIEN_Msk

#define RTC_INTEN_ALMIEN_Msk   (0x1ul << RTC_INTEN_ALMIEN_Pos)

RTC_T::INTEN: ALMIEN Mask

Definition at line 7769 of file M471M_R1_S.h.

◆ RTC_INTEN_ALMIEN_Pos

#define RTC_INTEN_ALMIEN_Pos   (0)

RTC_T::INTEN: ALMIEN Position

Definition at line 7768 of file M471M_R1_S.h.

◆ RTC_INTEN_SNPDIEN_Msk

#define RTC_INTEN_SNPDIEN_Msk   (0x1ul << RTC_INTEN_SNPDIEN_Pos)

RTC_T::INTEN: SNPDIEN Mask

Definition at line 7775 of file M471M_R1_S.h.

◆ RTC_INTEN_SNPDIEN_Pos

#define RTC_INTEN_SNPDIEN_Pos   (2)

RTC_T::INTEN: SNPDIEN Position

Definition at line 7774 of file M471M_R1_S.h.

◆ RTC_INTEN_TICKIEN_Msk

#define RTC_INTEN_TICKIEN_Msk   (0x1ul << RTC_INTEN_TICKIEN_Pos)

RTC_T::INTEN: TICKIEN Mask

Definition at line 7772 of file M471M_R1_S.h.

◆ RTC_INTEN_TICKIEN_Pos

#define RTC_INTEN_TICKIEN_Pos   (1)

RTC_T::INTEN: TICKIEN Position

Definition at line 7771 of file M471M_R1_S.h.

◆ RTC_INTSTS_ALMIF_Msk

#define RTC_INTSTS_ALMIF_Msk   (0x1ul << RTC_INTSTS_ALMIF_Pos)

RTC_T::INTSTS: ALMIF Mask

Definition at line 7778 of file M471M_R1_S.h.

◆ RTC_INTSTS_ALMIF_Pos

#define RTC_INTSTS_ALMIF_Pos   (0)

RTC_T::INTSTS: ALMIF Position

Definition at line 7777 of file M471M_R1_S.h.

◆ RTC_INTSTS_SNPDIF_Msk

#define RTC_INTSTS_SNPDIF_Msk   (0x1ul << RTC_INTSTS_SNPDIF_Pos)

RTC_T::INTSTS: SNPDIF Mask

Definition at line 7784 of file M471M_R1_S.h.

◆ RTC_INTSTS_SNPDIF_Pos

#define RTC_INTSTS_SNPDIF_Pos   (2)

RTC_T::INTSTS: SNPDIF Position

Definition at line 7783 of file M471M_R1_S.h.

◆ RTC_INTSTS_TICKIF_Msk

#define RTC_INTSTS_TICKIF_Msk   (0x1ul << RTC_INTSTS_TICKIF_Pos)

RTC_T::INTSTS: TICKIF Mask

Definition at line 7781 of file M471M_R1_S.h.

◆ RTC_INTSTS_TICKIF_Pos

#define RTC_INTSTS_TICKIF_Pos   (1)

RTC_T::INTSTS: TICKIF Position

Definition at line 7780 of file M471M_R1_S.h.

◆ RTC_LEAPYEAR_LEAPYEAR_Msk

#define RTC_LEAPYEAR_LEAPYEAR_Msk   (0x1ul << RTC_LEAPYEAR_LEAPYEAR_Pos)

RTC_T::LEAPYEAR: LEAPYEAR Mask

Definition at line 7766 of file M471M_R1_S.h.

◆ RTC_LEAPYEAR_LEAPYEAR_Pos

#define RTC_LEAPYEAR_LEAPYEAR_Pos   (0)

RTC_T::LEAPYEAR: LEAPYEAR Position

Definition at line 7765 of file M471M_R1_S.h.

◆ RTC_LXTCTL_GAIN_Msk

#define RTC_LXTCTL_GAIN_Msk   (0x7ul << RTC_LXTCTL_GAIN_Pos)

RTC_T::LXTCTL: GAIN Mask

Definition at line 7850 of file M471M_R1_S.h.

◆ RTC_LXTCTL_GAIN_Pos

#define RTC_LXTCTL_GAIN_Pos   (1)

RTC_T::LXTCTL: GAIN Position

Definition at line 7849 of file M471M_R1_S.h.

◆ RTC_LXTCTL_LXTEN_Msk

#define RTC_LXTCTL_LXTEN_Msk   (0x1ul << RTC_LXTCTL_LXTEN_Pos)

RTC_T::LXTCTL: LXTEN Mask

Definition at line 7847 of file M471M_R1_S.h.

◆ RTC_LXTCTL_LXTEN_Pos

#define RTC_LXTCTL_LXTEN_Pos   (0)

RTC_T::LXTCTL: LXTEN Position

Definition at line 7846 of file M471M_R1_S.h.

◆ RTC_LXTICTL_CTLSEL_Msk

#define RTC_LXTICTL_CTLSEL_Msk   (0x1ul << RTC_LXTICTL_CTLSEL_Pos)

RTC_T::LXTICTL: CTLSEL Mask

Definition at line 7868 of file M471M_R1_S.h.

◆ RTC_LXTICTL_CTLSEL_Pos

#define RTC_LXTICTL_CTLSEL_Pos   (3)

RTC_T::LXTICTL: CTLSEL Position

Definition at line 7867 of file M471M_R1_S.h.

◆ RTC_LXTICTL_DOUT_Msk

#define RTC_LXTICTL_DOUT_Msk   (0x1ul << RTC_LXTICTL_DOUT_Pos)

RTC_T::LXTICTL: DOUT Mask

Definition at line 7865 of file M471M_R1_S.h.

◆ RTC_LXTICTL_DOUT_Pos

#define RTC_LXTICTL_DOUT_Pos   (2)

RTC_T::LXTICTL: DOUT Position

Definition at line 7864 of file M471M_R1_S.h.

◆ RTC_LXTICTL_OPMODE_Msk

#define RTC_LXTICTL_OPMODE_Msk   (0x3ul << RTC_LXTICTL_OPMODE_Pos)

RTC_T::LXTICTL: OPMODE Mask

Definition at line 7862 of file M471M_R1_S.h.

◆ RTC_LXTICTL_OPMODE_Pos

#define RTC_LXTICTL_OPMODE_Pos   (0)

RTC_T::LXTICTL: OPMODE Position

Definition at line 7861 of file M471M_R1_S.h.

◆ RTC_LXTOCTL_CTLSEL_Msk

#define RTC_LXTOCTL_CTLSEL_Msk   (0x1ul << RTC_LXTOCTL_CTLSEL_Pos)

RTC_T::LXTOCTL: CTLSEL Mask

Definition at line 7859 of file M471M_R1_S.h.

◆ RTC_LXTOCTL_CTLSEL_Pos

#define RTC_LXTOCTL_CTLSEL_Pos   (3)

RTC_T::LXTOCTL: CTLSEL Position

Definition at line 7858 of file M471M_R1_S.h.

◆ RTC_LXTOCTL_DOUT_Msk

#define RTC_LXTOCTL_DOUT_Msk   (0x1ul << RTC_LXTOCTL_DOUT_Pos)

RTC_T::LXTOCTL: DOUT Mask

Definition at line 7856 of file M471M_R1_S.h.

◆ RTC_LXTOCTL_DOUT_Pos

#define RTC_LXTOCTL_DOUT_Pos   (2)

RTC_T::LXTOCTL: DOUT Position

Definition at line 7855 of file M471M_R1_S.h.

◆ RTC_LXTOCTL_OPMODE_Msk

#define RTC_LXTOCTL_OPMODE_Msk   (0x3ul << RTC_LXTOCTL_OPMODE_Pos)

RTC_T::LXTOCTL: OPMODE Mask

Definition at line 7853 of file M471M_R1_S.h.

◆ RTC_LXTOCTL_OPMODE_Pos

#define RTC_LXTOCTL_OPMODE_Pos   (0)

RTC_T::LXTOCTL: OPMODE Position

Definition at line 7852 of file M471M_R1_S.h.

◆ RTC_RWEN_RWEN_Msk

#define RTC_RWEN_RWEN_Msk   (0xfffful << RTC_RWEN_RWEN_Pos)

RTC_T::RWEN: RWEN Mask

Definition at line 7676 of file M471M_R1_S.h.

◆ RTC_RWEN_RWEN_Pos

#define RTC_RWEN_RWEN_Pos   (0)

RTC_T::RWEN: RWEN Position

Definition at line 7675 of file M471M_R1_S.h.

◆ RTC_RWEN_RWENF_Msk

#define RTC_RWEN_RWENF_Msk   (0x1ul << RTC_RWEN_RWENF_Pos)

RTC_T::RWEN: RWENF Mask

Definition at line 7679 of file M471M_R1_S.h.

◆ RTC_RWEN_RWENF_Pos

#define RTC_RWEN_RWENF_Pos   (16)

RTC_T::RWEN: RWENF Position

Definition at line 7678 of file M471M_R1_S.h.

◆ RTC_SPR_SPARE_Msk

#define RTC_SPR_SPARE_Msk   (0xfffffffful << RTC_SPR_SPARE_Pos)

RTC_T::SPR: SPARE Mask

Definition at line 7844 of file M471M_R1_S.h.

◆ RTC_SPR_SPARE_Pos

#define RTC_SPR_SPARE_Pos   (0)

RTC_T::SPR: SPARE Position

Definition at line 7843 of file M471M_R1_S.h.

◆ RTC_SPRCTL_SNPDEN_Msk

#define RTC_SPRCTL_SNPDEN_Msk   (0x1ul << RTC_SPRCTL_SNPDEN_Pos)

RTC_T::SPRCTL: SNPDEN Mask

Definition at line 7826 of file M471M_R1_S.h.

◆ RTC_SPRCTL_SNPDEN_Pos

#define RTC_SPRCTL_SNPDEN_Pos   (0)

RTC_T::SPRCTL: SNPDEN Position

Definition at line 7825 of file M471M_R1_S.h.

◆ RTC_SPRCTL_SNPTYPE0_Msk

#define RTC_SPRCTL_SNPTYPE0_Msk   (0x1ul << RTC_SPRCTL_SNPTYPE0_Pos)

RTC_T::SPRCTL: SNPTYPE0 Mask

Definition at line 7829 of file M471M_R1_S.h.

◆ RTC_SPRCTL_SNPTYPE0_Pos

#define RTC_SPRCTL_SNPTYPE0_Pos   (1)

RTC_T::SPRCTL: SNPTYPE0 Position

Definition at line 7828 of file M471M_R1_S.h.

◆ RTC_SPRCTL_SNPTYPE1_Msk

#define RTC_SPRCTL_SNPTYPE1_Msk   (0x1ul << RTC_SPRCTL_SNPTYPE1_Pos)

RTC_T::SPRCTL: SNPTYPE1 Mask

Definition at line 7835 of file M471M_R1_S.h.

◆ RTC_SPRCTL_SNPTYPE1_Pos

#define RTC_SPRCTL_SNPTYPE1_Pos   (3)

RTC_T::SPRCTL: SNPTYPE1 Position

Definition at line 7834 of file M471M_R1_S.h.

◆ RTC_SPRCTL_SPRCSTS_Msk

#define RTC_SPRCTL_SPRCSTS_Msk   (0x1ul << RTC_SPRCTL_SPRCSTS_Pos)

RTC_T::SPRCTL: SPRCSTS Mask

Definition at line 7838 of file M471M_R1_S.h.

◆ RTC_SPRCTL_SPRCSTS_Pos

#define RTC_SPRCTL_SPRCSTS_Pos   (5)

RTC_T::SPRCTL: SPRCSTS Position

Definition at line 7837 of file M471M_R1_S.h.

◆ RTC_SPRCTL_SPRRWEN_Msk

#define RTC_SPRCTL_SPRRWEN_Msk   (0x1ul << RTC_SPRCTL_SPRRWEN_Pos)

RTC_T::SPRCTL: SPRRWEN Mask

Definition at line 7832 of file M471M_R1_S.h.

◆ RTC_SPRCTL_SPRRWEN_Pos

#define RTC_SPRCTL_SPRRWEN_Pos   (2)

RTC_T::SPRCTL: SPRRWEN Position

Definition at line 7831 of file M471M_R1_S.h.

◆ RTC_SPRCTL_SPRRWRDY_Msk

#define RTC_SPRCTL_SPRRWRDY_Msk   (0x1ul << RTC_SPRCTL_SPRRWRDY_Pos)

RTC_T::SPRCTL: SPRRWRDY Mask

Definition at line 7841 of file M471M_R1_S.h.

◆ RTC_SPRCTL_SPRRWRDY_Pos

#define RTC_SPRCTL_SPRRWRDY_Pos   (7)

RTC_T::SPRCTL: SPRRWRDY Position

Definition at line 7840 of file M471M_R1_S.h.

◆ RTC_TALM_HR_Msk

#define RTC_TALM_HR_Msk   (0xful << RTC_TALM_HR_Pos)

RTC_T::TALM: HR Mask

Definition at line 7742 of file M471M_R1_S.h.

◆ RTC_TALM_HR_Pos

#define RTC_TALM_HR_Pos   (16)

RTC_T::TALM: HR Position

Definition at line 7741 of file M471M_R1_S.h.

◆ RTC_TALM_MIN_Msk

#define RTC_TALM_MIN_Msk   (0xful << RTC_TALM_MIN_Pos)

RTC_T::TALM: MIN Mask

Definition at line 7736 of file M471M_R1_S.h.

◆ RTC_TALM_MIN_Pos

#define RTC_TALM_MIN_Pos   (8)

RTC_T::TALM: MIN Position

Definition at line 7735 of file M471M_R1_S.h.

◆ RTC_TALM_SEC_Msk

#define RTC_TALM_SEC_Msk   (0xful << RTC_TALM_SEC_Pos)

RTC_T::TALM: SEC Mask

Definition at line 7730 of file M471M_R1_S.h.

◆ RTC_TALM_SEC_Pos

#define RTC_TALM_SEC_Pos   (0)

RTC_T::TALM: SEC Position

Definition at line 7729 of file M471M_R1_S.h.

◆ RTC_TALM_TENHR_Msk

#define RTC_TALM_TENHR_Msk   (0x3ul << RTC_TALM_TENHR_Pos)

RTC_T::TALM: TENHR Mask

Definition at line 7745 of file M471M_R1_S.h.

◆ RTC_TALM_TENHR_Pos

#define RTC_TALM_TENHR_Pos   (20)

RTC_T::TALM: TENHR Position

Definition at line 7744 of file M471M_R1_S.h.

◆ RTC_TALM_TENMIN_Msk

#define RTC_TALM_TENMIN_Msk   (0x7ul << RTC_TALM_TENMIN_Pos)

RTC_T::TALM: TENMIN Mask

Definition at line 7739 of file M471M_R1_S.h.

◆ RTC_TALM_TENMIN_Pos

#define RTC_TALM_TENMIN_Pos   (12)

RTC_T::TALM: TENMIN Position

Definition at line 7738 of file M471M_R1_S.h.

◆ RTC_TALM_TENSEC_Msk

#define RTC_TALM_TENSEC_Msk   (0x7ul << RTC_TALM_TENSEC_Pos)

RTC_T::TALM: TENSEC Mask

Definition at line 7733 of file M471M_R1_S.h.

◆ RTC_TALM_TENSEC_Pos

#define RTC_TALM_TENSEC_Pos   (4)

RTC_T::TALM: TENSEC Position

Definition at line 7732 of file M471M_R1_S.h.

◆ RTC_TAMPCTL_CTLSEL_Msk

#define RTC_TAMPCTL_CTLSEL_Msk   (0x1ul << RTC_TAMPCTL_CTLSEL_Pos)

RTC_T::TAMPCTL: CTLSEL Mask

Definition at line 7877 of file M471M_R1_S.h.

◆ RTC_TAMPCTL_CTLSEL_Pos

#define RTC_TAMPCTL_CTLSEL_Pos   (3)

RTC_T::TAMPCTL: CTLSEL Position

Definition at line 7876 of file M471M_R1_S.h.

◆ RTC_TAMPCTL_DOUT_Msk

#define RTC_TAMPCTL_DOUT_Msk   (0x1ul << RTC_TAMPCTL_DOUT_Pos)

RTC_T::TAMPCTL: DOUT Mask

Definition at line 7874 of file M471M_R1_S.h.

◆ RTC_TAMPCTL_DOUT_Pos

#define RTC_TAMPCTL_DOUT_Pos   (2)

RTC_T::TAMPCTL: DOUT Position

Definition at line 7873 of file M471M_R1_S.h.

◆ RTC_TAMPCTL_OPMODE_Msk

#define RTC_TAMPCTL_OPMODE_Msk   (0x3ul << RTC_TAMPCTL_OPMODE_Pos)

RTC_T::TAMPCTL: OPMODE Mask

Definition at line 7871 of file M471M_R1_S.h.

◆ RTC_TAMPCTL_OPMODE_Pos

#define RTC_TAMPCTL_OPMODE_Pos   (0)

RTC_T::TAMPCTL: OPMODE Position

Definition at line 7870 of file M471M_R1_S.h.

◆ RTC_TAMSK_MHR_Msk

#define RTC_TAMSK_MHR_Msk   (0x1ul << RTC_TAMSK_MHR_Pos)

RTC_T::TAMSK: MHR Mask

Definition at line 7802 of file M471M_R1_S.h.

◆ RTC_TAMSK_MHR_Pos

#define RTC_TAMSK_MHR_Pos   (4)

RTC_T::TAMSK: MHR Position

Definition at line 7801 of file M471M_R1_S.h.

◆ RTC_TAMSK_MMIN_Msk

#define RTC_TAMSK_MMIN_Msk   (0x1ul << RTC_TAMSK_MMIN_Pos)

RTC_T::TAMSK: MMIN Mask

Definition at line 7796 of file M471M_R1_S.h.

◆ RTC_TAMSK_MMIN_Pos

#define RTC_TAMSK_MMIN_Pos   (2)

RTC_T::TAMSK: MMIN Position

Definition at line 7795 of file M471M_R1_S.h.

◆ RTC_TAMSK_MSEC_Msk

#define RTC_TAMSK_MSEC_Msk   (0x1ul << RTC_TAMSK_MSEC_Pos)

RTC_T::TAMSK: MSEC Mask

Definition at line 7790 of file M471M_R1_S.h.

◆ RTC_TAMSK_MSEC_Pos

#define RTC_TAMSK_MSEC_Pos   (0)

RTC_T::TAMSK: MSEC Position

Definition at line 7789 of file M471M_R1_S.h.

◆ RTC_TAMSK_MTENHR_Msk

#define RTC_TAMSK_MTENHR_Msk   (0x1ul << RTC_TAMSK_MTENHR_Pos)

RTC_T::TAMSK: MTENHR Mask

Definition at line 7805 of file M471M_R1_S.h.

◆ RTC_TAMSK_MTENHR_Pos

#define RTC_TAMSK_MTENHR_Pos   (5)

RTC_T::TAMSK: MTENHR Position

Definition at line 7804 of file M471M_R1_S.h.

◆ RTC_TAMSK_MTENMIN_Msk

#define RTC_TAMSK_MTENMIN_Msk   (0x1ul << RTC_TAMSK_MTENMIN_Pos)

RTC_T::TAMSK: MTENMIN Mask

Definition at line 7799 of file M471M_R1_S.h.

◆ RTC_TAMSK_MTENMIN_Pos

#define RTC_TAMSK_MTENMIN_Pos   (3)

RTC_T::TAMSK: MTENMIN Position

Definition at line 7798 of file M471M_R1_S.h.

◆ RTC_TAMSK_MTENSEC_Msk

#define RTC_TAMSK_MTENSEC_Msk   (0x1ul << RTC_TAMSK_MTENSEC_Pos)

RTC_T::TAMSK: MTENSEC Mask

Definition at line 7793 of file M471M_R1_S.h.

◆ RTC_TAMSK_MTENSEC_Pos

#define RTC_TAMSK_MTENSEC_Pos   (1)

RTC_T::TAMSK: MTENSEC Position

Definition at line 7792 of file M471M_R1_S.h.

◆ RTC_TICK_TICK_Msk

#define RTC_TICK_TICK_Msk   (0x7ul << RTC_TICK_TICK_Pos)

RTC_T::TICK: TICK Mask

Definition at line 7787 of file M471M_R1_S.h.

◆ RTC_TICK_TICK_Pos

#define RTC_TICK_TICK_Pos   (0)

RTC_T::TICK: TICK Position

Definition at line 7786 of file M471M_R1_S.h.

◆ RTC_TIME_HR_Msk

#define RTC_TIME_HR_Msk   (0xful << RTC_TIME_HR_Pos)

RTC_T::TIME: HR Mask

Definition at line 7700 of file M471M_R1_S.h.

◆ RTC_TIME_HR_Pos

#define RTC_TIME_HR_Pos   (16)

RTC_T::TIME: HR Position

Definition at line 7699 of file M471M_R1_S.h.

◆ RTC_TIME_MIN_Msk

#define RTC_TIME_MIN_Msk   (0xful << RTC_TIME_MIN_Pos)

RTC_T::TIME: MIN Mask

Definition at line 7694 of file M471M_R1_S.h.

◆ RTC_TIME_MIN_Pos

#define RTC_TIME_MIN_Pos   (8)

RTC_T::TIME: MIN Position

Definition at line 7693 of file M471M_R1_S.h.

◆ RTC_TIME_SEC_Msk

#define RTC_TIME_SEC_Msk   (0xful << RTC_TIME_SEC_Pos)

RTC_T::TIME: SEC Mask

Definition at line 7688 of file M471M_R1_S.h.

◆ RTC_TIME_SEC_Pos

#define RTC_TIME_SEC_Pos   (0)

RTC_T::TIME: SEC Position

Definition at line 7687 of file M471M_R1_S.h.

◆ RTC_TIME_TENHR_Msk

#define RTC_TIME_TENHR_Msk   (0x3ul << RTC_TIME_TENHR_Pos)

RTC_T::TIME: TENHR Mask

Definition at line 7703 of file M471M_R1_S.h.

◆ RTC_TIME_TENHR_Pos

#define RTC_TIME_TENHR_Pos   (20)

RTC_T::TIME: TENHR Position

Definition at line 7702 of file M471M_R1_S.h.

◆ RTC_TIME_TENMIN_Msk

#define RTC_TIME_TENMIN_Msk   (0x7ul << RTC_TIME_TENMIN_Pos)

RTC_T::TIME: TENMIN Mask

Definition at line 7697 of file M471M_R1_S.h.

◆ RTC_TIME_TENMIN_Pos

#define RTC_TIME_TENMIN_Pos   (12)

RTC_T::TIME: TENMIN Position

Definition at line 7696 of file M471M_R1_S.h.

◆ RTC_TIME_TENSEC_Msk

#define RTC_TIME_TENSEC_Msk   (0x7ul << RTC_TIME_TENSEC_Pos)

RTC_T::TIME: TENSEC Mask

Definition at line 7691 of file M471M_R1_S.h.

◆ RTC_TIME_TENSEC_Pos

#define RTC_TIME_TENSEC_Pos   (4)

RTC_T::TIME: TENSEC Position

Definition at line 7690 of file M471M_R1_S.h.

◆ RTC_WEEKDAY_WEEKDAY_Msk

#define RTC_WEEKDAY_WEEKDAY_Msk   (0x7ul << RTC_WEEKDAY_WEEKDAY_Pos)

RTC_T::WEEKDAY: WEEKDAY Mask

Definition at line 7727 of file M471M_R1_S.h.

◆ RTC_WEEKDAY_WEEKDAY_Pos

#define RTC_WEEKDAY_WEEKDAY_Pos   (0)

RTC_T::WEEKDAY: WEEKDAY Position

Definition at line 7726 of file M471M_R1_S.h.

◆ SC_ALTCTL_ACTEN_Msk

#define SC_ALTCTL_ACTEN_Msk   (0x1ul << SC_ALTCTL_ACTEN_Pos)

SC_T::ALTCTL: ACTEN Mask

Definition at line 8582 of file M471M_R1_S.h.

◆ SC_ALTCTL_ACTEN_Pos

#define SC_ALTCTL_ACTEN_Pos   (3)

SC_T::ALTCTL: ACTEN Position

Definition at line 8581 of file M471M_R1_S.h.

◆ SC_ALTCTL_ACTSTS0_Msk

#define SC_ALTCTL_ACTSTS0_Msk   (0x1ul << SC_ALTCTL_ACTSTS0_Pos)

SC_T::ALTCTL: ACTSTS0 Mask

Definition at line 8606 of file M471M_R1_S.h.

◆ SC_ALTCTL_ACTSTS0_Pos

#define SC_ALTCTL_ACTSTS0_Pos   (13)

SC_T::ALTCTL: ACTSTS0 Position

Definition at line 8605 of file M471M_R1_S.h.

◆ SC_ALTCTL_ACTSTS1_Msk

#define SC_ALTCTL_ACTSTS1_Msk   (0x1ul << SC_ALTCTL_ACTSTS1_Pos)

SC_T::ALTCTL: ACTSTS1 Mask

Definition at line 8609 of file M471M_R1_S.h.

◆ SC_ALTCTL_ACTSTS1_Pos

#define SC_ALTCTL_ACTSTS1_Pos   (14)

SC_T::ALTCTL: ACTSTS1 Position

Definition at line 8608 of file M471M_R1_S.h.

◆ SC_ALTCTL_ACTSTS2_Msk

#define SC_ALTCTL_ACTSTS2_Msk   (0x1ul << SC_ALTCTL_ACTSTS2_Pos)

SC_T::ALTCTL: ACTSTS2 Mask

Definition at line 8612 of file M471M_R1_S.h.

◆ SC_ALTCTL_ACTSTS2_Pos

#define SC_ALTCTL_ACTSTS2_Pos   (15)

SC_T::ALTCTL: ACTSTS2 Position

Definition at line 8611 of file M471M_R1_S.h.

◆ SC_ALTCTL_ADACEN_Msk

#define SC_ALTCTL_ADACEN_Msk   (0x1ul << SC_ALTCTL_ADACEN_Pos)

SC_T::ALTCTL: ADACEN Mask

Definition at line 8600 of file M471M_R1_S.h.

◆ SC_ALTCTL_ADACEN_Pos

#define SC_ALTCTL_ADACEN_Pos   (11)

SC_T::ALTCTL: ADACEN Position

Definition at line 8599 of file M471M_R1_S.h.

◆ SC_ALTCTL_CNTEN0_Msk

#define SC_ALTCTL_CNTEN0_Msk   (0x1ul << SC_ALTCTL_CNTEN0_Pos)

SC_T::ALTCTL: CNTEN0 Mask

Definition at line 8588 of file M471M_R1_S.h.

◆ SC_ALTCTL_CNTEN0_Pos

#define SC_ALTCTL_CNTEN0_Pos   (5)

SC_T::ALTCTL: CNTEN0 Position

Definition at line 8587 of file M471M_R1_S.h.

◆ SC_ALTCTL_CNTEN1_Msk

#define SC_ALTCTL_CNTEN1_Msk   (0x1ul << SC_ALTCTL_CNTEN1_Pos)

SC_T::ALTCTL: CNTEN1 Mask

Definition at line 8591 of file M471M_R1_S.h.

◆ SC_ALTCTL_CNTEN1_Pos

#define SC_ALTCTL_CNTEN1_Pos   (6)

SC_T::ALTCTL: CNTEN1 Position

Definition at line 8590 of file M471M_R1_S.h.

◆ SC_ALTCTL_CNTEN2_Msk

#define SC_ALTCTL_CNTEN2_Msk   (0x1ul << SC_ALTCTL_CNTEN2_Pos)

SC_T::ALTCTL: CNTEN2 Mask

Definition at line 8594 of file M471M_R1_S.h.

◆ SC_ALTCTL_CNTEN2_Pos

#define SC_ALTCTL_CNTEN2_Pos   (7)

SC_T::ALTCTL: CNTEN2 Position

Definition at line 8593 of file M471M_R1_S.h.

◆ SC_ALTCTL_DACTEN_Msk

#define SC_ALTCTL_DACTEN_Msk   (0x1ul << SC_ALTCTL_DACTEN_Pos)

SC_T::ALTCTL: DACTEN Mask

Definition at line 8579 of file M471M_R1_S.h.

◆ SC_ALTCTL_DACTEN_Pos

#define SC_ALTCTL_DACTEN_Pos   (2)

SC_T::ALTCTL: DACTEN Position

Definition at line 8578 of file M471M_R1_S.h.

◆ SC_ALTCTL_INITSEL_Msk

#define SC_ALTCTL_INITSEL_Msk   (0x3ul << SC_ALTCTL_INITSEL_Pos)

SC_T::ALTCTL: INITSEL Mask

Definition at line 8597 of file M471M_R1_S.h.

◆ SC_ALTCTL_INITSEL_Pos

#define SC_ALTCTL_INITSEL_Pos   (8)

SC_T::ALTCTL: INITSEL Position

Definition at line 8596 of file M471M_R1_S.h.

◆ SC_ALTCTL_OUTSEL_Msk

#define SC_ALTCTL_OUTSEL_Msk   (0x1ul << SC_ALTCTL_OUTSEL_Pos)

SC_T::ALTCTL: OUTSEL Mask

Definition at line 8615 of file M471M_R1_S.h.

◆ SC_ALTCTL_OUTSEL_Pos

#define SC_ALTCTL_OUTSEL_Pos   (16)

SC_T::ALTCTL: OUTSEL Position

Definition at line 8614 of file M471M_R1_S.h.

◆ SC_ALTCTL_RXBGTEN_Msk

#define SC_ALTCTL_RXBGTEN_Msk   (0x1ul << SC_ALTCTL_RXBGTEN_Pos)

SC_T::ALTCTL: RXBGTEN Mask

Definition at line 8603 of file M471M_R1_S.h.

◆ SC_ALTCTL_RXBGTEN_Pos

#define SC_ALTCTL_RXBGTEN_Pos   (12)

SC_T::ALTCTL: RXBGTEN Position

Definition at line 8602 of file M471M_R1_S.h.

◆ SC_ALTCTL_RXRST_Msk

#define SC_ALTCTL_RXRST_Msk   (0x1ul << SC_ALTCTL_RXRST_Pos)

SC_T::ALTCTL: RXRST Mask

Definition at line 8576 of file M471M_R1_S.h.

◆ SC_ALTCTL_RXRST_Pos

#define SC_ALTCTL_RXRST_Pos   (1)

SC_T::ALTCTL: RXRST Position

Definition at line 8575 of file M471M_R1_S.h.

◆ SC_ALTCTL_TXRST_Msk

#define SC_ALTCTL_TXRST_Msk   (0x1ul << SC_ALTCTL_TXRST_Pos)

SC_T::ALTCTL: TXRST Mask

Definition at line 8573 of file M471M_R1_S.h.

◆ SC_ALTCTL_TXRST_Pos

#define SC_ALTCTL_TXRST_Pos   (0)

SC_T::ALTCTL: TXRST Position

Definition at line 8572 of file M471M_R1_S.h.

◆ SC_ALTCTL_WARSTEN_Msk

#define SC_ALTCTL_WARSTEN_Msk   (0x1ul << SC_ALTCTL_WARSTEN_Pos)

SC_T::ALTCTL: WARSTEN Mask

Definition at line 8585 of file M471M_R1_S.h.

◆ SC_ALTCTL_WARSTEN_Pos

#define SC_ALTCTL_WARSTEN_Pos   (4)

SC_T::ALTCTL: WARSTEN Position

Definition at line 8584 of file M471M_R1_S.h.

◆ SC_CTL_AUTOCEN_Msk

#define SC_CTL_AUTOCEN_Msk   (0x1ul << SC_CTL_AUTOCEN_Pos)

SC_T::CTL: AUTOCEN Mask

Definition at line 8531 of file M471M_R1_S.h.

◆ SC_CTL_AUTOCEN_Pos

#define SC_CTL_AUTOCEN_Pos   (3)

SC_T::CTL: AUTOCEN Position

Definition at line 8530 of file M471M_R1_S.h.

◆ SC_CTL_BGT_Msk

#define SC_CTL_BGT_Msk   (0x1ful << SC_CTL_BGT_Pos)

SC_T::CTL: BGT Mask

Definition at line 8540 of file M471M_R1_S.h.

◆ SC_CTL_BGT_Pos

#define SC_CTL_BGT_Pos   (8)

SC_T::CTL: BGT Position

Definition at line 8539 of file M471M_R1_S.h.

◆ SC_CTL_CDDBSEL_Msk

#define SC_CTL_CDDBSEL_Msk   (0x3ul << SC_CTL_CDDBSEL_Pos)

SC_T::CTL: CDDBSEL Mask

Definition at line 8561 of file M471M_R1_S.h.

◆ SC_CTL_CDDBSEL_Pos

#define SC_CTL_CDDBSEL_Pos   (24)

SC_T::CTL: CDDBSEL Position

Definition at line 8560 of file M471M_R1_S.h.

◆ SC_CTL_CDLV_Msk

#define SC_CTL_CDLV_Msk   (0x1ul << SC_CTL_CDLV_Pos)

SC_T::CTL: CDLV Mask

Definition at line 8564 of file M471M_R1_S.h.

◆ SC_CTL_CDLV_Pos

#define SC_CTL_CDLV_Pos   (26)

SC_T::CTL: CDLV Position

Definition at line 8563 of file M471M_R1_S.h.

◆ SC_CTL_CONSEL_Msk

#define SC_CTL_CONSEL_Msk   (0x3ul << SC_CTL_CONSEL_Pos)

SC_T::CTL: CONSEL Mask

Definition at line 8534 of file M471M_R1_S.h.

◆ SC_CTL_CONSEL_Pos

#define SC_CTL_CONSEL_Pos   (4)

SC_T::CTL: CONSEL Position

Definition at line 8533 of file M471M_R1_S.h.

◆ SC_CTL_ICEDEBUG_Msk

#define SC_CTL_ICEDEBUG_Msk   (0x1ul << SC_CTL_ICEDEBUG_Pos)

SC_T::CTL: ICEDEBUG Mask

Definition at line 8570 of file M471M_R1_S.h.

◆ SC_CTL_ICEDEBUG_Pos

#define SC_CTL_ICEDEBUG_Pos   (31)

SC_T::CTL: ICEDEBUG Position

Definition at line 8569 of file M471M_R1_S.h.

◆ SC_CTL_NSB_Msk

#define SC_CTL_NSB_Msk   (0x1ul << SC_CTL_NSB_Pos)

SC_T::CTL: NSB Mask

Definition at line 8546 of file M471M_R1_S.h.

◆ SC_CTL_NSB_Pos

#define SC_CTL_NSB_Pos   (15)

SC_T::CTL: NSB Position

Definition at line 8545 of file M471M_R1_S.h.

◆ SC_CTL_RXOFF_Msk

#define SC_CTL_RXOFF_Msk   (0x1ul << SC_CTL_RXOFF_Pos)

SC_T::CTL: RXOFF Mask

Definition at line 8525 of file M471M_R1_S.h.

◆ SC_CTL_RXOFF_Pos

#define SC_CTL_RXOFF_Pos   (1)

SC_T::CTL: RXOFF Position

Definition at line 8524 of file M471M_R1_S.h.

◆ SC_CTL_RXRTY_Msk

#define SC_CTL_RXRTY_Msk   (0x7ul << SC_CTL_RXRTY_Pos)

SC_T::CTL: RXRTY Mask

Definition at line 8549 of file M471M_R1_S.h.

◆ SC_CTL_RXRTY_Pos

#define SC_CTL_RXRTY_Pos   (16)

SC_T::CTL: RXRTY Position

Definition at line 8548 of file M471M_R1_S.h.

◆ SC_CTL_RXRTYEN_Msk

#define SC_CTL_RXRTYEN_Msk   (0x1ul << SC_CTL_RXRTYEN_Pos)

SC_T::CTL: RXRTYEN Mask

Definition at line 8552 of file M471M_R1_S.h.

◆ SC_CTL_RXRTYEN_Pos

#define SC_CTL_RXRTYEN_Pos   (19)

SC_T::CTL: RXRTYEN Position

Definition at line 8551 of file M471M_R1_S.h.

◆ SC_CTL_RXTRGLV_Msk

#define SC_CTL_RXTRGLV_Msk   (0x3ul << SC_CTL_RXTRGLV_Pos)

SC_T::CTL: RXTRGLV Mask

Definition at line 8537 of file M471M_R1_S.h.

◆ SC_CTL_RXTRGLV_Pos

#define SC_CTL_RXTRGLV_Pos   (6)

SC_T::CTL: RXTRGLV Position

Definition at line 8536 of file M471M_R1_S.h.

◆ SC_CTL_SCEN_Msk

#define SC_CTL_SCEN_Msk   (0x1ul << SC_CTL_SCEN_Pos)

SC_T::CTL: SCEN Mask

Definition at line 8522 of file M471M_R1_S.h.

◆ SC_CTL_SCEN_Pos

#define SC_CTL_SCEN_Pos   (0)

SC_T::CTL: SCEN Position

Definition at line 8521 of file M471M_R1_S.h.

◆ SC_CTL_SYNC_Msk

#define SC_CTL_SYNC_Msk   (0x1ul << SC_CTL_SYNC_Pos)

SC_T::CTL: SYNC Mask

Definition at line 8567 of file M471M_R1_S.h.

◆ SC_CTL_SYNC_Pos

#define SC_CTL_SYNC_Pos   (30)

SC_T::CTL: SYNC Position

Definition at line 8566 of file M471M_R1_S.h.

◆ SC_CTL_TMRSEL_Msk

#define SC_CTL_TMRSEL_Msk   (0x3ul << SC_CTL_TMRSEL_Pos)

SC_T::CTL: TMRSEL Mask

Definition at line 8543 of file M471M_R1_S.h.

◆ SC_CTL_TMRSEL_Pos

#define SC_CTL_TMRSEL_Pos   (13)

SC_T::CTL: TMRSEL Position

Definition at line 8542 of file M471M_R1_S.h.

◆ SC_CTL_TXOFF_Msk

#define SC_CTL_TXOFF_Msk   (0x1ul << SC_CTL_TXOFF_Pos)

SC_T::CTL: TXOFF Mask

Definition at line 8528 of file M471M_R1_S.h.

◆ SC_CTL_TXOFF_Pos

#define SC_CTL_TXOFF_Pos   (2)

SC_T::CTL: TXOFF Position

Definition at line 8527 of file M471M_R1_S.h.

◆ SC_CTL_TXRTY_Msk

#define SC_CTL_TXRTY_Msk   (0x7ul << SC_CTL_TXRTY_Pos)

SC_T::CTL: TXRTY Mask

Definition at line 8555 of file M471M_R1_S.h.

◆ SC_CTL_TXRTY_Pos

#define SC_CTL_TXRTY_Pos   (20)

SC_T::CTL: TXRTY Position

Definition at line 8554 of file M471M_R1_S.h.

◆ SC_CTL_TXRTYEN_Msk

#define SC_CTL_TXRTYEN_Msk   (0x1ul << SC_CTL_TXRTYEN_Pos)

SC_T::CTL: TXRTYEN Mask

Definition at line 8558 of file M471M_R1_S.h.

◆ SC_CTL_TXRTYEN_Pos

#define SC_CTL_TXRTYEN_Pos   (23)

SC_T::CTL: TXRTYEN Position

Definition at line 8557 of file M471M_R1_S.h.

◆ SC_DAT_DAT_Msk

#define SC_DAT_DAT_Msk   (0xfful << SC_DAT_DAT_Pos)

SC_T::DAT: DAT Mask

Definition at line 8519 of file M471M_R1_S.h.

◆ SC_DAT_DAT_Pos

#define SC_DAT_DAT_Pos   (0)
@addtogroup SC_CONST SC Bit Field Definition
Constant Definitions for SC Controller

SC_T::DAT: DAT Position

Definition at line 8518 of file M471M_R1_S.h.

◆ SC_EGT_EGT_Msk

#define SC_EGT_EGT_Msk   (0xfful << SC_EGT_EGT_Pos)

SC_T::EGT: EGT Mask

Definition at line 8618 of file M471M_R1_S.h.

◆ SC_EGT_EGT_Pos

#define SC_EGT_EGT_Pos   (0)

SC_T::EGT: EGT Position

Definition at line 8617 of file M471M_R1_S.h.

◆ SC_ETUCTL_CMPEN_Msk

#define SC_ETUCTL_CMPEN_Msk   (0x1ul << SC_ETUCTL_CMPEN_Pos)

SC_T::ETUCTL: CMPEN_ Mask

Definition at line 8627 of file M471M_R1_S.h.

◆ SC_ETUCTL_CMPEN_Pos

#define SC_ETUCTL_CMPEN_Pos   (15)

SC_T::ETUCTL: CMPEN_ Position

Definition at line 8626 of file M471M_R1_S.h.

◆ SC_ETUCTL_ETURDIV_Msk

#define SC_ETUCTL_ETURDIV_Msk   (0xffful << SC_ETUCTL_ETURDIV_Pos)

SC_T::ETUCTL: ETURDIV_ Mask

Definition at line 8624 of file M471M_R1_S.h.

◆ SC_ETUCTL_ETURDIV_Pos

#define SC_ETUCTL_ETURDIV_Pos   (0)

SC_T::ETUCTL: ETURDIV_ Position

Definition at line 8623 of file M471M_R1_S.h.

◆ SC_INTEN_ACERRIEN_Msk

#define SC_INTEN_ACERRIEN_Msk   (0x1ul << SC_INTEN_ACERRIEN_Pos)

SC_T::INTEN: ACERRIEN Mask

Definition at line 8660 of file M471M_R1_S.h.

◆ SC_INTEN_ACERRIEN_Pos

#define SC_INTEN_ACERRIEN_Pos   (10)

SC_T::INTEN: ACERRIEN Position

Definition at line 8659 of file M471M_R1_S.h.

◆ SC_INTEN_BGTIEN_Msk

#define SC_INTEN_BGTIEN_Msk   (0x1ul << SC_INTEN_BGTIEN_Pos)

SC_T::INTEN: BGTIEN Mask

Definition at line 8648 of file M471M_R1_S.h.

◆ SC_INTEN_BGTIEN_Pos

#define SC_INTEN_BGTIEN_Pos   (6)

SC_T::INTEN: BGTIEN Position

Definition at line 8647 of file M471M_R1_S.h.

◆ SC_INTEN_CDIEN_Msk

#define SC_INTEN_CDIEN_Msk   (0x1ul << SC_INTEN_CDIEN_Pos)

SC_T::INTEN: CDIEN Mask

Definition at line 8651 of file M471M_R1_S.h.

◆ SC_INTEN_CDIEN_Pos

#define SC_INTEN_CDIEN_Pos   (7)

SC_T::INTEN: CDIEN Position

Definition at line 8650 of file M471M_R1_S.h.

◆ SC_INTEN_INITIEN_Msk

#define SC_INTEN_INITIEN_Msk   (0x1ul << SC_INTEN_INITIEN_Pos)

SC_T::INTEN: INITIEN Mask

Definition at line 8654 of file M471M_R1_S.h.

◆ SC_INTEN_INITIEN_Pos

#define SC_INTEN_INITIEN_Pos   (8)

SC_T::INTEN: INITIEN Position

Definition at line 8653 of file M471M_R1_S.h.

◆ SC_INTEN_RDAIEN_Msk

#define SC_INTEN_RDAIEN_Msk   (0x1ul << SC_INTEN_RDAIEN_Pos)

SC_T::INTEN: RDAIEN Mask

Definition at line 8630 of file M471M_R1_S.h.

◆ SC_INTEN_RDAIEN_Pos

#define SC_INTEN_RDAIEN_Pos   (0)

SC_T::INTEN: RDAIEN Position

Definition at line 8629 of file M471M_R1_S.h.

◆ SC_INTEN_RXTOIF_Msk

#define SC_INTEN_RXTOIF_Msk   (0x1ul << SC_INTEN_RXTOIF_Pos)

SC_T::INTEN: RXTOIF Mask

Definition at line 8657 of file M471M_R1_S.h.

◆ SC_INTEN_RXTOIF_Pos

#define SC_INTEN_RXTOIF_Pos   (9)

SC_T::INTEN: RXTOIF Position

Definition at line 8656 of file M471M_R1_S.h.

◆ SC_INTEN_TBEIEN_Msk

#define SC_INTEN_TBEIEN_Msk   (0x1ul << SC_INTEN_TBEIEN_Pos)

SC_T::INTEN: TBEIEN Mask

Definition at line 8633 of file M471M_R1_S.h.

◆ SC_INTEN_TBEIEN_Pos

#define SC_INTEN_TBEIEN_Pos   (1)

SC_T::INTEN: TBEIEN Position

Definition at line 8632 of file M471M_R1_S.h.

◆ SC_INTEN_TERRIEN_Msk

#define SC_INTEN_TERRIEN_Msk   (0x1ul << SC_INTEN_TERRIEN_Pos)

SC_T::INTEN: TERRIEN Mask

Definition at line 8636 of file M471M_R1_S.h.

◆ SC_INTEN_TERRIEN_Pos

#define SC_INTEN_TERRIEN_Pos   (2)

SC_T::INTEN: TERRIEN Position

Definition at line 8635 of file M471M_R1_S.h.

◆ SC_INTEN_TMR0IEN_Msk

#define SC_INTEN_TMR0IEN_Msk   (0x1ul << SC_INTEN_TMR0IEN_Pos)

SC_T::INTEN: TMR0IEN Mask

Definition at line 8639 of file M471M_R1_S.h.

◆ SC_INTEN_TMR0IEN_Pos

#define SC_INTEN_TMR0IEN_Pos   (3)

SC_T::INTEN: TMR0IEN_Position

Definition at line 8638 of file M471M_R1_S.h.

◆ SC_INTEN_TMR1IEN_Msk

#define SC_INTEN_TMR1IEN_Msk   (0x1ul << SC_INTEN_TMR1IEN_Pos)

SC_T::INTEN: TMR1IEN Mask

Definition at line 8642 of file M471M_R1_S.h.

◆ SC_INTEN_TMR1IEN_Pos

#define SC_INTEN_TMR1IEN_Pos   (4)

SC_T::INTEN: TMR1IEN Position

Definition at line 8641 of file M471M_R1_S.h.

◆ SC_INTEN_TMR2IEN_Msk

#define SC_INTEN_TMR2IEN_Msk   (0x1ul << SC_INTEN_TMR2IEN_Pos)

SC_T::INTEN: TMR2IEN Mask

Definition at line 8645 of file M471M_R1_S.h.

◆ SC_INTEN_TMR2IEN_Pos

#define SC_INTEN_TMR2IEN_Pos   (5)

SC_T::INTEN: TMR2IEN Position

Definition at line 8644 of file M471M_R1_S.h.

◆ SC_INTSTS_ACERRIF_Msk

#define SC_INTSTS_ACERRIF_Msk   (0x1ul << SC_INTSTS_ACERRIF_Pos)

SC_T::INTSTS: ACERRIF Mask

Definition at line 8693 of file M471M_R1_S.h.

◆ SC_INTSTS_ACERRIF_Pos

#define SC_INTSTS_ACERRIF_Pos   (10)

SC_T::INTSTS: ACERRIF Position

Definition at line 8692 of file M471M_R1_S.h.

◆ SC_INTSTS_BGTIF_Msk

#define SC_INTSTS_BGTIF_Msk   (0x1ul << SC_INTSTS_BGTIF_Pos)

SC_T::INTSTS: BGTIF Mask

Definition at line 8681 of file M471M_R1_S.h.

◆ SC_INTSTS_BGTIF_Pos

#define SC_INTSTS_BGTIF_Pos   (6)

SC_T::INTSTS: BGTIF Position

Definition at line 8680 of file M471M_R1_S.h.

◆ SC_INTSTS_CDIF_Msk

#define SC_INTSTS_CDIF_Msk   (0x1ul << SC_INTSTS_CDIF_Pos)

SC_T::INTSTS: CDIF Mask

Definition at line 8684 of file M471M_R1_S.h.

◆ SC_INTSTS_CDIF_Pos

#define SC_INTSTS_CDIF_Pos   (7)

SC_T::INTSTS: CDIF Position

Definition at line 8683 of file M471M_R1_S.h.

◆ SC_INTSTS_INITIF_Msk

#define SC_INTSTS_INITIF_Msk   (0x1ul << SC_INTSTS_INITIF_Pos)

SC_T::INTSTS: INITIF Mask

Definition at line 8687 of file M471M_R1_S.h.

◆ SC_INTSTS_INITIF_Pos

#define SC_INTSTS_INITIF_Pos   (8)

SC_T::INTSTS: INITIF Position

Definition at line 8686 of file M471M_R1_S.h.

◆ SC_INTSTS_RBTOIF_Msk

#define SC_INTSTS_RBTOIF_Msk   (0x1ul << SC_INTSTS_RBTOIF_Pos)

SC_T::INTSTS: RBTOIF Mask

Definition at line 8690 of file M471M_R1_S.h.

◆ SC_INTSTS_RBTOIF_Pos

#define SC_INTSTS_RBTOIF_Pos   (9)

SC_T::INTSTS: RBTOIF Position

Definition at line 8689 of file M471M_R1_S.h.

◆ SC_INTSTS_RDAIF_Msk

#define SC_INTSTS_RDAIF_Msk   (0x1ul << SC_INTSTS_RDAIF_Pos)

SC_T::INTSTS: RDAIF Mask

Definition at line 8663 of file M471M_R1_S.h.

◆ SC_INTSTS_RDAIF_Pos

#define SC_INTSTS_RDAIF_Pos   (0)

SC_T::INTSTS: RDAIF Position

Definition at line 8662 of file M471M_R1_S.h.

◆ SC_INTSTS_TBEIF_Msk

#define SC_INTSTS_TBEIF_Msk   (0x1ul << SC_INTSTS_TBEIF_Pos)

SC_T::INTSTS: TBEIF Mask

Definition at line 8666 of file M471M_R1_S.h.

◆ SC_INTSTS_TBEIF_Pos

#define SC_INTSTS_TBEIF_Pos   (1)

SC_T::INTSTS: TBEIF Position

Definition at line 8665 of file M471M_R1_S.h.

◆ SC_INTSTS_TERRIF_Msk

#define SC_INTSTS_TERRIF_Msk   (0x1ul << SC_INTSTS_TERRIF_Pos)

SC_T::INTSTS: TERRIF Mask

Definition at line 8669 of file M471M_R1_S.h.

◆ SC_INTSTS_TERRIF_Pos

#define SC_INTSTS_TERRIF_Pos   (2)

SC_T::INTSTS: TERRIF Position

Definition at line 8668 of file M471M_R1_S.h.

◆ SC_INTSTS_TMR0IF_Msk

#define SC_INTSTS_TMR0IF_Msk   (0x1ul << SC_INTSTS_TMR0IF_Pos)

SC_T::INTSTS: TMR0IF Mask

Definition at line 8672 of file M471M_R1_S.h.

◆ SC_INTSTS_TMR0IF_Pos

#define SC_INTSTS_TMR0IF_Pos   (3)

SC_T::INTSTS: TMR0IF Position

Definition at line 8671 of file M471M_R1_S.h.

◆ SC_INTSTS_TMR1IF_Msk

#define SC_INTSTS_TMR1IF_Msk   (0x1ul << SC_INTSTS_TMR1IF_Pos)

SC_T::INTSTS: TMR1IF Mask

Definition at line 8675 of file M471M_R1_S.h.

◆ SC_INTSTS_TMR1IF_Pos

#define SC_INTSTS_TMR1IF_Pos   (4)

SC_T::INTSTS: TMR1IF Position

Definition at line 8674 of file M471M_R1_S.h.

◆ SC_INTSTS_TMR2IF_Msk

#define SC_INTSTS_TMR2IF_Msk   (0x1ul << SC_INTSTS_TMR2IF_Pos)

SC_T::INTSTS: TMR2IF Mask

Definition at line 8678 of file M471M_R1_S.h.

◆ SC_INTSTS_TMR2IF_Pos

#define SC_INTSTS_TMR2IF_Pos   (5)

SC_T::INTSTS: TMR2IF Position

Definition at line 8677 of file M471M_R1_S.h.

◆ SC_PINCTL_CLKKEEP_Msk

#define SC_PINCTL_CLKKEEP_Msk   (0x1ul << SC_PINCTL_CLKKEEP_Pos)

SC_T::PINCTL: CLKKEEP Msk

Definition at line 8765 of file M471M_R1_S.h.

◆ SC_PINCTL_CLKKEEP_Pos

#define SC_PINCTL_CLKKEEP_Pos   (6)

SC_T::PINCTL: CLKKEEP Position

Definition at line 8764 of file M471M_R1_S.h.

◆ SC_PINCTL_CSTOPLV_Msk

#define SC_PINCTL_CSTOPLV_Msk   (0x1ul << SC_PINCTL_CSTOPLV_Pos)

SC_T::PINCTL: CSTOPLV Msk

Definition at line 8762 of file M471M_R1_S.h.

◆ SC_PINCTL_CSTOPLV_Pos

#define SC_PINCTL_CSTOPLV_Pos   (5)

SC_T::PINCTL: CSTOPLV Position

Definition at line 8761 of file M471M_R1_S.h.

◆ SC_PINCTL_DATSTS_Msk

#define SC_PINCTL_DATSTS_Msk   (0x1ul << SC_PINCTL_DATSTS_Pos)

SC_T::PINCTL: DATSTS Msk

Definition at line 8777 of file M471M_R1_S.h.

◆ SC_PINCTL_DATSTS_Pos

#define SC_PINCTL_DATSTS_Pos   (16)

SC_T::PINCTL: DATSTS Position

Definition at line 8776 of file M471M_R1_S.h.

◆ SC_PINCTL_LOOPBK_Msk

#define SC_PINCTL_LOOPBK_Msk   (0x1ul << SC_PINCTL_LOOPBK_Pos)

SC_T::PINCTL: LOOPBK Msk

Definition at line 8789 of file M471M_R1_S.h.

◆ SC_PINCTL_LOOPBK_Pos

#define SC_PINCTL_LOOPBK_Pos   (31)

SC_T::PINCTL: LOOPBK Position

Definition at line 8788 of file M471M_R1_S.h.

◆ SC_PINCTL_PWREN_Msk

#define SC_PINCTL_PWREN_Msk   (0x1ul << SC_PINCTL_PWREN_Pos)

SC_T::PINCTL: PWREN Msk

Definition at line 8756 of file M471M_R1_S.h.

◆ SC_PINCTL_PWREN_Pos

#define SC_PINCTL_PWREN_Pos   (0)

SC_T::PINCTL: PWREN Position

Definition at line 8755 of file M471M_R1_S.h.

◆ SC_PINCTL_PWRINV_Msk

#define SC_PINCTL_PWRINV_Msk   (0x1ul << SC_PINCTL_PWRINV_Pos)

SC_T::PINCTL: PWRINV Msk

Definition at line 8771 of file M471M_R1_S.h.

◆ SC_PINCTL_PWRINV_Pos

#define SC_PINCTL_PWRINV_Pos   (11)

SC_T::PINCTL: PWRINV Position

Definition at line 8770 of file M471M_R1_S.h.

◆ SC_PINCTL_PWRSTS_Msk

#define SC_PINCTL_PWRSTS_Msk   (0x1ul << SC_PINCTL_PWRSTS_Pos)

SC_T::PINCTL: PWRSTS Msk

Definition at line 8780 of file M471M_R1_S.h.

◆ SC_PINCTL_PWRSTS_Pos

#define SC_PINCTL_PWRSTS_Pos   (17)

SC_T::PINCTL: PWRSTS Position

Definition at line 8779 of file M471M_R1_S.h.

◆ SC_PINCTL_RSTSTS_Msk

#define SC_PINCTL_RSTSTS_Msk   (0x1ul << SC_PINCTL_RSTSTS_Pos)

SC_T::PINCTL: RSTSTS Msk

Definition at line 8783 of file M471M_R1_S.h.

◆ SC_PINCTL_RSTSTS_Pos

#define SC_PINCTL_RSTSTS_Pos   (18)

SC_T::PINCTL: RSTSTS Position

Definition at line 8782 of file M471M_R1_S.h.

◆ SC_PINCTL_SCDOSTS_Msk

#define SC_PINCTL_SCDOSTS_Msk   (0x1ul << SC_PINCTL_SCDOSTS_Pos)

SC_T::PINCTL: SCDOSTS Msk

Definition at line 8774 of file M471M_R1_S.h.

◆ SC_PINCTL_SCDOSTS_Pos

#define SC_PINCTL_SCDOSTS_Pos   (12)

SC_T::PINCTL: SCDOSTS Position

Definition at line 8773 of file M471M_R1_S.h.

◆ SC_PINCTL_SCDOUT_Msk

#define SC_PINCTL_SCDOUT_Msk   (0x1ul << SC_PINCTL_SCDOUT_Pos)

SC_T::PINCTL: SCDOUT Msk

Definition at line 8768 of file M471M_R1_S.h.

◆ SC_PINCTL_SCDOUT_Pos

#define SC_PINCTL_SCDOUT_Pos   (9)

SC_T::PINCTL: SCDOUT Position

Definition at line 8767 of file M471M_R1_S.h.

◆ SC_PINCTL_SCRST_Msk

#define SC_PINCTL_SCRST_Msk   (0x1ul << SC_PINCTL_SCRST_Pos)

SC_T::PINCTL: SCRST Msk

Definition at line 8759 of file M471M_R1_S.h.

◆ SC_PINCTL_SCRST_Pos

#define SC_PINCTL_SCRST_Pos   (1)

SC_T::PINCTL: SCRST Position

Definition at line 8758 of file M471M_R1_S.h.

◆ SC_PINCTL_SYNC_Msk

#define SC_PINCTL_SYNC_Msk   (0x1ul << SC_PINCTL_SYNC_Pos)

SC_T::PINCTL: SYNC Msk

Definition at line 8786 of file M471M_R1_S.h.

◆ SC_PINCTL_SYNC_Pos

#define SC_PINCTL_SYNC_Pos   (30)

SC_T::PINCTL: SYNC Position

Definition at line 8785 of file M471M_R1_S.h.

◆ SC_RXTOUT_RFTM_Msk

#define SC_RXTOUT_RFTM_Msk   (0x1fful << SC_RXTOUT_RFTM_Pos)

SC_T::RXTOUT: RFTM Mask

Definition at line 8621 of file M471M_R1_S.h.

◆ SC_RXTOUT_RFTM_Pos

#define SC_RXTOUT_RFTM_Pos   (0)

SC_T::RXTOUT: RFTM Position

Definition at line 8620 of file M471M_R1_S.h.

◆ SC_STATUS_BEF_Msk

#define SC_STATUS_BEF_Msk   (0x1ul << SC_STATUS_BEF_Pos)

SC_T::STATUS: BEF Mask

Definition at line 8711 of file M471M_R1_S.h.

◆ SC_STATUS_BEF_Pos

#define SC_STATUS_BEF_Pos   (6)

SC_T::STATUS: BEF Position

Definition at line 8710 of file M471M_R1_S.h.

◆ SC_STATUS_CDPINSTS_Msk

#define SC_STATUS_CDPINSTS_Msk   (0x1ul << SC_STATUS_CDPINSTS_Pos)

SC_T::STATUS: CDPINSTS Mask

Definition at line 8729 of file M471M_R1_S.h.

◆ SC_STATUS_CDPINSTS_Pos

#define SC_STATUS_CDPINSTS_Pos   (13)

SC_T::STATUS: CDPINSTS Position

Definition at line 8728 of file M471M_R1_S.h.

◆ SC_STATUS_CINSERT_Msk

#define SC_STATUS_CINSERT_Msk   (0x1ul << SC_STATUS_CINSERT_Pos)

SC_T::STATUS: CINSERT Mask

Definition at line 8726 of file M471M_R1_S.h.

◆ SC_STATUS_CINSERT_Pos

#define SC_STATUS_CINSERT_Pos   (12)

SC_T::STATUS: CINSERT Position

Definition at line 8725 of file M471M_R1_S.h.

◆ SC_STATUS_CREMOVE_Msk

#define SC_STATUS_CREMOVE_Msk   (0x1ul << SC_STATUS_CREMOVE_Pos)

SC_T::STATUS: CREMOVE Mask

Definition at line 8723 of file M471M_R1_S.h.

◆ SC_STATUS_CREMOVE_Pos

#define SC_STATUS_CREMOVE_Pos   (11)

SC_T::STATUS: CREMOVE Position

Definition at line 8722 of file M471M_R1_S.h.

◆ SC_STATUS_FEF_Msk

#define SC_STATUS_FEF_Msk   (0x1ul << SC_STATUS_FEF_Pos)

SC_T::STATUS: FEF Mask

Definition at line 8708 of file M471M_R1_S.h.

◆ SC_STATUS_FEF_Pos

#define SC_STATUS_FEF_Pos   (5)

SC_T::STATUS: FEF Position

Definition at line 8707 of file M471M_R1_S.h.

◆ SC_STATUS_PEF_Msk

#define SC_STATUS_PEF_Msk   (0x1ul << SC_STATUS_PEF_Pos)

SC_T::STATUS: PEF Mask

Definition at line 8705 of file M471M_R1_S.h.

◆ SC_STATUS_PEF_Pos

#define SC_STATUS_PEF_Pos   (4)

SC_T::STATUS: PEF Position

Definition at line 8704 of file M471M_R1_S.h.

◆ SC_STATUS_RXACT_Msk

#define SC_STATUS_RXACT_Msk   (0x1ul << SC_STATUS_RXACT_Pos)

SC_T::STATUS: RXACT Msk

Definition at line 8741 of file M471M_R1_S.h.

◆ SC_STATUS_RXACT_Pos

#define SC_STATUS_RXACT_Pos   (23)

SC_T::STATUS: RXACT Position

Definition at line 8740 of file M471M_R1_S.h.

◆ SC_STATUS_RXEMPTY_Msk

#define SC_STATUS_RXEMPTY_Msk   (0x1ul << SC_STATUS_RXEMPTY_Pos)

SC_T::STATUS: RXEMPTY Mask

Definition at line 8699 of file M471M_R1_S.h.

◆ SC_STATUS_RXEMPTY_Pos

#define SC_STATUS_RXEMPTY_Pos   (1)

SC_T::STATUS: RXEMPTY Position

Definition at line 8698 of file M471M_R1_S.h.

◆ SC_STATUS_RXFULL_Msk

#define SC_STATUS_RXFULL_Msk   (0x1ul << SC_STATUS_RXFULL_Pos)

SC_T::STATUS: RXFULL Mask

Definition at line 8702 of file M471M_R1_S.h.

◆ SC_STATUS_RXFULL_Pos

#define SC_STATUS_RXFULL_Pos   (2)

SC_T::STATUS: RXFULL Position

Definition at line 8701 of file M471M_R1_S.h.

◆ SC_STATUS_RXOV_Msk

#define SC_STATUS_RXOV_Msk   (0x1ul << SC_STATUS_RXOV_Pos)

SC_T::STATUS: RXO Mask

Definition at line 8696 of file M471M_R1_S.h.

◆ SC_STATUS_RXOV_Pos

#define SC_STATUS_RXOV_Pos   (0)

SC_T::STATUS: RXO Position

Definition at line 8695 of file M471M_R1_S.h.

◆ SC_STATUS_RXOVERR_Msk

#define SC_STATUS_RXOVERR_Msk   (0x1ul << SC_STATUS_RXOVERR_Pos)

SC_T::STATUS: RXOVERR Mask

Definition at line 8738 of file M471M_R1_S.h.

◆ SC_STATUS_RXOVERR_Pos

#define SC_STATUS_RXOVERR_Pos   (22)

SC_T::STATUS: RXOVERR Position

Definition at line 8737 of file M471M_R1_S.h.

◆ SC_STATUS_RXPOINT_Msk

#define SC_STATUS_RXPOINT_Msk   (0x3ul << SC_STATUS_RXPOINT_Pos)

SC_T::STATUS: RXPOINT Mask

Definition at line 8732 of file M471M_R1_S.h.

◆ SC_STATUS_RXPOINT_Pos

#define SC_STATUS_RXPOINT_Pos   (16)

SC_T::STATUS: RXPOINT Position

Definition at line 8731 of file M471M_R1_S.h.

◆ SC_STATUS_RXRERR_Msk

#define SC_STATUS_RXRERR_Msk   (0x1ul << SC_STATUS_RXRERR_Pos)

SC_T::STATUS: RXRERR Mask

Definition at line 8735 of file M471M_R1_S.h.

◆ SC_STATUS_RXRERR_Pos

#define SC_STATUS_RXRERR_Pos   (21)

SC_T::STATUS: RXRERR Position

Definition at line 8734 of file M471M_R1_S.h.

◆ SC_STATUS_TXACT_Msk

#define SC_STATUS_TXACT_Msk   (0x1ul << SC_STATUS_TXACT_Pos)

SC_T::STATUS: TXACT Msk

Definition at line 8753 of file M471M_R1_S.h.

◆ SC_STATUS_TXACT_Pos

#define SC_STATUS_TXACT_Pos   (31)

SC_T::STATUS: TXACT Position

Definition at line 8752 of file M471M_R1_S.h.

◆ SC_STATUS_TXEMPTY_Msk

#define SC_STATUS_TXEMPTY_Msk   (0x1ul << SC_STATUS_TXEMPTY_Pos)

SC_T::STATUS: TXEMPTY Mask

Definition at line 8717 of file M471M_R1_S.h.

◆ SC_STATUS_TXEMPTY_Pos

#define SC_STATUS_TXEMPTY_Pos   (9)

SC_T::STATUS: TXEMPTY Position

Definition at line 8716 of file M471M_R1_S.h.

◆ SC_STATUS_TXFULL_Msk

#define SC_STATUS_TXFULL_Msk   (0x1ul << SC_STATUS_TXFULL_Pos)

SC_T::STATUS: TXFULL Mask

Definition at line 8720 of file M471M_R1_S.h.

◆ SC_STATUS_TXFULL_Pos

#define SC_STATUS_TXFULL_Pos   (10)

SC_T::STATUS: TXFULL Position

Definition at line 8719 of file M471M_R1_S.h.

◆ SC_STATUS_TXOV_Msk

#define SC_STATUS_TXOV_Msk   (0x1ul << SC_STATUS_TXOV_Pos)

SC_T::STATUS: TXOV Mask

Definition at line 8714 of file M471M_R1_S.h.

◆ SC_STATUS_TXOV_Pos

#define SC_STATUS_TXOV_Pos   (8)

SC_T::STATUS: TXOV Position

Definition at line 8713 of file M471M_R1_S.h.

◆ SC_STATUS_TXOVERR_Msk

#define SC_STATUS_TXOVERR_Msk   (0x1ul << SC_STATUS_TXOVERR_Pos)

SC_T::STATUS: TXOVERR_ Msk

Definition at line 8750 of file M471M_R1_S.h.

◆ SC_STATUS_TXOVERR_Pos

#define SC_STATUS_TXOVERR_Pos   (30)

SC_T::STATUS: TXOVERR_ Position

Definition at line 8749 of file M471M_R1_S.h.

◆ SC_STATUS_TXPOINT_Msk

#define SC_STATUS_TXPOINT_Msk   (0x3ul << SC_STATUS_TXPOINT_Pos)

SC_T::STATUS: TXPOINT Msk

Definition at line 8744 of file M471M_R1_S.h.

◆ SC_STATUS_TXPOINT_Pos

#define SC_STATUS_TXPOINT_Pos   (24)

SC_T::STATUS: TXPOINT Position

Definition at line 8743 of file M471M_R1_S.h.

◆ SC_STATUS_TXRERR_Msk

#define SC_STATUS_TXRERR_Msk   (0x1ul << SC_STATUS_TXRERR_Pos)

SC_T::STATUS: TXRERR Msk

Definition at line 8747 of file M471M_R1_S.h.

◆ SC_STATUS_TXRERR_Pos

#define SC_STATUS_TXRERR_Pos   (29)

SC_T::STATUS: TXRERR Position

Definition at line 8746 of file M471M_R1_S.h.

◆ SC_TMRCTL0_CNT_Msk

#define SC_TMRCTL0_CNT_Msk   (0xfffffful << SC_TMRCTL0_CNT_Pos)

SC_T::TMRCTL0: CNT Msk

Definition at line 8792 of file M471M_R1_S.h.

◆ SC_TMRCTL0_CNT_Pos

#define SC_TMRCTL0_CNT_Pos   (0)

SC_T::TMRCTL0: CNT Position

Definition at line 8791 of file M471M_R1_S.h.

◆ SC_TMRCTL0_OPMODE_Msk

#define SC_TMRCTL0_OPMODE_Msk   (0xful << SC_TMRCTL0_OPMODE_Pos)

SC_T::TMRCTL0: OPMODE Msk

Definition at line 8795 of file M471M_R1_S.h.

◆ SC_TMRCTL0_OPMODE_Pos

#define SC_TMRCTL0_OPMODE_Pos   (24)

SC_T::TMRCTL0: OPMODE Position

Definition at line 8794 of file M471M_R1_S.h.

◆ SC_TMRCTL1_CNT_Msk

#define SC_TMRCTL1_CNT_Msk   (0xfful << SC_TMRCTL1_CNT_Pos)

SC_T::TMRCTL1: CNT Msk

Definition at line 8798 of file M471M_R1_S.h.

◆ SC_TMRCTL1_CNT_Pos

#define SC_TMRCTL1_CNT_Pos   (0)

SC_T::TMRCTL1: CNT Position

Definition at line 8797 of file M471M_R1_S.h.

◆ SC_TMRCTL1_OPMODE_Msk

#define SC_TMRCTL1_OPMODE_Msk   (0xful << SC_TMRCTL1_OPMODE_Pos)

SC_T::TMRCTL1: OPMODE Msk

Definition at line 8801 of file M471M_R1_S.h.

◆ SC_TMRCTL1_OPMODE_Pos

#define SC_TMRCTL1_OPMODE_Pos   (24)

SC_T::TMRCTL1: OPMODE Position

Definition at line 8800 of file M471M_R1_S.h.

◆ SC_TMRCTL2_CNT_Msk

#define SC_TMRCTL2_CNT_Msk   (0xfful << SC_TMRCTL2_CNT_Pos)

SC_T::TMRCTL2: CNT Msk

Definition at line 8804 of file M471M_R1_S.h.

◆ SC_TMRCTL2_CNT_Pos

#define SC_TMRCTL2_CNT_Pos   (0)

SC_T::TMRCTL2: CNT Position

Definition at line 8803 of file M471M_R1_S.h.

◆ SC_TMRCTL2_OPMODE_Msk

#define SC_TMRCTL2_OPMODE_Msk   (0xful << SC_TMRCTL2_OPMODE_Pos)

SC_T::TMRCTL2: OPMODE Msk

Definition at line 8807 of file M471M_R1_S.h.

◆ SC_TMRCTL2_OPMODE_Pos

#define SC_TMRCTL2_OPMODE_Pos   (24)

SC_T::TMRCTL2: OPMODE Position

Definition at line 8806 of file M471M_R1_S.h.

◆ SC_TMRDAT0_CNT0_Msk

#define SC_TMRDAT0_CNT0_Msk   (0xfffffful << SC_TMRDAT0_CNT0_Pos)

SC_T::TMRDAT0: CNT0 Msk

Definition at line 8822 of file M471M_R1_S.h.

◆ SC_TMRDAT0_CNT0_Pos

#define SC_TMRDAT0_CNT0_Pos   (0)

SC_T::TMRDAT0: CNT0 Position

Definition at line 8821 of file M471M_R1_S.h.

◆ SC_TMRDAT1_2_CNT1_Msk

#define SC_TMRDAT1_2_CNT1_Msk   (0xfful << SC_TMRDAT1_2_CNT1_Pos)

SC_T::TMRDAT1_2: CNT1 Msk

Definition at line 8825 of file M471M_R1_S.h.

◆ SC_TMRDAT1_2_CNT1_Pos

#define SC_TMRDAT1_2_CNT1_Pos   (0)

SC_T::TMRDAT1_2: CNT1 Position

Definition at line 8824 of file M471M_R1_S.h.

◆ SC_TMRDAT1_2_CNT2_Msk

#define SC_TMRDAT1_2_CNT2_Msk   (0xfful << SC_TMRDAT1_2_CNT2_Pos)

SC_T::TMRDAT1_2: CNT2 Msk

Definition at line 8828 of file M471M_R1_S.h.

◆ SC_TMRDAT1_2_CNT2_Pos

#define SC_TMRDAT1_2_CNT2_Pos   (8)

SC_T::TMRDAT1_2: CNT2 Position

Definition at line 8827 of file M471M_R1_S.h.

◆ SC_UARTCTL_OPE_Msk

#define SC_UARTCTL_OPE_Msk   (0x1ul << SC_UARTCTL_OPE_Pos)

SC_T::UARTCTL: OPE Msk

Definition at line 8819 of file M471M_R1_S.h.

◆ SC_UARTCTL_OPE_Pos

#define SC_UARTCTL_OPE_Pos   (7)

SC_T::UARTCTL: OPE Position

Definition at line 8818 of file M471M_R1_S.h.

◆ SC_UARTCTL_PBOFF_Msk

#define SC_UARTCTL_PBOFF_Msk   (0x1ul << SC_UARTCTL_PBOFF_Pos)

SC_T::UARTCTL: PBOFF Msk

Definition at line 8816 of file M471M_R1_S.h.

◆ SC_UARTCTL_PBOFF_Pos

#define SC_UARTCTL_PBOFF_Pos   (6)

SC_T::UARTCTL: PBOFF Position

Definition at line 8815 of file M471M_R1_S.h.

◆ SC_UARTCTL_UARTEN_Msk

#define SC_UARTCTL_UARTEN_Msk   (0x1ul << SC_UARTCTL_UARTEN_Pos)

SC_T::UARTCTL: UARTEN Msk

Definition at line 8810 of file M471M_R1_S.h.

◆ SC_UARTCTL_UARTEN_Pos

#define SC_UARTCTL_UARTEN_Pos   (0)

SC_T::UARTCTL: UARTEN Position

Definition at line 8809 of file M471M_R1_S.h.

◆ SC_UARTCTL_WLS_Msk

#define SC_UARTCTL_WLS_Msk   (0x3ul << SC_UARTCTL_WLS10_Pos)

SC_T::UARTCTL: WLS Msk

Definition at line 8813 of file M471M_R1_S.h.

◆ SC_UARTCTL_WLS_Pos

#define SC_UARTCTL_WLS_Pos   (4)

SC_T::UARTCTL: WLS Position

Definition at line 8812 of file M471M_R1_S.h.

◆ SPI_CLKDIV_DIVIDER_Msk

#define SPI_CLKDIV_DIVIDER_Msk   (0xfful << SPI_CLKDIV_DIVIDER_Pos)

SPI_T::CLKDIV: DIVIDER Mask

Definition at line 9372 of file M471M_R1_S.h.

◆ SPI_CLKDIV_DIVIDER_Pos

#define SPI_CLKDIV_DIVIDER_Pos   (0)

SPI_T::CLKDIV: DIVIDER Position

Definition at line 9371 of file M471M_R1_S.h.

◆ SPI_CTL_CLKPOL_Msk

#define SPI_CTL_CLKPOL_Msk   (0x1ul << SPI_CTL_CLKPOL_Pos)

SPI_T::CTL: CLKPOL Mask

Definition at line 9339 of file M471M_R1_S.h.

◆ SPI_CTL_CLKPOL_Pos

#define SPI_CTL_CLKPOL_Pos   (3)

SPI_T::CTL: CLKPOL Position

Definition at line 9338 of file M471M_R1_S.h.

◆ SPI_CTL_DUALIOEN_Msk

#define SPI_CTL_DUALIOEN_Msk   (0x1ul << SPI_CTL_DUALIOEN_Pos)

SPI_T::CTL: DUALIOEN Mask

Definition at line 9366 of file M471M_R1_S.h.

◆ SPI_CTL_DUALIOEN_Pos

#define SPI_CTL_DUALIOEN_Pos   (21)

SPI_T::CTL: DUALIOEN Position

Definition at line 9365 of file M471M_R1_S.h.

◆ SPI_CTL_DWIDTH_Msk

#define SPI_CTL_DWIDTH_Msk   (0x1ful << SPI_CTL_DWIDTH_Pos)

SPI_T::CTL: DWIDTH Mask

Definition at line 9345 of file M471M_R1_S.h.

◆ SPI_CTL_DWIDTH_Pos

#define SPI_CTL_DWIDTH_Pos   (8)

SPI_T::CTL: DWIDTH Position

Definition at line 9344 of file M471M_R1_S.h.

◆ SPI_CTL_LSB_Msk

#define SPI_CTL_LSB_Msk   (0x1ul << SPI_CTL_LSB_Pos)

SPI_T::CTL: LSB Mask

Definition at line 9348 of file M471M_R1_S.h.

◆ SPI_CTL_LSB_Pos

#define SPI_CTL_LSB_Pos   (13)

SPI_T::CTL: LSB Position

Definition at line 9347 of file M471M_R1_S.h.

◆ SPI_CTL_QDIODIR_Msk

#define SPI_CTL_QDIODIR_Msk   (0x1ul << SPI_CTL_QDIODIR_Pos)

SPI_T::CTL: QDIODIR Mask

Definition at line 9363 of file M471M_R1_S.h.

◆ SPI_CTL_QDIODIR_Pos

#define SPI_CTL_QDIODIR_Pos   (20)

SPI_T::CTL: QDIODIR Position

Definition at line 9362 of file M471M_R1_S.h.

◆ SPI_CTL_QUADIOEN_Msk

#define SPI_CTL_QUADIOEN_Msk   (0x1ul << SPI_CTL_QUADIOEN_Pos)

SPI_T::CTL: QUADIOEN Mask

Definition at line 9369 of file M471M_R1_S.h.

◆ SPI_CTL_QUADIOEN_Pos

#define SPI_CTL_QUADIOEN_Pos   (22)

SPI_T::CTL: QUADIOEN Position

Definition at line 9368 of file M471M_R1_S.h.

◆ SPI_CTL_REORDER_Msk

#define SPI_CTL_REORDER_Msk   (0x1ul << SPI_CTL_REORDER_Pos)

SPI_T::CTL: REORDER Mask

Definition at line 9360 of file M471M_R1_S.h.

◆ SPI_CTL_REORDER_Pos

#define SPI_CTL_REORDER_Pos   (19)

SPI_T::CTL: REORDER Position

Definition at line 9359 of file M471M_R1_S.h.

◆ SPI_CTL_RXNEG_Msk

#define SPI_CTL_RXNEG_Msk   (0x1ul << SPI_CTL_RXNEG_Pos)

SPI_T::CTL: RXNEG Mask

Definition at line 9333 of file M471M_R1_S.h.

◆ SPI_CTL_RXNEG_Pos

#define SPI_CTL_RXNEG_Pos   (1)

SPI_T::CTL: RXNEG Position

Definition at line 9332 of file M471M_R1_S.h.

◆ SPI_CTL_SLAVE_Msk

#define SPI_CTL_SLAVE_Msk   (0x1ul << SPI_CTL_SLAVE_Pos)

SPI_T::CTL: SLAVE Mask

Definition at line 9357 of file M471M_R1_S.h.

◆ SPI_CTL_SLAVE_Pos

#define SPI_CTL_SLAVE_Pos   (18)

SPI_T::CTL: SLAVE Position

Definition at line 9356 of file M471M_R1_S.h.

◆ SPI_CTL_SPIEN_Msk

#define SPI_CTL_SPIEN_Msk   (0x1ul << SPI_CTL_SPIEN_Pos)

SPI_T::CTL: SPIEN Mask

Definition at line 9330 of file M471M_R1_S.h.

◆ SPI_CTL_SPIEN_Pos

#define SPI_CTL_SPIEN_Pos   (0)
@addtogroup SPI_CONST SPI Bit Field Definition
Constant Definitions for SPI Controller

SPI_T::CTL: SPIEN Position

Definition at line 9329 of file M471M_R1_S.h.

◆ SPI_CTL_SUSPITV_Msk

#define SPI_CTL_SUSPITV_Msk   (0xful << SPI_CTL_SUSPITV_Pos)

SPI_T::CTL: SUSPITV Mask

Definition at line 9342 of file M471M_R1_S.h.

◆ SPI_CTL_SUSPITV_Pos

#define SPI_CTL_SUSPITV_Pos   (4)

SPI_T::CTL: SUSPITV Position

Definition at line 9341 of file M471M_R1_S.h.

◆ SPI_CTL_TWOBIT_Msk

#define SPI_CTL_TWOBIT_Msk   (0x1ul << SPI_CTL_TWOBIT_Pos)

SPI_T::CTL: TWOBIT Mask

Definition at line 9351 of file M471M_R1_S.h.

◆ SPI_CTL_TWOBIT_Pos

#define SPI_CTL_TWOBIT_Pos   (16)

SPI_T::CTL: TWOBIT Position

Definition at line 9350 of file M471M_R1_S.h.

◆ SPI_CTL_TXNEG_Msk

#define SPI_CTL_TXNEG_Msk   (0x1ul << SPI_CTL_TXNEG_Pos)

SPI_T::CTL: TXNEG Mask

Definition at line 9336 of file M471M_R1_S.h.

◆ SPI_CTL_TXNEG_Pos

#define SPI_CTL_TXNEG_Pos   (2)

SPI_T::CTL: TXNEG Position

Definition at line 9335 of file M471M_R1_S.h.

◆ SPI_CTL_UNITIEN_Msk

#define SPI_CTL_UNITIEN_Msk   (0x1ul << SPI_CTL_UNITIEN_Pos)

SPI_T::CTL: UNITIEN Mask

Definition at line 9354 of file M471M_R1_S.h.

◆ SPI_CTL_UNITIEN_Pos

#define SPI_CTL_UNITIEN_Pos   (17)

SPI_T::CTL: UNITIEN Position

Definition at line 9353 of file M471M_R1_S.h.

◆ SPI_FIFOCTL_RXFBCLR_Msk

#define SPI_FIFOCTL_RXFBCLR_Msk   (0x1ul << SPI_FIFOCTL_RXFBCLR_Pos)

SPI_T::FIFOCTL: RXFBCLR Mask

Definition at line 9441 of file M471M_R1_S.h.

◆ SPI_FIFOCTL_RXFBCLR_Pos

#define SPI_FIFOCTL_RXFBCLR_Pos   (8)

SPI_T::FIFOCTL: RXFBCLR Position

Definition at line 9440 of file M471M_R1_S.h.

◆ SPI_FIFOCTL_RXOVIEN_Msk

#define SPI_FIFOCTL_RXOVIEN_Msk   (0x1ul << SPI_FIFOCTL_RXOVIEN_Pos)

SPI_T::FIFOCTL: RXOVIEN Mask

Definition at line 9432 of file M471M_R1_S.h.

◆ SPI_FIFOCTL_RXOVIEN_Pos

#define SPI_FIFOCTL_RXOVIEN_Pos   (5)

SPI_T::FIFOCTL: RXOVIEN Position

Definition at line 9431 of file M471M_R1_S.h.

◆ SPI_FIFOCTL_RXRST_Msk

#define SPI_FIFOCTL_RXRST_Msk   (0x1ul << SPI_FIFOCTL_RXRST_Pos)

SPI_T::FIFOCTL: RXRST Mask

Definition at line 9417 of file M471M_R1_S.h.

◆ SPI_FIFOCTL_RXRST_Pos

#define SPI_FIFOCTL_RXRST_Pos   (0)

SPI_T::FIFOCTL: RXRST Position

Definition at line 9416 of file M471M_R1_S.h.

◆ SPI_FIFOCTL_RXTH_Msk

#define SPI_FIFOCTL_RXTH_Msk   (0x7ul << SPI_FIFOCTL_RXTH_Pos)

SPI_T::FIFOCTL: RXTH Mask

Definition at line 9447 of file M471M_R1_S.h.

◆ SPI_FIFOCTL_RXTH_Pos

#define SPI_FIFOCTL_RXTH_Pos   (24)

SPI_T::FIFOCTL: RXTH Position

Definition at line 9446 of file M471M_R1_S.h.

◆ SPI_FIFOCTL_RXTHIEN_Msk

#define SPI_FIFOCTL_RXTHIEN_Msk   (0x1ul << SPI_FIFOCTL_RXTHIEN_Pos)

SPI_T::FIFOCTL: RXTHIEN Mask

Definition at line 9423 of file M471M_R1_S.h.

◆ SPI_FIFOCTL_RXTHIEN_Pos

#define SPI_FIFOCTL_RXTHIEN_Pos   (2)

SPI_T::FIFOCTL: RXTHIEN Position

Definition at line 9422 of file M471M_R1_S.h.

◆ SPI_FIFOCTL_RXTOIEN_Msk

#define SPI_FIFOCTL_RXTOIEN_Msk   (0x1ul << SPI_FIFOCTL_RXTOIEN_Pos)

SPI_T::FIFOCTL: RXTOIEN Mask

Definition at line 9429 of file M471M_R1_S.h.

◆ SPI_FIFOCTL_RXTOIEN_Pos

#define SPI_FIFOCTL_RXTOIEN_Pos   (4)

SPI_T::FIFOCTL: RXTOIEN Position

Definition at line 9428 of file M471M_R1_S.h.

◆ SPI_FIFOCTL_TXFBCLR_Msk

#define SPI_FIFOCTL_TXFBCLR_Msk   (0x1ul << SPI_FIFOCTL_TXFBCLR_Pos)

SPI_T::FIFOCTL: TXFBCLR Mask

Definition at line 9444 of file M471M_R1_S.h.

◆ SPI_FIFOCTL_TXFBCLR_Pos

#define SPI_FIFOCTL_TXFBCLR_Pos   (9)

SPI_T::FIFOCTL: TXFBCLR Position

Definition at line 9443 of file M471M_R1_S.h.

◆ SPI_FIFOCTL_TXRST_Msk

#define SPI_FIFOCTL_TXRST_Msk   (0x1ul << SPI_FIFOCTL_TXRST_Pos)

SPI_T::FIFOCTL: TXRST Mask

Definition at line 9420 of file M471M_R1_S.h.

◆ SPI_FIFOCTL_TXRST_Pos

#define SPI_FIFOCTL_TXRST_Pos   (1)

SPI_T::FIFOCTL: TXRST Position

Definition at line 9419 of file M471M_R1_S.h.

◆ SPI_FIFOCTL_TXTH_Msk

#define SPI_FIFOCTL_TXTH_Msk   (0x7ul << SPI_FIFOCTL_TXTH_Pos)

SPI_T::FIFOCTL: TXTH Mask

Definition at line 9450 of file M471M_R1_S.h.

◆ SPI_FIFOCTL_TXTH_Pos

#define SPI_FIFOCTL_TXTH_Pos   (28)

SPI_T::FIFOCTL: TXTH Position

Definition at line 9449 of file M471M_R1_S.h.

◆ SPI_FIFOCTL_TXTHIEN_Msk

#define SPI_FIFOCTL_TXTHIEN_Msk   (0x1ul << SPI_FIFOCTL_TXTHIEN_Pos)

SPI_T::FIFOCTL: TXTHIEN Mask

Definition at line 9426 of file M471M_R1_S.h.

◆ SPI_FIFOCTL_TXTHIEN_Pos

#define SPI_FIFOCTL_TXTHIEN_Pos   (3)

SPI_T::FIFOCTL: TXTHIEN Position

Definition at line 9425 of file M471M_R1_S.h.

◆ SPI_FIFOCTL_TXUFIEN_Msk

#define SPI_FIFOCTL_TXUFIEN_Msk   (0x1ul << SPI_FIFOCTL_TXUFIEN_Pos)

SPI_T::FIFOCTL: TXUFIEN Mask

Definition at line 9438 of file M471M_R1_S.h.

◆ SPI_FIFOCTL_TXUFIEN_Pos

#define SPI_FIFOCTL_TXUFIEN_Pos   (7)

SPI_T::FIFOCTL: TXUFIEN Position

Definition at line 9437 of file M471M_R1_S.h.

◆ SPI_FIFOCTL_TXUFPOL_Msk

#define SPI_FIFOCTL_TXUFPOL_Msk   (0x1ul << SPI_FIFOCTL_TXUFPOL_Pos)

SPI_T::FIFOCTL: TXUFPOL Mask

Definition at line 9435 of file M471M_R1_S.h.

◆ SPI_FIFOCTL_TXUFPOL_Pos

#define SPI_FIFOCTL_TXUFPOL_Pos   (6)

SPI_T::FIFOCTL: TXUFPOL Position

Definition at line 9434 of file M471M_R1_S.h.

◆ SPI_I2SCLK_BCLKDIV_Msk

#define SPI_I2SCLK_BCLKDIV_Msk   (0x1fful << SPI_I2SCLK_BCLKDIV_Pos)

SPI_T::I2SCLK: BCLKDIV Mask

Definition at line 9570 of file M471M_R1_S.h.

◆ SPI_I2SCLK_BCLKDIV_Pos

#define SPI_I2SCLK_BCLKDIV_Pos   (8)

SPI_T::I2SCLK: BCLKDIV Position

Definition at line 9569 of file M471M_R1_S.h.

◆ SPI_I2SCLK_MCLKDIV_Msk

#define SPI_I2SCLK_MCLKDIV_Msk   (0x3ful << SPI_I2SCLK_MCLKDIV_Pos)

SPI_T::I2SCLK: MCLKDIV Mask

Definition at line 9567 of file M471M_R1_S.h.

◆ SPI_I2SCLK_MCLKDIV_Pos

#define SPI_I2SCLK_MCLKDIV_Pos   (0)

SPI_T::I2SCLK: MCLKDIV Position

Definition at line 9566 of file M471M_R1_S.h.

◆ SPI_I2SCTL_FORMAT_Msk

#define SPI_I2SCTL_FORMAT_Msk   (0x3ul << SPI_I2SCTL_FORMAT_Pos)

SPI_T::I2SCTL: FORMAT Mask

Definition at line 9564 of file M471M_R1_S.h.

◆ SPI_I2SCTL_FORMAT_Pos

#define SPI_I2SCTL_FORMAT_Pos   (28)

SPI_T::I2SCTL: FORMAT Position

Definition at line 9563 of file M471M_R1_S.h.

◆ SPI_I2SCTL_I2SEN_Msk

#define SPI_I2SCTL_I2SEN_Msk   (0x1ul << SPI_I2SCTL_I2SEN_Pos)

SPI_T::I2SCTL: I2SEN Mask

Definition at line 9522 of file M471M_R1_S.h.

◆ SPI_I2SCTL_I2SEN_Pos

#define SPI_I2SCTL_I2SEN_Pos   (0)

SPI_T::I2SCTL: I2SEN Position

Definition at line 9521 of file M471M_R1_S.h.

◆ SPI_I2SCTL_LZCEN_Msk

#define SPI_I2SCTL_LZCEN_Msk   (0x1ul << SPI_I2SCTL_LZCEN_Pos)

SPI_T::I2SCTL: LZCEN Mask

Definition at line 9552 of file M471M_R1_S.h.

◆ SPI_I2SCTL_LZCEN_Pos

#define SPI_I2SCTL_LZCEN_Pos   (17)

SPI_T::I2SCTL: LZCEN Position

Definition at line 9551 of file M471M_R1_S.h.

◆ SPI_I2SCTL_LZCIEN_Msk

#define SPI_I2SCTL_LZCIEN_Msk   (0x1ul << SPI_I2SCTL_LZCIEN_Pos)

SPI_T::I2SCTL: LZCIEN Mask

Definition at line 9561 of file M471M_R1_S.h.

◆ SPI_I2SCTL_LZCIEN_Pos

#define SPI_I2SCTL_LZCIEN_Pos   (25)

SPI_T::I2SCTL: LZCIEN Position

Definition at line 9560 of file M471M_R1_S.h.

◆ SPI_I2SCTL_MCLKEN_Msk

#define SPI_I2SCTL_MCLKEN_Msk   (0x1ul << SPI_I2SCTL_MCLKEN_Pos)

SPI_T::I2SCTL: MCLKEN Mask

Definition at line 9546 of file M471M_R1_S.h.

◆ SPI_I2SCTL_MCLKEN_Pos

#define SPI_I2SCTL_MCLKEN_Pos   (15)

SPI_T::I2SCTL: MCLKEN Position

Definition at line 9545 of file M471M_R1_S.h.

◆ SPI_I2SCTL_MONO_Msk

#define SPI_I2SCTL_MONO_Msk   (0x1ul << SPI_I2SCTL_MONO_Pos)

SPI_T::I2SCTL: MONO Mask

Definition at line 9537 of file M471M_R1_S.h.

◆ SPI_I2SCTL_MONO_Pos

#define SPI_I2SCTL_MONO_Pos   (6)

SPI_T::I2SCTL: MONO Position

Definition at line 9536 of file M471M_R1_S.h.

◆ SPI_I2SCTL_MUTE_Msk

#define SPI_I2SCTL_MUTE_Msk   (0x1ul << SPI_I2SCTL_MUTE_Pos)

SPI_T::I2SCTL: MUTE Mask

Definition at line 9531 of file M471M_R1_S.h.

◆ SPI_I2SCTL_MUTE_Pos

#define SPI_I2SCTL_MUTE_Pos   (3)

SPI_T::I2SCTL: MUTE Position

Definition at line 9530 of file M471M_R1_S.h.

◆ SPI_I2SCTL_ORDER_Msk

#define SPI_I2SCTL_ORDER_Msk   (0x1ul << SPI_I2SCTL_ORDER_Pos)

SPI_T::I2SCTL: ORDER Mask

Definition at line 9540 of file M471M_R1_S.h.

◆ SPI_I2SCTL_ORDER_Pos

#define SPI_I2SCTL_ORDER_Pos   (7)

SPI_T::I2SCTL: ORDER Position

Definition at line 9539 of file M471M_R1_S.h.

◆ SPI_I2SCTL_RXEN_Msk

#define SPI_I2SCTL_RXEN_Msk   (0x1ul << SPI_I2SCTL_RXEN_Pos)

SPI_T::I2SCTL: RXEN Mask

Definition at line 9528 of file M471M_R1_S.h.

◆ SPI_I2SCTL_RXEN_Pos

#define SPI_I2SCTL_RXEN_Pos   (2)

SPI_T::I2SCTL: RXEN Position

Definition at line 9527 of file M471M_R1_S.h.

◆ SPI_I2SCTL_RXLCH_Msk

#define SPI_I2SCTL_RXLCH_Msk   (0x1ul << SPI_I2SCTL_RXLCH_Pos)

SPI_T::I2SCTL: RXLCH Mask

Definition at line 9555 of file M471M_R1_S.h.

◆ SPI_I2SCTL_RXLCH_Pos

#define SPI_I2SCTL_RXLCH_Pos   (23)

SPI_T::I2SCTL: RXLCH Position

Definition at line 9554 of file M471M_R1_S.h.

◆ SPI_I2SCTL_RZCEN_Msk

#define SPI_I2SCTL_RZCEN_Msk   (0x1ul << SPI_I2SCTL_RZCEN_Pos)

SPI_T::I2SCTL: RZCEN Mask

Definition at line 9549 of file M471M_R1_S.h.

◆ SPI_I2SCTL_RZCEN_Pos

#define SPI_I2SCTL_RZCEN_Pos   (16)

SPI_T::I2SCTL: RZCEN Position

Definition at line 9548 of file M471M_R1_S.h.

◆ SPI_I2SCTL_RZCIEN_Msk

#define SPI_I2SCTL_RZCIEN_Msk   (0x1ul << SPI_I2SCTL_RZCIEN_Pos)

SPI_T::I2SCTL: RZCIEN Mask

Definition at line 9558 of file M471M_R1_S.h.

◆ SPI_I2SCTL_RZCIEN_Pos

#define SPI_I2SCTL_RZCIEN_Pos   (24)

SPI_T::I2SCTL: RZCIEN Position

Definition at line 9557 of file M471M_R1_S.h.

◆ SPI_I2SCTL_SLAVE_Msk

#define SPI_I2SCTL_SLAVE_Msk   (0x1ul << SPI_I2SCTL_SLAVE_Pos)

SPI_T::I2SCTL: SLAVE Mask

Definition at line 9543 of file M471M_R1_S.h.

◆ SPI_I2SCTL_SLAVE_Pos

#define SPI_I2SCTL_SLAVE_Pos   (8)

SPI_T::I2SCTL: SLAVE Position

Definition at line 9542 of file M471M_R1_S.h.

◆ SPI_I2SCTL_TXEN_Msk

#define SPI_I2SCTL_TXEN_Msk   (0x1ul << SPI_I2SCTL_TXEN_Pos)

SPI_T::I2SCTL: TXEN Mask

Definition at line 9525 of file M471M_R1_S.h.

◆ SPI_I2SCTL_TXEN_Pos

#define SPI_I2SCTL_TXEN_Pos   (1)

SPI_T::I2SCTL: TXEN Position

Definition at line 9524 of file M471M_R1_S.h.

◆ SPI_I2SCTL_WDWIDTH_Msk

#define SPI_I2SCTL_WDWIDTH_Msk   (0x3ul << SPI_I2SCTL_WDWIDTH_Pos)

SPI_T::I2SCTL: WDWIDTH Mask

Definition at line 9534 of file M471M_R1_S.h.

◆ SPI_I2SCTL_WDWIDTH_Pos

#define SPI_I2SCTL_WDWIDTH_Pos   (4)

SPI_T::I2SCTL: WDWIDTH Position

Definition at line 9533 of file M471M_R1_S.h.

◆ SPI_I2SSTS_I2SENSTS_Msk

#define SPI_I2SSTS_I2SENSTS_Msk   (0x1ul << SPI_I2SSTS_I2SENSTS_Pos)

SPI_T::I2SSTS: I2SENSTS Mask

Definition at line 9591 of file M471M_R1_S.h.

◆ SPI_I2SSTS_I2SENSTS_Pos

#define SPI_I2SSTS_I2SENSTS_Pos   (15)

SPI_T::I2SSTS: I2SENSTS Position

Definition at line 9590 of file M471M_R1_S.h.

◆ SPI_I2SSTS_LZCIF_Msk

#define SPI_I2SSTS_LZCIF_Msk   (0x1ul << SPI_I2SSTS_LZCIF_Pos)

SPI_T::I2SSTS: LZCIF Mask

Definition at line 9609 of file M471M_R1_S.h.

◆ SPI_I2SSTS_LZCIF_Pos

#define SPI_I2SSTS_LZCIF_Pos   (21)

SPI_T::I2SSTS: LZCIF Position

Definition at line 9608 of file M471M_R1_S.h.

◆ SPI_I2SSTS_RIGHT_Msk

#define SPI_I2SSTS_RIGHT_Msk   (0x1ul << SPI_I2SSTS_RIGHT_Pos)

SPI_T::I2SSTS: RIGHT Mask

Definition at line 9573 of file M471M_R1_S.h.

◆ SPI_I2SSTS_RIGHT_Pos

#define SPI_I2SSTS_RIGHT_Pos   (4)

SPI_T::I2SSTS: RIGHT Position

Definition at line 9572 of file M471M_R1_S.h.

◆ SPI_I2SSTS_RXCNT_Msk

#define SPI_I2SSTS_RXCNT_Msk   (0x7ul << SPI_I2SSTS_RXCNT_Pos)

SPI_T::I2SSTS: RXCNT Mask

Definition at line 9615 of file M471M_R1_S.h.

◆ SPI_I2SSTS_RXCNT_Pos

#define SPI_I2SSTS_RXCNT_Pos   (24)

SPI_T::I2SSTS: RXCNT Position

Definition at line 9614 of file M471M_R1_S.h.

◆ SPI_I2SSTS_RXEMPTY_Msk

#define SPI_I2SSTS_RXEMPTY_Msk   (0x1ul << SPI_I2SSTS_RXEMPTY_Pos)

SPI_T::I2SSTS: RXEMPTY Mask

Definition at line 9576 of file M471M_R1_S.h.

◆ SPI_I2SSTS_RXEMPTY_Pos

#define SPI_I2SSTS_RXEMPTY_Pos   (8)

SPI_T::I2SSTS: RXEMPTY Position

Definition at line 9575 of file M471M_R1_S.h.

◆ SPI_I2SSTS_RXFULL_Msk

#define SPI_I2SSTS_RXFULL_Msk   (0x1ul << SPI_I2SSTS_RXFULL_Pos)

SPI_T::I2SSTS: RXFULL Mask

Definition at line 9579 of file M471M_R1_S.h.

◆ SPI_I2SSTS_RXFULL_Pos

#define SPI_I2SSTS_RXFULL_Pos   (9)

SPI_T::I2SSTS: RXFULL Position

Definition at line 9578 of file M471M_R1_S.h.

◆ SPI_I2SSTS_RXOVIF_Msk

#define SPI_I2SSTS_RXOVIF_Msk   (0x1ul << SPI_I2SSTS_RXOVIF_Pos)

SPI_T::I2SSTS: RXOVIF Mask

Definition at line 9585 of file M471M_R1_S.h.

◆ SPI_I2SSTS_RXOVIF_Pos

#define SPI_I2SSTS_RXOVIF_Pos   (11)

SPI_T::I2SSTS: RXOVIF Position

Definition at line 9584 of file M471M_R1_S.h.

◆ SPI_I2SSTS_RXTHIF_Msk

#define SPI_I2SSTS_RXTHIF_Msk   (0x1ul << SPI_I2SSTS_RXTHIF_Pos)

SPI_T::I2SSTS: RXTHIF Mask

Definition at line 9582 of file M471M_R1_S.h.

◆ SPI_I2SSTS_RXTHIF_Pos

#define SPI_I2SSTS_RXTHIF_Pos   (10)

SPI_T::I2SSTS: RXTHIF Position

Definition at line 9581 of file M471M_R1_S.h.

◆ SPI_I2SSTS_RXTOIF_Msk

#define SPI_I2SSTS_RXTOIF_Msk   (0x1ul << SPI_I2SSTS_RXTOIF_Pos)

SPI_T::I2SSTS: RXTOIF Mask

Definition at line 9588 of file M471M_R1_S.h.

◆ SPI_I2SSTS_RXTOIF_Pos

#define SPI_I2SSTS_RXTOIF_Pos   (12)

SPI_T::I2SSTS: RXTOIF Position

Definition at line 9587 of file M471M_R1_S.h.

◆ SPI_I2SSTS_RZCIF_Msk

#define SPI_I2SSTS_RZCIF_Msk   (0x1ul << SPI_I2SSTS_RZCIF_Pos)

SPI_T::I2SSTS: RZCIF Mask

Definition at line 9606 of file M471M_R1_S.h.

◆ SPI_I2SSTS_RZCIF_Pos

#define SPI_I2SSTS_RZCIF_Pos   (20)

SPI_T::I2SSTS: RZCIF Position

Definition at line 9605 of file M471M_R1_S.h.

◆ SPI_I2SSTS_TXCNT_Msk

#define SPI_I2SSTS_TXCNT_Msk   (0x7ul << SPI_I2SSTS_TXCNT_Pos)

SPI_T::I2SSTS: TXCNT Mask

Definition at line 9618 of file M471M_R1_S.h.

◆ SPI_I2SSTS_TXCNT_Pos

#define SPI_I2SSTS_TXCNT_Pos   (28)

SPI_T::I2SSTS: TXCNT Position

Definition at line 9617 of file M471M_R1_S.h.

◆ SPI_I2SSTS_TXEMPTY_Msk

#define SPI_I2SSTS_TXEMPTY_Msk   (0x1ul << SPI_I2SSTS_TXEMPTY_Pos)

SPI_T::I2SSTS: TXEMPTY Mask

Definition at line 9594 of file M471M_R1_S.h.

◆ SPI_I2SSTS_TXEMPTY_Pos

#define SPI_I2SSTS_TXEMPTY_Pos   (16)

SPI_T::I2SSTS: TXEMPTY Position

Definition at line 9593 of file M471M_R1_S.h.

◆ SPI_I2SSTS_TXFULL_Msk

#define SPI_I2SSTS_TXFULL_Msk   (0x1ul << SPI_I2SSTS_TXFULL_Pos)

SPI_T::I2SSTS: TXFULL Mask

Definition at line 9597 of file M471M_R1_S.h.

◆ SPI_I2SSTS_TXFULL_Pos

#define SPI_I2SSTS_TXFULL_Pos   (17)

SPI_T::I2SSTS: TXFULL Position

Definition at line 9596 of file M471M_R1_S.h.

◆ SPI_I2SSTS_TXRXRST_Msk

#define SPI_I2SSTS_TXRXRST_Msk   (0x1ul << SPI_I2SSTS_TXRXRST_Pos)

SPI_T::I2SSTS: TXRXRST Mask

Definition at line 9612 of file M471M_R1_S.h.

◆ SPI_I2SSTS_TXRXRST_Pos

#define SPI_I2SSTS_TXRXRST_Pos   (23)

SPI_T::I2SSTS: TXRXRST Position

Definition at line 9611 of file M471M_R1_S.h.

◆ SPI_I2SSTS_TXTHIF_Msk

#define SPI_I2SSTS_TXTHIF_Msk   (0x1ul << SPI_I2SSTS_TXTHIF_Pos)

SPI_T::I2SSTS: TXTHIF Mask

Definition at line 9600 of file M471M_R1_S.h.

◆ SPI_I2SSTS_TXTHIF_Pos

#define SPI_I2SSTS_TXTHIF_Pos   (18)

SPI_T::I2SSTS: TXTHIF Position

Definition at line 9599 of file M471M_R1_S.h.

◆ SPI_I2SSTS_TXUFIF_Msk

#define SPI_I2SSTS_TXUFIF_Msk   (0x1ul << SPI_I2SSTS_TXUFIF_Pos)

SPI_T::I2SSTS: TXUFIF Mask

Definition at line 9603 of file M471M_R1_S.h.

◆ SPI_I2SSTS_TXUFIF_Pos

#define SPI_I2SSTS_TXUFIF_Pos   (19)

SPI_T::I2SSTS: TXUFIF Position

Definition at line 9602 of file M471M_R1_S.h.

◆ SPI_PDMACTL_PDMARST_Msk

#define SPI_PDMACTL_PDMARST_Msk   (0x1ul << SPI_PDMACTL_PDMARST_Pos)

SPI_T::PDMACTL: PDMARST Mask

Definition at line 9414 of file M471M_R1_S.h.

◆ SPI_PDMACTL_PDMARST_Pos

#define SPI_PDMACTL_PDMARST_Pos   (2)

SPI_T::PDMACTL: PDMARST Position

Definition at line 9413 of file M471M_R1_S.h.

◆ SPI_PDMACTL_RXPDMAEN_Msk

#define SPI_PDMACTL_RXPDMAEN_Msk   (0x1ul << SPI_PDMACTL_RXPDMAEN_Pos)

SPI_T::PDMACTL: RXPDMAEN Mask

Definition at line 9411 of file M471M_R1_S.h.

◆ SPI_PDMACTL_RXPDMAEN_Pos

#define SPI_PDMACTL_RXPDMAEN_Pos   (1)

SPI_T::PDMACTL: RXPDMAEN Position

Definition at line 9410 of file M471M_R1_S.h.

◆ SPI_PDMACTL_TXPDMAEN_Msk

#define SPI_PDMACTL_TXPDMAEN_Msk   (0x1ul << SPI_PDMACTL_TXPDMAEN_Pos)

SPI_T::PDMACTL: TXPDMAEN Mask

Definition at line 9408 of file M471M_R1_S.h.

◆ SPI_PDMACTL_TXPDMAEN_Pos

#define SPI_PDMACTL_TXPDMAEN_Pos   (0)

SPI_T::PDMACTL: TXPDMAEN Position

Definition at line 9407 of file M471M_R1_S.h.

◆ SPI_RX_RX_Msk

#define SPI_RX_RX_Msk   (0xfffffffful << SPI_RX_RX_Pos)

SPI_T::RX: RX Mask

Definition at line 9519 of file M471M_R1_S.h.

◆ SPI_RX_RX_Pos

#define SPI_RX_RX_Pos   (0)

SPI_T::RX: RX Position

Definition at line 9518 of file M471M_R1_S.h.

◆ SPI_SSCTL_AUTOSS_Msk

#define SPI_SSCTL_AUTOSS_Msk   (0x1ul << SPI_SSCTL_AUTOSS_Pos)

SPI_T::SSCTL: AUTOSS Mask

Definition at line 9381 of file M471M_R1_S.h.

◆ SPI_SSCTL_AUTOSS_Pos

#define SPI_SSCTL_AUTOSS_Pos   (3)

SPI_T::SSCTL: AUTOSS Position

Definition at line 9380 of file M471M_R1_S.h.

◆ SPI_SSCTL_SLV3WIRE_Msk

#define SPI_SSCTL_SLV3WIRE_Msk   (0x1ul << SPI_SSCTL_SLV3WIRE_Pos)

SPI_T::SSCTL: SLV3WIRE Mask

Definition at line 9384 of file M471M_R1_S.h.

◆ SPI_SSCTL_SLV3WIRE_Pos

#define SPI_SSCTL_SLV3WIRE_Pos   (4)

SPI_T::SSCTL: SLV3WIRE Position

Definition at line 9383 of file M471M_R1_S.h.

◆ SPI_SSCTL_SLVBEIEN_Msk

#define SPI_SSCTL_SLVBEIEN_Msk   (0x1ul << SPI_SSCTL_SLVBEIEN_Pos)

SPI_T::SSCTL: SLVBEIEN Mask

Definition at line 9393 of file M471M_R1_S.h.

◆ SPI_SSCTL_SLVBEIEN_Pos

#define SPI_SSCTL_SLVBEIEN_Pos   (8)

SPI_T::SSCTL: SLVBEIEN Position

Definition at line 9392 of file M471M_R1_S.h.

◆ SPI_SSCTL_SLVTOCNT_Msk

#define SPI_SSCTL_SLVTOCNT_Msk   (0xfffful << SPI_SSCTL_SLVTOCNT_Pos)

SPI_T::SSCTL: SLVTOCNT Mask

Definition at line 9405 of file M471M_R1_S.h.

◆ SPI_SSCTL_SLVTOCNT_Pos

#define SPI_SSCTL_SLVTOCNT_Pos   (16)

SPI_T::SSCTL: SLVTOCNT Position

Definition at line 9404 of file M471M_R1_S.h.

◆ SPI_SSCTL_SLVTOIEN_Msk

#define SPI_SSCTL_SLVTOIEN_Msk   (0x1ul << SPI_SSCTL_SLVTOIEN_Pos)

SPI_T::SSCTL: SLVTOIEN Mask

Definition at line 9387 of file M471M_R1_S.h.

◆ SPI_SSCTL_SLVTOIEN_Pos

#define SPI_SSCTL_SLVTOIEN_Pos   (5)

SPI_T::SSCTL: SLVTOIEN Position

Definition at line 9386 of file M471M_R1_S.h.

◆ SPI_SSCTL_SLVTORST_Msk

#define SPI_SSCTL_SLVTORST_Msk   (0x1ul << SPI_SSCTL_SLVTORST_Pos)

SPI_T::SSCTL: SLVTORST Mask

Definition at line 9390 of file M471M_R1_S.h.

◆ SPI_SSCTL_SLVTORST_Pos

#define SPI_SSCTL_SLVTORST_Pos   (6)

SPI_T::SSCTL: SLVTORST Position

Definition at line 9389 of file M471M_R1_S.h.

◆ SPI_SSCTL_SLVURIEN_Msk

#define SPI_SSCTL_SLVURIEN_Msk   (0x1ul << SPI_SSCTL_SLVURIEN_Pos)

SPI_T::SSCTL: SLVURIEN Mask

Definition at line 9396 of file M471M_R1_S.h.

◆ SPI_SSCTL_SLVURIEN_Pos

#define SPI_SSCTL_SLVURIEN_Pos   (9)

SPI_T::SSCTL: SLVURIEN Position

Definition at line 9395 of file M471M_R1_S.h.

◆ SPI_SSCTL_SS_Msk

#define SPI_SSCTL_SS_Msk   (0x1ul << SPI_SSCTL_SS_Pos)

SPI_T::SSCTL: SS Mask

Definition at line 9375 of file M471M_R1_S.h.

◆ SPI_SSCTL_SS_Pos

#define SPI_SSCTL_SS_Pos   (0)

SPI_T::SSCTL: SS Position

Definition at line 9374 of file M471M_R1_S.h.

◆ SPI_SSCTL_SSACTIEN_Msk

#define SPI_SSCTL_SSACTIEN_Msk   (0x1ul << SPI_SSCTL_SSACTIEN_Pos)

SPI_T::SSCTL: SSACTIEN Mask

Definition at line 9399 of file M471M_R1_S.h.

◆ SPI_SSCTL_SSACTIEN_Pos

#define SPI_SSCTL_SSACTIEN_Pos   (12)

SPI_T::SSCTL: SSACTIEN Position

Definition at line 9398 of file M471M_R1_S.h.

◆ SPI_SSCTL_SSACTPOL_Msk

#define SPI_SSCTL_SSACTPOL_Msk   (0x1ul << SPI_SSCTL_SSACTPOL_Pos)

SPI_T::SSCTL: SSACTPOL Mask

Definition at line 9378 of file M471M_R1_S.h.

◆ SPI_SSCTL_SSACTPOL_Pos

#define SPI_SSCTL_SSACTPOL_Pos   (2)

SPI_T::SSCTL: SSACTPOL Position

Definition at line 9377 of file M471M_R1_S.h.

◆ SPI_SSCTL_SSINAIEN_Msk

#define SPI_SSCTL_SSINAIEN_Msk   (0x1ul << SPI_SSCTL_SSINAIEN_Pos)

SPI_T::SSCTL: SSINAIEN Mask

Definition at line 9402 of file M471M_R1_S.h.

◆ SPI_SSCTL_SSINAIEN_Pos

#define SPI_SSCTL_SSINAIEN_Pos   (13)

SPI_T::SSCTL: SSINAIEN Position

Definition at line 9401 of file M471M_R1_S.h.

◆ SPI_STATUS_BUSY_Msk

#define SPI_STATUS_BUSY_Msk   (0x1ul << SPI_STATUS_BUSY_Pos)

SPI_T::STATUS: BUSY Mask

Definition at line 9453 of file M471M_R1_S.h.

◆ SPI_STATUS_BUSY_Pos

#define SPI_STATUS_BUSY_Pos   (0)

SPI_T::STATUS: BUSY Position

Definition at line 9452 of file M471M_R1_S.h.

◆ SPI_STATUS_RXCNT_Msk

#define SPI_STATUS_RXCNT_Msk   (0xful << SPI_STATUS_RXCNT_Pos)

SPI_T::STATUS: RXCNT Mask

Definition at line 9510 of file M471M_R1_S.h.

◆ SPI_STATUS_RXCNT_Pos

#define SPI_STATUS_RXCNT_Pos   (24)

SPI_T::STATUS: RXCNT Position

Definition at line 9509 of file M471M_R1_S.h.

◆ SPI_STATUS_RXEMPTY_Msk

#define SPI_STATUS_RXEMPTY_Msk   (0x1ul << SPI_STATUS_RXEMPTY_Pos)

SPI_T::STATUS: RXEMPTY Mask

Definition at line 9477 of file M471M_R1_S.h.

◆ SPI_STATUS_RXEMPTY_Pos

#define SPI_STATUS_RXEMPTY_Pos   (8)

SPI_T::STATUS: RXEMPTY Position

Definition at line 9476 of file M471M_R1_S.h.

◆ SPI_STATUS_RXFULL_Msk

#define SPI_STATUS_RXFULL_Msk   (0x1ul << SPI_STATUS_RXFULL_Pos)

SPI_T::STATUS: RXFULL Mask

Definition at line 9480 of file M471M_R1_S.h.

◆ SPI_STATUS_RXFULL_Pos

#define SPI_STATUS_RXFULL_Pos   (9)

SPI_T::STATUS: RXFULL Position

Definition at line 9479 of file M471M_R1_S.h.

◆ SPI_STATUS_RXOVIF_Msk

#define SPI_STATUS_RXOVIF_Msk   (0x1ul << SPI_STATUS_RXOVIF_Pos)

SPI_T::STATUS: RXOVIF Mask

Definition at line 9486 of file M471M_R1_S.h.

◆ SPI_STATUS_RXOVIF_Pos

#define SPI_STATUS_RXOVIF_Pos   (11)

SPI_T::STATUS: RXOVIF Position

Definition at line 9485 of file M471M_R1_S.h.

◆ SPI_STATUS_RXTHIF_Msk

#define SPI_STATUS_RXTHIF_Msk   (0x1ul << SPI_STATUS_RXTHIF_Pos)

SPI_T::STATUS: RXTHIF Mask

Definition at line 9483 of file M471M_R1_S.h.

◆ SPI_STATUS_RXTHIF_Pos

#define SPI_STATUS_RXTHIF_Pos   (10)

SPI_T::STATUS: RXTHIF Position

Definition at line 9482 of file M471M_R1_S.h.

◆ SPI_STATUS_RXTOIF_Msk

#define SPI_STATUS_RXTOIF_Msk   (0x1ul << SPI_STATUS_RXTOIF_Pos)

SPI_T::STATUS: RXTOIF Mask

Definition at line 9489 of file M471M_R1_S.h.

◆ SPI_STATUS_RXTOIF_Pos

#define SPI_STATUS_RXTOIF_Pos   (12)

SPI_T::STATUS: RXTOIF Position

Definition at line 9488 of file M471M_R1_S.h.

◆ SPI_STATUS_SLVBEIF_Msk

#define SPI_STATUS_SLVBEIF_Msk   (0x1ul << SPI_STATUS_SLVBEIF_Pos)

SPI_T::STATUS: SLVBEIF Mask

Definition at line 9471 of file M471M_R1_S.h.

◆ SPI_STATUS_SLVBEIF_Pos

#define SPI_STATUS_SLVBEIF_Pos   (6)

SPI_T::STATUS: SLVBEIF Position

Definition at line 9470 of file M471M_R1_S.h.

◆ SPI_STATUS_SLVTOIF_Msk

#define SPI_STATUS_SLVTOIF_Msk   (0x1ul << SPI_STATUS_SLVTOIF_Pos)

SPI_T::STATUS: SLVTOIF Mask

Definition at line 9468 of file M471M_R1_S.h.

◆ SPI_STATUS_SLVTOIF_Pos

#define SPI_STATUS_SLVTOIF_Pos   (5)

SPI_T::STATUS: SLVTOIF Position

Definition at line 9467 of file M471M_R1_S.h.

◆ SPI_STATUS_SLVURIF_Msk

#define SPI_STATUS_SLVURIF_Msk   (0x1ul << SPI_STATUS_SLVURIF_Pos)

SPI_T::STATUS: SLVURIF Mask

Definition at line 9474 of file M471M_R1_S.h.

◆ SPI_STATUS_SLVURIF_Pos

#define SPI_STATUS_SLVURIF_Pos   (7)

SPI_T::STATUS: SLVURIF Position

Definition at line 9473 of file M471M_R1_S.h.

◆ SPI_STATUS_SPIENSTS_Msk

#define SPI_STATUS_SPIENSTS_Msk   (0x1ul << SPI_STATUS_SPIENSTS_Pos)

SPI_T::STATUS: SPIENSTS Mask

Definition at line 9492 of file M471M_R1_S.h.

◆ SPI_STATUS_SPIENSTS_Pos

#define SPI_STATUS_SPIENSTS_Pos   (15)

SPI_T::STATUS: SPIENSTS Position

Definition at line 9491 of file M471M_R1_S.h.

◆ SPI_STATUS_SSACTIF_Msk

#define SPI_STATUS_SSACTIF_Msk   (0x1ul << SPI_STATUS_SSACTIF_Pos)

SPI_T::STATUS: SSACTIF Mask

Definition at line 9459 of file M471M_R1_S.h.

◆ SPI_STATUS_SSACTIF_Pos

#define SPI_STATUS_SSACTIF_Pos   (2)

SPI_T::STATUS: SSACTIF Position

Definition at line 9458 of file M471M_R1_S.h.

◆ SPI_STATUS_SSINAIF_Msk

#define SPI_STATUS_SSINAIF_Msk   (0x1ul << SPI_STATUS_SSINAIF_Pos)

SPI_T::STATUS: SSINAIF Mask

Definition at line 9462 of file M471M_R1_S.h.

◆ SPI_STATUS_SSINAIF_Pos

#define SPI_STATUS_SSINAIF_Pos   (3)

SPI_T::STATUS: SSINAIF Position

Definition at line 9461 of file M471M_R1_S.h.

◆ SPI_STATUS_SSLINE_Msk

#define SPI_STATUS_SSLINE_Msk   (0x1ul << SPI_STATUS_SSLINE_Pos)

SPI_T::STATUS: SSLINE Mask

Definition at line 9465 of file M471M_R1_S.h.

◆ SPI_STATUS_SSLINE_Pos

#define SPI_STATUS_SSLINE_Pos   (4)

SPI_T::STATUS: SSLINE Position

Definition at line 9464 of file M471M_R1_S.h.

◆ SPI_STATUS_TXCNT_Msk

#define SPI_STATUS_TXCNT_Msk   (0xful << SPI_STATUS_TXCNT_Pos)

SPI_T::STATUS: TXCNT Mask

Definition at line 9513 of file M471M_R1_S.h.

◆ SPI_STATUS_TXCNT_Pos

#define SPI_STATUS_TXCNT_Pos   (28)

SPI_T::STATUS: TXCNT Position

Definition at line 9512 of file M471M_R1_S.h.

◆ SPI_STATUS_TXEMPTY_Msk

#define SPI_STATUS_TXEMPTY_Msk   (0x1ul << SPI_STATUS_TXEMPTY_Pos)

SPI_T::STATUS: TXEMPTY Mask

Definition at line 9495 of file M471M_R1_S.h.

◆ SPI_STATUS_TXEMPTY_Pos

#define SPI_STATUS_TXEMPTY_Pos   (16)

SPI_T::STATUS: TXEMPTY Position

Definition at line 9494 of file M471M_R1_S.h.

◆ SPI_STATUS_TXFULL_Msk

#define SPI_STATUS_TXFULL_Msk   (0x1ul << SPI_STATUS_TXFULL_Pos)

SPI_T::STATUS: TXFULL Mask

Definition at line 9498 of file M471M_R1_S.h.

◆ SPI_STATUS_TXFULL_Pos

#define SPI_STATUS_TXFULL_Pos   (17)

SPI_T::STATUS: TXFULL Position

Definition at line 9497 of file M471M_R1_S.h.

◆ SPI_STATUS_TXRXRST_Msk

#define SPI_STATUS_TXRXRST_Msk   (0x1ul << SPI_STATUS_TXRXRST_Pos)

SPI_T::STATUS: TXRXRST Mask

Definition at line 9507 of file M471M_R1_S.h.

◆ SPI_STATUS_TXRXRST_Pos

#define SPI_STATUS_TXRXRST_Pos   (23)

SPI_T::STATUS: TXRXRST Position

Definition at line 9506 of file M471M_R1_S.h.

◆ SPI_STATUS_TXTHIF_Msk

#define SPI_STATUS_TXTHIF_Msk   (0x1ul << SPI_STATUS_TXTHIF_Pos)

SPI_T::STATUS: TXTHIF Mask

Definition at line 9501 of file M471M_R1_S.h.

◆ SPI_STATUS_TXTHIF_Pos

#define SPI_STATUS_TXTHIF_Pos   (18)

SPI_T::STATUS: TXTHIF Position

Definition at line 9500 of file M471M_R1_S.h.

◆ SPI_STATUS_TXUFIF_Msk

#define SPI_STATUS_TXUFIF_Msk   (0x1ul << SPI_STATUS_TXUFIF_Pos)

SPI_T::STATUS: TXUFIF Mask

Definition at line 9504 of file M471M_R1_S.h.

◆ SPI_STATUS_TXUFIF_Pos

#define SPI_STATUS_TXUFIF_Pos   (19)

SPI_T::STATUS: TXUFIF Position

Definition at line 9503 of file M471M_R1_S.h.

◆ SPI_STATUS_UNITIF_Msk

#define SPI_STATUS_UNITIF_Msk   (0x1ul << SPI_STATUS_UNITIF_Pos)

SPI_T::STATUS: UNITIF Mask

Definition at line 9456 of file M471M_R1_S.h.

◆ SPI_STATUS_UNITIF_Pos

#define SPI_STATUS_UNITIF_Pos   (1)

SPI_T::STATUS: UNITIF Position

Definition at line 9455 of file M471M_R1_S.h.

◆ SPI_TX_TX_Msk

#define SPI_TX_TX_Msk   (0xfffffffful << SPI_TX_TX_Pos)

SPI_T::TX: TX Mask

Definition at line 9516 of file M471M_R1_S.h.

◆ SPI_TX_TX_Pos

#define SPI_TX_TX_Pos   (0)

SPI_T::TX: TX Position

Definition at line 9515 of file M471M_R1_S.h.

◆ SYS_BODCTL_BODDGSEL_Msk

#define SYS_BODCTL_BODDGSEL_Msk   (0x7ul << SYS_BODCTL_BODDGSEL_Pos)

SYS_T::BODCTL: BODDGSEL Mask

Definition at line 10477 of file M471M_R1_S.h.

◆ SYS_BODCTL_BODDGSEL_Pos

#define SYS_BODCTL_BODDGSEL_Pos   (8)

SYS_T::BODCTL: BODDGSEL Position

Definition at line 10476 of file M471M_R1_S.h.

◆ SYS_BODCTL_BODEN_Msk

#define SYS_BODCTL_BODEN_Msk   (0x1ul << SYS_BODCTL_BODEN_Pos)

SYS_T::BODCTL: BODEN Mask

Definition at line 10456 of file M471M_R1_S.h.

◆ SYS_BODCTL_BODEN_Pos

#define SYS_BODCTL_BODEN_Pos   (0)

SYS_T::BODCTL: BODEN Position

Definition at line 10455 of file M471M_R1_S.h.

◆ SYS_BODCTL_BODIF_Msk

#define SYS_BODCTL_BODIF_Msk   (0x1ul << SYS_BODCTL_BODIF_Pos)

SYS_T::BODCTL: BODIF Mask

Definition at line 10465 of file M471M_R1_S.h.

◆ SYS_BODCTL_BODIF_Pos

#define SYS_BODCTL_BODIF_Pos   (4)

SYS_T::BODCTL: BODIF Position

Definition at line 10464 of file M471M_R1_S.h.

◆ SYS_BODCTL_BODLPM_Msk

#define SYS_BODCTL_BODLPM_Msk   (0x1ul << SYS_BODCTL_BODLPM_Pos)

SYS_T::BODCTL: BODLPM Mask

Definition at line 10468 of file M471M_R1_S.h.

◆ SYS_BODCTL_BODLPM_Pos

#define SYS_BODCTL_BODLPM_Pos   (5)

SYS_T::BODCTL: BODLPM Position

Definition at line 10467 of file M471M_R1_S.h.

◆ SYS_BODCTL_BODOUT_Msk

#define SYS_BODCTL_BODOUT_Msk   (0x1ul << SYS_BODCTL_BODOUT_Pos)

SYS_T::BODCTL: BODOUT Mask

Definition at line 10471 of file M471M_R1_S.h.

◆ SYS_BODCTL_BODOUT_Pos

#define SYS_BODCTL_BODOUT_Pos   (6)

SYS_T::BODCTL: BODOUT Position

Definition at line 10470 of file M471M_R1_S.h.

◆ SYS_BODCTL_BODRSTEN_Msk

#define SYS_BODCTL_BODRSTEN_Msk   (0x1ul << SYS_BODCTL_BODRSTEN_Pos)

SYS_T::BODCTL: BODRSTEN Mask

Definition at line 10462 of file M471M_R1_S.h.

◆ SYS_BODCTL_BODRSTEN_Pos

#define SYS_BODCTL_BODRSTEN_Pos   (3)

SYS_T::BODCTL: BODRSTEN Position

Definition at line 10461 of file M471M_R1_S.h.

◆ SYS_BODCTL_BODVL_Msk

#define SYS_BODCTL_BODVL_Msk   (0x3ul << SYS_BODCTL_BODVL_Pos)

SYS_T::BODCTL: BODVL Mask

Definition at line 10459 of file M471M_R1_S.h.

◆ SYS_BODCTL_BODVL_Pos

#define SYS_BODCTL_BODVL_Pos   (1)

SYS_T::BODCTL: BODVL Position

Definition at line 10458 of file M471M_R1_S.h.

◆ SYS_BODCTL_LVRDGSEL_Msk

#define SYS_BODCTL_LVRDGSEL_Msk   (0x7ul << SYS_BODCTL_LVRDGSEL_Pos)

SYS_T::BODCTL: LVRDGSEL Mask

Definition at line 10480 of file M471M_R1_S.h.

◆ SYS_BODCTL_LVRDGSEL_Pos

#define SYS_BODCTL_LVRDGSEL_Pos   (12)

SYS_T::BODCTL: LVRDGSEL Position

Definition at line 10479 of file M471M_R1_S.h.

◆ SYS_BODCTL_LVREN_Msk

#define SYS_BODCTL_LVREN_Msk   (0x1ul << SYS_BODCTL_LVREN_Pos)

SYS_T::BODCTL: LVREN Mask

Definition at line 10474 of file M471M_R1_S.h.

◆ SYS_BODCTL_LVREN_Pos

#define SYS_BODCTL_LVREN_Pos   (7)

SYS_T::BODCTL: LVREN Position

Definition at line 10473 of file M471M_R1_S.h.

◆ SYS_GPA_MFPH_PA10MFP_Msk

#define SYS_GPA_MFPH_PA10MFP_Msk   (0xful << SYS_GPA_MFPH_PA10MFP_Pos)

SYS_T::GPA_MFPH: PA10MFP Mask

Definition at line 10531 of file M471M_R1_S.h.

◆ SYS_GPA_MFPH_PA10MFP_Pos

#define SYS_GPA_MFPH_PA10MFP_Pos   (8)

SYS_T::GPA_MFPH: PA10MFP Position

Definition at line 10530 of file M471M_R1_S.h.

◆ SYS_GPA_MFPH_PA11MFP_Msk

#define SYS_GPA_MFPH_PA11MFP_Msk   (0xful << SYS_GPA_MFPH_PA11MFP_Pos)

SYS_T::GPA_MFPH: PA11MFP Mask

Definition at line 10534 of file M471M_R1_S.h.

◆ SYS_GPA_MFPH_PA11MFP_Pos

#define SYS_GPA_MFPH_PA11MFP_Pos   (12)

SYS_T::GPA_MFPH: PA11MFP Position

Definition at line 10533 of file M471M_R1_S.h.

◆ SYS_GPA_MFPH_PA12MFP_Msk

#define SYS_GPA_MFPH_PA12MFP_Msk   (0xful << SYS_GPA_MFPH_PA12MFP_Pos)

SYS_T::GPA_MFPH: PA12MFP Mask

Definition at line 10537 of file M471M_R1_S.h.

◆ SYS_GPA_MFPH_PA12MFP_Pos

#define SYS_GPA_MFPH_PA12MFP_Pos   (16)

SYS_T::GPA_MFPH: PA12MFP Position

Definition at line 10536 of file M471M_R1_S.h.

◆ SYS_GPA_MFPH_PA13MFP_Msk

#define SYS_GPA_MFPH_PA13MFP_Msk   (0xful << SYS_GPA_MFPH_PA13MFP_Pos)

SYS_T::GPA_MFPH: PA13MFP Mask

Definition at line 10540 of file M471M_R1_S.h.

◆ SYS_GPA_MFPH_PA13MFP_Pos

#define SYS_GPA_MFPH_PA13MFP_Pos   (20)

SYS_T::GPA_MFPH: PA13MFP Position

Definition at line 10539 of file M471M_R1_S.h.

◆ SYS_GPA_MFPH_PA14MFP_Msk

#define SYS_GPA_MFPH_PA14MFP_Msk   (0xful << SYS_GPA_MFPH_PA14MFP_Pos)

SYS_T::GPA_MFPH: PA14MFP Mask

Definition at line 10543 of file M471M_R1_S.h.

◆ SYS_GPA_MFPH_PA14MFP_Pos

#define SYS_GPA_MFPH_PA14MFP_Pos   (24)

SYS_T::GPA_MFPH: PA14MFP Position

Definition at line 10542 of file M471M_R1_S.h.

◆ SYS_GPA_MFPH_PA15MFP_Msk

#define SYS_GPA_MFPH_PA15MFP_Msk   (0xful << SYS_GPA_MFPH_PA15MFP_Pos)

SYS_T::GPA_MFPH: PA15MFP Mask

Definition at line 10546 of file M471M_R1_S.h.

◆ SYS_GPA_MFPH_PA15MFP_Pos

#define SYS_GPA_MFPH_PA15MFP_Pos   (28)

SYS_T::GPA_MFPH: PA15MFP Position

Definition at line 10545 of file M471M_R1_S.h.

◆ SYS_GPA_MFPH_PA8MFP_Msk

#define SYS_GPA_MFPH_PA8MFP_Msk   (0xful << SYS_GPA_MFPH_PA8MFP_Pos)

SYS_T::GPA_MFPH: PA8MFP Mask

Definition at line 10525 of file M471M_R1_S.h.

◆ SYS_GPA_MFPH_PA8MFP_Pos

#define SYS_GPA_MFPH_PA8MFP_Pos   (0)

SYS_T::GPA_MFPH: PA8MFP Position

Definition at line 10524 of file M471M_R1_S.h.

◆ SYS_GPA_MFPH_PA9MFP_Msk

#define SYS_GPA_MFPH_PA9MFP_Msk   (0xful << SYS_GPA_MFPH_PA9MFP_Pos)

SYS_T::GPA_MFPH: PA9MFP Mask

Definition at line 10528 of file M471M_R1_S.h.

◆ SYS_GPA_MFPH_PA9MFP_Pos

#define SYS_GPA_MFPH_PA9MFP_Pos   (4)

SYS_T::GPA_MFPH: PA9MFP Position

Definition at line 10527 of file M471M_R1_S.h.

◆ SYS_GPA_MFPL_PA0MFP_Msk

#define SYS_GPA_MFPL_PA0MFP_Msk   (0xful << SYS_GPA_MFPL_PA0MFP_Pos)

SYS_T::GPA_MFPL: PA0MFP Mask

Definition at line 10501 of file M471M_R1_S.h.

◆ SYS_GPA_MFPL_PA0MFP_Pos

#define SYS_GPA_MFPL_PA0MFP_Pos   (0)

SYS_T::GPA_MFPL: PA0MFP Position

Definition at line 10500 of file M471M_R1_S.h.

◆ SYS_GPA_MFPL_PA1MFP_Msk

#define SYS_GPA_MFPL_PA1MFP_Msk   (0xful << SYS_GPA_MFPL_PA1MFP_Pos)

SYS_T::GPA_MFPL: PA1MFP Mask

Definition at line 10504 of file M471M_R1_S.h.

◆ SYS_GPA_MFPL_PA1MFP_Pos

#define SYS_GPA_MFPL_PA1MFP_Pos   (4)

SYS_T::GPA_MFPL: PA1MFP Position

Definition at line 10503 of file M471M_R1_S.h.

◆ SYS_GPA_MFPL_PA2MFP_Msk

#define SYS_GPA_MFPL_PA2MFP_Msk   (0xful << SYS_GPA_MFPL_PA2MFP_Pos)

SYS_T::GPA_MFPL: PA2MFP Mask

Definition at line 10507 of file M471M_R1_S.h.

◆ SYS_GPA_MFPL_PA2MFP_Pos

#define SYS_GPA_MFPL_PA2MFP_Pos   (8)

SYS_T::GPA_MFPL: PA2MFP Position

Definition at line 10506 of file M471M_R1_S.h.

◆ SYS_GPA_MFPL_PA3MFP_Msk

#define SYS_GPA_MFPL_PA3MFP_Msk   (0xful << SYS_GPA_MFPL_PA3MFP_Pos)

SYS_T::GPA_MFPL: PA3MFP Mask

Definition at line 10510 of file M471M_R1_S.h.

◆ SYS_GPA_MFPL_PA3MFP_Pos

#define SYS_GPA_MFPL_PA3MFP_Pos   (12)

SYS_T::GPA_MFPL: PA3MFP Position

Definition at line 10509 of file M471M_R1_S.h.

◆ SYS_GPA_MFPL_PA4MFP_Msk

#define SYS_GPA_MFPL_PA4MFP_Msk   (0xful << SYS_GPA_MFPL_PA4MFP_Pos)

SYS_T::GPA_MFPL: PA4MFP Mask

Definition at line 10513 of file M471M_R1_S.h.

◆ SYS_GPA_MFPL_PA4MFP_Pos

#define SYS_GPA_MFPL_PA4MFP_Pos   (16)

SYS_T::GPA_MFPL: PA4MFP Position

Definition at line 10512 of file M471M_R1_S.h.

◆ SYS_GPA_MFPL_PA5MFP_Msk

#define SYS_GPA_MFPL_PA5MFP_Msk   (0xful << SYS_GPA_MFPL_PA5MFP_Pos)

SYS_T::GPA_MFPL: PA5MFP Mask

Definition at line 10516 of file M471M_R1_S.h.

◆ SYS_GPA_MFPL_PA5MFP_Pos

#define SYS_GPA_MFPL_PA5MFP_Pos   (20)

SYS_T::GPA_MFPL: PA5MFP Position

Definition at line 10515 of file M471M_R1_S.h.

◆ SYS_GPA_MFPL_PA6MFP_Msk

#define SYS_GPA_MFPL_PA6MFP_Msk   (0xful << SYS_GPA_MFPL_PA6MFP_Pos)

SYS_T::GPA_MFPL: PA6MFP Mask

Definition at line 10519 of file M471M_R1_S.h.

◆ SYS_GPA_MFPL_PA6MFP_Pos

#define SYS_GPA_MFPL_PA6MFP_Pos   (24)

SYS_T::GPA_MFPL: PA6MFP Position

Definition at line 10518 of file M471M_R1_S.h.

◆ SYS_GPA_MFPL_PA7MFP_Msk

#define SYS_GPA_MFPL_PA7MFP_Msk   (0xful << SYS_GPA_MFPL_PA7MFP_Pos)

SYS_T::GPA_MFPL: PA7MFP Mask

Definition at line 10522 of file M471M_R1_S.h.

◆ SYS_GPA_MFPL_PA7MFP_Pos

#define SYS_GPA_MFPL_PA7MFP_Pos   (28)

SYS_T::GPA_MFPL: PA7MFP Position

Definition at line 10521 of file M471M_R1_S.h.

◆ SYS_GPB_MFPH_PB10MFP_Msk

#define SYS_GPB_MFPH_PB10MFP_Msk   (0xful << SYS_GPB_MFPH_PB10MFP_Pos)

SYS_T::GPB_MFPH: PB10MFP Mask

Definition at line 10579 of file M471M_R1_S.h.

◆ SYS_GPB_MFPH_PB10MFP_Pos

#define SYS_GPB_MFPH_PB10MFP_Pos   (8)

SYS_T::GPB_MFPH: PB10MFP Position

Definition at line 10578 of file M471M_R1_S.h.

◆ SYS_GPB_MFPH_PB11MFP_Msk

#define SYS_GPB_MFPH_PB11MFP_Msk   (0xful << SYS_GPB_MFPH_PB11MFP_Pos)

SYS_T::GPB_MFPH: PB11MFP Mask

Definition at line 10582 of file M471M_R1_S.h.

◆ SYS_GPB_MFPH_PB11MFP_Pos

#define SYS_GPB_MFPH_PB11MFP_Pos   (12)

SYS_T::GPB_MFPH: PB11MFP Position

Definition at line 10581 of file M471M_R1_S.h.

◆ SYS_GPB_MFPH_PB12MFP_Msk

#define SYS_GPB_MFPH_PB12MFP_Msk   (0xful << SYS_GPB_MFPH_PB12MFP_Pos)

SYS_T::GPB_MFPH: PB12MFP Mask

Definition at line 10585 of file M471M_R1_S.h.

◆ SYS_GPB_MFPH_PB12MFP_Pos

#define SYS_GPB_MFPH_PB12MFP_Pos   (16)

SYS_T::GPB_MFPH: PB12MFP Position

Definition at line 10584 of file M471M_R1_S.h.

◆ SYS_GPB_MFPH_PB13MFP_Msk

#define SYS_GPB_MFPH_PB13MFP_Msk   (0xful << SYS_GPB_MFPH_PB13MFP_Pos)

SYS_T::GPB_MFPH: PB13MFP Mask

Definition at line 10588 of file M471M_R1_S.h.

◆ SYS_GPB_MFPH_PB13MFP_Pos

#define SYS_GPB_MFPH_PB13MFP_Pos   (20)

SYS_T::GPB_MFPH: PB13MFP Position

Definition at line 10587 of file M471M_R1_S.h.

◆ SYS_GPB_MFPH_PB14MFP_Msk

#define SYS_GPB_MFPH_PB14MFP_Msk   (0xful << SYS_GPB_MFPH_PB14MFP_Pos)

SYS_T::GPB_MFPH: PB14MFP Mask

Definition at line 10591 of file M471M_R1_S.h.

◆ SYS_GPB_MFPH_PB14MFP_Pos

#define SYS_GPB_MFPH_PB14MFP_Pos   (24)

SYS_T::GPB_MFPH: PB14MFP Position

Definition at line 10590 of file M471M_R1_S.h.

◆ SYS_GPB_MFPH_PB15MFP_Msk

#define SYS_GPB_MFPH_PB15MFP_Msk   (0xful << SYS_GPB_MFPH_PB15MFP_Pos)

SYS_T::GPB_MFPH: PB15MFP Mask

Definition at line 10594 of file M471M_R1_S.h.

◆ SYS_GPB_MFPH_PB15MFP_Pos

#define SYS_GPB_MFPH_PB15MFP_Pos   (28)

SYS_T::GPB_MFPH: PB15MFP Position

Definition at line 10593 of file M471M_R1_S.h.

◆ SYS_GPB_MFPH_PB8MFP_Msk

#define SYS_GPB_MFPH_PB8MFP_Msk   (0xful << SYS_GPB_MFPH_PB8MFP_Pos)

SYS_T::GPB_MFPH: PB8MFP Mask

Definition at line 10573 of file M471M_R1_S.h.

◆ SYS_GPB_MFPH_PB8MFP_Pos

#define SYS_GPB_MFPH_PB8MFP_Pos   (0)

SYS_T::GPB_MFPH: PB8MFP Position

Definition at line 10572 of file M471M_R1_S.h.

◆ SYS_GPB_MFPH_PB9MFP_Msk

#define SYS_GPB_MFPH_PB9MFP_Msk   (0xful << SYS_GPB_MFPH_PB9MFP_Pos)

SYS_T::GPB_MFPH: PB9MFP Mask

Definition at line 10576 of file M471M_R1_S.h.

◆ SYS_GPB_MFPH_PB9MFP_Pos

#define SYS_GPB_MFPH_PB9MFP_Pos   (4)

SYS_T::GPB_MFPH: PB9MFP Position

Definition at line 10575 of file M471M_R1_S.h.

◆ SYS_GPB_MFPL_PB0MFP_Msk

#define SYS_GPB_MFPL_PB0MFP_Msk   (0xful << SYS_GPB_MFPL_PB0MFP_Pos)

SYS_T::GPB_MFPL: PB0MFP Mask

Definition at line 10549 of file M471M_R1_S.h.

◆ SYS_GPB_MFPL_PB0MFP_Pos

#define SYS_GPB_MFPL_PB0MFP_Pos   (0)

SYS_T::GPB_MFPL: PB0MFP Position

Definition at line 10548 of file M471M_R1_S.h.

◆ SYS_GPB_MFPL_PB1MFP_Msk

#define SYS_GPB_MFPL_PB1MFP_Msk   (0xful << SYS_GPB_MFPL_PB1MFP_Pos)

SYS_T::GPB_MFPL: PB1MFP Mask

Definition at line 10552 of file M471M_R1_S.h.

◆ SYS_GPB_MFPL_PB1MFP_Pos

#define SYS_GPB_MFPL_PB1MFP_Pos   (4)

SYS_T::GPB_MFPL: PB1MFP Position

Definition at line 10551 of file M471M_R1_S.h.

◆ SYS_GPB_MFPL_PB2MFP_Msk

#define SYS_GPB_MFPL_PB2MFP_Msk   (0xful << SYS_GPB_MFPL_PB2MFP_Pos)

SYS_T::GPB_MFPL: PB2MFP Mask

Definition at line 10555 of file M471M_R1_S.h.

◆ SYS_GPB_MFPL_PB2MFP_Pos

#define SYS_GPB_MFPL_PB2MFP_Pos   (8)

SYS_T::GPB_MFPL: PB2MFP Position

Definition at line 10554 of file M471M_R1_S.h.

◆ SYS_GPB_MFPL_PB3MFP_Msk

#define SYS_GPB_MFPL_PB3MFP_Msk   (0xful << SYS_GPB_MFPL_PB3MFP_Pos)

SYS_T::GPB_MFPL: PB3MFP Mask

Definition at line 10558 of file M471M_R1_S.h.

◆ SYS_GPB_MFPL_PB3MFP_Pos

#define SYS_GPB_MFPL_PB3MFP_Pos   (12)

SYS_T::GPB_MFPL: PB3MFP Position

Definition at line 10557 of file M471M_R1_S.h.

◆ SYS_GPB_MFPL_PB4MFP_Msk

#define SYS_GPB_MFPL_PB4MFP_Msk   (0xful << SYS_GPB_MFPL_PB4MFP_Pos)

SYS_T::GPB_MFPL: PB4MFP Mask

Definition at line 10561 of file M471M_R1_S.h.

◆ SYS_GPB_MFPL_PB4MFP_Pos

#define SYS_GPB_MFPL_PB4MFP_Pos   (16)

SYS_T::GPB_MFPL: PB4MFP Position

Definition at line 10560 of file M471M_R1_S.h.

◆ SYS_GPB_MFPL_PB5MFP_Msk

#define SYS_GPB_MFPL_PB5MFP_Msk   (0xful << SYS_GPB_MFPL_PB5MFP_Pos)

SYS_T::GPB_MFPL: PB5MFP Mask

Definition at line 10564 of file M471M_R1_S.h.

◆ SYS_GPB_MFPL_PB5MFP_Pos

#define SYS_GPB_MFPL_PB5MFP_Pos   (20)

SYS_T::GPB_MFPL: PB5MFP Position

Definition at line 10563 of file M471M_R1_S.h.

◆ SYS_GPB_MFPL_PB6MFP_Msk

#define SYS_GPB_MFPL_PB6MFP_Msk   (0xful << SYS_GPB_MFPL_PB6MFP_Pos)

SYS_T::GPB_MFPL: PB6MFP Mask

Definition at line 10567 of file M471M_R1_S.h.

◆ SYS_GPB_MFPL_PB6MFP_Pos

#define SYS_GPB_MFPL_PB6MFP_Pos   (24)

SYS_T::GPB_MFPL: PB6MFP Position

Definition at line 10566 of file M471M_R1_S.h.

◆ SYS_GPB_MFPL_PB7MFP_Msk

#define SYS_GPB_MFPL_PB7MFP_Msk   (0xful << SYS_GPB_MFPL_PB7MFP_Pos)

SYS_T::GPB_MFPL: PB7MFP Mask

Definition at line 10570 of file M471M_R1_S.h.

◆ SYS_GPB_MFPL_PB7MFP_Pos

#define SYS_GPB_MFPL_PB7MFP_Pos   (28)

SYS_T::GPB_MFPL: PB7MFP Position

Definition at line 10569 of file M471M_R1_S.h.

◆ SYS_GPC_MFPH_PC10MFP_Msk

#define SYS_GPC_MFPH_PC10MFP_Msk   (0xful << SYS_GPC_MFPH_PC10MFP_Pos)

SYS_T::GPC_MFPH: PC10MFP Mask

Definition at line 10627 of file M471M_R1_S.h.

◆ SYS_GPC_MFPH_PC10MFP_Pos

#define SYS_GPC_MFPH_PC10MFP_Pos   (8)

SYS_T::GPC_MFPH: PC10MFP Position

Definition at line 10626 of file M471M_R1_S.h.

◆ SYS_GPC_MFPH_PC11MFP_Msk

#define SYS_GPC_MFPH_PC11MFP_Msk   (0xful << SYS_GPC_MFPH_PC11MFP_Pos)

SYS_T::GPC_MFPH: PC11MFP Mask

Definition at line 10630 of file M471M_R1_S.h.

◆ SYS_GPC_MFPH_PC11MFP_Pos

#define SYS_GPC_MFPH_PC11MFP_Pos   (12)

SYS_T::GPC_MFPH: PC11MFP Position

Definition at line 10629 of file M471M_R1_S.h.

◆ SYS_GPC_MFPH_PC12MFP_Msk

#define SYS_GPC_MFPH_PC12MFP_Msk   (0xful << SYS_GPC_MFPH_PC12MFP_Pos)

SYS_T::GPC_MFPH: PC12MFP Mask

Definition at line 10633 of file M471M_R1_S.h.

◆ SYS_GPC_MFPH_PC12MFP_Pos

#define SYS_GPC_MFPH_PC12MFP_Pos   (16)

SYS_T::GPC_MFPH: PC12MFP Position

Definition at line 10632 of file M471M_R1_S.h.

◆ SYS_GPC_MFPH_PC13MFP_Msk

#define SYS_GPC_MFPH_PC13MFP_Msk   (0xful << SYS_GPC_MFPH_PC13MFP_Pos)

SYS_T::GPC_MFPH: PC13MFP Mask

Definition at line 10636 of file M471M_R1_S.h.

◆ SYS_GPC_MFPH_PC13MFP_Pos

#define SYS_GPC_MFPH_PC13MFP_Pos   (20)

SYS_T::GPC_MFPH: PC13MFP Position

Definition at line 10635 of file M471M_R1_S.h.

◆ SYS_GPC_MFPH_PC14MFP_Msk

#define SYS_GPC_MFPH_PC14MFP_Msk   (0xful << SYS_GPC_MFPH_PC14MFP_Pos)

SYS_T::GPC_MFPH: PC14MFP Mask

Definition at line 10639 of file M471M_R1_S.h.

◆ SYS_GPC_MFPH_PC14MFP_Pos

#define SYS_GPC_MFPH_PC14MFP_Pos   (24)

SYS_T::GPC_MFPH: PC14MFP Position

Definition at line 10638 of file M471M_R1_S.h.

◆ SYS_GPC_MFPH_PC15MFP_Msk

#define SYS_GPC_MFPH_PC15MFP_Msk   (0xful << SYS_GPC_MFPH_PC15MFP_Pos)

SYS_T::GPC_MFPH: PC15MFP Mask

Definition at line 10642 of file M471M_R1_S.h.

◆ SYS_GPC_MFPH_PC15MFP_Pos

#define SYS_GPC_MFPH_PC15MFP_Pos   (28)

SYS_T::GPC_MFPH: PC15MFP Position

Definition at line 10641 of file M471M_R1_S.h.

◆ SYS_GPC_MFPH_PC8MFP_Msk

#define SYS_GPC_MFPH_PC8MFP_Msk   (0xful << SYS_GPC_MFPH_PC8MFP_Pos)

SYS_T::GPC_MFPH: PC8MFP Mask

Definition at line 10621 of file M471M_R1_S.h.

◆ SYS_GPC_MFPH_PC8MFP_Pos

#define SYS_GPC_MFPH_PC8MFP_Pos   (0)

SYS_T::GPC_MFPH: PC8MFP Position

Definition at line 10620 of file M471M_R1_S.h.

◆ SYS_GPC_MFPH_PC9MFP_Msk

#define SYS_GPC_MFPH_PC9MFP_Msk   (0xful << SYS_GPC_MFPH_PC9MFP_Pos)

SYS_T::GPC_MFPH: PC9MFP Mask

Definition at line 10624 of file M471M_R1_S.h.

◆ SYS_GPC_MFPH_PC9MFP_Pos

#define SYS_GPC_MFPH_PC9MFP_Pos   (4)

SYS_T::GPC_MFPH: PC9MFP Position

Definition at line 10623 of file M471M_R1_S.h.

◆ SYS_GPC_MFPL_PC0MFP_Msk

#define SYS_GPC_MFPL_PC0MFP_Msk   (0xful << SYS_GPC_MFPL_PC0MFP_Pos)

SYS_T::GPC_MFPL: PC0MFP Mask

Definition at line 10597 of file M471M_R1_S.h.

◆ SYS_GPC_MFPL_PC0MFP_Pos

#define SYS_GPC_MFPL_PC0MFP_Pos   (0)

SYS_T::GPC_MFPL: PC0MFP Position

Definition at line 10596 of file M471M_R1_S.h.

◆ SYS_GPC_MFPL_PC1MFP_Msk

#define SYS_GPC_MFPL_PC1MFP_Msk   (0xful << SYS_GPC_MFPL_PC1MFP_Pos)

SYS_T::GPC_MFPL: PC1MFP Mask

Definition at line 10600 of file M471M_R1_S.h.

◆ SYS_GPC_MFPL_PC1MFP_Pos

#define SYS_GPC_MFPL_PC1MFP_Pos   (4)

SYS_T::GPC_MFPL: PC1MFP Position

Definition at line 10599 of file M471M_R1_S.h.

◆ SYS_GPC_MFPL_PC2MFP_Msk

#define SYS_GPC_MFPL_PC2MFP_Msk   (0xful << SYS_GPC_MFPL_PC2MFP_Pos)

SYS_T::GPC_MFPL: PC2MFP Mask

Definition at line 10603 of file M471M_R1_S.h.

◆ SYS_GPC_MFPL_PC2MFP_Pos

#define SYS_GPC_MFPL_PC2MFP_Pos   (8)

SYS_T::GPC_MFPL: PC2MFP Position

Definition at line 10602 of file M471M_R1_S.h.

◆ SYS_GPC_MFPL_PC3MFP_Msk

#define SYS_GPC_MFPL_PC3MFP_Msk   (0xful << SYS_GPC_MFPL_PC3MFP_Pos)

SYS_T::GPC_MFPL: PC3MFP Mask

Definition at line 10606 of file M471M_R1_S.h.

◆ SYS_GPC_MFPL_PC3MFP_Pos

#define SYS_GPC_MFPL_PC3MFP_Pos   (12)

SYS_T::GPC_MFPL: PC3MFP Position

Definition at line 10605 of file M471M_R1_S.h.

◆ SYS_GPC_MFPL_PC4MFP_Msk

#define SYS_GPC_MFPL_PC4MFP_Msk   (0xful << SYS_GPC_MFPL_PC4MFP_Pos)

SYS_T::GPC_MFPL: PC4MFP Mask

Definition at line 10609 of file M471M_R1_S.h.

◆ SYS_GPC_MFPL_PC4MFP_Pos

#define SYS_GPC_MFPL_PC4MFP_Pos   (16)

SYS_T::GPC_MFPL: PC4MFP Position

Definition at line 10608 of file M471M_R1_S.h.

◆ SYS_GPC_MFPL_PC5MFP_Msk

#define SYS_GPC_MFPL_PC5MFP_Msk   (0xful << SYS_GPC_MFPL_PC5MFP_Pos)

SYS_T::GPC_MFPL: PC5MFP Mask

Definition at line 10612 of file M471M_R1_S.h.

◆ SYS_GPC_MFPL_PC5MFP_Pos

#define SYS_GPC_MFPL_PC5MFP_Pos   (20)

SYS_T::GPC_MFPL: PC5MFP Position

Definition at line 10611 of file M471M_R1_S.h.

◆ SYS_GPC_MFPL_PC6MFP_Msk

#define SYS_GPC_MFPL_PC6MFP_Msk   (0xful << SYS_GPC_MFPL_PC6MFP_Pos)

SYS_T::GPC_MFPL: PC6MFP Mask

Definition at line 10615 of file M471M_R1_S.h.

◆ SYS_GPC_MFPL_PC6MFP_Pos

#define SYS_GPC_MFPL_PC6MFP_Pos   (24)

SYS_T::GPC_MFPL: PC6MFP Position

Definition at line 10614 of file M471M_R1_S.h.

◆ SYS_GPC_MFPL_PC7MFP_Msk

#define SYS_GPC_MFPL_PC7MFP_Msk   (0xful << SYS_GPC_MFPL_PC7MFP_Pos)

SYS_T::GPC_MFPL: PC7MFP Mask

Definition at line 10618 of file M471M_R1_S.h.

◆ SYS_GPC_MFPL_PC7MFP_Pos

#define SYS_GPC_MFPL_PC7MFP_Pos   (28)

SYS_T::GPC_MFPL: PC7MFP Position

Definition at line 10617 of file M471M_R1_S.h.

◆ SYS_GPD_MFPH_PD10MFP_Msk

#define SYS_GPD_MFPH_PD10MFP_Msk   (0xful << SYS_GPD_MFPH_PD10MFP_Pos)

SYS_T::GPD_MFPH: PD10MFP Mask

Definition at line 10675 of file M471M_R1_S.h.

◆ SYS_GPD_MFPH_PD10MFP_Pos

#define SYS_GPD_MFPH_PD10MFP_Pos   (8)

SYS_T::GPD_MFPH: PD10MFP Position

Definition at line 10674 of file M471M_R1_S.h.

◆ SYS_GPD_MFPH_PD11MFP_Msk

#define SYS_GPD_MFPH_PD11MFP_Msk   (0xful << SYS_GPD_MFPH_PD11MFP_Pos)

SYS_T::GPD_MFPH: PD11MFP Mask

Definition at line 10678 of file M471M_R1_S.h.

◆ SYS_GPD_MFPH_PD11MFP_Pos

#define SYS_GPD_MFPH_PD11MFP_Pos   (12)

SYS_T::GPD_MFPH: PD11MFP Position

Definition at line 10677 of file M471M_R1_S.h.

◆ SYS_GPD_MFPH_PD12MFP_Msk

#define SYS_GPD_MFPH_PD12MFP_Msk   (0xful << SYS_GPD_MFPH_PD12MFP_Pos)

SYS_T::GPD_MFPH: PD12MFP Mask

Definition at line 10681 of file M471M_R1_S.h.

◆ SYS_GPD_MFPH_PD12MFP_Pos

#define SYS_GPD_MFPH_PD12MFP_Pos   (16)

SYS_T::GPD_MFPH: PD12MFP Position

Definition at line 10680 of file M471M_R1_S.h.

◆ SYS_GPD_MFPH_PD13MFP_Msk

#define SYS_GPD_MFPH_PD13MFP_Msk   (0xful << SYS_GPD_MFPH_PD13MFP_Pos)

SYS_T::GPD_MFPH: PD13MFP Mask

Definition at line 10684 of file M471M_R1_S.h.

◆ SYS_GPD_MFPH_PD13MFP_Pos

#define SYS_GPD_MFPH_PD13MFP_Pos   (20)

SYS_T::GPD_MFPH: PD13MFP Position

Definition at line 10683 of file M471M_R1_S.h.

◆ SYS_GPD_MFPH_PD14MFP_Msk

#define SYS_GPD_MFPH_PD14MFP_Msk   (0xful << SYS_GPD_MFPH_PD14MFP_Pos)

SYS_T::GPD_MFPH: PD14MFP Mask

Definition at line 10687 of file M471M_R1_S.h.

◆ SYS_GPD_MFPH_PD14MFP_Pos

#define SYS_GPD_MFPH_PD14MFP_Pos   (24)

SYS_T::GPD_MFPH: PD14MFP Position

Definition at line 10686 of file M471M_R1_S.h.

◆ SYS_GPD_MFPH_PD15MFP_Msk

#define SYS_GPD_MFPH_PD15MFP_Msk   (0xful << SYS_GPD_MFPH_PD15MFP_Pos)

SYS_T::GPD_MFPH: PD15MFP Mask

Definition at line 10690 of file M471M_R1_S.h.

◆ SYS_GPD_MFPH_PD15MFP_Pos

#define SYS_GPD_MFPH_PD15MFP_Pos   (28)

SYS_T::GPD_MFPH: PD15MFP Position

Definition at line 10689 of file M471M_R1_S.h.

◆ SYS_GPD_MFPH_PD8MFP_Msk

#define SYS_GPD_MFPH_PD8MFP_Msk   (0xful << SYS_GPD_MFPH_PD8MFP_Pos)

SYS_T::GPD_MFPH: PD8MFP Mask

Definition at line 10669 of file M471M_R1_S.h.

◆ SYS_GPD_MFPH_PD8MFP_Pos

#define SYS_GPD_MFPH_PD8MFP_Pos   (0)

SYS_T::GPD_MFPH: PD8MFP Position

Definition at line 10668 of file M471M_R1_S.h.

◆ SYS_GPD_MFPH_PD9MFP_Msk

#define SYS_GPD_MFPH_PD9MFP_Msk   (0xful << SYS_GPD_MFPH_PD9MFP_Pos)

SYS_T::GPD_MFPH: PD9MFP Mask

Definition at line 10672 of file M471M_R1_S.h.

◆ SYS_GPD_MFPH_PD9MFP_Pos

#define SYS_GPD_MFPH_PD9MFP_Pos   (4)

SYS_T::GPD_MFPH: PD9MFP Position

Definition at line 10671 of file M471M_R1_S.h.

◆ SYS_GPD_MFPL_PD0MFP_Msk

#define SYS_GPD_MFPL_PD0MFP_Msk   (0xful << SYS_GPD_MFPL_PD0MFP_Pos)

SYS_T::GPD_MFPL: PD0MFP Mask

Definition at line 10645 of file M471M_R1_S.h.

◆ SYS_GPD_MFPL_PD0MFP_Pos

#define SYS_GPD_MFPL_PD0MFP_Pos   (0)

SYS_T::GPD_MFPL: PD0MFP Position

Definition at line 10644 of file M471M_R1_S.h.

◆ SYS_GPD_MFPL_PD1MFP_Msk

#define SYS_GPD_MFPL_PD1MFP_Msk   (0xful << SYS_GPD_MFPL_PD1MFP_Pos)

SYS_T::GPD_MFPL: PD1MFP Mask

Definition at line 10648 of file M471M_R1_S.h.

◆ SYS_GPD_MFPL_PD1MFP_Pos

#define SYS_GPD_MFPL_PD1MFP_Pos   (4)

SYS_T::GPD_MFPL: PD1MFP Position

Definition at line 10647 of file M471M_R1_S.h.

◆ SYS_GPD_MFPL_PD2MFP_Msk

#define SYS_GPD_MFPL_PD2MFP_Msk   (0xful << SYS_GPD_MFPL_PD2MFP_Pos)

SYS_T::GPD_MFPL: PD2MFP Mask

Definition at line 10651 of file M471M_R1_S.h.

◆ SYS_GPD_MFPL_PD2MFP_Pos

#define SYS_GPD_MFPL_PD2MFP_Pos   (8)

SYS_T::GPD_MFPL: PD2MFP Position

Definition at line 10650 of file M471M_R1_S.h.

◆ SYS_GPD_MFPL_PD3MFP_Msk

#define SYS_GPD_MFPL_PD3MFP_Msk   (0xful << SYS_GPD_MFPL_PD3MFP_Pos)

SYS_T::GPD_MFPL: PD3MFP Mask

Definition at line 10654 of file M471M_R1_S.h.

◆ SYS_GPD_MFPL_PD3MFP_Pos

#define SYS_GPD_MFPL_PD3MFP_Pos   (12)

SYS_T::GPD_MFPL: PD3MFP Position

Definition at line 10653 of file M471M_R1_S.h.

◆ SYS_GPD_MFPL_PD4MFP_Msk

#define SYS_GPD_MFPL_PD4MFP_Msk   (0xful << SYS_GPD_MFPL_PD4MFP_Pos)

SYS_T::GPD_MFPL: PD4MFP Mask

Definition at line 10657 of file M471M_R1_S.h.

◆ SYS_GPD_MFPL_PD4MFP_Pos

#define SYS_GPD_MFPL_PD4MFP_Pos   (16)

SYS_T::GPD_MFPL: PD4MFP Position

Definition at line 10656 of file M471M_R1_S.h.

◆ SYS_GPD_MFPL_PD5MFP_Msk

#define SYS_GPD_MFPL_PD5MFP_Msk   (0xful << SYS_GPD_MFPL_PD5MFP_Pos)

SYS_T::GPD_MFPL: PD5MFP Mask

Definition at line 10660 of file M471M_R1_S.h.

◆ SYS_GPD_MFPL_PD5MFP_Pos

#define SYS_GPD_MFPL_PD5MFP_Pos   (20)

SYS_T::GPD_MFPL: PD5MFP Position

Definition at line 10659 of file M471M_R1_S.h.

◆ SYS_GPD_MFPL_PD6MFP_Msk

#define SYS_GPD_MFPL_PD6MFP_Msk   (0xful << SYS_GPD_MFPL_PD6MFP_Pos)

SYS_T::GPD_MFPL: PD6MFP Mask

Definition at line 10663 of file M471M_R1_S.h.

◆ SYS_GPD_MFPL_PD6MFP_Pos

#define SYS_GPD_MFPL_PD6MFP_Pos   (24)

SYS_T::GPD_MFPL: PD6MFP Position

Definition at line 10662 of file M471M_R1_S.h.

◆ SYS_GPD_MFPL_PD7MFP_Msk

#define SYS_GPD_MFPL_PD7MFP_Msk   (0xful << SYS_GPD_MFPL_PD7MFP_Pos)

SYS_T::GPD_MFPL: PD7MFP Mask

Definition at line 10666 of file M471M_R1_S.h.

◆ SYS_GPD_MFPL_PD7MFP_Pos

#define SYS_GPD_MFPL_PD7MFP_Pos   (28)

SYS_T::GPD_MFPL: PD7MFP Position

Definition at line 10665 of file M471M_R1_S.h.

◆ SYS_GPE_MFPH_PE10MFP_Msk

#define SYS_GPE_MFPH_PE10MFP_Msk   (0xful << SYS_GPE_MFPH_PE10MFP_Pos)

SYS_T::GPE_MFPH: PE10MFP Mask

Definition at line 10723 of file M471M_R1_S.h.

◆ SYS_GPE_MFPH_PE10MFP_Pos

#define SYS_GPE_MFPH_PE10MFP_Pos   (8)

SYS_T::GPE_MFPH: PE10MFP Position

Definition at line 10722 of file M471M_R1_S.h.

◆ SYS_GPE_MFPH_PE11MFP_Msk

#define SYS_GPE_MFPH_PE11MFP_Msk   (0xful << SYS_GPE_MFPH_PE11MFP_Pos)

SYS_T::GPE_MFPH: PE11MFP Mask

Definition at line 10726 of file M471M_R1_S.h.

◆ SYS_GPE_MFPH_PE11MFP_Pos

#define SYS_GPE_MFPH_PE11MFP_Pos   (12)

SYS_T::GPE_MFPH: PE11MFP Position

Definition at line 10725 of file M471M_R1_S.h.

◆ SYS_GPE_MFPH_PE12MFP_Msk

#define SYS_GPE_MFPH_PE12MFP_Msk   (0xful << SYS_GPE_MFPH_PE12MFP_Pos)

SYS_T::GPE_MFPH: PE12MFP Mask

Definition at line 10729 of file M471M_R1_S.h.

◆ SYS_GPE_MFPH_PE12MFP_Pos

#define SYS_GPE_MFPH_PE12MFP_Pos   (16)

SYS_T::GPE_MFPH: PE12MFP Position

Definition at line 10728 of file M471M_R1_S.h.

◆ SYS_GPE_MFPH_PE13MFP_Msk

#define SYS_GPE_MFPH_PE13MFP_Msk   (0xful << SYS_GPE_MFPH_PE13MFP_Pos)

SYS_T::GPE_MFPH: PE13MFP Mask

Definition at line 10732 of file M471M_R1_S.h.

◆ SYS_GPE_MFPH_PE13MFP_Pos

#define SYS_GPE_MFPH_PE13MFP_Pos   (20)

SYS_T::GPE_MFPH: PE13MFP Position

Definition at line 10731 of file M471M_R1_S.h.

◆ SYS_GPE_MFPH_PE14MFP_Msk

#define SYS_GPE_MFPH_PE14MFP_Msk   (0xful << SYS_GPE_MFPH_PE14MFP_Pos)

SYS_T::GPE_MFPH: PE14MFP Mask

Definition at line 10735 of file M471M_R1_S.h.

◆ SYS_GPE_MFPH_PE14MFP_Pos

#define SYS_GPE_MFPH_PE14MFP_Pos   (24)

SYS_T::GPE_MFPH: PE14MFP Position

Definition at line 10734 of file M471M_R1_S.h.

◆ SYS_GPE_MFPH_PE8MFP_Msk

#define SYS_GPE_MFPH_PE8MFP_Msk   (0xful << SYS_GPE_MFPH_PE8MFP_Pos)

SYS_T::GPE_MFPH: PE8MFP Mask

Definition at line 10717 of file M471M_R1_S.h.

◆ SYS_GPE_MFPH_PE8MFP_Pos

#define SYS_GPE_MFPH_PE8MFP_Pos   (0)

SYS_T::GPE_MFPH: PE8MFP Position

Definition at line 10716 of file M471M_R1_S.h.

◆ SYS_GPE_MFPH_PE9MFP_Msk

#define SYS_GPE_MFPH_PE9MFP_Msk   (0xful << SYS_GPE_MFPH_PE9MFP_Pos)

SYS_T::GPE_MFPH: PE9MFP Mask

Definition at line 10720 of file M471M_R1_S.h.

◆ SYS_GPE_MFPH_PE9MFP_Pos

#define SYS_GPE_MFPH_PE9MFP_Pos   (4)

SYS_T::GPE_MFPH: PE9MFP Position

Definition at line 10719 of file M471M_R1_S.h.

◆ SYS_GPE_MFPL_PE0MFP_Msk

#define SYS_GPE_MFPL_PE0MFP_Msk   (0xful << SYS_GPE_MFPL_PE0MFP_Pos)

SYS_T::GPE_MFPL: PE0MFP Mask

Definition at line 10693 of file M471M_R1_S.h.

◆ SYS_GPE_MFPL_PE0MFP_Pos

#define SYS_GPE_MFPL_PE0MFP_Pos   (0)

SYS_T::GPE_MFPL: PE0MFP Position

Definition at line 10692 of file M471M_R1_S.h.

◆ SYS_GPE_MFPL_PE1MFP_Msk

#define SYS_GPE_MFPL_PE1MFP_Msk   (0xful << SYS_GPE_MFPL_PE1MFP_Pos)

SYS_T::GPE_MFPL: PE1MFP Mask

Definition at line 10696 of file M471M_R1_S.h.

◆ SYS_GPE_MFPL_PE1MFP_Pos

#define SYS_GPE_MFPL_PE1MFP_Pos   (4)

SYS_T::GPE_MFPL: PE1MFP Position

Definition at line 10695 of file M471M_R1_S.h.

◆ SYS_GPE_MFPL_PE2MFP_Msk

#define SYS_GPE_MFPL_PE2MFP_Msk   (0xful << SYS_GPE_MFPL_PE2MFP_Pos)

SYS_T::GPE_MFPL: PE2MFP Mask

Definition at line 10699 of file M471M_R1_S.h.

◆ SYS_GPE_MFPL_PE2MFP_Pos

#define SYS_GPE_MFPL_PE2MFP_Pos   (8)

SYS_T::GPE_MFPL: PE2MFP Position

Definition at line 10698 of file M471M_R1_S.h.

◆ SYS_GPE_MFPL_PE3MFP_Msk

#define SYS_GPE_MFPL_PE3MFP_Msk   (0xful << SYS_GPE_MFPL_PE3MFP_Pos)

SYS_T::GPE_MFPL: PE3MFP Mask

Definition at line 10702 of file M471M_R1_S.h.

◆ SYS_GPE_MFPL_PE3MFP_Pos

#define SYS_GPE_MFPL_PE3MFP_Pos   (12)

SYS_T::GPE_MFPL: PE3MFP Position

Definition at line 10701 of file M471M_R1_S.h.

◆ SYS_GPE_MFPL_PE4MFP_Msk

#define SYS_GPE_MFPL_PE4MFP_Msk   (0xful << SYS_GPE_MFPL_PE4MFP_Pos)

SYS_T::GPE_MFPL: PE4MFP Mask

Definition at line 10705 of file M471M_R1_S.h.

◆ SYS_GPE_MFPL_PE4MFP_Pos

#define SYS_GPE_MFPL_PE4MFP_Pos   (16)

SYS_T::GPE_MFPL: PE4MFP Position

Definition at line 10704 of file M471M_R1_S.h.

◆ SYS_GPE_MFPL_PE5MFP_Msk

#define SYS_GPE_MFPL_PE5MFP_Msk   (0xful << SYS_GPE_MFPL_PE5MFP_Pos)

SYS_T::GPE_MFPL: PE5MFP Mask

Definition at line 10708 of file M471M_R1_S.h.

◆ SYS_GPE_MFPL_PE5MFP_Pos

#define SYS_GPE_MFPL_PE5MFP_Pos   (20)

SYS_T::GPE_MFPL: PE5MFP Position

Definition at line 10707 of file M471M_R1_S.h.

◆ SYS_GPE_MFPL_PE6MFP_Msk

#define SYS_GPE_MFPL_PE6MFP_Msk   (0xful << SYS_GPE_MFPL_PE6MFP_Pos)

SYS_T::GPE_MFPL: PE6MFP Mask

Definition at line 10711 of file M471M_R1_S.h.

◆ SYS_GPE_MFPL_PE6MFP_Pos

#define SYS_GPE_MFPL_PE6MFP_Pos   (24)

SYS_T::GPE_MFPL: PE6MFP Position

Definition at line 10710 of file M471M_R1_S.h.

◆ SYS_GPE_MFPL_PE7MFP_Msk

#define SYS_GPE_MFPL_PE7MFP_Msk   (0xful << SYS_GPE_MFPL_PE7MFP_Pos)

SYS_T::GPE_MFPL: PE7MFP Mask

Definition at line 10714 of file M471M_R1_S.h.

◆ SYS_GPE_MFPL_PE7MFP_Pos

#define SYS_GPE_MFPL_PE7MFP_Pos   (28)

SYS_T::GPE_MFPL: PE7MFP Position

Definition at line 10713 of file M471M_R1_S.h.

◆ SYS_GPF_MFPL_PF0MFP_Msk

#define SYS_GPF_MFPL_PF0MFP_Msk   (0xful << SYS_GPF_MFPL_PF0MFP_Pos)

SYS_T::GPF_MFPL: PF0MFP Mask

Definition at line 10738 of file M471M_R1_S.h.

◆ SYS_GPF_MFPL_PF0MFP_Pos

#define SYS_GPF_MFPL_PF0MFP_Pos   (0)

SYS_T::GPF_MFPL: PF0MFP Position

Definition at line 10737 of file M471M_R1_S.h.

◆ SYS_GPF_MFPL_PF1MFP_Msk

#define SYS_GPF_MFPL_PF1MFP_Msk   (0xful << SYS_GPF_MFPL_PF1MFP_Pos)

SYS_T::GPF_MFPL: PF1MFP Mask

Definition at line 10741 of file M471M_R1_S.h.

◆ SYS_GPF_MFPL_PF1MFP_Pos

#define SYS_GPF_MFPL_PF1MFP_Pos   (4)

SYS_T::GPF_MFPL: PF1MFP Position

Definition at line 10740 of file M471M_R1_S.h.

◆ SYS_GPF_MFPL_PF2MFP_Msk

#define SYS_GPF_MFPL_PF2MFP_Msk   (0xful << SYS_GPF_MFPL_PF2MFP_Pos)

SYS_T::GPF_MFPL: PF2MFP Mask

Definition at line 10744 of file M471M_R1_S.h.

◆ SYS_GPF_MFPL_PF2MFP_Pos

#define SYS_GPF_MFPL_PF2MFP_Pos   (8)

SYS_T::GPF_MFPL: PF2MFP Position

Definition at line 10743 of file M471M_R1_S.h.

◆ SYS_GPF_MFPL_PF3MFP_Msk

#define SYS_GPF_MFPL_PF3MFP_Msk   (0xful << SYS_GPF_MFPL_PF3MFP_Pos)

SYS_T::GPF_MFPL: PF3MFP Mask

Definition at line 10747 of file M471M_R1_S.h.

◆ SYS_GPF_MFPL_PF3MFP_Pos

#define SYS_GPF_MFPL_PF3MFP_Pos   (12)

SYS_T::GPF_MFPL: PF3MFP Position

Definition at line 10746 of file M471M_R1_S.h.

◆ SYS_GPF_MFPL_PF4MFP_Msk

#define SYS_GPF_MFPL_PF4MFP_Msk   (0xful << SYS_GPF_MFPL_PF4MFP_Pos)

SYS_T::GPF_MFPL: PF4MFP Mask

Definition at line 10750 of file M471M_R1_S.h.

◆ SYS_GPF_MFPL_PF4MFP_Pos

#define SYS_GPF_MFPL_PF4MFP_Pos   (16)

SYS_T::GPF_MFPL: PF4MFP Position

Definition at line 10749 of file M471M_R1_S.h.

◆ SYS_GPF_MFPL_PF5MFP_Msk

#define SYS_GPF_MFPL_PF5MFP_Msk   (0xful << SYS_GPF_MFPL_PF5MFP_Pos)

SYS_T::GPF_MFPL: PF5MFP Mask

Definition at line 10753 of file M471M_R1_S.h.

◆ SYS_GPF_MFPL_PF5MFP_Pos

#define SYS_GPF_MFPL_PF5MFP_Pos   (20)

SYS_T::GPF_MFPL: PF5MFP Position

Definition at line 10752 of file M471M_R1_S.h.

◆ SYS_GPF_MFPL_PF6MFP_Msk

#define SYS_GPF_MFPL_PF6MFP_Msk   (0xful << SYS_GPF_MFPL_PF6MFP_Pos)

SYS_T::GPF_MFPL: PF6MFP Mask

Definition at line 10756 of file M471M_R1_S.h.

◆ SYS_GPF_MFPL_PF6MFP_Pos

#define SYS_GPF_MFPL_PF6MFP_Pos   (24)

SYS_T::GPF_MFPL: PF6MFP Position

Definition at line 10755 of file M471M_R1_S.h.

◆ SYS_GPF_MFPL_PF7MFP_Msk

#define SYS_GPF_MFPL_PF7MFP_Msk   (0xful << SYS_GPF_MFPL_PF7MFP_Pos)

SYS_T::GPF_MFPL: PF7MFP Mask

Definition at line 10759 of file M471M_R1_S.h.

◆ SYS_GPF_MFPL_PF7MFP_Pos

#define SYS_GPF_MFPL_PF7MFP_Pos   (28)

SYS_T::GPF_MFPL: PF7MFP Position

Definition at line 10758 of file M471M_R1_S.h.

◆ SYS_IPRST0_CHIPRST_Msk

#define SYS_IPRST0_CHIPRST_Msk   (0x1ul << SYS_IPRST0_CHIPRST_Pos)

SYS_T::IPRST0: CHIPRST Mask

Definition at line 10381 of file M471M_R1_S.h.

◆ SYS_IPRST0_CHIPRST_Pos

#define SYS_IPRST0_CHIPRST_Pos   (0)

SYS_T::IPRST0: CHIPRST Position

Definition at line 10380 of file M471M_R1_S.h.

◆ SYS_IPRST0_CPURST_Msk

#define SYS_IPRST0_CPURST_Msk   (0x1ul << SYS_IPRST0_CPURST_Pos)

SYS_T::IPRST0: CPURST Mask

Definition at line 10384 of file M471M_R1_S.h.

◆ SYS_IPRST0_CPURST_Pos

#define SYS_IPRST0_CPURST_Pos   (1)

SYS_T::IPRST0: CPURST Position

Definition at line 10383 of file M471M_R1_S.h.

◆ SYS_IPRST0_CRCRST_Msk

#define SYS_IPRST0_CRCRST_Msk   (0x1ul << SYS_IPRST0_CRCRST_Pos)

SYS_T::IPRST0: CRCRST Mask

Definition at line 10396 of file M471M_R1_S.h.

◆ SYS_IPRST0_CRCRST_Pos

#define SYS_IPRST0_CRCRST_Pos   (7)

SYS_T::IPRST0: CRCRST Position

Definition at line 10395 of file M471M_R1_S.h.

◆ SYS_IPRST0_EBIRST_Msk

#define SYS_IPRST0_EBIRST_Msk   (0x1ul << SYS_IPRST0_EBIRST_Pos)

SYS_T::IPRST0: EBIRST Mask

Definition at line 10390 of file M471M_R1_S.h.

◆ SYS_IPRST0_EBIRST_Pos

#define SYS_IPRST0_EBIRST_Pos   (3)

SYS_T::IPRST0: EBIRST Position

Definition at line 10389 of file M471M_R1_S.h.

◆ SYS_IPRST0_PDMARST_Msk

#define SYS_IPRST0_PDMARST_Msk   (0x1ul << SYS_IPRST0_PDMARST_Pos)

SYS_T::IPRST0: PDMARST Mask

Definition at line 10387 of file M471M_R1_S.h.

◆ SYS_IPRST0_PDMARST_Pos

#define SYS_IPRST0_PDMARST_Pos   (2)

SYS_T::IPRST0: PDMARST Position

Definition at line 10386 of file M471M_R1_S.h.

◆ SYS_IPRST0_USBHRST_Msk

#define SYS_IPRST0_USBHRST_Msk   (0x1ul << SYS_IPRST0_USBHRST_Pos)

SYS_T::IPRST0: USBHRST Mask

Definition at line 10393 of file M471M_R1_S.h.

◆ SYS_IPRST0_USBHRST_Pos

#define SYS_IPRST0_USBHRST_Pos   (4)

SYS_T::IPRST0: USBHRST Position

Definition at line 10392 of file M471M_R1_S.h.

◆ SYS_IPRST1_EADCRST_Msk

#define SYS_IPRST1_EADCRST_Msk   (0x1ul << SYS_IPRST1_EADCRST_Pos)

SYS_T::IPRST1: EADCRST Mask

Definition at line 10441 of file M471M_R1_S.h.

◆ SYS_IPRST1_EADCRST_Pos

#define SYS_IPRST1_EADCRST_Pos   (28)

SYS_T::IPRST1: EADCRST Position

Definition at line 10440 of file M471M_R1_S.h.

◆ SYS_IPRST1_GPIORST_Msk

#define SYS_IPRST1_GPIORST_Msk   (0x1ul << SYS_IPRST1_GPIORST_Pos)

SYS_T::IPRST1: GPIORST Mask

Definition at line 10399 of file M471M_R1_S.h.

◆ SYS_IPRST1_GPIORST_Pos

#define SYS_IPRST1_GPIORST_Pos   (1)

SYS_T::IPRST1: GPIORST Position

Definition at line 10398 of file M471M_R1_S.h.

◆ SYS_IPRST1_I2C0RST_Msk

#define SYS_IPRST1_I2C0RST_Msk   (0x1ul << SYS_IPRST1_I2C0RST_Pos)

SYS_T::IPRST1: I2C0RST Mask

Definition at line 10414 of file M471M_R1_S.h.

◆ SYS_IPRST1_I2C0RST_Pos

#define SYS_IPRST1_I2C0RST_Pos   (8)

SYS_T::IPRST1: I2C0RST Position

Definition at line 10413 of file M471M_R1_S.h.

◆ SYS_IPRST1_I2C1RST_Msk

#define SYS_IPRST1_I2C1RST_Msk   (0x1ul << SYS_IPRST1_I2C1RST_Pos)

SYS_T::IPRST1: I2C1RST Mask

Definition at line 10417 of file M471M_R1_S.h.

◆ SYS_IPRST1_I2C1RST_Pos

#define SYS_IPRST1_I2C1RST_Pos   (9)

SYS_T::IPRST1: I2C1RST Position

Definition at line 10416 of file M471M_R1_S.h.

◆ SYS_IPRST1_SPI0RST_Msk

#define SYS_IPRST1_SPI0RST_Msk   (0x1ul << SYS_IPRST1_SPI0RST_Pos)

SYS_T::IPRST1: SPI0RST Mask

Definition at line 10420 of file M471M_R1_S.h.

◆ SYS_IPRST1_SPI0RST_Pos

#define SYS_IPRST1_SPI0RST_Pos   (12)

SYS_T::IPRST1: SPI0RST Position

Definition at line 10419 of file M471M_R1_S.h.

◆ SYS_IPRST1_SPI1RST_Msk

#define SYS_IPRST1_SPI1RST_Msk   (0x1ul << SYS_IPRST1_SPI1RST_Pos)

SYS_T::IPRST1: SPI1RST Mask

Definition at line 10423 of file M471M_R1_S.h.

◆ SYS_IPRST1_SPI1RST_Pos

#define SYS_IPRST1_SPI1RST_Pos   (13)

SYS_T::IPRST1: SPI1RST Position

Definition at line 10422 of file M471M_R1_S.h.

◆ SYS_IPRST1_TMR0RST_Msk

#define SYS_IPRST1_TMR0RST_Msk   (0x1ul << SYS_IPRST1_TMR0RST_Pos)

SYS_T::IPRST1: TMR0RST Mask

Definition at line 10402 of file M471M_R1_S.h.

◆ SYS_IPRST1_TMR0RST_Pos

#define SYS_IPRST1_TMR0RST_Pos   (2)

SYS_T::IPRST1: TMR0RST Position

Definition at line 10401 of file M471M_R1_S.h.

◆ SYS_IPRST1_TMR1RST_Msk

#define SYS_IPRST1_TMR1RST_Msk   (0x1ul << SYS_IPRST1_TMR1RST_Pos)

SYS_T::IPRST1: TMR1RST Mask

Definition at line 10405 of file M471M_R1_S.h.

◆ SYS_IPRST1_TMR1RST_Pos

#define SYS_IPRST1_TMR1RST_Pos   (3)

SYS_T::IPRST1: TMR1RST Position

Definition at line 10404 of file M471M_R1_S.h.

◆ SYS_IPRST1_TMR2RST_Msk

#define SYS_IPRST1_TMR2RST_Msk   (0x1ul << SYS_IPRST1_TMR2RST_Pos)

SYS_T::IPRST1: TMR2RST Mask

Definition at line 10408 of file M471M_R1_S.h.

◆ SYS_IPRST1_TMR2RST_Pos

#define SYS_IPRST1_TMR2RST_Pos   (4)

SYS_T::IPRST1: TMR2RST Position

Definition at line 10407 of file M471M_R1_S.h.

◆ SYS_IPRST1_TMR3RST_Msk

#define SYS_IPRST1_TMR3RST_Msk   (0x1ul << SYS_IPRST1_TMR3RST_Pos)

SYS_T::IPRST1: TMR3RST Mask

Definition at line 10411 of file M471M_R1_S.h.

◆ SYS_IPRST1_TMR3RST_Pos

#define SYS_IPRST1_TMR3RST_Pos   (5)

SYS_T::IPRST1: TMR3RST Position

Definition at line 10410 of file M471M_R1_S.h.

◆ SYS_IPRST1_UART0RST_Msk

#define SYS_IPRST1_UART0RST_Msk   (0x1ul << SYS_IPRST1_UART0RST_Pos)

SYS_T::IPRST1: UART0RST Mask

Definition at line 10426 of file M471M_R1_S.h.

◆ SYS_IPRST1_UART0RST_Pos

#define SYS_IPRST1_UART0RST_Pos   (16)

SYS_T::IPRST1: UART0RST Position

Definition at line 10425 of file M471M_R1_S.h.

◆ SYS_IPRST1_UART1RST_Msk

#define SYS_IPRST1_UART1RST_Msk   (0x1ul << SYS_IPRST1_UART1RST_Pos)

SYS_T::IPRST1: UART1RST Mask

Definition at line 10429 of file M471M_R1_S.h.

◆ SYS_IPRST1_UART1RST_Pos

#define SYS_IPRST1_UART1RST_Pos   (17)

SYS_T::IPRST1: UART1RST Position

Definition at line 10428 of file M471M_R1_S.h.

◆ SYS_IPRST1_UART2RST_Msk

#define SYS_IPRST1_UART2RST_Msk   (0x1ul << SYS_IPRST1_UART2RST_Pos)

SYS_T::IPRST1: UART2RST Mask

Definition at line 10432 of file M471M_R1_S.h.

◆ SYS_IPRST1_UART2RST_Pos

#define SYS_IPRST1_UART2RST_Pos   (18)

SYS_T::IPRST1: UART2RST Position

Definition at line 10431 of file M471M_R1_S.h.

◆ SYS_IPRST1_UART3RST_Msk

#define SYS_IPRST1_UART3RST_Msk   (0x1ul << SYS_IPRST1_UART3RST_Pos)

SYS_T::IPRST1: UART3RST Mask

Definition at line 10435 of file M471M_R1_S.h.

◆ SYS_IPRST1_UART3RST_Pos

#define SYS_IPRST1_UART3RST_Pos   (19)

SYS_T::IPRST1: UART3RST Position

Definition at line 10434 of file M471M_R1_S.h.

◆ SYS_IPRST1_USBDRST_Msk

#define SYS_IPRST1_USBDRST_Msk   (0x1ul << SYS_IPRST1_USBDRST_Pos)

SYS_T::IPRST1: USBDRST Mask

Definition at line 10438 of file M471M_R1_S.h.

◆ SYS_IPRST1_USBDRST_Pos

#define SYS_IPRST1_USBDRST_Pos   (27)

SYS_T::IPRST1: USBDRST Position

Definition at line 10437 of file M471M_R1_S.h.

◆ SYS_IPRST2_PWM0RST_Msk

#define SYS_IPRST2_PWM0RST_Msk   (0x1ul << SYS_IPRST2_PWM0RST_Pos)

SYS_T::IPRST2: PWM0RST Mask

Definition at line 10447 of file M471M_R1_S.h.

◆ SYS_IPRST2_PWM0RST_Pos

#define SYS_IPRST2_PWM0RST_Pos   (16)

SYS_T::IPRST2: PWM0RST Position

Definition at line 10446 of file M471M_R1_S.h.

◆ SYS_IPRST2_PWM1RST_Msk

#define SYS_IPRST2_PWM1RST_Msk   (0x1ul << SYS_IPRST2_PWM1RST_Pos)

SYS_T::IPRST2: PWM1RST Mask

Definition at line 10450 of file M471M_R1_S.h.

◆ SYS_IPRST2_PWM1RST_Pos

#define SYS_IPRST2_PWM1RST_Pos   (17)

SYS_T::IPRST2: PWM1RST Position

Definition at line 10449 of file M471M_R1_S.h.

◆ SYS_IPRST2_SC0RST_Msk

#define SYS_IPRST2_SC0RST_Msk   (0x1ul << SYS_IPRST2_SC0RST_Pos)

SYS_T::IPRST2: SC0RST Mask

Definition at line 10444 of file M471M_R1_S.h.

◆ SYS_IPRST2_SC0RST_Pos

#define SYS_IPRST2_SC0RST_Pos   (0)

SYS_T::IPRST2: SC0RST Position

Definition at line 10443 of file M471M_R1_S.h.

◆ SYS_IPRST2_TKRST_Msk

#define SYS_IPRST2_TKRST_Msk   (0x1ul << SYS_IPRST2_TKRST_Pos)

SYS_T::IPRST2: TKRST Mask

Definition at line 10453 of file M471M_R1_S.h.

◆ SYS_IPRST2_TKRST_Pos

#define SYS_IPRST2_TKRST_Pos   (25)

SYS_T::IPRST2: TKRST Position

Definition at line 10452 of file M471M_R1_S.h.

◆ SYS_IRC48MTCTL_CESTOPEN_Msk

#define SYS_IRC48MTCTL_CESTOPEN_Msk   (0x1ul << SYS_IRC48MTCTL_CESTOPEN_Pos)

SYS_T::IRC48MTCTL: CESTOPEN Mask

Definition at line 10837 of file M471M_R1_S.h.

◆ SYS_IRC48MTCTL_CESTOPEN_Pos

#define SYS_IRC48MTCTL_CESTOPEN_Pos   (8)

SYS_T::IRC48MTCTL: CESTOPEN Position

Definition at line 10836 of file M471M_R1_S.h.

◆ SYS_IRC48MTCTL_FREQSEL_Msk

#define SYS_IRC48MTCTL_FREQSEL_Msk   (0x3ul << SYS_IRC48MTCTL_FREQSEL_Pos)

SYS_T::IRC48MTCTL: FREQSEL Mask

Definition at line 10828 of file M471M_R1_S.h.

◆ SYS_IRC48MTCTL_FREQSEL_Pos

#define SYS_IRC48MTCTL_FREQSEL_Pos   (0)

SYS_T::IRC48MTCTL: FREQSEL Position

Definition at line 10827 of file M471M_R1_S.h.

◆ SYS_IRC48MTCTL_LOOPSEL_Msk

#define SYS_IRC48MTCTL_LOOPSEL_Msk   (0x3ul << SYS_IRC48MTCTL_LOOPSEL_Pos)

SYS_T::IRC48MTCTL: LOOPSEL Mask

Definition at line 10831 of file M471M_R1_S.h.

◆ SYS_IRC48MTCTL_LOOPSEL_Pos

#define SYS_IRC48MTCTL_LOOPSEL_Pos   (4)

SYS_T::IRC48MTCTL: LOOPSEL Position

Definition at line 10830 of file M471M_R1_S.h.

◆ SYS_IRC48MTCTL_REFCKSEL_Msk

#define SYS_IRC48MTCTL_REFCKSEL_Msk   (0x1ul << SYS_IRC48MTCTL_REFCKSEL_Pos)

SYS_T::IRC48MTCTL: REFCKSEL Mask

Definition at line 10840 of file M471M_R1_S.h.

◆ SYS_IRC48MTCTL_REFCKSEL_Pos

#define SYS_IRC48MTCTL_REFCKSEL_Pos   (10)

SYS_T::IRC48MTCTL: REFCKSEL Position

Definition at line 10839 of file M471M_R1_S.h.

◆ SYS_IRC48MTCTL_RETRYCNT_Msk

#define SYS_IRC48MTCTL_RETRYCNT_Msk   (0x3ul << SYS_IRC48MTCTL_RETRYCNT_Pos)

SYS_T::IRC48MTCTL: RETRYCNT Mask

Definition at line 10834 of file M471M_R1_S.h.

◆ SYS_IRC48MTCTL_RETRYCNT_Pos

#define SYS_IRC48MTCTL_RETRYCNT_Pos   (6)

SYS_T::IRC48MTCTL: RETRYCNT Position

Definition at line 10833 of file M471M_R1_S.h.

◆ SYS_IRC48MTIEN_CLKEIEN_Msk

#define SYS_IRC48MTIEN_CLKEIEN_Msk   (0x1ul << SYS_IRC48MTIEN_CLKEIEN_Pos)

SYS_T::IRC48MTIEN: CLKEIEN Mask

Definition at line 10846 of file M471M_R1_S.h.

◆ SYS_IRC48MTIEN_CLKEIEN_Pos

#define SYS_IRC48MTIEN_CLKEIEN_Pos   (2)

SYS_T::IRC48MTIEN: CLKEIEN Position

Definition at line 10845 of file M471M_R1_S.h.

◆ SYS_IRC48MTIEN_TFAILIEN_Msk

#define SYS_IRC48MTIEN_TFAILIEN_Msk   (0x1ul << SYS_IRC48MTIEN_TFAILIEN_Pos)

SYS_T::IRC48MTIEN: TFAILIEN Mask

Definition at line 10843 of file M471M_R1_S.h.

◆ SYS_IRC48MTIEN_TFAILIEN_Pos

#define SYS_IRC48MTIEN_TFAILIEN_Pos   (1)

SYS_T::IRC48MTIEN: TFAILIEN Position

Definition at line 10842 of file M471M_R1_S.h.

◆ SYS_IRC48MTISTS_CLKERRIF_Msk

#define SYS_IRC48MTISTS_CLKERRIF_Msk   (0x1ul << SYS_IRC48MTISTS_CLKERRIF_Pos)

SYS_T::IRC48MTISTS: CLKERRIF Mask

Definition at line 10855 of file M471M_R1_S.h.

◆ SYS_IRC48MTISTS_CLKERRIF_Pos

#define SYS_IRC48MTISTS_CLKERRIF_Pos   (2)

SYS_T::IRC48MTISTS: CLKERRIF Position

Definition at line 10854 of file M471M_R1_S.h.

◆ SYS_IRC48MTISTS_FREQLOCK_Msk

#define SYS_IRC48MTISTS_FREQLOCK_Msk   (0x1ul << SYS_IRC48MTISTS_FREQLOCK_Pos)

SYS_T::IRC48MTISTS: FREQLOCK Mask

Definition at line 10849 of file M471M_R1_S.h.

◆ SYS_IRC48MTISTS_FREQLOCK_Pos

#define SYS_IRC48MTISTS_FREQLOCK_Pos   (0)

SYS_T::IRC48MTISTS: FREQLOCK Position

Definition at line 10848 of file M471M_R1_S.h.

◆ SYS_IRC48MTISTS_TFAILIF_Msk

#define SYS_IRC48MTISTS_TFAILIF_Msk   (0x1ul << SYS_IRC48MTISTS_TFAILIF_Pos)

SYS_T::IRC48MTISTS: TFAILIF Mask

Definition at line 10852 of file M471M_R1_S.h.

◆ SYS_IRC48MTISTS_TFAILIF_Pos

#define SYS_IRC48MTISTS_TFAILIF_Pos   (1)

SYS_T::IRC48MTISTS: TFAILIF Position

Definition at line 10851 of file M471M_R1_S.h.

◆ SYS_IRCTCTL_CESTOPEN_Msk

#define SYS_IRCTCTL_CESTOPEN_Msk   (0x1ul << SYS_IRCTCTL_CESTOPEN_Pos)

SYS_T::IRCTCTL: CESTOPEN Mask

Definition at line 10807 of file M471M_R1_S.h.

◆ SYS_IRCTCTL_CESTOPEN_Pos

#define SYS_IRCTCTL_CESTOPEN_Pos   (8)

SYS_T::IRCTCTL: CESTOPEN Position

Definition at line 10806 of file M471M_R1_S.h.

◆ SYS_IRCTCTL_FREQSEL_Msk

#define SYS_IRCTCTL_FREQSEL_Msk   (0x3ul << SYS_IRCTCTL_FREQSEL_Pos)

SYS_T::IRCTCTL: FREQSEL Mask

Definition at line 10798 of file M471M_R1_S.h.

◆ SYS_IRCTCTL_FREQSEL_Pos

#define SYS_IRCTCTL_FREQSEL_Pos   (0)

SYS_T::IRCTCTL: FREQSEL Position

Definition at line 10797 of file M471M_R1_S.h.

◆ SYS_IRCTCTL_LOOPSEL_Msk

#define SYS_IRCTCTL_LOOPSEL_Msk   (0x3ul << SYS_IRCTCTL_LOOPSEL_Pos)

SYS_T::IRCTCTL: LOOPSEL Mask

Definition at line 10801 of file M471M_R1_S.h.

◆ SYS_IRCTCTL_LOOPSEL_Pos

#define SYS_IRCTCTL_LOOPSEL_Pos   (4)

SYS_T::IRCTCTL: LOOPSEL Position

Definition at line 10800 of file M471M_R1_S.h.

◆ SYS_IRCTCTL_RETRYCNT_Msk

#define SYS_IRCTCTL_RETRYCNT_Msk   (0x3ul << SYS_IRCTCTL_RETRYCNT_Pos)

SYS_T::IRCTCTL: RETRYCNT Mask

Definition at line 10804 of file M471M_R1_S.h.

◆ SYS_IRCTCTL_RETRYCNT_Pos

#define SYS_IRCTCTL_RETRYCNT_Pos   (6)

SYS_T::IRCTCTL: RETRYCNT Position

Definition at line 10803 of file M471M_R1_S.h.

◆ SYS_IRCTIEN_CLKEIEN_Msk

#define SYS_IRCTIEN_CLKEIEN_Msk   (0x1ul << SYS_IRCTIEN_CLKEIEN_Pos)

SYS_T::IRCTIEN: CLKEIEN Mask

Definition at line 10813 of file M471M_R1_S.h.

◆ SYS_IRCTIEN_CLKEIEN_Pos

#define SYS_IRCTIEN_CLKEIEN_Pos   (2)

SYS_T::IRCTIEN: CLKEIEN Position

Definition at line 10812 of file M471M_R1_S.h.

◆ SYS_IRCTIEN_TFAILIEN_Msk

#define SYS_IRCTIEN_TFAILIEN_Msk   (0x1ul << SYS_IRCTIEN_TFAILIEN_Pos)

SYS_T::IRCTIEN: TFAILIEN Mask

Definition at line 10810 of file M471M_R1_S.h.

◆ SYS_IRCTIEN_TFAILIEN_Pos

#define SYS_IRCTIEN_TFAILIEN_Pos   (1)

SYS_T::IRCTIEN: TFAILIEN Position

Definition at line 10809 of file M471M_R1_S.h.

◆ SYS_IRCTISTS_CLKERRIF_Msk

#define SYS_IRCTISTS_CLKERRIF_Msk   (0x1ul << SYS_IRCTISTS_CLKERRIF_Pos)

SYS_T::IRCTISTS: CLKERRIF Mask

Definition at line 10822 of file M471M_R1_S.h.

◆ SYS_IRCTISTS_CLKERRIF_Pos

#define SYS_IRCTISTS_CLKERRIF_Pos   (2)

SYS_T::IRCTISTS: CLKERRIF Position

Definition at line 10821 of file M471M_R1_S.h.

◆ SYS_IRCTISTS_FREQLOCK_Msk

#define SYS_IRCTISTS_FREQLOCK_Msk   (0x1ul << SYS_IRCTISTS_FREQLOCK_Pos)

SYS_T::IRCTISTS: FREQLOCK Mask

Definition at line 10816 of file M471M_R1_S.h.

◆ SYS_IRCTISTS_FREQLOCK_Pos

#define SYS_IRCTISTS_FREQLOCK_Pos   (0)

SYS_T::IRCTISTS: FREQLOCK Position

Definition at line 10815 of file M471M_R1_S.h.

◆ SYS_IRCTISTS_TFAILIF_Msk

#define SYS_IRCTISTS_TFAILIF_Msk   (0x1ul << SYS_IRCTISTS_TFAILIF_Pos)

SYS_T::IRCTISTS: TFAILIF Mask

Definition at line 10819 of file M471M_R1_S.h.

◆ SYS_IRCTISTS_TFAILIF_Pos

#define SYS_IRCTISTS_TFAILIF_Pos   (1)

SYS_T::IRCTISTS: TFAILIF Position

Definition at line 10818 of file M471M_R1_S.h.

◆ SYS_IVSCTL_VBATUGEN_Msk

#define SYS_IVSCTL_VBATUGEN_Msk   (0x1ul << SYS_IVSCTL_VBATUGEN_Pos)

SYS_T::IVSCTL: VBATUGEN Mask

Definition at line 10486 of file M471M_R1_S.h.

◆ SYS_IVSCTL_VBATUGEN_Pos

#define SYS_IVSCTL_VBATUGEN_Pos   (1)

SYS_T::IVSCTL: VBATUGEN Position

Definition at line 10485 of file M471M_R1_S.h.

◆ SYS_IVSCTL_VTEMPEN_Msk

#define SYS_IVSCTL_VTEMPEN_Msk   (0x1ul << SYS_IVSCTL_VTEMPEN_Pos)

SYS_T::IVSCTL: VTEMPEN Mask

Definition at line 10483 of file M471M_R1_S.h.

◆ SYS_IVSCTL_VTEMPEN_Pos

#define SYS_IVSCTL_VTEMPEN_Pos   (0)

SYS_T::IVSCTL: VTEMPEN Position

Definition at line 10482 of file M471M_R1_S.h.

◆ SYS_NMIEN_BODOUT_Msk

#define SYS_NMIEN_BODOUT_Msk   (0x1ul << SYS_NMIEN_BODOUT_Pos )

SYS_INT_T::NMIEN: BODOUT Mask

Definition at line 10988 of file M471M_R1_S.h.

◆ SYS_NMIEN_BODOUT_Pos

#define SYS_NMIEN_BODOUT_Pos   (0)
@addtogroup INT_CONST INT Bit Field Definition
Constant Definitions for SYS Controller

SYS_INT_T::NMIEN: BODOUT Position

Definition at line 10987 of file M471M_R1_S.h.

◆ SYS_NMIEN_CLKFAIL_Msk

#define SYS_NMIEN_CLKFAIL_Msk   (0x1ul << SYS_NMIEN_CLKFAIL_Pos )

SYS_INT_T::NMIEN: CLKFAIL Mask

Definition at line 10997 of file M471M_R1_S.h.

◆ SYS_NMIEN_CLKFAIL_Pos

#define SYS_NMIEN_CLKFAIL_Pos   (4)

SYS_INT_T::NMIEN: CLKFAIL Position

Definition at line 10996 of file M471M_R1_S.h.

◆ SYS_NMIEN_EINT0_Msk

#define SYS_NMIEN_EINT0_Msk   (0x1ul << SYS_NMIEN_EINT0_Pos )

SYS_INT_T::NMIEN: EINT0 Mask

Definition at line 11006 of file M471M_R1_S.h.

◆ SYS_NMIEN_EINT0_Pos

#define SYS_NMIEN_EINT0_Pos   (8)

SYS_INT_T::NMIEN: EINT0 Position

Definition at line 11005 of file M471M_R1_S.h.

◆ SYS_NMIEN_EINT1_Msk

#define SYS_NMIEN_EINT1_Msk   (0x1ul << SYS_NMIEN_EINT1_Pos )

SYS_INT_T::NMIEN: EINT1 Mask

Definition at line 11009 of file M471M_R1_S.h.

◆ SYS_NMIEN_EINT1_Pos

#define SYS_NMIEN_EINT1_Pos   (9)

SYS_INT_T::NMIEN: EINT1 Position

Definition at line 11008 of file M471M_R1_S.h.

◆ SYS_NMIEN_EINT2_Msk

#define SYS_NMIEN_EINT2_Msk   (0x1ul << SYS_NMIEN_EINT2_Pos )

SYS_INT_T::NMIEN: EINT2 Mask

Definition at line 11012 of file M471M_R1_S.h.

◆ SYS_NMIEN_EINT2_Pos

#define SYS_NMIEN_EINT2_Pos   (10)

SYS_INT_T::NMIEN: EINT2 Position

Definition at line 11011 of file M471M_R1_S.h.

◆ SYS_NMIEN_EINT3_Msk

#define SYS_NMIEN_EINT3_Msk   (0x1ul << SYS_NMIEN_EINT3_Pos )

SYS_INT_T::NMIEN: EINT3 Mask

Definition at line 11015 of file M471M_R1_S.h.

◆ SYS_NMIEN_EINT3_Pos

#define SYS_NMIEN_EINT3_Pos   (11)

SYS_INT_T::NMIEN: EINT3 Position

Definition at line 11014 of file M471M_R1_S.h.

◆ SYS_NMIEN_EINT4_Msk

#define SYS_NMIEN_EINT4_Msk   (0x1ul << SYS_NMIEN_EINT4_Pos )

SYS_INT_T::NMIEN: EINT4 Mask

Definition at line 11018 of file M471M_R1_S.h.

◆ SYS_NMIEN_EINT4_Pos

#define SYS_NMIEN_EINT4_Pos   (12)

SYS_INT_T::NMIEN: EINT4 Position

Definition at line 11017 of file M471M_R1_S.h.

◆ SYS_NMIEN_EINT5_Msk

#define SYS_NMIEN_EINT5_Msk   (0x1ul << SYS_NMIEN_EINT5_Pos )

SYS_INT_T::NMIEN: EINT5 Mask

Definition at line 11021 of file M471M_R1_S.h.

◆ SYS_NMIEN_EINT5_Pos

#define SYS_NMIEN_EINT5_Pos   (13)

SYS_INT_T::NMIEN: EINT5 Position

Definition at line 11020 of file M471M_R1_S.h.

◆ SYS_NMIEN_IRC_INT_Msk

#define SYS_NMIEN_IRC_INT_Msk   (0x1ul << SYS_NMIEN_IRC_INT_Pos )

SYS_INT_T::NMIEN: IRC_INT Mask

Definition at line 10991 of file M471M_R1_S.h.

◆ SYS_NMIEN_IRC_INT_Pos

#define SYS_NMIEN_IRC_INT_Pos   (1)

SYS_INT_T::NMIEN: IRC_INT Position

Definition at line 10990 of file M471M_R1_S.h.

◆ SYS_NMIEN_PWRWU_INT_Msk

#define SYS_NMIEN_PWRWU_INT_Msk   (0x1ul << SYS_NMIEN_PWRWU_INT_Pos )

SYS_INT_T::NMIEN: PWRWU_INT Mask

Definition at line 10994 of file M471M_R1_S.h.

◆ SYS_NMIEN_PWRWU_INT_Pos

#define SYS_NMIEN_PWRWU_INT_Pos   (2)

SYS_INT_T::NMIEN: PWRWU_INT Position

Definition at line 10993 of file M471M_R1_S.h.

◆ SYS_NMIEN_RTC_INT_Msk

#define SYS_NMIEN_RTC_INT_Msk   (0x1ul << SYS_NMIEN_RTC_INT_Pos )

SYS_INT_T::NMIEN: RTC_INT Mask

Definition at line 11000 of file M471M_R1_S.h.

◆ SYS_NMIEN_RTC_INT_Pos

#define SYS_NMIEN_RTC_INT_Pos   (6)

SYS_INT_T::NMIEN: RTC_INT Position

Definition at line 10999 of file M471M_R1_S.h.

◆ SYS_NMIEN_TAMPER_INT_Msk

#define SYS_NMIEN_TAMPER_INT_Msk   (0x1ul << SYS_NMIEN_TAMPER_INT_Pos )

SYS_INT_T::NMIEN: TAMPER_INT Mask

Definition at line 11003 of file M471M_R1_S.h.

◆ SYS_NMIEN_TAMPER_INT_Pos

#define SYS_NMIEN_TAMPER_INT_Pos   (7)

SYS_INT_T::NMIEN: TAMPER_INT Position

Definition at line 11002 of file M471M_R1_S.h.

◆ SYS_NMIEN_UART0_INT_Msk

#define SYS_NMIEN_UART0_INT_Msk   (0x1ul << SYS_NMIEN_UART0_INT_Pos )

SYS_INT_T::NMIEN: UART0_INT Mask

Definition at line 11024 of file M471M_R1_S.h.

◆ SYS_NMIEN_UART0_INT_Pos

#define SYS_NMIEN_UART0_INT_Pos   (14)

SYS_INT_T::NMIEN: UART0_INT Position

Definition at line 11023 of file M471M_R1_S.h.

◆ SYS_NMIEN_UART1_INT_Msk

#define SYS_NMIEN_UART1_INT_Msk   (0x1ul << SYS_NMIEN_UART1_INT_Pos )

SYS_INT_T::NMIEN: UART1_INT Mask

Definition at line 11027 of file M471M_R1_S.h.

◆ SYS_NMIEN_UART1_INT_Pos

#define SYS_NMIEN_UART1_INT_Pos   (15)

SYS_INT_T::NMIEN: UART1_INT Position

Definition at line 11026 of file M471M_R1_S.h.

◆ SYS_NMISTS_BODOUT_Msk

#define SYS_NMISTS_BODOUT_Msk   (0x1ul << SYS_NMISTS_BODOUT_Pos )

SYS_INT_T::NMISTS: BODOUT Mask

Definition at line 11030 of file M471M_R1_S.h.

◆ SYS_NMISTS_BODOUT_Pos

#define SYS_NMISTS_BODOUT_Pos   (0)

SYS_INT_T::NMISTS: BODOUT Position

Definition at line 11029 of file M471M_R1_S.h.

◆ SYS_NMISTS_CLKFAIL_Msk

#define SYS_NMISTS_CLKFAIL_Msk   (0x1ul << SYS_NMISTS_CLKFAIL_Pos )

SYS_INT_T::NMISTS: CLKFAIL Mask

Definition at line 11039 of file M471M_R1_S.h.

◆ SYS_NMISTS_CLKFAIL_Pos

#define SYS_NMISTS_CLKFAIL_Pos   (4)

SYS_INT_T::NMISTS: CLKFAIL Position

Definition at line 11038 of file M471M_R1_S.h.

◆ SYS_NMISTS_EINT0_Msk

#define SYS_NMISTS_EINT0_Msk   (0x1ul << SYS_NMISTS_EINT0_Pos )

SYS_INT_T::NMISTS: EINT0 Mask

Definition at line 11048 of file M471M_R1_S.h.

◆ SYS_NMISTS_EINT0_Pos

#define SYS_NMISTS_EINT0_Pos   (8)

SYS_INT_T::NMISTS: EINT0 Position

Definition at line 11047 of file M471M_R1_S.h.

◆ SYS_NMISTS_EINT1_Msk

#define SYS_NMISTS_EINT1_Msk   (0x1ul << SYS_NMISTS_EINT1_Pos )

SYS_INT_T::NMISTS: EINT1 Mask

Definition at line 11051 of file M471M_R1_S.h.

◆ SYS_NMISTS_EINT1_Pos

#define SYS_NMISTS_EINT1_Pos   (9)

SYS_INT_T::NMISTS: EINT1 Position

Definition at line 11050 of file M471M_R1_S.h.

◆ SYS_NMISTS_EINT2_Msk

#define SYS_NMISTS_EINT2_Msk   (0x1ul << SYS_NMISTS_EINT2_Pos )

SYS_INT_T::NMISTS: EINT2 Mask

Definition at line 11054 of file M471M_R1_S.h.

◆ SYS_NMISTS_EINT2_Pos

#define SYS_NMISTS_EINT2_Pos   (10)

SYS_INT_T::NMISTS: EINT2 Position

Definition at line 11053 of file M471M_R1_S.h.

◆ SYS_NMISTS_EINT3_Msk

#define SYS_NMISTS_EINT3_Msk   (0x1ul << SYS_NMISTS_EINT3_Pos )

SYS_INT_T::NMISTS: EINT3 Mask

Definition at line 11057 of file M471M_R1_S.h.

◆ SYS_NMISTS_EINT3_Pos

#define SYS_NMISTS_EINT3_Pos   (11)

SYS_INT_T::NMISTS: EINT3 Position

Definition at line 11056 of file M471M_R1_S.h.

◆ SYS_NMISTS_EINT4_Msk

#define SYS_NMISTS_EINT4_Msk   (0x1ul << SYS_NMISTS_EINT4_Pos )

SYS_INT_T::NMISTS: EINT4 Mask

Definition at line 11060 of file M471M_R1_S.h.

◆ SYS_NMISTS_EINT4_Pos

#define SYS_NMISTS_EINT4_Pos   (12)

SYS_INT_T::NMISTS: EINT4 Position

Definition at line 11059 of file M471M_R1_S.h.

◆ SYS_NMISTS_EINT5_Msk

#define SYS_NMISTS_EINT5_Msk   (0x1ul << SYS_NMISTS_EINT5_Pos )

SYS_INT_T::NMISTS: EINT5 Mask

Definition at line 11063 of file M471M_R1_S.h.

◆ SYS_NMISTS_EINT5_Pos

#define SYS_NMISTS_EINT5_Pos   (13)

SYS_INT_T::NMISTS: EINT5 Position

Definition at line 11062 of file M471M_R1_S.h.

◆ SYS_NMISTS_IRC_INT_Msk

#define SYS_NMISTS_IRC_INT_Msk   (0x1ul << SYS_NMISTS_IRC_INT_Pos )

SYS_INT_T::NMISTS: IRC_INT Mask

Definition at line 11033 of file M471M_R1_S.h.

◆ SYS_NMISTS_IRC_INT_Pos

#define SYS_NMISTS_IRC_INT_Pos   (1)

SYS_INT_T::NMISTS: IRC_INT Position

Definition at line 11032 of file M471M_R1_S.h.

◆ SYS_NMISTS_PWRWU_INT_Msk

#define SYS_NMISTS_PWRWU_INT_Msk   (0x1ul << SYS_NMISTS_PWRWU_INT_Pos )

SYS_INT_T::NMISTS: PWRWU_INT Mask

Definition at line 11036 of file M471M_R1_S.h.

◆ SYS_NMISTS_PWRWU_INT_Pos

#define SYS_NMISTS_PWRWU_INT_Pos   (2)

SYS_INT_T::NMISTS: PWRWU_INT Position

Definition at line 11035 of file M471M_R1_S.h.

◆ SYS_NMISTS_RTC_INT_Msk

#define SYS_NMISTS_RTC_INT_Msk   (0x1ul << SYS_NMISTS_RTC_INT_Pos )

SYS_INT_T::NMISTS: RTC_INT Mask

Definition at line 11042 of file M471M_R1_S.h.

◆ SYS_NMISTS_RTC_INT_Pos

#define SYS_NMISTS_RTC_INT_Pos   (6)

SYS_INT_T::NMISTS: RTC_INT Position

Definition at line 11041 of file M471M_R1_S.h.

◆ SYS_NMISTS_TAMPER_INT_Msk

#define SYS_NMISTS_TAMPER_INT_Msk   (0x1ul << SYS_NMISTS_TAMPER_INT_Pos )

SYS_INT_T::NMISTS: TAMPER_INT Mask

Definition at line 11045 of file M471M_R1_S.h.

◆ SYS_NMISTS_TAMPER_INT_Pos

#define SYS_NMISTS_TAMPER_INT_Pos   (7)

SYS_INT_T::NMISTS: TAMPER_INT Position

Definition at line 11044 of file M471M_R1_S.h.

◆ SYS_NMISTS_UART0_INT_Msk

#define SYS_NMISTS_UART0_INT_Msk   (0x1ul << SYS_NMISTS_UART0_INT_Pos )

SYS_INT_T::NMISTS: UART0_INT Mask

Definition at line 11066 of file M471M_R1_S.h.

◆ SYS_NMISTS_UART0_INT_Pos

#define SYS_NMISTS_UART0_INT_Pos   (14)

SYS_INT_T::NMISTS: UART0_INT Position

Definition at line 11065 of file M471M_R1_S.h.

◆ SYS_NMISTS_UART1_INT_Msk

#define SYS_NMISTS_UART1_INT_Msk   (0x1ul << SYS_NMISTS_UART1_INT_Pos )

SYS_INT_T::NMISTS: UART1_INT Mask

Definition at line 11069 of file M471M_R1_S.h.

◆ SYS_NMISTS_UART1_INT_Pos

#define SYS_NMISTS_UART1_INT_Pos   (15)

SYS_INT_T::NMISTS: UART1_INT Position

Definition at line 11068 of file M471M_R1_S.h.

◆ SYS_PDID_PDID_Msk

#define SYS_PDID_PDID_Msk   (0xfffffffful << SYS_PDID_PDID_Pos)

SYS_T::PDID: PDID Mask

Definition at line 10354 of file M471M_R1_S.h.

◆ SYS_PDID_PDID_Pos

#define SYS_PDID_PDID_Pos   (0)
@addtogroup SYS_CONST SYS Bit Field Definition
Constant Definitions for SYS Controller

SYS_T::PDID: PDID Position

Definition at line 10353 of file M471M_R1_S.h.

◆ SYS_PORCTL_POROFF_Msk

#define SYS_PORCTL_POROFF_Msk   (0xfffful << SYS_PORCTL_POROFF_Pos)

SYS_T::PORCTL: POROFF Mask

Definition at line 10489 of file M471M_R1_S.h.

◆ SYS_PORCTL_POROFF_Pos

#define SYS_PORCTL_POROFF_Pos   (0)

SYS_T::PORCTL: POROFF Position

Definition at line 10488 of file M471M_R1_S.h.

◆ SYS_REGLCTL_REGLCTL_Msk

#define SYS_REGLCTL_REGLCTL_Msk   (0xfful << SYS_REGLCTL_REGLCTL_Pos)

SYS_T::REGLCTL: REGLCTL Mask

Definition at line 10825 of file M471M_R1_S.h.

◆ SYS_REGLCTL_REGLCTL_Pos

#define SYS_REGLCTL_REGLCTL_Pos   (0)

SYS_T::REGLCTL: REGLCTL Position

Definition at line 10824 of file M471M_R1_S.h.

◆ SYS_RSTSTS_BODRF_Msk

#define SYS_RSTSTS_BODRF_Msk   (0x1ul << SYS_RSTSTS_BODRF_Pos)

SYS_T::RSTSTS: BODRF Mask

Definition at line 10369 of file M471M_R1_S.h.

◆ SYS_RSTSTS_BODRF_Pos

#define SYS_RSTSTS_BODRF_Pos   (4)

SYS_T::RSTSTS: BODRF Position

Definition at line 10368 of file M471M_R1_S.h.

◆ SYS_RSTSTS_CPULKRF_Msk

#define SYS_RSTSTS_CPULKRF_Msk   (0x1ul << SYS_RSTSTS_CPULKRF_Pos)

SYS_T::RSTSTS: CPULKRF Mask

Definition at line 10378 of file M471M_R1_S.h.

◆ SYS_RSTSTS_CPULKRF_Pos

#define SYS_RSTSTS_CPULKRF_Pos   (8)

SYS_T::RSTSTS: CPULKRF Position

Definition at line 10377 of file M471M_R1_S.h.

◆ SYS_RSTSTS_CPURF_Msk

#define SYS_RSTSTS_CPURF_Msk   (0x1ul << SYS_RSTSTS_CPURF_Pos)

SYS_T::RSTSTS: CPURF Mask

Definition at line 10375 of file M471M_R1_S.h.

◆ SYS_RSTSTS_CPURF_Pos

#define SYS_RSTSTS_CPURF_Pos   (7)

SYS_T::RSTSTS: CPURF Position

Definition at line 10374 of file M471M_R1_S.h.

◆ SYS_RSTSTS_LVRF_Msk

#define SYS_RSTSTS_LVRF_Msk   (0x1ul << SYS_RSTSTS_LVRF_Pos)

SYS_T::RSTSTS: LVRF Mask

Definition at line 10366 of file M471M_R1_S.h.

◆ SYS_RSTSTS_LVRF_Pos

#define SYS_RSTSTS_LVRF_Pos   (3)

SYS_T::RSTSTS: LVRF Position

Definition at line 10365 of file M471M_R1_S.h.

◆ SYS_RSTSTS_PINRF_Msk

#define SYS_RSTSTS_PINRF_Msk   (0x1ul << SYS_RSTSTS_PINRF_Pos)

SYS_T::RSTSTS: PINRF Mask

Definition at line 10360 of file M471M_R1_S.h.

◆ SYS_RSTSTS_PINRF_Pos

#define SYS_RSTSTS_PINRF_Pos   (1)

SYS_T::RSTSTS: PINRF Position

Definition at line 10359 of file M471M_R1_S.h.

◆ SYS_RSTSTS_PORF_Msk

#define SYS_RSTSTS_PORF_Msk   (0x1ul << SYS_RSTSTS_PORF_Pos)

SYS_T::RSTSTS: PORF Mask

Definition at line 10357 of file M471M_R1_S.h.

◆ SYS_RSTSTS_PORF_Pos

#define SYS_RSTSTS_PORF_Pos   (0)

SYS_T::RSTSTS: PORF Position

Definition at line 10356 of file M471M_R1_S.h.

◆ SYS_RSTSTS_SYSRF_Msk

#define SYS_RSTSTS_SYSRF_Msk   (0x1ul << SYS_RSTSTS_SYSRF_Pos)

SYS_T::RSTSTS: SYSRF Mask

Definition at line 10372 of file M471M_R1_S.h.

◆ SYS_RSTSTS_SYSRF_Pos

#define SYS_RSTSTS_SYSRF_Pos   (5)

SYS_T::RSTSTS: SYSRF Position

Definition at line 10371 of file M471M_R1_S.h.

◆ SYS_RSTSTS_WDTRF_Msk

#define SYS_RSTSTS_WDTRF_Msk   (0x1ul << SYS_RSTSTS_WDTRF_Pos)

SYS_T::RSTSTS: WDTRF Mask

Definition at line 10363 of file M471M_R1_S.h.

◆ SYS_RSTSTS_WDTRF_Pos

#define SYS_RSTSTS_WDTRF_Pos   (2)

SYS_T::RSTSTS: WDTRF Position

Definition at line 10362 of file M471M_R1_S.h.

◆ SYS_SRAM_BISTCTL_CRBIST_Msk

#define SYS_SRAM_BISTCTL_CRBIST_Msk   (0x1ul << SYS_SRAM_BISTCTL_CRBIST_Pos)

SYS_T::SRAM_BISTCTL: CRBIST Mask

Definition at line 10768 of file M471M_R1_S.h.

◆ SYS_SRAM_BISTCTL_CRBIST_Pos

#define SYS_SRAM_BISTCTL_CRBIST_Pos   (2)

SYS_T::SRAM_BISTCTL: CRBIST Position

Definition at line 10767 of file M471M_R1_S.h.

◆ SYS_SRAM_BISTCTL_SRBIST0_Msk

#define SYS_SRAM_BISTCTL_SRBIST0_Msk   (0x1ul << SYS_SRAM_BISTCTL_SRBIST0_Pos)

SYS_T::SRAM_BISTCTL: SRBIST0 Mask

Definition at line 10762 of file M471M_R1_S.h.

◆ SYS_SRAM_BISTCTL_SRBIST0_Pos

#define SYS_SRAM_BISTCTL_SRBIST0_Pos   (0)

SYS_T::SRAM_BISTCTL: SRBIST0 Position

Definition at line 10761 of file M471M_R1_S.h.

◆ SYS_SRAM_BISTCTL_SRBIST1_Msk

#define SYS_SRAM_BISTCTL_SRBIST1_Msk   (0x1ul << SYS_SRAM_BISTCTL_SRBIST1_Pos)

SYS_T::SRAM_BISTCTL: SRBIST1 Mask

Definition at line 10765 of file M471M_R1_S.h.

◆ SYS_SRAM_BISTCTL_SRBIST1_Pos

#define SYS_SRAM_BISTCTL_SRBIST1_Pos   (1)

SYS_T::SRAM_BISTCTL: SRBIST1 Position

Definition at line 10764 of file M471M_R1_S.h.

◆ SYS_SRAM_BISTCTL_USBBIST_Msk

#define SYS_SRAM_BISTCTL_USBBIST_Msk   (0x1ul << SYS_SRAM_BISTCTL_USBBIST_Pos)

SYS_T::SRAM_BISTCTL: USBBIST Mask

Definition at line 10771 of file M471M_R1_S.h.

◆ SYS_SRAM_BISTCTL_USBBIST_Pos

#define SYS_SRAM_BISTCTL_USBBIST_Pos   (4)

SYS_T::SRAM_BISTCTL: USBBIST Position

Definition at line 10770 of file M471M_R1_S.h.

◆ SYS_SRAM_BISTSTS_CRBEND_Msk

#define SYS_SRAM_BISTSTS_CRBEND_Msk   (0x1ul << SYS_SRAM_BISTSTS_CRBEND_Pos)

SYS_T::SRAM_BISTSTS: CRBEND Mask

Definition at line 10792 of file M471M_R1_S.h.

◆ SYS_SRAM_BISTSTS_CRBEND_Pos

#define SYS_SRAM_BISTSTS_CRBEND_Pos   (18)

SYS_T::SRAM_BISTSTS: CRBEND Position

Definition at line 10791 of file M471M_R1_S.h.

◆ SYS_SRAM_BISTSTS_CRBISTEF_Msk

#define SYS_SRAM_BISTSTS_CRBISTEF_Msk   (0x1ul << SYS_SRAM_BISTSTS_CRBISTEF_Pos)

SYS_T::SRAM_BISTSTS: CRBISTEF Mask

Definition at line 10780 of file M471M_R1_S.h.

◆ SYS_SRAM_BISTSTS_CRBISTEF_Pos

#define SYS_SRAM_BISTSTS_CRBISTEF_Pos   (2)

SYS_T::SRAM_BISTSTS: CRBISTEF Position

Definition at line 10779 of file M471M_R1_S.h.

◆ SYS_SRAM_BISTSTS_SRBEND0_Msk

#define SYS_SRAM_BISTSTS_SRBEND0_Msk   (0x1ul << SYS_SRAM_BISTSTS_SRBEND0_Pos)

SYS_T::SRAM_BISTSTS: SRBEND0 Mask

Definition at line 10786 of file M471M_R1_S.h.

◆ SYS_SRAM_BISTSTS_SRBEND0_Pos

#define SYS_SRAM_BISTSTS_SRBEND0_Pos   (16)

SYS_T::SRAM_BISTSTS: SRBEND0 Position

Definition at line 10785 of file M471M_R1_S.h.

◆ SYS_SRAM_BISTSTS_SRBEND1_Msk

#define SYS_SRAM_BISTSTS_SRBEND1_Msk   (0x1ul << SYS_SRAM_BISTSTS_SRBEND1_Pos)

SYS_T::SRAM_BISTSTS: SRBEND1 Mask

Definition at line 10789 of file M471M_R1_S.h.

◆ SYS_SRAM_BISTSTS_SRBEND1_Pos

#define SYS_SRAM_BISTSTS_SRBEND1_Pos   (17)

SYS_T::SRAM_BISTSTS: SRBEND1 Position

Definition at line 10788 of file M471M_R1_S.h.

◆ SYS_SRAM_BISTSTS_SRBISTEF0_Msk

#define SYS_SRAM_BISTSTS_SRBISTEF0_Msk   (0x1ul << SYS_SRAM_BISTSTS_SRBISTEF0_Pos)

SYS_T::SRAM_BISTSTS: SRBISTEF0 Mask

Definition at line 10774 of file M471M_R1_S.h.

◆ SYS_SRAM_BISTSTS_SRBISTEF0_Pos

#define SYS_SRAM_BISTSTS_SRBISTEF0_Pos   (0)

SYS_T::SRAM_BISTSTS: SRBISTEF0 Position

Definition at line 10773 of file M471M_R1_S.h.

◆ SYS_SRAM_BISTSTS_SRBISTEF1_Msk

#define SYS_SRAM_BISTSTS_SRBISTEF1_Msk   (0x1ul << SYS_SRAM_BISTSTS_SRBISTEF1_Pos)

SYS_T::SRAM_BISTSTS: SRBISTEF1 Mask

Definition at line 10777 of file M471M_R1_S.h.

◆ SYS_SRAM_BISTSTS_SRBISTEF1_Pos

#define SYS_SRAM_BISTSTS_SRBISTEF1_Pos   (1)

SYS_T::SRAM_BISTSTS: SRBISTEF1 Position

Definition at line 10776 of file M471M_R1_S.h.

◆ SYS_SRAM_BISTSTS_USBBEF_Msk

#define SYS_SRAM_BISTSTS_USBBEF_Msk   (0x1ul << SYS_SRAM_BISTSTS_USBBEF_Pos)

SYS_T::SRAM_BISTSTS: USBBEF Mask

Definition at line 10783 of file M471M_R1_S.h.

◆ SYS_SRAM_BISTSTS_USBBEF_Pos

#define SYS_SRAM_BISTSTS_USBBEF_Pos   (4)

SYS_T::SRAM_BISTSTS: USBBEF Position

Definition at line 10782 of file M471M_R1_S.h.

◆ SYS_SRAM_BISTSTS_USBBEND_Msk

#define SYS_SRAM_BISTSTS_USBBEND_Msk   (0x1ul << SYS_SRAM_BISTSTS_USBBEND_Pos)

SYS_T::SRAM_BISTSTS: USBBEND Mask

Definition at line 10795 of file M471M_R1_S.h.

◆ SYS_SRAM_BISTSTS_USBBEND_Pos

#define SYS_SRAM_BISTSTS_USBBEND_Pos   (20)

SYS_T::SRAM_BISTSTS: USBBEND Position

Definition at line 10794 of file M471M_R1_S.h.

◆ SYS_USBPHY_LDO33EN_Msk

#define SYS_USBPHY_LDO33EN_Msk   (0x1ul << SYS_USBPHY_LDO33EN_Pos)

SYS_T::USBPHY: LDO33EN Mask

Definition at line 10498 of file M471M_R1_S.h.

◆ SYS_USBPHY_LDO33EN_Pos

#define SYS_USBPHY_LDO33EN_Pos   (8)

SYS_T::USBPHY: LDO33EN Position

Definition at line 10497 of file M471M_R1_S.h.

◆ SYS_USBPHY_USBROLE_Msk

#define SYS_USBPHY_USBROLE_Msk   (0x3ul << SYS_USBPHY_USBROLE_Pos)

SYS_T::USBPHY: USBROLE Mask

Definition at line 10495 of file M471M_R1_S.h.

◆ SYS_USBPHY_USBROLE_Pos

#define SYS_USBPHY_USBROLE_Pos   (0)

SYS_T::USBPHY: USBROLE Position

Definition at line 10494 of file M471M_R1_S.h.

◆ SYS_VREFCTL_VREFCTL_Msk

#define SYS_VREFCTL_VREFCTL_Msk   (0x1ful << SYS_VREFCTL_VREFCTL_Pos)

SYS_T::VREFCTL: VREFCTL Mask

Definition at line 10492 of file M471M_R1_S.h.

◆ SYS_VREFCTL_VREFCTL_Pos

#define SYS_VREFCTL_VREFCTL_Pos   (0)

SYS_T::VREFCTL: VREFCTL Position

Definition at line 10491 of file M471M_R1_S.h.

◆ TIMER_CAP_CAPDAT_Msk

#define TIMER_CAP_CAPDAT_Msk   (0xfffffful << TIMER_CAP_CAPDAT_Pos)

TIMER_T::CAP: CAPDAT Mask

Definition at line 11324 of file M471M_R1_S.h.

◆ TIMER_CAP_CAPDAT_Pos

#define TIMER_CAP_CAPDAT_Pos   (0)

TIMER_T::CAP: CAPDAT Position

Definition at line 11323 of file M471M_R1_S.h.

◆ TIMER_CMP_CMPDAT_Msk

#define TIMER_CMP_CMPDAT_Msk   (0xfffffful << TIMER_CMP_CMPDAT_Pos)

TIMER_T::CMP: CMPDAT Mask

Definition at line 11312 of file M471M_R1_S.h.

◆ TIMER_CMP_CMPDAT_Pos

#define TIMER_CMP_CMPDAT_Pos   (0)

TIMER_T::CMP: CMPDAT Position

Definition at line 11311 of file M471M_R1_S.h.

◆ TIMER_CNT_CNT_Msk

#define TIMER_CNT_CNT_Msk   (0xfffffful << TIMER_CNT_CNT_Pos)

TIMER_T::CNT: CNT Mask

Definition at line 11321 of file M471M_R1_S.h.

◆ TIMER_CNT_CNT_Pos

#define TIMER_CNT_CNT_Pos   (0)

TIMER_T::CNT: CNT Position

Definition at line 11320 of file M471M_R1_S.h.

◆ TIMER_CTL_ACTSTS_Msk

#define TIMER_CTL_ACTSTS_Msk   (0x1ul << TIMER_CTL_ACTSTS_Pos)

TIMER_T::CTL: ACTSTS Mask

Definition at line 11294 of file M471M_R1_S.h.

◆ TIMER_CTL_ACTSTS_Pos

#define TIMER_CTL_ACTSTS_Pos   (25)

TIMER_T::CTL: ACTSTS Position

Definition at line 11293 of file M471M_R1_S.h.

◆ TIMER_CTL_CNTEN_Msk

#define TIMER_CTL_CNTEN_Msk   (0x1ul << TIMER_CTL_CNTEN_Pos)

TIMER_T::CTL: CNTEN Mask

Definition at line 11306 of file M471M_R1_S.h.

◆ TIMER_CTL_CNTEN_Pos

#define TIMER_CTL_CNTEN_Pos   (30)

TIMER_T::CTL: CNTEN Position

Definition at line 11305 of file M471M_R1_S.h.

◆ TIMER_CTL_EXTCNTEN_Msk

#define TIMER_CTL_EXTCNTEN_Msk   (0x1ul << TIMER_CTL_EXTCNTEN_Pos)

TIMER_T::CTL: EXTCNTEN Mask

Definition at line 11291 of file M471M_R1_S.h.

◆ TIMER_CTL_EXTCNTEN_Pos

#define TIMER_CTL_EXTCNTEN_Pos   (24)

TIMER_T::CTL: EXTCNTEN Position

Definition at line 11290 of file M471M_R1_S.h.

◆ TIMER_CTL_ICEDEBUG_Msk

#define TIMER_CTL_ICEDEBUG_Msk   (0x1ul << TIMER_CTL_ICEDEBUG_Pos)

TIMER_T::CTL: ICEDEBUG Mask

Definition at line 11309 of file M471M_R1_S.h.

◆ TIMER_CTL_ICEDEBUG_Pos

#define TIMER_CTL_ICEDEBUG_Pos   (31)

TIMER_T::CTL: ICEDEBUG Position

Definition at line 11308 of file M471M_R1_S.h.

◆ TIMER_CTL_INTEN_Msk

#define TIMER_CTL_INTEN_Msk   (0x1ul << TIMER_CTL_INTEN_Pos)

TIMER_T::CTL: INTEN Mask

Definition at line 11303 of file M471M_R1_S.h.

◆ TIMER_CTL_INTEN_Pos

#define TIMER_CTL_INTEN_Pos   (29)

TIMER_T::CTL: INTEN Position

Definition at line 11302 of file M471M_R1_S.h.

◆ TIMER_CTL_OPMODE_Msk

#define TIMER_CTL_OPMODE_Msk   (0x3ul << TIMER_CTL_OPMODE_Pos)

TIMER_T::CTL: OPMODE Mask

Definition at line 11300 of file M471M_R1_S.h.

◆ TIMER_CTL_OPMODE_Pos

#define TIMER_CTL_OPMODE_Pos   (27)

TIMER_T::CTL: OPMODE Position

Definition at line 11299 of file M471M_R1_S.h.

◆ TIMER_CTL_PSC_Msk

#define TIMER_CTL_PSC_Msk   (0xfful << TIMER_CTL_PSC_Pos)

TIMER_T::CTL: PSC Mask

Definition at line 11270 of file M471M_R1_S.h.

◆ TIMER_CTL_PSC_Pos

#define TIMER_CTL_PSC_Pos   (0)
@addtogroup TMR_CONST TMR Bit Field Definition
Constant Definitions for TMR Controller

TIMER_T::CTL: PSC Position

Definition at line 11269 of file M471M_R1_S.h.

◆ TIMER_CTL_RSTCNT_Msk

#define TIMER_CTL_RSTCNT_Msk   (0x1ul << TIMER_CTL_RSTCNT_Pos)

TIMER_T::CTL: RSTCNT Mask

Definition at line 11297 of file M471M_R1_S.h.

◆ TIMER_CTL_RSTCNT_Pos

#define TIMER_CTL_RSTCNT_Pos   (26)

TIMER_T::CTL: RSTCNT Position

Definition at line 11296 of file M471M_R1_S.h.

◆ TIMER_CTL_TGLPINSEL_Msk

#define TIMER_CTL_TGLPINSEL_Msk   (0x1ul << TIMER_CTL_TGLPINSEL_Pos)

TIMER_T::CTL: TGLPINSEL Mask

Definition at line 11285 of file M471M_R1_S.h.

◆ TIMER_CTL_TGLPINSEL_Pos

#define TIMER_CTL_TGLPINSEL_Pos   (22)

TIMER_T::CTL: TGLPINSEL Position

Definition at line 11284 of file M471M_R1_S.h.

◆ TIMER_CTL_TRGEADC_Msk

#define TIMER_CTL_TRGEADC_Msk   (0x1ul << TIMER_CTL_TRGEADC_Pos)

TIMER_T::CTL: TRGEADC Mask

Definition at line 11282 of file M471M_R1_S.h.

◆ TIMER_CTL_TRGEADC_Pos

#define TIMER_CTL_TRGEADC_Pos   (21)

TIMER_T::CTL: TRGEADC Position

Definition at line 11281 of file M471M_R1_S.h.

◆ TIMER_CTL_TRGPWM_Msk

#define TIMER_CTL_TRGPWM_Msk   (0x1ul << TIMER_CTL_TRGPWM_Pos)

TIMER_T::CTL: TRGPWM Mask

Definition at line 11279 of file M471M_R1_S.h.

◆ TIMER_CTL_TRGPWM_Pos

#define TIMER_CTL_TRGPWM_Pos   (19)

TIMER_T::CTL: TRGPWM Position

Definition at line 11278 of file M471M_R1_S.h.

◆ TIMER_CTL_TRGSSEL_Msk

#define TIMER_CTL_TRGSSEL_Msk   (0x1ul << TIMER_CTL_TRGSSEL_Pos)

TIMER_T::CTL: TRGSSEL Mask

Definition at line 11276 of file M471M_R1_S.h.

◆ TIMER_CTL_TRGSSEL_Pos

#define TIMER_CTL_TRGSSEL_Pos   (18)

TIMER_T::CTL: TRGSSEL Position

Definition at line 11275 of file M471M_R1_S.h.

◆ TIMER_CTL_WKEN_Msk

#define TIMER_CTL_WKEN_Msk   (0x1ul << TIMER_CTL_WKEN_Pos)

TIMER_T::CTL: WKEN Mask

Definition at line 11288 of file M471M_R1_S.h.

◆ TIMER_CTL_WKEN_Pos

#define TIMER_CTL_WKEN_Pos   (23)

TIMER_T::CTL: WKEN Position

Definition at line 11287 of file M471M_R1_S.h.

◆ TIMER_CTL_WKTKEN_Msk

#define TIMER_CTL_WKTKEN_Msk   (0x1ul << TIMER_CTL_WKTKEN_Pos)

TIMER_T::CTL: WKTKEN Mask

Definition at line 11273 of file M471M_R1_S.h.

◆ TIMER_CTL_WKTKEN_Pos

#define TIMER_CTL_WKTKEN_Pos   (17)

TIMER_T::CTL: WKTKEN Position

Definition at line 11272 of file M471M_R1_S.h.

◆ TIMER_EINTSTS_CAPIF_Msk

#define TIMER_EINTSTS_CAPIF_Msk   (0x1ul << TIMER_EINTSTS_CAPIF_Pos)

TIMER_T::EINTSTS: CAPIF Mask

Definition at line 11348 of file M471M_R1_S.h.

◆ TIMER_EINTSTS_CAPIF_Pos

#define TIMER_EINTSTS_CAPIF_Pos   (0)

TIMER_T::EINTSTS: CAPIF Position

Definition at line 11347 of file M471M_R1_S.h.

◆ TIMER_EXTCTL_CAPDBEN_Msk

#define TIMER_EXTCTL_CAPDBEN_Msk   (0x1ul << TIMER_EXTCTL_CAPDBEN_Pos)

TIMER_T::EXTCTL: CAPDBEN Mask

Definition at line 11342 of file M471M_R1_S.h.

◆ TIMER_EXTCTL_CAPDBEN_Pos

#define TIMER_EXTCTL_CAPDBEN_Pos   (6)

TIMER_T::EXTCTL: CAPDBEN Position

Definition at line 11341 of file M471M_R1_S.h.

◆ TIMER_EXTCTL_CAPEDGE_Msk

#define TIMER_EXTCTL_CAPEDGE_Msk   (0x3ul << TIMER_EXTCTL_CAPEDGE_Pos)

TIMER_T::EXTCTL: CAPEDGE Mask

Definition at line 11330 of file M471M_R1_S.h.

◆ TIMER_EXTCTL_CAPEDGE_Pos

#define TIMER_EXTCTL_CAPEDGE_Pos   (1)

TIMER_T::EXTCTL: CAPEDGE Position

Definition at line 11329 of file M471M_R1_S.h.

◆ TIMER_EXTCTL_CAPEN_Msk

#define TIMER_EXTCTL_CAPEN_Msk   (0x1ul << TIMER_EXTCTL_CAPEN_Pos)

TIMER_T::EXTCTL: CAPEN Mask

Definition at line 11333 of file M471M_R1_S.h.

◆ TIMER_EXTCTL_CAPEN_Pos

#define TIMER_EXTCTL_CAPEN_Pos   (3)

TIMER_T::EXTCTL: CAPEN Position

Definition at line 11332 of file M471M_R1_S.h.

◆ TIMER_EXTCTL_CAPFUNCS_Msk

#define TIMER_EXTCTL_CAPFUNCS_Msk   (0x1ul << TIMER_EXTCTL_CAPFUNCS_Pos)

TIMER_T::EXTCTL: CAPFUNCS Mask

Definition at line 11336 of file M471M_R1_S.h.

◆ TIMER_EXTCTL_CAPFUNCS_Pos

#define TIMER_EXTCTL_CAPFUNCS_Pos   (4)

TIMER_T::EXTCTL: CAPFUNCS Position

Definition at line 11335 of file M471M_R1_S.h.

◆ TIMER_EXTCTL_CAPIEN_Msk

#define TIMER_EXTCTL_CAPIEN_Msk   (0x1ul << TIMER_EXTCTL_CAPIEN_Pos)

TIMER_T::EXTCTL: CAPIEN Mask

Definition at line 11339 of file M471M_R1_S.h.

◆ TIMER_EXTCTL_CAPIEN_Pos

#define TIMER_EXTCTL_CAPIEN_Pos   (5)

TIMER_T::EXTCTL: CAPIEN Position

Definition at line 11338 of file M471M_R1_S.h.

◆ TIMER_EXTCTL_CNTDBEN_Msk

#define TIMER_EXTCTL_CNTDBEN_Msk   (0x1ul << TIMER_EXTCTL_CNTDBEN_Pos)

TIMER_T::EXTCTL: CNTDBEN Mask

Definition at line 11345 of file M471M_R1_S.h.

◆ TIMER_EXTCTL_CNTDBEN_Pos

#define TIMER_EXTCTL_CNTDBEN_Pos   (7)

TIMER_T::EXTCTL: CNTDBEN Position

Definition at line 11344 of file M471M_R1_S.h.

◆ TIMER_EXTCTL_CNTPHASE_Msk

#define TIMER_EXTCTL_CNTPHASE_Msk   (0x1ul << TIMER_EXTCTL_CNTPHASE_Pos)

TIMER_T::EXTCTL: CNTPHASE Mask

Definition at line 11327 of file M471M_R1_S.h.

◆ TIMER_EXTCTL_CNTPHASE_Pos

#define TIMER_EXTCTL_CNTPHASE_Pos   (0)

TIMER_T::EXTCTL: CNTPHASE Position

Definition at line 11326 of file M471M_R1_S.h.

◆ TIMER_INTSTS_TIF_Msk

#define TIMER_INTSTS_TIF_Msk   (0x1ul << TIMER_INTSTS_TIF_Pos)

TIMER_T::INTSTS: TIF Mask

Definition at line 11315 of file M471M_R1_S.h.

◆ TIMER_INTSTS_TIF_Pos

#define TIMER_INTSTS_TIF_Pos   (0)

TIMER_T::INTSTS: TIF Position

Definition at line 11314 of file M471M_R1_S.h.

◆ TIMER_INTSTS_TWKF_Msk

#define TIMER_INTSTS_TWKF_Msk   (0x1ul << TIMER_INTSTS_TWKF_Pos)

TIMER_T::INTSTS: TWKF Mask

Definition at line 11318 of file M471M_R1_S.h.

◆ TIMER_INTSTS_TWKF_Pos

#define TIMER_INTSTS_TWKF_Pos   (1)

TIMER_T::INTSTS: TWKF Position

Definition at line 11317 of file M471M_R1_S.h.

◆ UART_ALTCTL_ABRDBITS_Msk

#define UART_ALTCTL_ABRDBITS_Msk   (0x3ul << UART_ALTCTL_ABRDBITS_Pos)

UART_T::ALTCTL: ABRDBITS Mask

Definition at line 12179 of file M471M_R1_S.h.

◆ UART_ALTCTL_ABRDBITS_Pos

#define UART_ALTCTL_ABRDBITS_Pos   (19)

UART_T::ALTCTL: ABRDBITS Position

Definition at line 12178 of file M471M_R1_S.h.

◆ UART_ALTCTL_ABRDEN_Msk

#define UART_ALTCTL_ABRDEN_Msk   (0x1ul << UART_ALTCTL_ABRDEN_Pos)

UART_T::ALTCTL: ABRDEN Mask

Definition at line 12176 of file M471M_R1_S.h.

◆ UART_ALTCTL_ABRDEN_Pos

#define UART_ALTCTL_ABRDEN_Pos   (18)

UART_T::ALTCTL: ABRDEN Position

Definition at line 12175 of file M471M_R1_S.h.

◆ UART_ALTCTL_ABRIF_Msk

#define UART_ALTCTL_ABRIF_Msk   (0x1ul << UART_ALTCTL_ABRIF_Pos)

UART_T::ALTCTL: ABRIF Mask

Definition at line 12173 of file M471M_R1_S.h.

◆ UART_ALTCTL_ABRIF_Pos

#define UART_ALTCTL_ABRIF_Pos   (17)

UART_T::ALTCTL: ABRIF Position

Definition at line 12172 of file M471M_R1_S.h.

◆ UART_ALTCTL_ADDRDEN_Msk

#define UART_ALTCTL_ADDRDEN_Msk   (0x1ul << UART_ALTCTL_ADDRDEN_Pos)

UART_T::ALTCTL: ADDRDEN Mask

Definition at line 12170 of file M471M_R1_S.h.

◆ UART_ALTCTL_ADDRDEN_Pos

#define UART_ALTCTL_ADDRDEN_Pos   (15)

UART_T::ALTCTL: ADDRDEN Position

Definition at line 12169 of file M471M_R1_S.h.

◆ UART_ALTCTL_ADDRMV_Msk

#define UART_ALTCTL_ADDRMV_Msk   (0xfful << UART_ALTCTL_ADDRMV_Pos)

UART_T::ALTCTL: ADDRMV Mask

Definition at line 12182 of file M471M_R1_S.h.

◆ UART_ALTCTL_ADDRMV_Pos

#define UART_ALTCTL_ADDRMV_Pos   (24)

UART_T::ALTCTL: ADDRMV Position

Definition at line 12181 of file M471M_R1_S.h.

◆ UART_ALTCTL_BRKFL_Msk

#define UART_ALTCTL_BRKFL_Msk   (0xful << UART_ALTCTL_BRKFL_Pos)

UART_T::ALTCTL: BRKFL Mask

Definition at line 12152 of file M471M_R1_S.h.

◆ UART_ALTCTL_BRKFL_Pos

#define UART_ALTCTL_BRKFL_Pos   (0)

UART_T::ALTCTL: BRKFL Position

Definition at line 12151 of file M471M_R1_S.h.

◆ UART_ALTCTL_LINRXEN_Msk

#define UART_ALTCTL_LINRXEN_Msk   (0x1ul << UART_ALTCTL_LINRXEN_Pos)

UART_T::ALTCTL: LINRXEN Mask

Definition at line 12155 of file M471M_R1_S.h.

◆ UART_ALTCTL_LINRXEN_Pos

#define UART_ALTCTL_LINRXEN_Pos   (6)

UART_T::ALTCTL: LINRXEN Position

Definition at line 12154 of file M471M_R1_S.h.

◆ UART_ALTCTL_LINTXEN_Msk

#define UART_ALTCTL_LINTXEN_Msk   (0x1ul << UART_ALTCTL_LINTXEN_Pos)

UART_T::ALTCTL: LINTXEN Mask

Definition at line 12158 of file M471M_R1_S.h.

◆ UART_ALTCTL_LINTXEN_Pos

#define UART_ALTCTL_LINTXEN_Pos   (7)

UART_T::ALTCTL: LINTXEN Position

Definition at line 12157 of file M471M_R1_S.h.

◆ UART_ALTCTL_RS485AAD_Msk

#define UART_ALTCTL_RS485AAD_Msk   (0x1ul << UART_ALTCTL_RS485AAD_Pos)

UART_T::ALTCTL: RS485AAD Mask

Definition at line 12164 of file M471M_R1_S.h.

◆ UART_ALTCTL_RS485AAD_Pos

#define UART_ALTCTL_RS485AAD_Pos   (9)

UART_T::ALTCTL: RS485AAD Position

Definition at line 12163 of file M471M_R1_S.h.

◆ UART_ALTCTL_RS485AUD_Msk

#define UART_ALTCTL_RS485AUD_Msk   (0x1ul << UART_ALTCTL_RS485AUD_Pos)

UART_T::ALTCTL: RS485AUD Mask

Definition at line 12167 of file M471M_R1_S.h.

◆ UART_ALTCTL_RS485AUD_Pos

#define UART_ALTCTL_RS485AUD_Pos   (10)

UART_T::ALTCTL: RS485AUD Position

Definition at line 12166 of file M471M_R1_S.h.

◆ UART_ALTCTL_RS485NMM_Msk

#define UART_ALTCTL_RS485NMM_Msk   (0x1ul << UART_ALTCTL_RS485NMM_Pos)

UART_T::ALTCTL: RS485NMM Mask

Definition at line 12161 of file M471M_R1_S.h.

◆ UART_ALTCTL_RS485NMM_Pos

#define UART_ALTCTL_RS485NMM_Pos   (8)

UART_T::ALTCTL: RS485NMM Position

Definition at line 12160 of file M471M_R1_S.h.

◆ UART_BAUD_BAUDM0_Msk

#define UART_BAUD_BAUDM0_Msk   (0x1ul << UART_BAUD_BAUDM0_Pos)

UART_T::BAUD: BAUDM0 Mask

Definition at line 12137 of file M471M_R1_S.h.

◆ UART_BAUD_BAUDM0_Pos

#define UART_BAUD_BAUDM0_Pos   (28)

UART_T::BAUD: BAUDM0 Position

Definition at line 12136 of file M471M_R1_S.h.

◆ UART_BAUD_BAUDM1_Msk

#define UART_BAUD_BAUDM1_Msk   (0x1ul << UART_BAUD_BAUDM1_Pos)

UART_T::BAUD: BAUDM1 Mask

Definition at line 12140 of file M471M_R1_S.h.

◆ UART_BAUD_BAUDM1_Pos

#define UART_BAUD_BAUDM1_Pos   (29)

UART_T::BAUD: BAUDM1 Position

Definition at line 12139 of file M471M_R1_S.h.

◆ UART_BAUD_BRD_Msk

#define UART_BAUD_BRD_Msk   (0xfffful << UART_BAUD_BRD_Pos)

UART_T::BAUD: BRD Mask

Definition at line 12131 of file M471M_R1_S.h.

◆ UART_BAUD_BRD_Pos

#define UART_BAUD_BRD_Pos   (0)

UART_T::BAUD: BRD Position

Definition at line 12130 of file M471M_R1_S.h.

◆ UART_BAUD_EDIVM1_Msk

#define UART_BAUD_EDIVM1_Msk   (0xful << UART_BAUD_EDIVM1_Pos)

UART_T::BAUD: EDIVM1 Mask

Definition at line 12134 of file M471M_R1_S.h.

◆ UART_BAUD_EDIVM1_Pos

#define UART_BAUD_EDIVM1_Pos   (24)

UART_T::BAUD: EDIVM1 Position

Definition at line 12133 of file M471M_R1_S.h.

◆ UART_DAT_DAT_Msk

#define UART_DAT_DAT_Msk   (0xfful << UART_DAT_DAT_Pos)

UART_T::DAT: DAT Mask

Definition at line 11906 of file M471M_R1_S.h.

◆ UART_DAT_DAT_Pos

#define UART_DAT_DAT_Pos   (0)
@addtogroup UART_CONST UART Bit Field Definition
Constant Definitions for UART Controller

UART_T::DAT: DAT Position

Definition at line 11905 of file M471M_R1_S.h.

◆ UART_FIFO_RFITL_Msk

#define UART_FIFO_RFITL_Msk   (0xful << UART_FIFO_RFITL_Pos)

UART_T::FIFO: RFITL Mask

Definition at line 11960 of file M471M_R1_S.h.

◆ UART_FIFO_RFITL_Pos

#define UART_FIFO_RFITL_Pos   (4)

UART_T::FIFO: RFITL Position

Definition at line 11959 of file M471M_R1_S.h.

◆ UART_FIFO_RTSTRGLV_Msk

#define UART_FIFO_RTSTRGLV_Msk   (0xful << UART_FIFO_RTSTRGLV_Pos)

UART_T::FIFO: RTSTRGLV Mask

Definition at line 11966 of file M471M_R1_S.h.

◆ UART_FIFO_RTSTRGLV_Pos

#define UART_FIFO_RTSTRGLV_Pos   (16)

UART_T::FIFO: RTSTRGLV Position

Definition at line 11965 of file M471M_R1_S.h.

◆ UART_FIFO_RXOFF_Msk

#define UART_FIFO_RXOFF_Msk   (0x1ul << UART_FIFO_RXOFF_Pos)

UART_T::FIFO: RXOFF Mask

Definition at line 11963 of file M471M_R1_S.h.

◆ UART_FIFO_RXOFF_Pos

#define UART_FIFO_RXOFF_Pos   (8)

UART_T::FIFO: RXOFF Position

Definition at line 11962 of file M471M_R1_S.h.

◆ UART_FIFO_RXRST_Msk

#define UART_FIFO_RXRST_Msk   (0x1ul << UART_FIFO_RXRST_Pos)

UART_T::FIFO: RXRST Mask

Definition at line 11954 of file M471M_R1_S.h.

◆ UART_FIFO_RXRST_Pos

#define UART_FIFO_RXRST_Pos   (1)

UART_T::FIFO: RXRST Position

Definition at line 11953 of file M471M_R1_S.h.

◆ UART_FIFO_TXRST_Msk

#define UART_FIFO_TXRST_Msk   (0x1ul << UART_FIFO_TXRST_Pos)

UART_T::FIFO: TXRST Mask

Definition at line 11957 of file M471M_R1_S.h.

◆ UART_FIFO_TXRST_Pos

#define UART_FIFO_TXRST_Pos   (2)

UART_T::FIFO: TXRST Position

Definition at line 11956 of file M471M_R1_S.h.

◆ UART_FIFOSTS_ABRDIF_Msk

#define UART_FIFOSTS_ABRDIF_Msk   (0x1ul << UART_FIFOSTS_ABRDIF_Pos)

UART_T::FIFOSTS: ABRDIF Mask

Definition at line 12008 of file M471M_R1_S.h.

◆ UART_FIFOSTS_ABRDIF_Pos

#define UART_FIFOSTS_ABRDIF_Pos   (1)

UART_T::FIFOSTS: ABRDIF Position

Definition at line 12007 of file M471M_R1_S.h.

◆ UART_FIFOSTS_ABRDTOIF_Msk

#define UART_FIFOSTS_ABRDTOIF_Msk   (0x1ul << UART_FIFOSTS_ABRDTOIF_Pos)

UART_T::FIFOSTS: ABRDTOIF Mask

Definition at line 12011 of file M471M_R1_S.h.

◆ UART_FIFOSTS_ABRDTOIF_Pos

#define UART_FIFOSTS_ABRDTOIF_Pos   (2)

UART_T::FIFOSTS: ABRDTOIF Position

Definition at line 12010 of file M471M_R1_S.h.

◆ UART_FIFOSTS_ADDRDETF_Msk

#define UART_FIFOSTS_ADDRDETF_Msk   (0x1ul << UART_FIFOSTS_ADDRDETF_Pos)

UART_T::FIFOSTS: ADDRDETF Mask

Definition at line 12014 of file M471M_R1_S.h.

◆ UART_FIFOSTS_ADDRDETF_Pos

#define UART_FIFOSTS_ADDRDETF_Pos   (3)

UART_T::FIFOSTS: ADDRDETF Position

Definition at line 12013 of file M471M_R1_S.h.

◆ UART_FIFOSTS_BIF_Msk

#define UART_FIFOSTS_BIF_Msk   (0x1ul << UART_FIFOSTS_BIF_Pos)

UART_T::FIFOSTS: BIF Mask

Definition at line 12023 of file M471M_R1_S.h.

◆ UART_FIFOSTS_BIF_Pos

#define UART_FIFOSTS_BIF_Pos   (6)

UART_T::FIFOSTS: BIF Position

Definition at line 12022 of file M471M_R1_S.h.

◆ UART_FIFOSTS_FEF_Msk

#define UART_FIFOSTS_FEF_Msk   (0x1ul << UART_FIFOSTS_FEF_Pos)

UART_T::FIFOSTS: FEF Mask

Definition at line 12020 of file M471M_R1_S.h.

◆ UART_FIFOSTS_FEF_Pos

#define UART_FIFOSTS_FEF_Pos   (5)

UART_T::FIFOSTS: FEF Position

Definition at line 12019 of file M471M_R1_S.h.

◆ UART_FIFOSTS_PEF_Msk

#define UART_FIFOSTS_PEF_Msk   (0x1ul << UART_FIFOSTS_PEF_Pos)

UART_T::FIFOSTS: PEF Mask

Definition at line 12017 of file M471M_R1_S.h.

◆ UART_FIFOSTS_PEF_Pos

#define UART_FIFOSTS_PEF_Pos   (4)

UART_T::FIFOSTS: PEF Position

Definition at line 12016 of file M471M_R1_S.h.

◆ UART_FIFOSTS_RXEMPTY_Msk

#define UART_FIFOSTS_RXEMPTY_Msk   (0x1ul << UART_FIFOSTS_RXEMPTY_Pos)

UART_T::FIFOSTS: RXEMPTY Mask

Definition at line 12029 of file M471M_R1_S.h.

◆ UART_FIFOSTS_RXEMPTY_Pos

#define UART_FIFOSTS_RXEMPTY_Pos   (14)

UART_T::FIFOSTS: RXEMPTY Position

Definition at line 12028 of file M471M_R1_S.h.

◆ UART_FIFOSTS_RXFULL_Msk

#define UART_FIFOSTS_RXFULL_Msk   (0x1ul << UART_FIFOSTS_RXFULL_Pos)

UART_T::FIFOSTS: RXFULL Mask

Definition at line 12032 of file M471M_R1_S.h.

◆ UART_FIFOSTS_RXFULL_Pos

#define UART_FIFOSTS_RXFULL_Pos   (15)

UART_T::FIFOSTS: RXFULL Position

Definition at line 12031 of file M471M_R1_S.h.

◆ UART_FIFOSTS_RXOVIF_Msk

#define UART_FIFOSTS_RXOVIF_Msk   (0x1ul << UART_FIFOSTS_RXOVIF_Pos)

UART_T::FIFOSTS: RXOVIF Mask

Definition at line 12005 of file M471M_R1_S.h.

◆ UART_FIFOSTS_RXOVIF_Pos

#define UART_FIFOSTS_RXOVIF_Pos   (0)

UART_T::FIFOSTS: RXOVIF Position

Definition at line 12004 of file M471M_R1_S.h.

◆ UART_FIFOSTS_RXPTR_Msk

#define UART_FIFOSTS_RXPTR_Msk   (0x3ful << UART_FIFOSTS_RXPTR_Pos)

UART_T::FIFOSTS: RXPTR Mask

Definition at line 12026 of file M471M_R1_S.h.

◆ UART_FIFOSTS_RXPTR_Pos

#define UART_FIFOSTS_RXPTR_Pos   (8)

UART_T::FIFOSTS: RXPTR Position

Definition at line 12025 of file M471M_R1_S.h.

◆ UART_FIFOSTS_TXEMPTY_Msk

#define UART_FIFOSTS_TXEMPTY_Msk   (0x1ul << UART_FIFOSTS_TXEMPTY_Pos)

UART_T::FIFOSTS: TXEMPTY Mask

Definition at line 12038 of file M471M_R1_S.h.

◆ UART_FIFOSTS_TXEMPTY_Pos

#define UART_FIFOSTS_TXEMPTY_Pos   (22)

UART_T::FIFOSTS: TXEMPTY Position

Definition at line 12037 of file M471M_R1_S.h.

◆ UART_FIFOSTS_TXEMPTYF_Msk

#define UART_FIFOSTS_TXEMPTYF_Msk   (0x1ul << UART_FIFOSTS_TXEMPTYF_Pos)

UART_T::FIFOSTS: TXEMPTYF Mask

Definition at line 12047 of file M471M_R1_S.h.

◆ UART_FIFOSTS_TXEMPTYF_Pos

#define UART_FIFOSTS_TXEMPTYF_Pos   (28)

UART_T::FIFOSTS: TXEMPTYF Position

Definition at line 12046 of file M471M_R1_S.h.

◆ UART_FIFOSTS_TXFULL_Msk

#define UART_FIFOSTS_TXFULL_Msk   (0x1ul << UART_FIFOSTS_TXFULL_Pos)

UART_T::FIFOSTS: TXFULL Mask

Definition at line 12041 of file M471M_R1_S.h.

◆ UART_FIFOSTS_TXFULL_Pos

#define UART_FIFOSTS_TXFULL_Pos   (23)

UART_T::FIFOSTS: TXFULL Position

Definition at line 12040 of file M471M_R1_S.h.

◆ UART_FIFOSTS_TXOVIF_Msk

#define UART_FIFOSTS_TXOVIF_Msk   (0x1ul << UART_FIFOSTS_TXOVIF_Pos)

UART_T::FIFOSTS: TXOVIF Mask

Definition at line 12044 of file M471M_R1_S.h.

◆ UART_FIFOSTS_TXOVIF_Pos

#define UART_FIFOSTS_TXOVIF_Pos   (24)

UART_T::FIFOSTS: TXOVIF Position

Definition at line 12043 of file M471M_R1_S.h.

◆ UART_FIFOSTS_TXPTR_Msk

#define UART_FIFOSTS_TXPTR_Msk   (0x3ful << UART_FIFOSTS_TXPTR_Pos)

UART_T::FIFOSTS: TXPTR Mask

Definition at line 12035 of file M471M_R1_S.h.

◆ UART_FIFOSTS_TXPTR_Pos

#define UART_FIFOSTS_TXPTR_Pos   (16)

UART_T::FIFOSTS: TXPTR Position

Definition at line 12034 of file M471M_R1_S.h.

◆ UART_FUNCSEL_FUNCSEL_Msk

#define UART_FUNCSEL_FUNCSEL_Msk   (0x3ul << UART_FUNCSEL_FUNCSEL_Pos)

UART_T::FUNCSEL: FUNCSEL Mask

Definition at line 12185 of file M471M_R1_S.h.

◆ UART_FUNCSEL_FUNCSEL_Pos

#define UART_FUNCSEL_FUNCSEL_Pos   (0)

UART_T::FUNCSEL: FUNCSEL Position

Definition at line 12184 of file M471M_R1_S.h.

◆ UART_INTEN_ABRIEN_Msk

#define UART_INTEN_ABRIEN_Msk   (0x1ul << UART_INTEN_ABRIEN_Pos)

UART_T::INTEN: ABRIEN Mask

Definition at line 11951 of file M471M_R1_S.h.

◆ UART_INTEN_ABRIEN_Pos

#define UART_INTEN_ABRIEN_Pos   (18)

UART_T::INTEN: ABRIEN Position

Definition at line 11950 of file M471M_R1_S.h.

◆ UART_INTEN_ATOCTSEN_Msk

#define UART_INTEN_ATOCTSEN_Msk   (0x1ul << UART_INTEN_ATOCTSEN_Pos)

UART_T::INTEN: ATOCTSEN Mask

Definition at line 11942 of file M471M_R1_S.h.

◆ UART_INTEN_ATOCTSEN_Pos

#define UART_INTEN_ATOCTSEN_Pos   (13)

UART_T::INTEN: ATOCTSEN Position

Definition at line 11941 of file M471M_R1_S.h.

◆ UART_INTEN_ATORTSEN_Msk

#define UART_INTEN_ATORTSEN_Msk   (0x1ul << UART_INTEN_ATORTSEN_Pos)

UART_T::INTEN: ATORTSEN Mask

Definition at line 11939 of file M471M_R1_S.h.

◆ UART_INTEN_ATORTSEN_Pos

#define UART_INTEN_ATORTSEN_Pos   (12)

UART_T::INTEN: ATORTSEN Position

Definition at line 11938 of file M471M_R1_S.h.

◆ UART_INTEN_BUFERRIEN_Msk

#define UART_INTEN_BUFERRIEN_Msk   (0x1ul << UART_INTEN_BUFERRIEN_Pos)

UART_T::INTEN: BUFERRIEN Mask

Definition at line 11924 of file M471M_R1_S.h.

◆ UART_INTEN_BUFERRIEN_Pos

#define UART_INTEN_BUFERRIEN_Pos   (5)

UART_T::INTEN: BUFERRIEN Position

Definition at line 11923 of file M471M_R1_S.h.

◆ UART_INTEN_LINIEN_Msk

#define UART_INTEN_LINIEN_Msk   (0x1ul << UART_INTEN_LINIEN_Pos)

UART_T::INTEN: LINIEN Mask

Definition at line 11927 of file M471M_R1_S.h.

◆ UART_INTEN_LINIEN_Pos

#define UART_INTEN_LINIEN_Pos   (8)

UART_T::INTEN: LINIEN Position

Definition at line 11926 of file M471M_R1_S.h.

◆ UART_INTEN_MODEMIEN_Msk

#define UART_INTEN_MODEMIEN_Msk   (0x1ul << UART_INTEN_MODEMIEN_Pos)

UART_T::INTEN: MODEMIEN Mask

Definition at line 11918 of file M471M_R1_S.h.

◆ UART_INTEN_MODEMIEN_Pos

#define UART_INTEN_MODEMIEN_Pos   (3)

UART_T::INTEN: MODEMIEN Position

Definition at line 11917 of file M471M_R1_S.h.

◆ UART_INTEN_RDAIEN_Msk

#define UART_INTEN_RDAIEN_Msk   (0x1ul << UART_INTEN_RDAIEN_Pos)

UART_T::INTEN: RDAIEN Mask

Definition at line 11909 of file M471M_R1_S.h.

◆ UART_INTEN_RDAIEN_Pos

#define UART_INTEN_RDAIEN_Pos   (0)

UART_T::INTEN: RDAIEN Position

Definition at line 11908 of file M471M_R1_S.h.

◆ UART_INTEN_RLSIEN_Msk

#define UART_INTEN_RLSIEN_Msk   (0x1ul << UART_INTEN_RLSIEN_Pos)

UART_T::INTEN: RLSIEN Mask

Definition at line 11915 of file M471M_R1_S.h.

◆ UART_INTEN_RLSIEN_Pos

#define UART_INTEN_RLSIEN_Pos   (2)

UART_T::INTEN: RLSIEN Position

Definition at line 11914 of file M471M_R1_S.h.

◆ UART_INTEN_RXPDMAEN_Msk

#define UART_INTEN_RXPDMAEN_Msk   (0x1ul << UART_INTEN_RXPDMAEN_Pos)

UART_T::INTEN: RXPDMAEN Mask

Definition at line 11948 of file M471M_R1_S.h.

◆ UART_INTEN_RXPDMAEN_Pos

#define UART_INTEN_RXPDMAEN_Pos   (15)

UART_T::INTEN: RXPDMAEN Position

Definition at line 11947 of file M471M_R1_S.h.

◆ UART_INTEN_RXTOIEN_Msk

#define UART_INTEN_RXTOIEN_Msk   (0x1ul << UART_INTEN_RXTOIEN_Pos)

UART_T::INTEN: RXTOIEN Mask

Definition at line 11921 of file M471M_R1_S.h.

◆ UART_INTEN_RXTOIEN_Pos

#define UART_INTEN_RXTOIEN_Pos   (4)

UART_T::INTEN: RXTOIEN Position

Definition at line 11920 of file M471M_R1_S.h.

◆ UART_INTEN_THREIEN_Msk

#define UART_INTEN_THREIEN_Msk   (0x1ul << UART_INTEN_THREIEN_Pos)

UART_T::INTEN: THREIEN Mask

Definition at line 11912 of file M471M_R1_S.h.

◆ UART_INTEN_THREIEN_Pos

#define UART_INTEN_THREIEN_Pos   (1)

UART_T::INTEN: THREIEN Position

Definition at line 11911 of file M471M_R1_S.h.

◆ UART_INTEN_TOCNTEN_Msk

#define UART_INTEN_TOCNTEN_Msk   (0x1ul << UART_INTEN_TOCNTEN_Pos)

UART_T::INTEN: TOCNTEN Mask

Definition at line 11936 of file M471M_R1_S.h.

◆ UART_INTEN_TOCNTEN_Pos

#define UART_INTEN_TOCNTEN_Pos   (11)

UART_T::INTEN: TOCNTEN Position

Definition at line 11935 of file M471M_R1_S.h.

◆ UART_INTEN_TXPDMAEN_Msk

#define UART_INTEN_TXPDMAEN_Msk   (0x1ul << UART_INTEN_TXPDMAEN_Pos)

UART_T::INTEN: TXPDMAEN Mask

Definition at line 11945 of file M471M_R1_S.h.

◆ UART_INTEN_TXPDMAEN_Pos

#define UART_INTEN_TXPDMAEN_Pos   (14)

UART_T::INTEN: TXPDMAEN Position

Definition at line 11944 of file M471M_R1_S.h.

◆ UART_INTEN_WKCTSIEN_Msk

#define UART_INTEN_WKCTSIEN_Msk   (0x1ul << UART_INTEN_WKCTSIEN_Pos)

UART_T::INTEN: WKCTSIEN Mask

Definition at line 11930 of file M471M_R1_S.h.

◆ UART_INTEN_WKCTSIEN_Pos

#define UART_INTEN_WKCTSIEN_Pos   (9)

UART_T::INTEN: WKCTSIEN Position

Definition at line 11929 of file M471M_R1_S.h.

◆ UART_INTEN_WKDATIEN_Msk

#define UART_INTEN_WKDATIEN_Msk   (0x1ul << UART_INTEN_WKDATIEN_Pos)

UART_T::INTEN: WKDATIEN Mask

Definition at line 11933 of file M471M_R1_S.h.

◆ UART_INTEN_WKDATIEN_Pos

#define UART_INTEN_WKDATIEN_Pos   (10)

UART_T::INTEN: WKDATIEN Position

Definition at line 11932 of file M471M_R1_S.h.

◆ UART_INTSTS_BUFERRIF_Msk

#define UART_INTSTS_BUFERRIF_Msk   (0x1ul << UART_INTSTS_BUFERRIF_Pos)

UART_T::INTSTS: BUFERRIF Mask

Definition at line 12065 of file M471M_R1_S.h.

◆ UART_INTSTS_BUFERRIF_Pos

#define UART_INTSTS_BUFERRIF_Pos   (5)

UART_T::INTSTS: BUFERRIF Position

Definition at line 12064 of file M471M_R1_S.h.

◆ UART_INTSTS_BUFERRINT_Msk

#define UART_INTSTS_BUFERRINT_Msk   (0x1ul << UART_INTSTS_BUFERRINT_Pos)

UART_T::INTSTS: BUFERRINT Mask

Definition at line 12089 of file M471M_R1_S.h.

◆ UART_INTSTS_BUFERRINT_Pos

#define UART_INTSTS_BUFERRINT_Pos   (13)

UART_T::INTSTS: BUFERRINT Position

Definition at line 12088 of file M471M_R1_S.h.

◆ UART_INTSTS_CTSWKIF_Msk

#define UART_INTSTS_CTSWKIF_Msk   (0x1ul << UART_INTSTS_CTSWKIF_Pos)

UART_T::INTSTS: CTSWKIF Mask

Definition at line 12095 of file M471M_R1_S.h.

◆ UART_INTSTS_CTSWKIF_Pos

#define UART_INTSTS_CTSWKIF_Pos   (16)

UART_T::INTSTS: CTSWKIF Position

Definition at line 12094 of file M471M_R1_S.h.

◆ UART_INTSTS_DATWKIF_Msk

#define UART_INTSTS_DATWKIF_Msk   (0x1ul << UART_INTSTS_DATWKIF_Pos)

UART_T::INTSTS: DATWKIF Mask

Definition at line 12098 of file M471M_R1_S.h.

◆ UART_INTSTS_DATWKIF_Pos

#define UART_INTSTS_DATWKIF_Pos   (17)

UART_T::INTSTS: DATWKIF Position

Definition at line 12097 of file M471M_R1_S.h.

◆ UART_INTSTS_HWBUFEIF_Msk

#define UART_INTSTS_HWBUFEIF_Msk   (0x1ul << UART_INTSTS_HWBUFEIF_Pos)

UART_T::INTSTS: HWBUFEIF Mask

Definition at line 12110 of file M471M_R1_S.h.

◆ UART_INTSTS_HWBUFEIF_Pos

#define UART_INTSTS_HWBUFEIF_Pos   (21)

UART_T::INTSTS: HWBUFEIF Position

Definition at line 12109 of file M471M_R1_S.h.

◆ UART_INTSTS_HWBUFEINT_Msk

#define UART_INTSTS_HWBUFEINT_Msk   (0x1ul << UART_INTSTS_HWBUFEINT_Pos)

UART_T::INTSTS: HWBUFEINT Mask

Definition at line 12122 of file M471M_R1_S.h.

◆ UART_INTSTS_HWBUFEINT_Pos

#define UART_INTSTS_HWBUFEINT_Pos   (29)

UART_T::INTSTS: HWBUFEINT Position

Definition at line 12121 of file M471M_R1_S.h.

◆ UART_INTSTS_HWMODIF_Msk

#define UART_INTSTS_HWMODIF_Msk   (0x1ul << UART_INTSTS_HWMODIF_Pos)

UART_T::INTSTS: HWMODIF Mask

Definition at line 12104 of file M471M_R1_S.h.

◆ UART_INTSTS_HWMODIF_Pos

#define UART_INTSTS_HWMODIF_Pos   (19)

UART_T::INTSTS: HWMODIF Position

Definition at line 12103 of file M471M_R1_S.h.

◆ UART_INTSTS_HWMODINT_Msk

#define UART_INTSTS_HWMODINT_Msk   (0x1ul << UART_INTSTS_HWMODINT_Pos)

UART_T::INTSTS: HWMODINT Mask

Definition at line 12116 of file M471M_R1_S.h.

◆ UART_INTSTS_HWMODINT_Pos

#define UART_INTSTS_HWMODINT_Pos   (27)

UART_T::INTSTS: HWMODINT Position

Definition at line 12115 of file M471M_R1_S.h.

◆ UART_INTSTS_HWRLSIF_Msk

#define UART_INTSTS_HWRLSIF_Msk   (0x1ul << UART_INTSTS_HWRLSIF_Pos)

UART_T::INTSTS: HWRLSIF Mask

Definition at line 12101 of file M471M_R1_S.h.

◆ UART_INTSTS_HWRLSIF_Pos

#define UART_INTSTS_HWRLSIF_Pos   (18)

UART_T::INTSTS: HWRLSIF Position

Definition at line 12100 of file M471M_R1_S.h.

◆ UART_INTSTS_HWRLSINT_Msk

#define UART_INTSTS_HWRLSINT_Msk   (0x1ul << UART_INTSTS_HWRLSINT_Pos)

UART_T::INTSTS: HWRLSINT Mask

Definition at line 12113 of file M471M_R1_S.h.

◆ UART_INTSTS_HWRLSINT_Pos

#define UART_INTSTS_HWRLSINT_Pos   (26)

UART_T::INTSTS: HWRLSINT Position

Definition at line 12112 of file M471M_R1_S.h.

◆ UART_INTSTS_HWTOIF_Msk

#define UART_INTSTS_HWTOIF_Msk   (0x1ul << UART_INTSTS_HWTOIF_Pos)

UART_T::INTSTS: HWTOIF Mask

Definition at line 12107 of file M471M_R1_S.h.

◆ UART_INTSTS_HWTOIF_Pos

#define UART_INTSTS_HWTOIF_Pos   (20)

UART_T::INTSTS: HWTOIF Position

Definition at line 12106 of file M471M_R1_S.h.

◆ UART_INTSTS_HWTOINT_Msk

#define UART_INTSTS_HWTOINT_Msk   (0x1ul << UART_INTSTS_HWTOINT_Pos)

UART_T::INTSTS: HWTOINT Mask

Definition at line 12119 of file M471M_R1_S.h.

◆ UART_INTSTS_HWTOINT_Pos

#define UART_INTSTS_HWTOINT_Pos   (28)

UART_T::INTSTS: HWTOINT Position

Definition at line 12118 of file M471M_R1_S.h.

◆ UART_INTSTS_LINIF_Msk

#define UART_INTSTS_LINIF_Msk   (0x1ul << UART_INTSTS_LINIF_Pos)

UART_T::INTSTS: LINIF Mask

Definition at line 12071 of file M471M_R1_S.h.

◆ UART_INTSTS_LINIF_Pos

#define UART_INTSTS_LINIF_Pos   (7)

UART_T::INTSTS: LINIF Position

Definition at line 12070 of file M471M_R1_S.h.

◆ UART_INTSTS_LININT_Msk

#define UART_INTSTS_LININT_Msk   (0x1ul << UART_INTSTS_LININT_Pos)

UART_T::INTSTS: LININT Mask

Definition at line 12092 of file M471M_R1_S.h.

◆ UART_INTSTS_LININT_Pos

#define UART_INTSTS_LININT_Pos   (15)

UART_T::INTSTS: LININT Position

Definition at line 12091 of file M471M_R1_S.h.

◆ UART_INTSTS_MODEMIF_Msk

#define UART_INTSTS_MODEMIF_Msk   (0x1ul << UART_INTSTS_MODEMIF_Pos)

UART_T::INTSTS: MODEMIF Mask

Definition at line 12059 of file M471M_R1_S.h.

◆ UART_INTSTS_MODEMIF_Pos

#define UART_INTSTS_MODEMIF_Pos   (3)

UART_T::INTSTS: MODEMIF Position

Definition at line 12058 of file M471M_R1_S.h.

◆ UART_INTSTS_MODEMINT_Msk

#define UART_INTSTS_MODEMINT_Msk   (0x1ul << UART_INTSTS_MODEMINT_Pos)

UART_T::INTSTS: MODEMINT Mask

Definition at line 12083 of file M471M_R1_S.h.

◆ UART_INTSTS_MODEMINT_Pos

#define UART_INTSTS_MODEMINT_Pos   (11)

UART_T::INTSTS: MODEMINT Position

Definition at line 12082 of file M471M_R1_S.h.

◆ UART_INTSTS_RDAIF_Msk

#define UART_INTSTS_RDAIF_Msk   (0x1ul << UART_INTSTS_RDAIF_Pos)

UART_T::INTSTS: RDAIF Mask

Definition at line 12050 of file M471M_R1_S.h.

◆ UART_INTSTS_RDAIF_Pos

#define UART_INTSTS_RDAIF_Pos   (0)

UART_T::INTSTS: RDAIF Position

Definition at line 12049 of file M471M_R1_S.h.

◆ UART_INTSTS_RDAINT_Msk

#define UART_INTSTS_RDAINT_Msk   (0x1ul << UART_INTSTS_RDAINT_Pos)

UART_T::INTSTS: RDAINT Mask

Definition at line 12074 of file M471M_R1_S.h.

◆ UART_INTSTS_RDAINT_Pos

#define UART_INTSTS_RDAINT_Pos   (8)

UART_T::INTSTS: RDAINT Position

Definition at line 12073 of file M471M_R1_S.h.

◆ UART_INTSTS_RLSIF_Msk

#define UART_INTSTS_RLSIF_Msk   (0x1ul << UART_INTSTS_RLSIF_Pos)

UART_T::INTSTS: RLSIF Mask

Definition at line 12056 of file M471M_R1_S.h.

◆ UART_INTSTS_RLSIF_Pos

#define UART_INTSTS_RLSIF_Pos   (2)

UART_T::INTSTS: RLSIF Position

Definition at line 12055 of file M471M_R1_S.h.

◆ UART_INTSTS_RLSINT_Msk

#define UART_INTSTS_RLSINT_Msk   (0x1ul << UART_INTSTS_RLSINT_Pos)

UART_T::INTSTS: RLSINT Mask

Definition at line 12080 of file M471M_R1_S.h.

◆ UART_INTSTS_RLSINT_Pos

#define UART_INTSTS_RLSINT_Pos   (10)

UART_T::INTSTS: RLSINT Position

Definition at line 12079 of file M471M_R1_S.h.

◆ UART_INTSTS_RXTOIF_Msk

#define UART_INTSTS_RXTOIF_Msk   (0x1ul << UART_INTSTS_RXTOIF_Pos)

UART_T::INTSTS: RXTOIF Mask

Definition at line 12062 of file M471M_R1_S.h.

◆ UART_INTSTS_RXTOIF_Pos

#define UART_INTSTS_RXTOIF_Pos   (4)

UART_T::INTSTS: RXTOIF Position

Definition at line 12061 of file M471M_R1_S.h.

◆ UART_INTSTS_RXTOINT_Msk

#define UART_INTSTS_RXTOINT_Msk   (0x1ul << UART_INTSTS_RXTOINT_Pos)

UART_T::INTSTS: RXTOINT Mask

Definition at line 12086 of file M471M_R1_S.h.

◆ UART_INTSTS_RXTOINT_Pos

#define UART_INTSTS_RXTOINT_Pos   (12)

UART_T::INTSTS: RXTOINT Position

Definition at line 12085 of file M471M_R1_S.h.

◆ UART_INTSTS_THREIF_Msk

#define UART_INTSTS_THREIF_Msk   (0x1ul << UART_INTSTS_THREIF_Pos)

UART_T::INTSTS: THREIF Mask

Definition at line 12053 of file M471M_R1_S.h.

◆ UART_INTSTS_THREIF_Pos

#define UART_INTSTS_THREIF_Pos   (1)

UART_T::INTSTS: THREIF Position

Definition at line 12052 of file M471M_R1_S.h.

◆ UART_INTSTS_THREINT_Msk

#define UART_INTSTS_THREINT_Msk   (0x1ul << UART_INTSTS_THREINT_Pos)

UART_T::INTSTS: THREINT Mask

Definition at line 12077 of file M471M_R1_S.h.

◆ UART_INTSTS_THREINT_Pos

#define UART_INTSTS_THREINT_Pos   (9)

UART_T::INTSTS: THREINT Position

Definition at line 12076 of file M471M_R1_S.h.

◆ UART_INTSTS_WKIF_Msk

#define UART_INTSTS_WKIF_Msk   (0x1ul << UART_INTSTS_WKIF_Pos)

UART_T::INTSTS: WKIF Mask

Definition at line 12068 of file M471M_R1_S.h.

◆ UART_INTSTS_WKIF_Pos

#define UART_INTSTS_WKIF_Pos   (6)

UART_T::INTSTS: WKIF Position

Definition at line 12067 of file M471M_R1_S.h.

◆ UART_IRDA_RXINV_Msk

#define UART_IRDA_RXINV_Msk   (0x1ul << UART_IRDA_RXINV_Pos)

UART_T::IRDA: RXINV Mask

Definition at line 12149 of file M471M_R1_S.h.

◆ UART_IRDA_RXINV_Pos

#define UART_IRDA_RXINV_Pos   (6)

UART_T::IRDA: RXINV Position

Definition at line 12148 of file M471M_R1_S.h.

◆ UART_IRDA_TXEN_Msk

#define UART_IRDA_TXEN_Msk   (0x1ul << UART_IRDA_TXEN_Pos)

UART_T::IRDA: TXEN Mask

Definition at line 12143 of file M471M_R1_S.h.

◆ UART_IRDA_TXEN_Pos

#define UART_IRDA_TXEN_Pos   (1)

UART_T::IRDA: TXEN Position

Definition at line 12142 of file M471M_R1_S.h.

◆ UART_IRDA_TXINV_Msk

#define UART_IRDA_TXINV_Msk   (0x1ul << UART_IRDA_TXINV_Pos)

UART_T::IRDA: TXINV Mask

Definition at line 12146 of file M471M_R1_S.h.

◆ UART_IRDA_TXINV_Pos

#define UART_IRDA_TXINV_Pos   (5)

UART_T::IRDA: TXINV Position

Definition at line 12145 of file M471M_R1_S.h.

◆ UART_LINE_BCB_Msk

#define UART_LINE_BCB_Msk   (0x1ul << UART_LINE_BCB_Pos)

UART_T::LINE: BCB Mask

Definition at line 11984 of file M471M_R1_S.h.

◆ UART_LINE_BCB_Pos

#define UART_LINE_BCB_Pos   (6)

UART_T::LINE: BCB Position

Definition at line 11983 of file M471M_R1_S.h.

◆ UART_LINE_EPE_Msk

#define UART_LINE_EPE_Msk   (0x1ul << UART_LINE_EPE_Pos)

UART_T::LINE: EPE Mask

Definition at line 11978 of file M471M_R1_S.h.

◆ UART_LINE_EPE_Pos

#define UART_LINE_EPE_Pos   (4)

UART_T::LINE: EPE Position

Definition at line 11977 of file M471M_R1_S.h.

◆ UART_LINE_NSB_Msk

#define UART_LINE_NSB_Msk   (0x1ul << UART_LINE_NSB_Pos)

UART_T::LINE: NSB Mask

Definition at line 11972 of file M471M_R1_S.h.

◆ UART_LINE_NSB_Pos

#define UART_LINE_NSB_Pos   (2)

UART_T::LINE: NSB Position

Definition at line 11971 of file M471M_R1_S.h.

◆ UART_LINE_PBE_Msk

#define UART_LINE_PBE_Msk   (0x1ul << UART_LINE_PBE_Pos)

UART_T::LINE: PBE Mask

Definition at line 11975 of file M471M_R1_S.h.

◆ UART_LINE_PBE_Pos

#define UART_LINE_PBE_Pos   (3)

UART_T::LINE: PBE Position

Definition at line 11974 of file M471M_R1_S.h.

◆ UART_LINE_SPE_Msk

#define UART_LINE_SPE_Msk   (0x1ul << UART_LINE_SPE_Pos)

UART_T::LINE: SPE Mask

Definition at line 11981 of file M471M_R1_S.h.

◆ UART_LINE_SPE_Pos

#define UART_LINE_SPE_Pos   (5)

UART_T::LINE: SPE Position

Definition at line 11980 of file M471M_R1_S.h.

◆ UART_LINE_WLS_Msk

#define UART_LINE_WLS_Msk   (0x3ul << UART_LINE_WLS_Pos)

UART_T::LINE: WLS Mask

Definition at line 11969 of file M471M_R1_S.h.

◆ UART_LINE_WLS_Pos

#define UART_LINE_WLS_Pos   (0)

UART_T::LINE: WLS Position

Definition at line 11968 of file M471M_R1_S.h.

◆ UART_MODEM_RTS_Msk

#define UART_MODEM_RTS_Msk   (0x1ul << UART_MODEM_RTS_Pos)

UART_T::MODEM: RTS Mask

Definition at line 11987 of file M471M_R1_S.h.

◆ UART_MODEM_RTS_Pos

#define UART_MODEM_RTS_Pos   (1)

UART_T::MODEM: RTS Position

Definition at line 11986 of file M471M_R1_S.h.

◆ UART_MODEM_RTSACTLV_Msk

#define UART_MODEM_RTSACTLV_Msk   (0x1ul << UART_MODEM_RTSACTLV_Pos)

UART_T::MODEM: RTSACTLV Mask

Definition at line 11990 of file M471M_R1_S.h.

◆ UART_MODEM_RTSACTLV_Pos

#define UART_MODEM_RTSACTLV_Pos   (9)

UART_T::MODEM: RTSACTLV Position

Definition at line 11989 of file M471M_R1_S.h.

◆ UART_MODEM_RTSSTS_Msk

#define UART_MODEM_RTSSTS_Msk   (0x1ul << UART_MODEM_RTSSTS_Pos)

UART_T::MODEM: RTSSTS Mask

Definition at line 11993 of file M471M_R1_S.h.

◆ UART_MODEM_RTSSTS_Pos

#define UART_MODEM_RTSSTS_Pos   (13)

UART_T::MODEM: RTSSTS Position

Definition at line 11992 of file M471M_R1_S.h.

◆ UART_MODEMSTS_CTSACTLV_Msk

#define UART_MODEMSTS_CTSACTLV_Msk   (0x1ul << UART_MODEMSTS_CTSACTLV_Pos)

UART_T::MODEMSTS: CTSACTLV Mask

Definition at line 12002 of file M471M_R1_S.h.

◆ UART_MODEMSTS_CTSACTLV_Pos

#define UART_MODEMSTS_CTSACTLV_Pos   (8)

UART_T::MODEMSTS: CTSACTLV Position

Definition at line 12001 of file M471M_R1_S.h.

◆ UART_MODEMSTS_CTSDETF_Msk

#define UART_MODEMSTS_CTSDETF_Msk   (0x1ul << UART_MODEMSTS_CTSDETF_Pos)

UART_T::MODEMSTS: CTSDETF Mask

Definition at line 11996 of file M471M_R1_S.h.

◆ UART_MODEMSTS_CTSDETF_Pos

#define UART_MODEMSTS_CTSDETF_Pos   (0)

UART_T::MODEMSTS: CTSDETF Position

Definition at line 11995 of file M471M_R1_S.h.

◆ UART_MODEMSTS_CTSSTS_Msk

#define UART_MODEMSTS_CTSSTS_Msk   (0x1ul << UART_MODEMSTS_CTSSTS_Pos)

UART_T::MODEMSTS: CTSSTS Mask

Definition at line 11999 of file M471M_R1_S.h.

◆ UART_MODEMSTS_CTSSTS_Pos

#define UART_MODEMSTS_CTSSTS_Pos   (4)

UART_T::MODEMSTS: CTSSTS Position

Definition at line 11998 of file M471M_R1_S.h.

◆ UART_TOUT_DLY_Msk

#define UART_TOUT_DLY_Msk   (0xfful << UART_TOUT_DLY_Pos)

UART_T::TOUT: DLY Mask

Definition at line 12128 of file M471M_R1_S.h.

◆ UART_TOUT_DLY_Pos

#define UART_TOUT_DLY_Pos   (8)

UART_T::TOUT: DLY Position

Definition at line 12127 of file M471M_R1_S.h.

◆ UART_TOUT_TOIC_Msk

#define UART_TOUT_TOIC_Msk   (0xfful << UART_TOUT_TOIC_Pos)

UART_T::TOUT: TOIC Mask

Definition at line 12125 of file M471M_R1_S.h.

◆ UART_TOUT_TOIC_Pos

#define UART_TOUT_TOIC_Pos   (0)

UART_T::TOUT: TOIC Position

Definition at line 12124 of file M471M_R1_S.h.

◆ USBD_ATTR_BYTEM_Msk

#define USBD_ATTR_BYTEM_Msk   (0x1ul << USBD_ATTR_BYTEM_Pos)

USBD_T::ATTR: BYTEM Mask

Definition at line 12648 of file M471M_R1_S.h.

◆ USBD_ATTR_BYTEM_Pos

#define USBD_ATTR_BYTEM_Pos   (10)

USBD_T::ATTR: BYTEM Position

Definition at line 12647 of file M471M_R1_S.h.

◆ USBD_ATTR_DPPUEN_Msk

#define USBD_ATTR_DPPUEN_Msk   (0x1ul << USBD_ATTR_DPPUEN_Pos)

USBD_T::ATTR: DPPUEN Mask

Definition at line 12642 of file M471M_R1_S.h.

◆ USBD_ATTR_DPPUEN_Pos

#define USBD_ATTR_DPPUEN_Pos   (8)

USBD_T::ATTR: DPPUEN Position

Definition at line 12641 of file M471M_R1_S.h.

◆ USBD_ATTR_PHYEN_Msk

#define USBD_ATTR_PHYEN_Msk   (0x1ul << USBD_ATTR_PHYEN_Pos)

USBD_T::ATTR: PHYEN Mask

Definition at line 12633 of file M471M_R1_S.h.

◆ USBD_ATTR_PHYEN_Pos

#define USBD_ATTR_PHYEN_Pos   (4)

USBD_T::ATTR: PHYEN Position

Definition at line 12632 of file M471M_R1_S.h.

◆ USBD_ATTR_PWRDN_Msk

#define USBD_ATTR_PWRDN_Msk   (0x1ul << USBD_ATTR_PWRDN_Pos)

USBD_T::ATTR: PWRDN Mask

Definition at line 12645 of file M471M_R1_S.h.

◆ USBD_ATTR_PWRDN_Pos

#define USBD_ATTR_PWRDN_Pos   (9)

USBD_T::ATTR: PWRDN Position

Definition at line 12644 of file M471M_R1_S.h.

◆ USBD_ATTR_RESUME_Msk

#define USBD_ATTR_RESUME_Msk   (0x1ul << USBD_ATTR_RESUME_Pos)

USBD_T::ATTR: RESUME Mask

Definition at line 12627 of file M471M_R1_S.h.

◆ USBD_ATTR_RESUME_Pos

#define USBD_ATTR_RESUME_Pos   (2)

USBD_T::ATTR: RESUME Position

Definition at line 12626 of file M471M_R1_S.h.

◆ USBD_ATTR_RWAKEUP_Msk

#define USBD_ATTR_RWAKEUP_Msk   (0x1ul << USBD_ATTR_RWAKEUP_Pos)

USBD_T::ATTR: RWAKEUP Mask

Definition at line 12636 of file M471M_R1_S.h.

◆ USBD_ATTR_RWAKEUP_Pos

#define USBD_ATTR_RWAKEUP_Pos   (5)

USBD_T::ATTR: RWAKEUP Position

Definition at line 12635 of file M471M_R1_S.h.

◆ USBD_ATTR_SUSPEND_Msk

#define USBD_ATTR_SUSPEND_Msk   (0x1ul << USBD_ATTR_SUSPEND_Pos)

USBD_T::ATTR: SUSPEND Mask

Definition at line 12624 of file M471M_R1_S.h.

◆ USBD_ATTR_SUSPEND_Pos

#define USBD_ATTR_SUSPEND_Pos   (1)

USBD_T::ATTR: SUSPEND Position

Definition at line 12623 of file M471M_R1_S.h.

◆ USBD_ATTR_TOUT_Msk

#define USBD_ATTR_TOUT_Msk   (0x1ul << USBD_ATTR_TOUT_Pos)

USBD_T::ATTR: TOUT Mask

Definition at line 12630 of file M471M_R1_S.h.

◆ USBD_ATTR_TOUT_Pos

#define USBD_ATTR_TOUT_Pos   (3)

USBD_T::ATTR: TOUT Position

Definition at line 12629 of file M471M_R1_S.h.

◆ USBD_ATTR_USBEN_Msk

#define USBD_ATTR_USBEN_Msk   (0x1ul << USBD_ATTR_USBEN_Pos)

USBD_T::ATTR: USBEN Mask

Definition at line 12639 of file M471M_R1_S.h.

◆ USBD_ATTR_USBEN_Pos

#define USBD_ATTR_USBEN_Pos   (7)

USBD_T::ATTR: USBEN Position

Definition at line 12638 of file M471M_R1_S.h.

◆ USBD_ATTR_USBRST_Msk

#define USBD_ATTR_USBRST_Msk   (0x1ul << USBD_ATTR_USBRST_Pos)

USBD_T::ATTR: USBRST Mask

Definition at line 12621 of file M471M_R1_S.h.

◆ USBD_ATTR_USBRST_Pos

#define USBD_ATTR_USBRST_Pos   (0)

USBD_T::ATTR: USBRST Position

Definition at line 12620 of file M471M_R1_S.h.

◆ USBD_BUFSEG_BUFSEG_Msk

#define USBD_BUFSEG_BUFSEG_Msk   (0x3ful << USBD_BUFSEG_BUFSEG_Pos)

USBD_EP_T::BUFSEG: BUFSEG Mask

Definition at line 12660 of file M471M_R1_S.h.

◆ USBD_BUFSEG_BUFSEG_Pos

#define USBD_BUFSEG_BUFSEG_Pos   (3)

USBD_EP_T::BUFSEG: BUFSEG Position

Definition at line 12659 of file M471M_R1_S.h.

◆ USBD_CFG_CSTALL_Msk

#define USBD_CFG_CSTALL_Msk   (0x1ul << USBD_CFG_CSTALL_Pos)

USBD_EP_T::CFG: CSTALL Mask

Definition at line 12678 of file M471M_R1_S.h.

◆ USBD_CFG_CSTALL_Pos

#define USBD_CFG_CSTALL_Pos   (9)

USBD_EP_T::CFG: CSTALL Position

Definition at line 12677 of file M471M_R1_S.h.

◆ USBD_CFG_DSQSYNC_Msk

#define USBD_CFG_DSQSYNC_Msk   (0x1ul << USBD_CFG_DSQSYNC_Pos)

USBD_EP_T::CFG: DSQSYNC Mask

Definition at line 12675 of file M471M_R1_S.h.

◆ USBD_CFG_DSQSYNC_Pos

#define USBD_CFG_DSQSYNC_Pos   (7)

USBD_EP_T::CFG: DSQSYNC Position

Definition at line 12674 of file M471M_R1_S.h.

◆ USBD_CFG_EPNUM_Msk

#define USBD_CFG_EPNUM_Msk   (0xful << USBD_CFG_EPNUM_Pos)

USBD_EP_T::CFG: EPNUM Mask

Definition at line 12666 of file M471M_R1_S.h.

◆ USBD_CFG_EPNUM_Pos

#define USBD_CFG_EPNUM_Pos   (0)

USBD_EP_T::CFG: EPNUM Position

Definition at line 12665 of file M471M_R1_S.h.

◆ USBD_CFG_ISOCH_Msk

#define USBD_CFG_ISOCH_Msk   (0x1ul << USBD_CFG_ISOCH_Pos)

USBD_EP_T::CFG: ISOCH Mask

Definition at line 12669 of file M471M_R1_S.h.

◆ USBD_CFG_ISOCH_Pos

#define USBD_CFG_ISOCH_Pos   (4)

USBD_EP_T::CFG: ISOCH Position

Definition at line 12668 of file M471M_R1_S.h.

◆ USBD_CFG_STATE_Msk

#define USBD_CFG_STATE_Msk   (0x3ul << USBD_CFG_STATE_Pos)

USBD_EP_T::CFG: STATE Mask

Definition at line 12672 of file M471M_R1_S.h.

◆ USBD_CFG_STATE_Pos

#define USBD_CFG_STATE_Pos   (5)

USBD_EP_T::CFG: STATE Position

Definition at line 12671 of file M471M_R1_S.h.

◆ USBD_CFGP_CLRRDY_Msk

#define USBD_CFGP_CLRRDY_Msk   (0x1ul << USBD_CFGP_CLRRDY_Pos)

USBD_EP_T::CFGP: CLRRDY Mask

Definition at line 12681 of file M471M_R1_S.h.

◆ USBD_CFGP_CLRRDY_Pos

#define USBD_CFGP_CLRRDY_Pos   (0)

USBD_EP_T::CFGP: CLRRDY Position

Definition at line 12680 of file M471M_R1_S.h.

◆ USBD_CFGP_SSTALL_Msk

#define USBD_CFGP_SSTALL_Msk   (0x1ul << USBD_CFGP_SSTALL_Pos)

USBD_EP_T::CFGP: SSTALL Mask

Definition at line 12684 of file M471M_R1_S.h.

◆ USBD_CFGP_SSTALL_Pos

#define USBD_CFGP_SSTALL_Pos   (1)

USBD_EP_T::CFGP: SSTALL Position

Definition at line 12683 of file M471M_R1_S.h.

◆ USBD_EPSTS_EPSTS0_Msk

#define USBD_EPSTS_EPSTS0_Msk   (0x7ul << USBD_EPSTS_EPSTS0_Pos)

USBD_T::EPSTS: EPSTS0 Mask

Definition at line 12597 of file M471M_R1_S.h.

◆ USBD_EPSTS_EPSTS0_Pos

#define USBD_EPSTS_EPSTS0_Pos   (8)

USBD_T::EPSTS: EPSTS0 Position

Definition at line 12596 of file M471M_R1_S.h.

◆ USBD_EPSTS_EPSTS1_Msk

#define USBD_EPSTS_EPSTS1_Msk   (0x7ul << USBD_EPSTS_EPSTS1_Pos)

USBD_T::EPSTS: EPSTS1 Mask

Definition at line 12600 of file M471M_R1_S.h.

◆ USBD_EPSTS_EPSTS1_Pos

#define USBD_EPSTS_EPSTS1_Pos   (11)

USBD_T::EPSTS: EPSTS1 Position

Definition at line 12599 of file M471M_R1_S.h.

◆ USBD_EPSTS_EPSTS2_Msk

#define USBD_EPSTS_EPSTS2_Msk   (0x7ul << USBD_EPSTS_EPSTS2_Pos)

USBD_T::EPSTS: EPSTS2 Mask

Definition at line 12603 of file M471M_R1_S.h.

◆ USBD_EPSTS_EPSTS2_Pos

#define USBD_EPSTS_EPSTS2_Pos   (14)

USBD_T::EPSTS: EPSTS2 Position

Definition at line 12602 of file M471M_R1_S.h.

◆ USBD_EPSTS_EPSTS3_Msk

#define USBD_EPSTS_EPSTS3_Msk   (0x7ul << USBD_EPSTS_EPSTS3_Pos)

USBD_T::EPSTS: EPSTS3 Mask

Definition at line 12606 of file M471M_R1_S.h.

◆ USBD_EPSTS_EPSTS3_Pos

#define USBD_EPSTS_EPSTS3_Pos   (17)

USBD_T::EPSTS: EPSTS3 Position

Definition at line 12605 of file M471M_R1_S.h.

◆ USBD_EPSTS_EPSTS4_Msk

#define USBD_EPSTS_EPSTS4_Msk   (0x7ul << USBD_EPSTS_EPSTS4_Pos)

USBD_T::EPSTS: EPSTS4 Mask

Definition at line 12609 of file M471M_R1_S.h.

◆ USBD_EPSTS_EPSTS4_Pos

#define USBD_EPSTS_EPSTS4_Pos   (20)

USBD_T::EPSTS: EPSTS4 Position

Definition at line 12608 of file M471M_R1_S.h.

◆ USBD_EPSTS_EPSTS5_Msk

#define USBD_EPSTS_EPSTS5_Msk   (0x7ul << USBD_EPSTS_EPSTS5_Pos)

USBD_T::EPSTS: EPSTS5 Mask

Definition at line 12612 of file M471M_R1_S.h.

◆ USBD_EPSTS_EPSTS5_Pos

#define USBD_EPSTS_EPSTS5_Pos   (23)

USBD_T::EPSTS: EPSTS5 Position

Definition at line 12611 of file M471M_R1_S.h.

◆ USBD_EPSTS_EPSTS6_Msk

#define USBD_EPSTS_EPSTS6_Msk   (0x7ul << USBD_EPSTS_EPSTS6_Pos)

USBD_T::EPSTS: EPSTS6 Mask

Definition at line 12615 of file M471M_R1_S.h.

◆ USBD_EPSTS_EPSTS6_Pos

#define USBD_EPSTS_EPSTS6_Pos   (26)

USBD_T::EPSTS: EPSTS6 Position

Definition at line 12614 of file M471M_R1_S.h.

◆ USBD_EPSTS_EPSTS7_Msk

#define USBD_EPSTS_EPSTS7_Msk   (0x7ul << USBD_EPSTS_EPSTS7_Pos)

USBD_T::EPSTS: EPSTS7 Mask

Definition at line 12618 of file M471M_R1_S.h.

◆ USBD_EPSTS_EPSTS7_Pos

#define USBD_EPSTS_EPSTS7_Pos   (29)

USBD_T::EPSTS: EPSTS7 Position

Definition at line 12617 of file M471M_R1_S.h.

◆ USBD_EPSTS_OV_Msk

#define USBD_EPSTS_OV_Msk   (0x1ul << USBD_EPSTS_OV_Pos)

USBD_T::EPSTS: OV Mask

Definition at line 12594 of file M471M_R1_S.h.

◆ USBD_EPSTS_OV_Pos

#define USBD_EPSTS_OV_Pos   (7)

USBD_T::EPSTS: OV Position

Definition at line 12593 of file M471M_R1_S.h.

◆ USBD_FADDR_FADDR_Msk

#define USBD_FADDR_FADDR_Msk   (0x7ful << USBD_FADDR_FADDR_Pos)

USBD_T::FADDR: FADDR Mask

Definition at line 12591 of file M471M_R1_S.h.

◆ USBD_FADDR_FADDR_Pos

#define USBD_FADDR_FADDR_Pos   (0)

USBD_T::FADDR: FADDR Position

Definition at line 12590 of file M471M_R1_S.h.

◆ USBD_INTEN_BUSIEN_Msk

#define USBD_INTEN_BUSIEN_Msk   (0x1ul << USBD_INTEN_BUSIEN_Pos)

USBD_T::INTEN: BUSIEN Mask

Definition at line 12531 of file M471M_R1_S.h.

◆ USBD_INTEN_BUSIEN_Pos

#define USBD_INTEN_BUSIEN_Pos   (0)
@addtogroup USB_CONST USB Bit Field Definition
Constant Definitions for USB Controller

USBD_T::INTEN: BUSIEN Position

Definition at line 12530 of file M471M_R1_S.h.

◆ USBD_INTEN_INNAKEN_Msk

#define USBD_INTEN_INNAKEN_Msk   (0x1ul << USBD_INTEN_INNAKEN_Pos)

USBD_T::INTEN: INNAKEN Mask

Definition at line 12546 of file M471M_R1_S.h.

◆ USBD_INTEN_INNAKEN_Pos

#define USBD_INTEN_INNAKEN_Pos   (15)

USBD_T::INTEN: INNAKEN Position

Definition at line 12545 of file M471M_R1_S.h.

◆ USBD_INTEN_NEVWKIEN_Msk

#define USBD_INTEN_NEVWKIEN_Msk   (0x1ul << USBD_INTEN_NEVWKIEN_Pos)

USBD_T::INTEN: NEVWKIEN Mask

Definition at line 12540 of file M471M_R1_S.h.

◆ USBD_INTEN_NEVWKIEN_Pos

#define USBD_INTEN_NEVWKIEN_Pos   (3)

USBD_T::INTEN: NEVWKIEN Position

Definition at line 12539 of file M471M_R1_S.h.

◆ USBD_INTEN_USBIEN_Msk

#define USBD_INTEN_USBIEN_Msk   (0x1ul << USBD_INTEN_USBIEN_Pos)

USBD_T::INTEN: USBIEN Mask

Definition at line 12534 of file M471M_R1_S.h.

◆ USBD_INTEN_USBIEN_Pos

#define USBD_INTEN_USBIEN_Pos   (1)

USBD_T::INTEN: USBIEN Position

Definition at line 12533 of file M471M_R1_S.h.

◆ USBD_INTEN_VBDETIEN_Msk

#define USBD_INTEN_VBDETIEN_Msk   (0x1ul << USBD_INTEN_VBDETIEN_Pos)

USBD_T::INTEN: VBDETIEN Mask

Definition at line 12537 of file M471M_R1_S.h.

◆ USBD_INTEN_VBDETIEN_Pos

#define USBD_INTEN_VBDETIEN_Pos   (2)

USBD_T::INTEN: VBDETIEN Position

Definition at line 12536 of file M471M_R1_S.h.

◆ USBD_INTEN_WKEN_Msk

#define USBD_INTEN_WKEN_Msk   (0x1ul << USBD_INTEN_WKEN_Pos)

USBD_T::INTEN: WKEN Mask

Definition at line 12543 of file M471M_R1_S.h.

◆ USBD_INTEN_WKEN_Pos

#define USBD_INTEN_WKEN_Pos   (8)

USBD_T::INTEN: WKEN Position

Definition at line 12542 of file M471M_R1_S.h.

◆ USBD_INTSTS_BUSIF_Msk

#define USBD_INTSTS_BUSIF_Msk   (0x1ul << USBD_INTSTS_BUSIF_Pos)

USBD_T::INTSTS: BUSIF Mask

Definition at line 12549 of file M471M_R1_S.h.

◆ USBD_INTSTS_BUSIF_Pos

#define USBD_INTSTS_BUSIF_Pos   (0)

USBD_T::INTSTS: BUSIF Position

Definition at line 12548 of file M471M_R1_S.h.

◆ USBD_INTSTS_EPEVT0_Msk

#define USBD_INTSTS_EPEVT0_Msk   (0x1ul << USBD_INTSTS_EPEVT0_Pos)

USBD_T::INTSTS: EPEVT0 Mask

Definition at line 12564 of file M471M_R1_S.h.

◆ USBD_INTSTS_EPEVT0_Pos

#define USBD_INTSTS_EPEVT0_Pos   (16)

USBD_T::INTSTS: EPEVT0 Position

Definition at line 12563 of file M471M_R1_S.h.

◆ USBD_INTSTS_EPEVT1_Msk

#define USBD_INTSTS_EPEVT1_Msk   (0x1ul << USBD_INTSTS_EPEVT1_Pos)

USBD_T::INTSTS: EPEVT1 Mask

Definition at line 12567 of file M471M_R1_S.h.

◆ USBD_INTSTS_EPEVT1_Pos

#define USBD_INTSTS_EPEVT1_Pos   (17)

USBD_T::INTSTS: EPEVT1 Position

Definition at line 12566 of file M471M_R1_S.h.

◆ USBD_INTSTS_EPEVT2_Msk

#define USBD_INTSTS_EPEVT2_Msk   (0x1ul << USBD_INTSTS_EPEVT2_Pos)

USBD_T::INTSTS: EPEVT2 Mask

Definition at line 12570 of file M471M_R1_S.h.

◆ USBD_INTSTS_EPEVT2_Pos

#define USBD_INTSTS_EPEVT2_Pos   (18)

USBD_T::INTSTS: EPEVT2 Position

Definition at line 12569 of file M471M_R1_S.h.

◆ USBD_INTSTS_EPEVT3_Msk

#define USBD_INTSTS_EPEVT3_Msk   (0x1ul << USBD_INTSTS_EPEVT3_Pos)

USBD_T::INTSTS: EPEVT3 Mask

Definition at line 12573 of file M471M_R1_S.h.

◆ USBD_INTSTS_EPEVT3_Pos

#define USBD_INTSTS_EPEVT3_Pos   (19)

USBD_T::INTSTS: EPEVT3 Position

Definition at line 12572 of file M471M_R1_S.h.

◆ USBD_INTSTS_EPEVT4_Msk

#define USBD_INTSTS_EPEVT4_Msk   (0x1ul << USBD_INTSTS_EPEVT4_Pos)

USBD_T::INTSTS: EPEVT4 Mask

Definition at line 12576 of file M471M_R1_S.h.

◆ USBD_INTSTS_EPEVT4_Pos

#define USBD_INTSTS_EPEVT4_Pos   (20)

USBD_T::INTSTS: EPEVT4 Position

Definition at line 12575 of file M471M_R1_S.h.

◆ USBD_INTSTS_EPEVT5_Msk

#define USBD_INTSTS_EPEVT5_Msk   (0x1ul << USBD_INTSTS_EPEVT5_Pos)

USBD_T::INTSTS: EPEVT5 Mask

Definition at line 12579 of file M471M_R1_S.h.

◆ USBD_INTSTS_EPEVT5_Pos

#define USBD_INTSTS_EPEVT5_Pos   (21)

USBD_T::INTSTS: EPEVT5 Position

Definition at line 12578 of file M471M_R1_S.h.

◆ USBD_INTSTS_EPEVT6_Msk

#define USBD_INTSTS_EPEVT6_Msk   (0x1ul << USBD_INTSTS_EPEVT6_Pos)

USBD_T::INTSTS: EPEVT6 Mask

Definition at line 12582 of file M471M_R1_S.h.

◆ USBD_INTSTS_EPEVT6_Pos

#define USBD_INTSTS_EPEVT6_Pos   (22)

USBD_T::INTSTS: EPEVT6 Position

Definition at line 12581 of file M471M_R1_S.h.

◆ USBD_INTSTS_EPEVT7_Msk

#define USBD_INTSTS_EPEVT7_Msk   (0x1ul << USBD_INTSTS_EPEVT7_Pos)

USBD_T::INTSTS: EPEVT7 Mask

Definition at line 12585 of file M471M_R1_S.h.

◆ USBD_INTSTS_EPEVT7_Pos

#define USBD_INTSTS_EPEVT7_Pos   (23)

USBD_T::INTSTS: EPEVT7 Position

Definition at line 12584 of file M471M_R1_S.h.

◆ USBD_INTSTS_NEVWKIF_Msk

#define USBD_INTSTS_NEVWKIF_Msk   (0x1ul << USBD_INTSTS_NEVWKIF_Pos)

USBD_T::INTSTS: NEVWKIF Mask

Definition at line 12558 of file M471M_R1_S.h.

◆ USBD_INTSTS_NEVWKIF_Pos

#define USBD_INTSTS_NEVWKIF_Pos   (3)

USBD_T::INTSTS: NEVWKIF Position

Definition at line 12557 of file M471M_R1_S.h.

◆ USBD_INTSTS_SETUP_Msk

#define USBD_INTSTS_SETUP_Msk   (0x1ul << USBD_INTSTS_SETUP_Pos)

USBD_T::INTSTS: SETUP Mask

Definition at line 12588 of file M471M_R1_S.h.

◆ USBD_INTSTS_SETUP_Pos

#define USBD_INTSTS_SETUP_Pos   (31)

USBD_T::INTSTS: SETUP Position

Definition at line 12587 of file M471M_R1_S.h.

◆ USBD_INTSTS_SOFIF_Msk

#define USBD_INTSTS_SOFIF_Msk   (0x1ul << USBD_INTSTS_SOFIF_Pos)

USBD_T::INTSTS: SOFIF Mask

Definition at line 12561 of file M471M_R1_S.h.

◆ USBD_INTSTS_SOFIF_Pos

#define USBD_INTSTS_SOFIF_Pos   (4)

USBD_T::INTSTS: SOFIF Position

Definition at line 12560 of file M471M_R1_S.h.

◆ USBD_INTSTS_USBIF_Msk

#define USBD_INTSTS_USBIF_Msk   (0x1ul << USBD_INTSTS_USBIF_Pos)

USBD_T::INTSTS: USBIF Mask

Definition at line 12552 of file M471M_R1_S.h.

◆ USBD_INTSTS_USBIF_Pos

#define USBD_INTSTS_USBIF_Pos   (1)

USBD_T::INTSTS: USBIF Position

Definition at line 12551 of file M471M_R1_S.h.

◆ USBD_INTSTS_VBDETIF_Msk

#define USBD_INTSTS_VBDETIF_Msk   (0x1ul << USBD_INTSTS_VBDETIF_Pos)

USBD_T::INTSTS: VBDETIF Mask

Definition at line 12555 of file M471M_R1_S.h.

◆ USBD_INTSTS_VBDETIF_Pos

#define USBD_INTSTS_VBDETIF_Pos   (2)

USBD_T::INTSTS: VBDETIF Position

Definition at line 12554 of file M471M_R1_S.h.

◆ USBD_MXPLD_MXPLD_Msk

#define USBD_MXPLD_MXPLD_Msk   (0x1fful << USBD_MXPLD_MXPLD_Pos)

USBD_EP_T::MXPLD: MXPLD Mask

Definition at line 12663 of file M471M_R1_S.h.

◆ USBD_MXPLD_MXPLD_Pos

#define USBD_MXPLD_MXPLD_Pos   (0)

USBD_EP_T::MXPLD: MXPLD Position

Definition at line 12662 of file M471M_R1_S.h.

◆ USBD_SE0_SE0_Msk

#define USBD_SE0_SE0_Msk   (0x1ul << USBD_SE0_SE0_Pos)

USBD_T::SE0: SE0 Mask

Definition at line 12657 of file M471M_R1_S.h.

◆ USBD_SE0_SE0_Pos

#define USBD_SE0_SE0_Pos   (0)

USBD_T::SE0: SE0 Position

Definition at line 12656 of file M471M_R1_S.h.

◆ USBD_STBUFSEG_STBUFSEG_Msk

#define USBD_STBUFSEG_STBUFSEG_Msk   (0x3ful << USBD_STBUFSEG_STBUFSEG_Pos)

USBD_T::STBUFSEG: STBUFSEG Mask

Definition at line 12654 of file M471M_R1_S.h.

◆ USBD_STBUFSEG_STBUFSEG_Pos

#define USBD_STBUFSEG_STBUFSEG_Pos   (3)

USBD_T::STBUFSEG: STBUFSEG Position

Definition at line 12653 of file M471M_R1_S.h.

◆ USBD_VBUSDET_VBUSDET_Msk

#define USBD_VBUSDET_VBUSDET_Msk   (0x1ul << USBD_VBUSDET_VBUSDET_Pos)

USBD_T::VBUSDET: VBUSDET Mask

Definition at line 12651 of file M471M_R1_S.h.

◆ USBD_VBUSDET_VBUSDET_Pos

#define USBD_VBUSDET_VBUSDET_Pos   (0)

USBD_T::VBUSDET: VBUSDET Position

Definition at line 12650 of file M471M_R1_S.h.

◆ USBH_HcBulkCurrentED_BCED_Msk

#define USBH_HcBulkCurrentED_BCED_Msk   (0xffffffful << USBH_HcBulkCurrentED_BCED_Pos)

USBH_T::HcBulkCurrentED: BCED Mask

Definition at line 13357 of file M471M_R1_S.h.

◆ USBH_HcBulkCurrentED_BCED_Pos

#define USBH_HcBulkCurrentED_BCED_Pos   (4)

USBH_T::HcBulkCurrentED: BCED Position

Definition at line 13356 of file M471M_R1_S.h.

◆ USBH_HcBulkHeadED_BHED_Msk

#define USBH_HcBulkHeadED_BHED_Msk   (0xffffffful << USBH_HcBulkHeadED_BHED_Pos)

USBH_T::HcBulkHeadED: BHED Mask

Definition at line 13354 of file M471M_R1_S.h.

◆ USBH_HcBulkHeadED_BHED_Pos

#define USBH_HcBulkHeadED_BHED_Pos   (4)

USBH_T::HcBulkHeadED: BHED Position

Definition at line 13353 of file M471M_R1_S.h.

◆ USBH_HcCommandStatus_BLF_Msk

#define USBH_HcCommandStatus_BLF_Msk   (0x1ul << USBH_HcCommandStatus_BLF_Pos)

USBH_T::HcCommandStatus: BLF Mask

Definition at line 13276 of file M471M_R1_S.h.

◆ USBH_HcCommandStatus_BLF_Pos

#define USBH_HcCommandStatus_BLF_Pos   (2)

USBH_T::HcCommandStatus: BLF Position

Definition at line 13275 of file M471M_R1_S.h.

◆ USBH_HcCommandStatus_CLF_Msk

#define USBH_HcCommandStatus_CLF_Msk   (0x1ul << USBH_HcCommandStatus_CLF_Pos)

USBH_T::HcCommandStatus: CLF Mask

Definition at line 13273 of file M471M_R1_S.h.

◆ USBH_HcCommandStatus_CLF_Pos

#define USBH_HcCommandStatus_CLF_Pos   (1)

USBH_T::HcCommandStatus: CLF Position

Definition at line 13272 of file M471M_R1_S.h.

◆ USBH_HcCommandStatus_HCR_Msk

#define USBH_HcCommandStatus_HCR_Msk   (0x1ul << USBH_HcCommandStatus_HCR_Pos)

USBH_T::HcCommandStatus: HCR Mask

Definition at line 13270 of file M471M_R1_S.h.

◆ USBH_HcCommandStatus_HCR_Pos

#define USBH_HcCommandStatus_HCR_Pos   (0)

USBH_T::HcCommandStatus: HCR Position

Definition at line 13269 of file M471M_R1_S.h.

◆ USBH_HcCommandStatus_SOC_Msk

#define USBH_HcCommandStatus_SOC_Msk   (0x3ul << USBH_HcCommandStatus_SOC_Pos)

USBH_T::HcCommandStatus: SOC Mask

Definition at line 13279 of file M471M_R1_S.h.

◆ USBH_HcCommandStatus_SOC_Pos

#define USBH_HcCommandStatus_SOC_Pos   (16)

USBH_T::HcCommandStatus: SOC Position

Definition at line 13278 of file M471M_R1_S.h.

◆ USBH_HcControl_BLE_Msk

#define USBH_HcControl_BLE_Msk   (0x1ul << USBH_HcControl_BLE_Pos)

USBH_T::HcControl: BLE Mask

Definition at line 13264 of file M471M_R1_S.h.

◆ USBH_HcControl_BLE_Pos

#define USBH_HcControl_BLE_Pos   (5)

USBH_T::HcControl: BLE Position

Definition at line 13263 of file M471M_R1_S.h.

◆ USBH_HcControl_CBSR_Msk

#define USBH_HcControl_CBSR_Msk   (0x3ul << USBH_HcControl_CBSR_Pos)

USBH_T::HcControl: CBSR Mask

Definition at line 13252 of file M471M_R1_S.h.

◆ USBH_HcControl_CBSR_Pos

#define USBH_HcControl_CBSR_Pos   (0)

USBH_T::HcControl: CBSR Position

Definition at line 13251 of file M471M_R1_S.h.

◆ USBH_HcControl_CLE_Msk

#define USBH_HcControl_CLE_Msk   (0x1ul << USBH_HcControl_CLE_Pos)

USBH_T::HcControl: CLE Mask

Definition at line 13261 of file M471M_R1_S.h.

◆ USBH_HcControl_CLE_Pos

#define USBH_HcControl_CLE_Pos   (4)

USBH_T::HcControl: CLE Position

Definition at line 13260 of file M471M_R1_S.h.

◆ USBH_HcControl_HCFS_Msk

#define USBH_HcControl_HCFS_Msk   (0x3ul << USBH_HcControl_HCFS_Pos)

USBH_T::HcControl: HCFS Mask

Definition at line 13267 of file M471M_R1_S.h.

◆ USBH_HcControl_HCFS_Pos

#define USBH_HcControl_HCFS_Pos   (6)

USBH_T::HcControl: HCFS Position

Definition at line 13266 of file M471M_R1_S.h.

◆ USBH_HcControl_IE_Msk

#define USBH_HcControl_IE_Msk   (0x1ul << USBH_HcControl_IE_Pos)

USBH_T::HcControl: IE Mask

Definition at line 13258 of file M471M_R1_S.h.

◆ USBH_HcControl_IE_Pos

#define USBH_HcControl_IE_Pos   (3)

USBH_T::HcControl: IE Position

Definition at line 13257 of file M471M_R1_S.h.

◆ USBH_HcControl_PLE_Msk

#define USBH_HcControl_PLE_Msk   (0x1ul << USBH_HcControl_PLE_Pos)

USBH_T::HcControl: CBSR Mask

Definition at line 13255 of file M471M_R1_S.h.

◆ USBH_HcControl_PLE_Pos

#define USBH_HcControl_PLE_Pos   (2)

USBH_T::HcControl: CBSR Position

Definition at line 13254 of file M471M_R1_S.h.

◆ USBH_HcControlCurrentED_CCED_Msk

#define USBH_HcControlCurrentED_CCED_Msk   (0xffffffful << USBH_HcControlCurrentED_CCED_Pos)

USBH_T::HcControlCurrentED: CCED Mask

Definition at line 13351 of file M471M_R1_S.h.

◆ USBH_HcControlCurrentED_CCED_Pos

#define USBH_HcControlCurrentED_CCED_Pos   (4)

USBH_T::HcControlCurrentED: CCED Position

Definition at line 13350 of file M471M_R1_S.h.

◆ USBH_HcControlHeadED_CHED_Msk

#define USBH_HcControlHeadED_CHED_Msk   (0xffffffful << USBH_HcControlHeadED_CHED_Pos)

USBH_T::HcControlHeadED: CHED Mask

Definition at line 13348 of file M471M_R1_S.h.

◆ USBH_HcControlHeadED_CHED_Pos

#define USBH_HcControlHeadED_CHED_Pos   (4)

USBH_T::HcControlHeadED: CHED Position

Definition at line 13347 of file M471M_R1_S.h.

◆ USBH_HcDoneHead_DH_Msk

#define USBH_HcDoneHead_DH_Msk   (0xffffffful << USBH_HcDoneHead_DH_Pos)

USBH_T::HcDoneHead: DH Mask

Definition at line 13360 of file M471M_R1_S.h.

◆ USBH_HcDoneHead_DH_Pos

#define USBH_HcDoneHead_DH_Pos   (4)

USBH_T::HcDoneHead: DH Position

Definition at line 13359 of file M471M_R1_S.h.

◆ USBH_HcFmInterval_FI_Msk

#define USBH_HcFmInterval_FI_Msk   (0x3ffful << USBH_HcFmInterval_FI_Pos)

USBH_T::HcFmInterval: FI Mask

Definition at line 13363 of file M471M_R1_S.h.

◆ USBH_HcFmInterval_FI_Pos

#define USBH_HcFmInterval_FI_Pos   (0)

USBH_T::HcFmInterval: FI Position

Definition at line 13362 of file M471M_R1_S.h.

◆ USBH_HcFmInterval_FIT_Msk

#define USBH_HcFmInterval_FIT_Msk   (0x1ul << USBH_HcFmInterval_FIT_Pos)

USBH_T::HcFmInterval: FIT Mask

Definition at line 13369 of file M471M_R1_S.h.

◆ USBH_HcFmInterval_FIT_Pos

#define USBH_HcFmInterval_FIT_Pos   (31)

USBH_T::HcFmInterval: FIT Position

Definition at line 13368 of file M471M_R1_S.h.

◆ USBH_HcFmInterval_FSMPS_Msk

#define USBH_HcFmInterval_FSMPS_Msk   (0x7ffful << USBH_HcFmInterval_FSMPS_Pos)

USBH_T::HcFmInterval: FSMPS Mask

Definition at line 13366 of file M471M_R1_S.h.

◆ USBH_HcFmInterval_FSMPS_Pos

#define USBH_HcFmInterval_FSMPS_Pos   (16)

USBH_T::HcFmInterval: FSMPS Position

Definition at line 13365 of file M471M_R1_S.h.

◆ USBH_HcFmNumber_FN_Msk

#define USBH_HcFmNumber_FN_Msk   (0xfffful << USBH_HcFmNumber_FN_Pos)

USBH_T::HcFmNumber: FN Mask

Definition at line 13378 of file M471M_R1_S.h.

◆ USBH_HcFmNumber_FN_Pos

#define USBH_HcFmNumber_FN_Pos   (0)

USBH_T::HcFmNumber: FN Position

Definition at line 13377 of file M471M_R1_S.h.

◆ USBH_HcFmRemaining_FR_Msk

#define USBH_HcFmRemaining_FR_Msk   (0x3ffful << USBH_HcFmRemaining_FR_Pos)

USBH_T::HcFmRemaining: FR Mask

Definition at line 13372 of file M471M_R1_S.h.

◆ USBH_HcFmRemaining_FR_Pos

#define USBH_HcFmRemaining_FR_Pos   (0)

USBH_T::HcFmRemaining: FR Position

Definition at line 13371 of file M471M_R1_S.h.

◆ USBH_HcFmRemaining_FRT_Msk

#define USBH_HcFmRemaining_FRT_Msk   (0x1ul << USBH_HcFmRemaining_FRT_Pos)

USBH_T::HcFmRemaining: FRT Mask

Definition at line 13375 of file M471M_R1_S.h.

◆ USBH_HcFmRemaining_FRT_Pos

#define USBH_HcFmRemaining_FRT_Pos   (31)

USBH_T::HcFmRemaining: FRT Position

Definition at line 13374 of file M471M_R1_S.h.

◆ USBH_HcHCCA_HCCA_Msk

#define USBH_HcHCCA_HCCA_Msk   (0xfffffful << USBH_HcHCCA_HCCA_Pos)

USBH_T::HcHCCA: HCCA Mask

Definition at line 13342 of file M471M_R1_S.h.

◆ USBH_HcHCCA_HCCA_Pos

#define USBH_HcHCCA_HCCA_Pos   (8)

USBH_T::HcHCCA: HCCA Position

Definition at line 13341 of file M471M_R1_S.h.

◆ USBH_HcInterruptDisable_FNO_Msk

#define USBH_HcInterruptDisable_FNO_Msk   (0x1ul << USBH_HcInterruptDisable_FNO_Pos)

USBH_T::HcInterruptDisable: FNO Mask

Definition at line 13333 of file M471M_R1_S.h.

◆ USBH_HcInterruptDisable_FNO_Pos

#define USBH_HcInterruptDisable_FNO_Pos   (5)

USBH_T::HcInterruptDisable: FNO Position

Definition at line 13332 of file M471M_R1_S.h.

◆ USBH_HcInterruptDisable_MIE_Msk

#define USBH_HcInterruptDisable_MIE_Msk   (0x1ul << USBH_HcInterruptDisable_MIE_Pos)

USBH_T::HcInterruptDisable: MIE Mask

Definition at line 13339 of file M471M_R1_S.h.

◆ USBH_HcInterruptDisable_MIE_Pos

#define USBH_HcInterruptDisable_MIE_Pos   (31)

USBH_T::HcInterruptDisable: MIE Position

Definition at line 13338 of file M471M_R1_S.h.

◆ USBH_HcInterruptDisable_RD_Msk

#define USBH_HcInterruptDisable_RD_Msk   (0x1ul << USBH_HcInterruptDisable_RD_Pos)

USBH_T::HcInterruptDisable: RD Mask

Definition at line 13330 of file M471M_R1_S.h.

◆ USBH_HcInterruptDisable_RD_Pos

#define USBH_HcInterruptDisable_RD_Pos   (3)

USBH_T::HcInterruptDisable: RD Position

Definition at line 13329 of file M471M_R1_S.h.

◆ USBH_HcInterruptDisable_RHSC_Msk

#define USBH_HcInterruptDisable_RHSC_Msk   (0x1ul << USBH_HcInterruptDisable_RHSC_Pos)

USBH_T::HcInterruptDisable: RHSC Mask

Definition at line 13336 of file M471M_R1_S.h.

◆ USBH_HcInterruptDisable_RHSC_Pos

#define USBH_HcInterruptDisable_RHSC_Pos   (6)

USBH_T::HcInterruptDisable: RHSC Position

Definition at line 13335 of file M471M_R1_S.h.

◆ USBH_HcInterruptDisable_SF_Msk

#define USBH_HcInterruptDisable_SF_Msk   (0x1ul << USBH_HcInterruptDisable_SF_Pos)

USBH_T::HcInterruptDisable: SF Mask

Definition at line 13327 of file M471M_R1_S.h.

◆ USBH_HcInterruptDisable_SF_Pos

#define USBH_HcInterruptDisable_SF_Pos   (2)

USBH_T::HcInterruptDisable: SF Position

Definition at line 13326 of file M471M_R1_S.h.

◆ USBH_HcInterruptDisable_SO_Msk

#define USBH_HcInterruptDisable_SO_Msk   (0x1ul << USBH_HcInterruptDisable_SO_Pos)

USBH_T::HcInterruptDisable: SO Mask

Definition at line 13321 of file M471M_R1_S.h.

◆ USBH_HcInterruptDisable_SO_Pos

#define USBH_HcInterruptDisable_SO_Pos   (0)

USBH_T::HcInterruptDisable: SO Position

Definition at line 13320 of file M471M_R1_S.h.

◆ USBH_HcInterruptDisable_WDH_Msk

#define USBH_HcInterruptDisable_WDH_Msk   (0x1ul << USBH_HcInterruptDisable_WDH_Pos)

USBH_T::HcInterruptDisable: WDH Mask

Definition at line 13324 of file M471M_R1_S.h.

◆ USBH_HcInterruptDisable_WDH_Pos

#define USBH_HcInterruptDisable_WDH_Pos   (1)

USBH_T::HcInterruptDisable: WDH Position

Definition at line 13323 of file M471M_R1_S.h.

◆ USBH_HcInterruptEnable_FNO_Msk

#define USBH_HcInterruptEnable_FNO_Msk   (0x1ul << USBH_HcInterruptEnable_FNO_Pos)

USBH_T::HcInterruptEnable: FNO Mask

Definition at line 13312 of file M471M_R1_S.h.

◆ USBH_HcInterruptEnable_FNO_Pos

#define USBH_HcInterruptEnable_FNO_Pos   (5)

USBH_T::HcInterruptEnable: FNO Position

Definition at line 13311 of file M471M_R1_S.h.

◆ USBH_HcInterruptEnable_MIE_Msk

#define USBH_HcInterruptEnable_MIE_Msk   (0x1ul << USBH_HcInterruptEnable_MIE_Pos)

USBH_T::HcInterruptEnable: MIE Mask

Definition at line 13318 of file M471M_R1_S.h.

◆ USBH_HcInterruptEnable_MIE_Pos

#define USBH_HcInterruptEnable_MIE_Pos   (31)

USBH_T::HcInterruptEnable: MIE Position

Definition at line 13317 of file M471M_R1_S.h.

◆ USBH_HcInterruptEnable_RD_Msk

#define USBH_HcInterruptEnable_RD_Msk   (0x1ul << USBH_HcInterruptEnable_RD_Pos)

USBH_T::HcInterruptEnable: RD Mask

Definition at line 13309 of file M471M_R1_S.h.

◆ USBH_HcInterruptEnable_RD_Pos

#define USBH_HcInterruptEnable_RD_Pos   (3)

USBH_T::HcInterruptEnable: RD Position

Definition at line 13308 of file M471M_R1_S.h.

◆ USBH_HcInterruptEnable_RHSC_Msk

#define USBH_HcInterruptEnable_RHSC_Msk   (0x1ul << USBH_HcInterruptEnable_RHSC_Pos)

USBH_T::HcInterruptEnable: RHSC Mask

Definition at line 13315 of file M471M_R1_S.h.

◆ USBH_HcInterruptEnable_RHSC_Pos

#define USBH_HcInterruptEnable_RHSC_Pos   (6)

USBH_T::HcInterruptEnable: RHSC Position

Definition at line 13314 of file M471M_R1_S.h.

◆ USBH_HcInterruptEnable_SF_Msk

#define USBH_HcInterruptEnable_SF_Msk   (0x1ul << USBH_HcInterruptEnable_SF_Pos)

USBH_T::HcInterruptEnable: SF Mask

Definition at line 13306 of file M471M_R1_S.h.

◆ USBH_HcInterruptEnable_SF_Pos

#define USBH_HcInterruptEnable_SF_Pos   (2)

USBH_T::HcInterruptEnable: SF Position

Definition at line 13305 of file M471M_R1_S.h.

◆ USBH_HcInterruptEnable_SO_Msk

#define USBH_HcInterruptEnable_SO_Msk   (0x1ul << USBH_HcInterruptEnable_SO_Pos)

USBH_T::HcInterruptEnable: SO Mask

Definition at line 13300 of file M471M_R1_S.h.

◆ USBH_HcInterruptEnable_SO_Pos

#define USBH_HcInterruptEnable_SO_Pos   (0)

USBH_T::HcInterruptEnable: SO Position

Definition at line 13299 of file M471M_R1_S.h.

◆ USBH_HcInterruptEnable_WDH_Msk

#define USBH_HcInterruptEnable_WDH_Msk   (0x1ul << USBH_HcInterruptEnable_WDH_Pos)

USBH_T::HcInterruptEnable: WDH Mask

Definition at line 13303 of file M471M_R1_S.h.

◆ USBH_HcInterruptEnable_WDH_Pos

#define USBH_HcInterruptEnable_WDH_Pos   (1)

USBH_T::HcInterruptEnable: WDH Position

Definition at line 13302 of file M471M_R1_S.h.

◆ USBH_HcInterruptStatus_FNO_Msk

#define USBH_HcInterruptStatus_FNO_Msk   (0x1ul << USBH_HcInterruptStatus_FNO_Pos)

USBH_T::HcInterruptStatus: FNO Mask

Definition at line 13294 of file M471M_R1_S.h.

◆ USBH_HcInterruptStatus_FNO_Pos

#define USBH_HcInterruptStatus_FNO_Pos   (5)

USBH_T::HcInterruptStatus: FNO Position

Definition at line 13293 of file M471M_R1_S.h.

◆ USBH_HcInterruptStatus_RD_Msk

#define USBH_HcInterruptStatus_RD_Msk   (0x1ul << USBH_HcInterruptStatus_RD_Pos)

USBH_T::HcInterruptStatus: RD Mask

Definition at line 13291 of file M471M_R1_S.h.

◆ USBH_HcInterruptStatus_RD_Pos

#define USBH_HcInterruptStatus_RD_Pos   (3)

USBH_T::HcInterruptStatus: RD Position

Definition at line 13290 of file M471M_R1_S.h.

◆ USBH_HcInterruptStatus_RHSC_Msk

#define USBH_HcInterruptStatus_RHSC_Msk   (0x1ul << USBH_HcInterruptStatus_RHSC_Pos)

USBH_T::HcInterruptStatus: RHSC Mask

Definition at line 13297 of file M471M_R1_S.h.

◆ USBH_HcInterruptStatus_RHSC_Pos

#define USBH_HcInterruptStatus_RHSC_Pos   (6)

USBH_T::HcInterruptStatus: RHSC Position

Definition at line 13296 of file M471M_R1_S.h.

◆ USBH_HcInterruptStatus_SF_Msk

#define USBH_HcInterruptStatus_SF_Msk   (0x1ul << USBH_HcInterruptStatus_SF_Pos)

USBH_T::HcInterruptStatus: SF Mask

Definition at line 13288 of file M471M_R1_S.h.

◆ USBH_HcInterruptStatus_SF_Pos

#define USBH_HcInterruptStatus_SF_Pos   (2)

USBH_T::HcInterruptStatus: SF Position

Definition at line 13287 of file M471M_R1_S.h.

◆ USBH_HcInterruptStatus_SO_Msk

#define USBH_HcInterruptStatus_SO_Msk   (0x1ul << USBH_HcInterruptStatus_SO_Pos)

USBH_T::HcInterruptStatus: SO Mask

Definition at line 13282 of file M471M_R1_S.h.

◆ USBH_HcInterruptStatus_SO_Pos

#define USBH_HcInterruptStatus_SO_Pos   (0)

USBH_T::HcInterruptStatus: SO Position

Definition at line 13281 of file M471M_R1_S.h.

◆ USBH_HcInterruptStatus_WDH_Msk

#define USBH_HcInterruptStatus_WDH_Msk   (0x1ul << USBH_HcInterruptStatus_WDH_Pos)

USBH_T::HcInterruptStatus: WDH Mask

Definition at line 13285 of file M471M_R1_S.h.

◆ USBH_HcInterruptStatus_WDH_Pos

#define USBH_HcInterruptStatus_WDH_Pos   (1)

USBH_T::HcInterruptStatus: WDH Position

Definition at line 13284 of file M471M_R1_S.h.

◆ USBH_HcLSThreshold_LST_Msk

#define USBH_HcLSThreshold_LST_Msk   (0xffful << USBH_HcLSThreshold_LST_Pos)

USBH_T::HcLSThreshold: LST Mask

Definition at line 13384 of file M471M_R1_S.h.

◆ USBH_HcLSThreshold_LST_Pos

#define USBH_HcLSThreshold_LST_Pos   (0)

USBH_T::HcLSThreshold: LST Position

Definition at line 13383 of file M471M_R1_S.h.

◆ USBH_HcMiscControl_ABORT_Msk

#define USBH_HcMiscControl_ABORT_Msk   (0x1ul << USBH_HcMiscControl_ABORT_Pos)

USBH_T::HcMiscControl: ABORT Mask

Definition at line 13459 of file M471M_R1_S.h.

◆ USBH_HcMiscControl_ABORT_Pos

#define USBH_HcMiscControl_ABORT_Pos   (1)

USBH_T::HcMiscControl: ABORT Position

Definition at line 13458 of file M471M_R1_S.h.

◆ USBH_HcMiscControl_DPRT1_Msk

#define USBH_HcMiscControl_DPRT1_Msk   (0x1ul << USBH_HcMiscControl_DPRT1_Pos)

USBH_T::HcMiscControl: DPRT1 Mask

Definition at line 13465 of file M471M_R1_S.h.

◆ USBH_HcMiscControl_DPRT1_Pos

#define USBH_HcMiscControl_DPRT1_Pos   (16)

USBH_T::HcMiscControl: DPRT1 Position

Definition at line 13464 of file M471M_R1_S.h.

◆ USBH_HcMiscControl_OCAL_Msk

#define USBH_HcMiscControl_OCAL_Msk   (0x1ul << USBH_HcMiscControl_OCAL_Pos)

USBH_T::HcMiscControl: OCAL Mask

Definition at line 13462 of file M471M_R1_S.h.

◆ USBH_HcMiscControl_OCAL_Pos

#define USBH_HcMiscControl_OCAL_Pos   (3)

USBH_T::HcMiscControl: OCAL Position

Definition at line 13461 of file M471M_R1_S.h.

◆ USBH_HcPeriodCurrentED_PCED_Msk

#define USBH_HcPeriodCurrentED_PCED_Msk   (0xffffffful << USBH_HcPeriodCurrentED_PCED_Pos)

USBH_T::HcPeriodCurrentED: PCED Mask

Definition at line 13345 of file M471M_R1_S.h.

◆ USBH_HcPeriodCurrentED_PCED_Pos

#define USBH_HcPeriodCurrentED_PCED_Pos   (4)

USBH_T::HcPeriodCurrentED: PCED Position

Definition at line 13344 of file M471M_R1_S.h.

◆ USBH_HcPeriodicStart_PS_Msk

#define USBH_HcPeriodicStart_PS_Msk   (0x3ffful << USBH_HcPeriodicStart_PS_Pos)

USBH_T::HcPeriodicStart: PS Mask

Definition at line 13381 of file M471M_R1_S.h.

◆ USBH_HcPeriodicStart_PS_Pos

#define USBH_HcPeriodicStart_PS_Pos   (0)

USBH_T::HcPeriodicStart: PS Position

Definition at line 13380 of file M471M_R1_S.h.

◆ USBH_HcPhyControl_STBYEN_Msk

#define USBH_HcPhyControl_STBYEN_Msk   (0x1ul << USBH_HcPhyControl_STBYEN_Pos)

USBH_T::HcPhyControl: STBYEN Mask

Definition at line 13456 of file M471M_R1_S.h.

◆ USBH_HcPhyControl_STBYEN_Pos

#define USBH_HcPhyControl_STBYEN_Pos   (27)

USBH_T::HcPhyControl: STBYEN Position

Definition at line 13455 of file M471M_R1_S.h.

◆ USBH_HcRevision_REV_Msk

#define USBH_HcRevision_REV_Msk   (0xfful << USBH_HcRevision_REV_Pos)

USBH_T::HcRevision: REV Mask

Definition at line 13249 of file M471M_R1_S.h.

◆ USBH_HcRevision_REV_Pos

#define USBH_HcRevision_REV_Pos   (0)
@addtogroup USBH_CONST USBH Bit Field Definition
Constant Definitions for USBH Controller

USBH_T::HcRevision: REV Position

Definition at line 13248 of file M471M_R1_S.h.

◆ USBH_HcRhDescriptorA_NDP_Msk

#define USBH_HcRhDescriptorA_NDP_Msk   (0xfful << USBH_HcRhDescriptorA_NDP_Pos)

USBH_T::HcRhDescriptorA: NDP Mask

Definition at line 13387 of file M471M_R1_S.h.

◆ USBH_HcRhDescriptorA_NDP_Pos

#define USBH_HcRhDescriptorA_NDP_Pos   (0)

USBH_T::HcRhDescriptorA: NDP Position

Definition at line 13386 of file M471M_R1_S.h.

◆ USBH_HcRhDescriptorA_NOCP_Msk

#define USBH_HcRhDescriptorA_NOCP_Msk   (0x1ul << USBH_HcRhDescriptorA_NOCP_Pos)

USBH_T::HcRhDescriptorA: NOCP Mask

Definition at line 13396 of file M471M_R1_S.h.

◆ USBH_HcRhDescriptorA_NOCP_Pos

#define USBH_HcRhDescriptorA_NOCP_Pos   (12)

USBH_T::HcRhDescriptorA: NOCP Position

Definition at line 13395 of file M471M_R1_S.h.

◆ USBH_HcRhDescriptorA_OCPM_Msk

#define USBH_HcRhDescriptorA_OCPM_Msk   (0x1ul << USBH_HcRhDescriptorA_OCPM_Pos)

USBH_T::HcRhDescriptorA: OCPM Mask

Definition at line 13393 of file M471M_R1_S.h.

◆ USBH_HcRhDescriptorA_OCPM_Pos

#define USBH_HcRhDescriptorA_OCPM_Pos   (11)

USBH_T::HcRhDescriptorA: OCPM Position

Definition at line 13392 of file M471M_R1_S.h.

◆ USBH_HcRhDescriptorA_PSM_Msk

#define USBH_HcRhDescriptorA_PSM_Msk   (0x1ul << USBH_HcRhDescriptorA_PSM_Pos)

USBH_T::HcRhDescriptorA: PSM Mask

Definition at line 13390 of file M471M_R1_S.h.

◆ USBH_HcRhDescriptorA_PSM_Pos

#define USBH_HcRhDescriptorA_PSM_Pos   (8)

USBH_T::HcRhDescriptorA: PSM Position

Definition at line 13389 of file M471M_R1_S.h.

◆ USBH_HcRhDescriptorB_PPCM_Msk

#define USBH_HcRhDescriptorB_PPCM_Msk   (0xfffful << USBH_HcRhDescriptorB_PPCM_Pos)

USBH_T::HcRhDescriptorB: PPCM Mask

Definition at line 13399 of file M471M_R1_S.h.

◆ USBH_HcRhDescriptorB_PPCM_Pos

#define USBH_HcRhDescriptorB_PPCM_Pos   (16)

USBH_T::HcRhDescriptorB: PPCM Position

Definition at line 13398 of file M471M_R1_S.h.

◆ USBH_HcRhPortStatus_CCS_Msk

#define USBH_HcRhPortStatus_CCS_Msk   (0x1ul << USBH_HcRhPortStatus_CCS_Pos)

USBH_T::HcRhPortStatus: CCS Mask

Definition at line 13420 of file M471M_R1_S.h.

◆ USBH_HcRhPortStatus_CCS_Pos

#define USBH_HcRhPortStatus_CCS_Pos   (0)

USBH_T::HcRhPortStatus: CCS Position

Definition at line 13419 of file M471M_R1_S.h.

◆ USBH_HcRhPortStatus_CSC_Msk

#define USBH_HcRhPortStatus_CSC_Msk   (0x1ul << USBH_HcRhPortStatus_CSC_Pos)

USBH_T::HcRhPortStatus: CSC Mask

Definition at line 13441 of file M471M_R1_S.h.

◆ USBH_HcRhPortStatus_CSC_Pos

#define USBH_HcRhPortStatus_CSC_Pos   (16)

USBH_T::HcRhPortStatus: CSC Position

Definition at line 13440 of file M471M_R1_S.h.

◆ USBH_HcRhPortStatus_LSDA_Msk

#define USBH_HcRhPortStatus_LSDA_Msk   (0x1ul << USBH_HcRhPortStatus_LSDA_Pos)

USBH_T::HcRhPortStatus: LSDA Mask

Definition at line 13438 of file M471M_R1_S.h.

◆ USBH_HcRhPortStatus_LSDA_Pos

#define USBH_HcRhPortStatus_LSDA_Pos   (9)

USBH_T::HcRhPortStatus: LSDA Position

Definition at line 13437 of file M471M_R1_S.h.

◆ USBH_HcRhPortStatus_OCIC_Msk

#define USBH_HcRhPortStatus_OCIC_Msk   (0x1ul << USBH_HcRhPortStatus_OCIC_Pos)

USBH_T::HcRhPortStatus: OCIC Mask

Definition at line 13450 of file M471M_R1_S.h.

◆ USBH_HcRhPortStatus_OCIC_Pos

#define USBH_HcRhPortStatus_OCIC_Pos   (19)

USBH_T::HcRhPortStatus: OCIC Position

Definition at line 13449 of file M471M_R1_S.h.

◆ USBH_HcRhPortStatus_PES_Msk

#define USBH_HcRhPortStatus_PES_Msk   (0x1ul << USBH_HcRhPortStatus_PES_Pos)

USBH_T::HcRhPortStatus: PES Mask

Definition at line 13423 of file M471M_R1_S.h.

◆ USBH_HcRhPortStatus_PES_Pos

#define USBH_HcRhPortStatus_PES_Pos   (1)

USBH_T::HcRhPortStatus: PES Position

Definition at line 13422 of file M471M_R1_S.h.

◆ USBH_HcRhPortStatus_PESC_Msk

#define USBH_HcRhPortStatus_PESC_Msk   (0x1ul << USBH_HcRhPortStatus_PESC_Pos)

USBH_T::HcRhPortStatus: PESC Mask

Definition at line 13444 of file M471M_R1_S.h.

◆ USBH_HcRhPortStatus_PESC_Pos

#define USBH_HcRhPortStatus_PESC_Pos   (17)

USBH_T::HcRhPortStatus: PESC Position

Definition at line 13443 of file M471M_R1_S.h.

◆ USBH_HcRhPortStatus_POCI_Msk

#define USBH_HcRhPortStatus_POCI_Msk   (0x1ul << USBH_HcRhPortStatus_POCI_Pos)

USBH_T::HcRhPortStatus: POCI Mask

Definition at line 13429 of file M471M_R1_S.h.

◆ USBH_HcRhPortStatus_POCI_Pos

#define USBH_HcRhPortStatus_POCI_Pos   (3)

USBH_T::HcRhPortStatus: POCI Position

Definition at line 13428 of file M471M_R1_S.h.

◆ USBH_HcRhPortStatus_PPS_Msk

#define USBH_HcRhPortStatus_PPS_Msk   (0x1ul << USBH_HcRhPortStatus_PPS_Pos)

USBH_T::HcRhPortStatus: PPS Mask

Definition at line 13435 of file M471M_R1_S.h.

◆ USBH_HcRhPortStatus_PPS_Pos

#define USBH_HcRhPortStatus_PPS_Pos   (8)

USBH_T::HcRhPortStatus: PPS Position

Definition at line 13434 of file M471M_R1_S.h.

◆ USBH_HcRhPortStatus_PRS_Msk

#define USBH_HcRhPortStatus_PRS_Msk   (0x1ul << USBH_HcRhPortStatus_PRS_Pos)

USBH_T::HcRhPortStatus: PRS Mask

Definition at line 13432 of file M471M_R1_S.h.

◆ USBH_HcRhPortStatus_PRS_Pos

#define USBH_HcRhPortStatus_PRS_Pos   (4)

USBH_T::HcRhPortStatus: PRS Position

Definition at line 13431 of file M471M_R1_S.h.

◆ USBH_HcRhPortStatus_PRSC_Msk

#define USBH_HcRhPortStatus_PRSC_Msk   (0x1ul << USBH_HcRhPortStatus_PRSC_Pos)

USBH_T::HcRhPortStatus: PRSC Mask

Definition at line 13453 of file M471M_R1_S.h.

◆ USBH_HcRhPortStatus_PRSC_Pos

#define USBH_HcRhPortStatus_PRSC_Pos   (20)

USBH_T::HcRhPortStatus: PRSC Position

Definition at line 13452 of file M471M_R1_S.h.

◆ USBH_HcRhPortStatus_PSS_Msk

#define USBH_HcRhPortStatus_PSS_Msk   (0x1ul << USBH_HcRhPortStatus_PSS_Pos)

USBH_T::HcRhPortStatus: PSS Mask

Definition at line 13426 of file M471M_R1_S.h.

◆ USBH_HcRhPortStatus_PSS_Pos

#define USBH_HcRhPortStatus_PSS_Pos   (2)

USBH_T::HcRhPortStatus: PSS Position

Definition at line 13425 of file M471M_R1_S.h.

◆ USBH_HcRhPortStatus_PSSC_Msk

#define USBH_HcRhPortStatus_PSSC_Msk   (0x1ul << USBH_HcRhPortStatus_PSSC_Pos)

USBH_T::HcRhPortStatus: PSSC Mask

Definition at line 13447 of file M471M_R1_S.h.

◆ USBH_HcRhPortStatus_PSSC_Pos

#define USBH_HcRhPortStatus_PSSC_Pos   (18)

USBH_T::HcRhPortStatus: PSSC Position

Definition at line 13446 of file M471M_R1_S.h.

◆ USBH_HcRhStatus_CRWE_Msk

#define USBH_HcRhStatus_CRWE_Msk   (0x1ul << USBH_HcRhStatus_CRWE_Pos)

USBH_T::HcRhStatus: CRWE Mask

Definition at line 13417 of file M471M_R1_S.h.

◆ USBH_HcRhStatus_CRWE_Pos

#define USBH_HcRhStatus_CRWE_Pos   (31)

USBH_T::HcRhStatus: CRWE Position

Definition at line 13416 of file M471M_R1_S.h.

◆ USBH_HcRhStatus_DRWE_Msk

#define USBH_HcRhStatus_DRWE_Msk   (0x1ul << USBH_HcRhStatus_DRWE_Pos)

USBH_T::HcRhStatus: DRWE Mask

Definition at line 13408 of file M471M_R1_S.h.

◆ USBH_HcRhStatus_DRWE_Pos

#define USBH_HcRhStatus_DRWE_Pos   (15)

USBH_T::HcRhStatus: DRWE Position

Definition at line 13407 of file M471M_R1_S.h.

◆ USBH_HcRhStatus_LPS_Msk

#define USBH_HcRhStatus_LPS_Msk   (0x1ul << USBH_HcRhStatus_LPS_Pos)

USBH_T::HcRhStatus: LPS Mask

Definition at line 13402 of file M471M_R1_S.h.

◆ USBH_HcRhStatus_LPS_Pos

#define USBH_HcRhStatus_LPS_Pos   (0)

USBH_T::HcRhStatus: LPS Position

Definition at line 13401 of file M471M_R1_S.h.

◆ USBH_HcRhStatus_LPSC_Msk

#define USBH_HcRhStatus_LPSC_Msk   (0x1ul << USBH_HcRhStatus_LPSC_Pos)

USBH_T::HcRhStatus: LPSC Mask

Definition at line 13411 of file M471M_R1_S.h.

◆ USBH_HcRhStatus_LPSC_Pos

#define USBH_HcRhStatus_LPSC_Pos   (16)

USBH_T::HcRhStatus: LPSC Position

Definition at line 13410 of file M471M_R1_S.h.

◆ USBH_HcRhStatus_OCI_Msk

#define USBH_HcRhStatus_OCI_Msk   (0x1ul << USBH_HcRhStatus_OCI_Pos)

USBH_T::HcRhStatus: OCI Mask

Definition at line 13405 of file M471M_R1_S.h.

◆ USBH_HcRhStatus_OCI_Pos

#define USBH_HcRhStatus_OCI_Pos   (1)

USBH_T::HcRhStatus: OCI Position

Definition at line 13404 of file M471M_R1_S.h.

◆ USBH_HcRhStatus_OCIC_Msk

#define USBH_HcRhStatus_OCIC_Msk   (0x1ul << USBH_HcRhStatus_OCIC_Pos)

USBH_T::HcRhStatus: OCIC Mask

Definition at line 13414 of file M471M_R1_S.h.

◆ USBH_HcRhStatus_OCIC_Pos

#define USBH_HcRhStatus_OCIC_Pos   (17)

USBH_T::HcRhStatus: OCIC Position

Definition at line 13413 of file M471M_R1_S.h.

◆ WDT_ALTCTL_RSTDSEL_Msk

#define WDT_ALTCTL_RSTDSEL_Msk   (0x3ul << WDT_ALTCTL_RSTDSEL_Pos)

WDT_T::ALTCTL: RSTDSEL Mask

Definition at line 13609 of file M471M_R1_S.h.

◆ WDT_ALTCTL_RSTDSEL_Pos

#define WDT_ALTCTL_RSTDSEL_Pos   (0)

WDT_T::ALTCTL: RSTDSEL Position

Definition at line 13608 of file M471M_R1_S.h.

◆ WDT_CTL_ICEDEBUG_Msk

#define WDT_CTL_ICEDEBUG_Msk   (0x1ul << WDT_CTL_ICEDEBUG_Pos)

WDT_T::CTL: ICEDEBUG Mask

Definition at line 13606 of file M471M_R1_S.h.

◆ WDT_CTL_ICEDEBUG_Pos

#define WDT_CTL_ICEDEBUG_Pos   (31)

WDT_T::CTL: ICEDEBUG Position

Definition at line 13605 of file M471M_R1_S.h.

◆ WDT_CTL_IF_Msk

#define WDT_CTL_IF_Msk   (0x1ul << WDT_CTL_IF_Pos)

WDT_T::CTL: IF Mask

Definition at line 13588 of file M471M_R1_S.h.

◆ WDT_CTL_IF_Pos

#define WDT_CTL_IF_Pos   (3)

WDT_T::CTL: IF Position

Definition at line 13587 of file M471M_R1_S.h.

◆ WDT_CTL_INTEN_Msk

#define WDT_CTL_INTEN_Msk   (0x1ul << WDT_CTL_INTEN_Pos)

WDT_T::CTL: INTEN Mask

Definition at line 13597 of file M471M_R1_S.h.

◆ WDT_CTL_INTEN_Pos

#define WDT_CTL_INTEN_Pos   (6)

WDT_T::CTL: INTEN Position

Definition at line 13596 of file M471M_R1_S.h.

◆ WDT_CTL_RSTCNT_Msk

#define WDT_CTL_RSTCNT_Msk   (0x1ul << WDT_CTL_RSTCNT_Pos)

WDT_T::CTL: RSTCNT Mask

Definition at line 13579 of file M471M_R1_S.h.

◆ WDT_CTL_RSTCNT_Pos

#define WDT_CTL_RSTCNT_Pos   (0)
@addtogroup WDT_CONST WDT Bit Field Definition
Constant Definitions for WDT Controller

WDT_T::CTL: RSTCNT Position

Definition at line 13578 of file M471M_R1_S.h.

◆ WDT_CTL_RSTEN_Msk

#define WDT_CTL_RSTEN_Msk   (0x1ul << WDT_CTL_RSTEN_Pos)

WDT_T::CTL: RSTEN Mask

Definition at line 13582 of file M471M_R1_S.h.

◆ WDT_CTL_RSTEN_Pos

#define WDT_CTL_RSTEN_Pos   (1)

WDT_T::CTL: RSTEN Position

Definition at line 13581 of file M471M_R1_S.h.

◆ WDT_CTL_RSTF_Msk

#define WDT_CTL_RSTF_Msk   (0x1ul << WDT_CTL_RSTF_Pos)

WDT_T::CTL: RSTF Mask

Definition at line 13585 of file M471M_R1_S.h.

◆ WDT_CTL_RSTF_Pos

#define WDT_CTL_RSTF_Pos   (2)

WDT_T::CTL: RSTF Position

Definition at line 13584 of file M471M_R1_S.h.

◆ WDT_CTL_TOUTSEL_Msk

#define WDT_CTL_TOUTSEL_Msk   (0x7ul << WDT_CTL_TOUTSEL_Pos)

WDT_T::CTL: TOUTSEL Mask

Definition at line 13603 of file M471M_R1_S.h.

◆ WDT_CTL_TOUTSEL_Pos

#define WDT_CTL_TOUTSEL_Pos   (8)

WDT_T::CTL: TOUTSEL Position

Definition at line 13602 of file M471M_R1_S.h.

◆ WDT_CTL_WDTEN_Msk

#define WDT_CTL_WDTEN_Msk   (0x1ul << WDT_CTL_WDTEN_Pos)

WDT_T::CTL: WDTEN Mask

Definition at line 13600 of file M471M_R1_S.h.

◆ WDT_CTL_WDTEN_Pos

#define WDT_CTL_WDTEN_Pos   (7)

WDT_T::CTL: WDTEN Position

Definition at line 13599 of file M471M_R1_S.h.

◆ WDT_CTL_WKEN_Msk

#define WDT_CTL_WKEN_Msk   (0x1ul << WDT_CTL_WKEN_Pos)

WDT_T::CTL: WKEN Mask

Definition at line 13591 of file M471M_R1_S.h.

◆ WDT_CTL_WKEN_Pos

#define WDT_CTL_WKEN_Pos   (4)

WDT_T::CTL: WKEN Position

Definition at line 13590 of file M471M_R1_S.h.

◆ WDT_CTL_WKF_Msk

#define WDT_CTL_WKF_Msk   (0x1ul << WDT_CTL_WKF_Pos)

WDT_T::CTL: WKF Mask

Definition at line 13594 of file M471M_R1_S.h.

◆ WDT_CTL_WKF_Pos

#define WDT_CTL_WKF_Pos   (5)

WDT_T::CTL: WKF Position

Definition at line 13593 of file M471M_R1_S.h.

◆ WWDT_CNT_CNTDAT_Msk

#define WWDT_CNT_CNTDAT_Msk   (0x3ful << WWDT_CNT_CNTDAT_Pos)

WWDT_T::CNT: CNTDAT Mask

Definition at line 13740 of file M471M_R1_S.h.

◆ WWDT_CNT_CNTDAT_Pos

#define WWDT_CNT_CNTDAT_Pos   (0)

WWDT_T::CNT: CNTDAT Position

Definition at line 13739 of file M471M_R1_S.h.

◆ WWDT_CTL_CMPDAT_Msk

#define WWDT_CTL_CMPDAT_Msk   (0x3ful << WWDT_CTL_CMPDAT_Pos)

WWDT_T::CTL: CMPDAT Mask

Definition at line 13728 of file M471M_R1_S.h.

◆ WWDT_CTL_CMPDAT_Pos

#define WWDT_CTL_CMPDAT_Pos   (16)

WWDT_T::CTL: CMPDAT Position

Definition at line 13727 of file M471M_R1_S.h.

◆ WWDT_CTL_ICEDEBUG_Msk

#define WWDT_CTL_ICEDEBUG_Msk   (0x1ul << WWDT_CTL_ICEDEBUG_Pos)

WWDT_T::CTL: ICEDEBUG Mask

Definition at line 13731 of file M471M_R1_S.h.

◆ WWDT_CTL_ICEDEBUG_Pos

#define WWDT_CTL_ICEDEBUG_Pos   (31)

WWDT_T::CTL: ICEDEBUG Position

Definition at line 13730 of file M471M_R1_S.h.

◆ WWDT_CTL_INTEN_Msk

#define WWDT_CTL_INTEN_Msk   (0x1ul << WWDT_CTL_INTEN_Pos)

WWDT_T::CTL: INTEN Mask

Definition at line 13722 of file M471M_R1_S.h.

◆ WWDT_CTL_INTEN_Pos

#define WWDT_CTL_INTEN_Pos   (1)

WWDT_T::CTL: INTEN Position

Definition at line 13721 of file M471M_R1_S.h.

◆ WWDT_CTL_PSCSEL_Msk

#define WWDT_CTL_PSCSEL_Msk   (0xful << WWDT_CTL_PSCSEL_Pos)

WWDT_T::CTL: PSCSEL Mask

Definition at line 13725 of file M471M_R1_S.h.

◆ WWDT_CTL_PSCSEL_Pos

#define WWDT_CTL_PSCSEL_Pos   (8)

WWDT_T::CTL: PSCSEL Position

Definition at line 13724 of file M471M_R1_S.h.

◆ WWDT_CTL_WWDTEN_Msk

#define WWDT_CTL_WWDTEN_Msk   (0x1ul << WWDT_CTL_WWDTEN_Pos)

WWDT_T::CTL: WWDTEN Mask

Definition at line 13719 of file M471M_R1_S.h.

◆ WWDT_CTL_WWDTEN_Pos

#define WWDT_CTL_WWDTEN_Pos   (0)

WWDT_T::CTL: WWDTEN Position

Definition at line 13718 of file M471M_R1_S.h.

◆ WWDT_RLDCNT_WWDT_RLDCNT_Msk

#define WWDT_RLDCNT_WWDT_RLDCNT_Msk   (0xfffffffful << WWDT_RLDCNT_WWDT_RLDCNT_Pos)

WWDT_T::RLDCNT: WWDT_RLDCNT Mask

Definition at line 13716 of file M471M_R1_S.h.

◆ WWDT_RLDCNT_WWDT_RLDCNT_Pos

#define WWDT_RLDCNT_WWDT_RLDCNT_Pos   (0)
@addtogroup WWDT_CONST WWDT Bit Field Definition
Constant Definitions for WWDT Controller

WWDT_T::RLDCNT: WWDT_RLDCNT Position

Definition at line 13715 of file M471M_R1_S.h.

◆ WWDT_STATUS_WWDTIF_Msk

#define WWDT_STATUS_WWDTIF_Msk   (0x1ul << WWDT_STATUS_WWDTIF_Pos)

WWDT_T::STATUS: WWDTIF Mask

Definition at line 13734 of file M471M_R1_S.h.

◆ WWDT_STATUS_WWDTIF_Pos

#define WWDT_STATUS_WWDTIF_Pos   (0)

WWDT_T::STATUS: WWDTIF Position

Definition at line 13733 of file M471M_R1_S.h.

◆ WWDT_STATUS_WWDTRF_Msk

#define WWDT_STATUS_WWDTRF_Msk   (0x1ul << WWDT_STATUS_WWDTRF_Pos)

WWDT_T::STATUS: WWDTRF Mask

Definition at line 13737 of file M471M_R1_S.h.

◆ WWDT_STATUS_WWDTRF_Pos

#define WWDT_STATUS_WWDTRF_Pos   (1)

WWDT_T::STATUS: WWDTRF Position

Definition at line 13736 of file M471M_R1_S.h.