M471M/R1/S BSP V3.01.000
The Board Support Package for M4521
eadc.h
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1/**************************************************************************/
8#ifndef __EADC_H__
9#define __EADC_H__
10
11/*---------------------------------------------------------------------------------------------------------*/
12/* Include related headers */
13/*---------------------------------------------------------------------------------------------------------*/
14#include "NuMicro.h"
15
16
17#ifdef __cplusplus
18extern "C"
19{
20#endif
21
22
35/*---------------------------------------------------------------------------------------------------------*/
36/* EADC_CTL Constant Definitions */
37/*---------------------------------------------------------------------------------------------------------*/
38#define EADC_CTL_DIFFEN_SINGLE_END (0UL<<EADC_CTL_DIFFEN_Pos)
39#define EADC_CTL_DIFFEN_DIFFERENTIAL (1UL<<EADC_CTL_DIFFEN_Pos)
41#define EADC_CTL_DMOF_STRAIGHT_BINARY (0UL<<EADC_CTL_DMOF_Pos)
42#define EADC_CTL_DMOF_TWOS_COMPLEMENT (1UL<<EADC_CTL_DMOF_Pos)
44#define EADC_CTL_SMPTSEL1 (0UL<<EADC_CTL_SMPTSEL_Pos)
45#define EADC_CTL_SMPTSEL2 (1UL<<EADC_CTL_SMPTSEL_Pos)
46#define EADC_CTL_SMPTSEL3 (2UL<<EADC_CTL_SMPTSEL_Pos)
47#define EADC_CTL_SMPTSEL4 (3UL<<EADC_CTL_SMPTSEL_Pos)
48#define EADC_CTL_SMPTSEL5 (4UL<<EADC_CTL_SMPTSEL_Pos)
49#define EADC_CTL_SMPTSEL6 (5UL<<EADC_CTL_SMPTSEL_Pos)
50#define EADC_CTL_SMPTSEL7 (6UL<<EADC_CTL_SMPTSEL_Pos)
51#define EADC_CTL_SMPTSEL8 (7UL<<EADC_CTL_SMPTSEL_Pos)
53/*---------------------------------------------------------------------------------------------------------*/
54/* EADC_SCTL Constant Definitions */
55/*---------------------------------------------------------------------------------------------------------*/
56#define EADC_SCTL_CHSEL(x) ((x) << EADC_SCTL_CHSEL_Pos)
57#define EADC_SCTL_TRGDLYDIV(x) ((x) << EADC_SCTL_TRGDLYDIV_Pos)
58#define EADC_SCTL_TRGDLYCNT(x) ((x) << EADC_SCTL_TRGDLYCNT_Pos)
60#define EADC_SOFTWARE_TRIGGER (0UL<<EADC_SCTL_TRGSEL_Pos)
61#define EADC_FALLING_EDGE_TRIGGER (EADC_SCTL_EXTFEN_Msk | (1UL<<EADC_SCTL_TRGSEL_Pos))
62#define EADC_RISING_EDGE_TRIGGER (EADC_SCTL_EXTREN_Msk | (1UL<<EADC_SCTL_TRGSEL_Pos))
63#define EADC_FALLING_RISING_EDGE_TRIGGER (EADC_SCTL_EXTFEN_Msk | EADC_SCTL_EXTREN_Msk | (1UL<<EADC_SCTL_TRGSEL_Pos))
64#define EADC_ADINT0_TRIGGER (2UL<<EADC_SCTL_TRGSEL_Pos)
65#define EADC_ADINT1_TRIGGER (3UL<<EADC_SCTL_TRGSEL_Pos)
66#define EADC_TIMER0_TRIGGER (4UL<<EADC_SCTL_TRGSEL_Pos)
67#define EADC_TIMER1_TRIGGER (5UL<<EADC_SCTL_TRGSEL_Pos)
68#define EADC_TIMER2_TRIGGER (6UL<<EADC_SCTL_TRGSEL_Pos)
69#define EADC_TIMER3_TRIGGER (7UL<<EADC_SCTL_TRGSEL_Pos)
70#define EADC_PWM0TG0_TRIGGER (8UL<<EADC_SCTL_TRGSEL_Pos)
71#define EADC_PWM0TG1_TRIGGER (9UL<<EADC_SCTL_TRGSEL_Pos)
72#define EADC_PWM0TG2_TRIGGER (0xAUL<<EADC_SCTL_TRGSEL_Pos)
73#define EADC_PWM0TG3_TRIGGER (0xBUL<<EADC_SCTL_TRGSEL_Pos)
74#define EADC_PWM0TG4_TRIGGER (0xCUL<<EADC_SCTL_TRGSEL_Pos)
75#define EADC_PWM0TG5_TRIGGER (0xDUL<<EADC_SCTL_TRGSEL_Pos)
76#define EADC_PWM1TG0_TRIGGER (0xEUL<<EADC_SCTL_TRGSEL_Pos)
77#define EADC_PWM1TG1_TRIGGER (0xFUL<<EADC_SCTL_TRGSEL_Pos)
78#define EADC_PWM1TG2_TRIGGER (0x10UL<<EADC_SCTL_TRGSEL_Pos)
79#define EADC_PWM1TG3_TRIGGER (0x11UL<<EADC_SCTL_TRGSEL_Pos)
80#define EADC_PWM1TG4_TRIGGER (0x12UL<<EADC_SCTL_TRGSEL_Pos)
81#define EADC_PWM1TG5_TRIGGER (0x13UL<<EADC_SCTL_TRGSEL_Pos)
83#define EADC_SCTL_TRGDLYDIV_DIVIDER_1 (0<<EADC_SCTL_TRGDLYDIV_Pos)
84#define EADC_SCTL_TRGDLYDIV_DIVIDER_2 (0x1UL<<EADC_SCTL_TRGDLYDIV_Pos)
85#define EADC_SCTL_TRGDLYDIV_DIVIDER_4 (0x2UL<<EADC_SCTL_TRGDLYDIV_Pos)
86#define EADC_SCTL_TRGDLYDIV_DIVIDER_16 (0x3UL<<EADC_SCTL_TRGDLYDIV_Pos)
89/*---------------------------------------------------------------------------------------------------------*/
90/* EADC_CMP Constant Definitions */
91/*---------------------------------------------------------------------------------------------------------*/
92#define EADC_CMP_CMPCOND_LESS_THAN (0UL<<EADC_CMP_CMPCOND_Pos)
93#define EADC_CMP_CMPCOND_GREATER_OR_EQUAL (1UL<<EADC_CMP_CMPCOND_Pos)
94#define EADC_CMP_CMPWEN_ENABLE (EADC_CMP_CMPWEN_Msk)
95#define EADC_CMP_CMPWEN_DISABLE (~EADC_CMP_CMPWEN_Msk)
96#define EADC_CMP_ADCMPIE_ENABLE (EADC_CMP_ADCMPIE_Msk)
97#define EADC_CMP_ADCMPIE_DISABLE (~EADC_CMP_ADCMPIE_Msk) /* end of group EADC_EXPORTED_CONSTANTS */
100
104/*---------------------------------------------------------------------------------------------------------*/
105/* EADC Macro Definitions */
106/*---------------------------------------------------------------------------------------------------------*/
107
114#define EADC_CONV_RESET(eadc) ((eadc)->CTL |= EADC_CTL_ADRST_Msk)
115
124#define EADC_ENABLE_PDMA(eadc) ((eadc)->CTL |= EADC_CTL_PDMAEN_Msk)
125
132#define EADC_DISABLE_PDMA(eadc) ((eadc)->CTL &= (~EADC_CTL_PDMAEN_Msk))
133
142#define EADC_ENABLE_DOUBLE_BUFFER(eadc, u32ModuleNum) ((eadc)->SCTL[(u32ModuleNum)] |= EADC_SCTL_DBMEN_Msk)
143
151#define EADC_DISABLE_DOUBLE_BUFFER(eadc, u32ModuleNum) ((eadc)->SCTL[(u32ModuleNum)] &= ~EADC_SCTL_DBMEN_Msk)
152
160#define EADC_ENABLE_INT_POSITION(eadc, u32ModuleNum) ((eadc)->SCTL[(u32ModuleNum)] |= EADC_SCTL_INTPOS_Msk)
161
169#define EADC_DISABLE_INT_POSITION(eadc, u32ModuleNum) ((eadc)->SCTL[(u32ModuleNum)] &= ~EADC_SCTL_INTPOS_Msk)
170
180#define EADC_ENABLE_INT(eadc, u32Mask) ((eadc)->CTL |= ((u32Mask) << EADC_CTL_ADCIEN0_Pos))
181
190#define EADC_DISABLE_INT(eadc, u32Mask) ((eadc)->CTL &= ~((u32Mask) << EADC_CTL_ADCIEN0_Pos))
191
201#define EADC_ENABLE_SAMPLE_MODULE_INT(eadc, u32IntSel, u32ModuleMask) ((eadc)->INTSRC[(u32IntSel)] |= (u32ModuleMask))
202
212#define EADC_DISABLE_SAMPLE_MODULE_INT(eadc, u32IntSel, u32ModuleMask) ((eadc)->INTSRC[(u32IntSel)] &= ~(u32ModuleMask))
213
223#define EADC_SET_DMOF(eadc, u32Format) ((eadc)->CTL = ((eadc)->CTL & ~EADC_CTL_DMOF_Msk) | (u32Format))
224
234#define EADC_START_CONV(eadc, u32ModuleMask) ((eadc)->SWTRG = (u32ModuleMask))
235
245#define EADC_STOP_CONV(eadc, u32ModuleMask) ((eadc)->PENDSTS = (u32ModuleMask))
246
254#define EADC_GET_PENDING_CONV(eadc) ((eadc)->PENDSTS)
255
263#define EADC_GET_CONV_DATA(eadc, u32ModuleNum) ((eadc)->DAT[(u32ModuleNum)] & EADC_DAT_RESULT_Msk)
264
272#define EADC_GET_DATA_OVERRUN_FLAG(eadc, u32ModuleMask) ((((eadc)->STATUS0 >> EADC_STATUS0_OV_Pos) | ((eadc)->STATUS1 & EADC_STATUS1_OV_Msk)) & (u32ModuleMask))
273
281#define EADC_GET_DATA_VALID_FLAG(eadc, u32ModuleMask) ((((eadc)->STATUS0 & EADC_STATUS0_VALID_Msk) | (((eadc)->STATUS1 & EADC_STATUS1_VALID_Msk) << 16)) & (u32ModuleMask))
282
290#define EADC_GET_DOUBLE_DATA(eadc, u32ModuleNum) ((eadc)->DDAT[(u32ModuleNum)] & EADC_DDAT_RESULT_Msk)
291
301#define EADC_GET_INT_FLAG(eadc, u32Mask) ((eadc)->STATUS2 & (u32Mask))
302
310#define EADC_GET_SAMPLE_MODULE_OV_FLAG(eadc, u32ModuleMask) ((eadc)->OVSTS & (u32ModuleMask))
311
321#define EADC_CLR_INT_FLAG(eadc, u32Mask) ((eadc)->STATUS2 = (u32Mask))
322
331#define EADC_CLR_SAMPLE_MODULE_OV_FLAG(eadc, u32ModuleMask) ((eadc)->OVSTS = (u32ModuleMask))
332
340#define EADC_IS_DATA_OV(eadc) (((eadc)->STATUS2 & EADC_STATUS2_AOV_Msk) >> EADC_STATUS2_AOV_Pos)
341
349#define EADC_IS_DATA_VALID(eadc) (((eadc)->STATUS2 & EADC_STATUS2_AVALID_Msk) >> EADC_STATUS2_AVALID_Pos)
350
358#define EADC_IS_SAMPLE_MODULE_OV(eadc) (((eadc)->STATUS2 & EADC_STATUS2_STOVF_Msk) >> EADC_STATUS2_STOVF_Pos)
359
367#define EADC_IS_INT_FLAG_OV(eadc) (((eadc)->STATUS2 & EADC_STATUS2_ADOVIF_Msk) >> EADC_STATUS2_ADOVIF_Pos)
368
376#define EADC_IS_BUSY(eadc) (((eadc)->STATUS2 & EADC_STATUS2_BUSY_Msk) >> EADC_STATUS2_BUSY_Pos)
377
392#define EADC_ENABLE_CMP0(eadc,\
393 u32ModuleNum,\
394 u32Condition,\
395 u16CMPData,\
396 u32MatchCount) ((eadc)->CMP[0] |=(((u32ModuleNum) << EADC_CMP_CMPSPL_Pos)|\
397 (u32Condition) |\
398 ((u16CMPData) << EADC_CMP_CMPDAT_Pos)| \
399 (((u32MatchCount) - 1) << EADC_CMP_CMPMCNT_Pos)|\
400 EADC_CMP_ADCMPEN_Msk))
401
416#define EADC_ENABLE_CMP1(eadc,\
417 u32ModuleNum,\
418 u32Condition,\
419 u16CMPData,\
420 u32MatchCount) ((eadc)->CMP[1] |=(((u32ModuleNum) << EADC_CMP_CMPSPL_Pos)|\
421 (u32Condition) |\
422 ((u16CMPData) << EADC_CMP_CMPDAT_Pos)| \
423 (((u32MatchCount) - 1) << EADC_CMP_CMPMCNT_Pos)|\
424 EADC_CMP_ADCMPEN_Msk))
425
440#define EADC_ENABLE_CMP2(eadc,\
441 u32ModuleNum,\
442 u32Condition,\
443 u16CMPData,\
444 u32MatchCount) ((eadc)->CMP[2] |=(((u32ModuleNum) << EADC_CMP_CMPSPL_Pos)|\
445 (u32Condition) |\
446 ((u16CMPData) << EADC_CMP_CMPDAT_Pos)| \
447 (((u32MatchCount) - 1) << EADC_CMP_CMPMCNT_Pos)|\
448 EADC_CMP_ADCMPEN_Msk))
449
464#define EADC_ENABLE_CMP3(eadc,\
465 u32ModuleNum,\
466 u32Condition,\
467 u16CMPData,\
468 u32MatchCount) ((eadc)->CMP[3] |=(((u32ModuleNum) << EADC_CMP_CMPSPL_Pos)|\
469 (u32Condition) |\
470 ((u16CMPData) << EADC_CMP_CMPDAT_Pos)| \
471 (((u32MatchCount) - 1) << EADC_CMP_CMPMCNT_Pos)|\
472 EADC_CMP_ADCMPEN_Msk))
473
481#define EADC_ENABLE_CMP_WINDOW_MODE(eadc, u32CMP) ((eadc)->CMP[(u32CMP)] |= EADC_CMP_CMPWEN_Msk)
482
490#define EADC_DISABLE_CMP_WINDOW_MODE(eadc, u32CMP) ((eadc)->CMP[(u32CMP)] &= ~EADC_CMP_CMPWEN_Msk)
491
501#define EADC_ENABLE_CMP_INT(eadc, u32CMP) ((eadc)->CMP[(u32CMP)] |= EADC_CMP_ADCMPIE_Msk)
502
510#define EADC_DISABLE_CMP_INT(eadc, u32CMP) ((eadc)->CMP[(u32CMP)] &= ~EADC_CMP_ADCMPIE_Msk)
511
518#define EADC_DISABLE_CMP0(eadc) ((eadc)->CMP[0] = 0)
519
526#define EADC_DISABLE_CMP1(eadc) ((eadc)->CMP[1] = 0)
527
534#define EADC_DISABLE_CMP2(eadc) ((eadc)->CMP[2] = 0)
535
542#define EADC_DISABLE_CMP3(eadc) ((eadc)->CMP[3] = 0)
543
544/*---------------------------------------------------------------------------------------------------------*/
545/* Define EADC functions prototype */
546/*---------------------------------------------------------------------------------------------------------*/
547void EADC_Open(EADC_T *eadc, uint32_t u32InputMode);
548void EADC_Close(EADC_T *eadc);
549void EADC_ConfigSampleModule(EADC_T *eadc, uint32_t u32ModuleNum, uint32_t u32TriggerSource, uint32_t u32Channel);
550void EADC_SetTriggerDelayTime(EADC_T *eadc, uint32_t u32ModuleNum, uint32_t u32TriggerDelayTime, uint32_t u32DelayClockDivider);
551void EADC_SetInternalSampleTime(EADC_T *eadc, uint32_t u32SampleTime);
552void EADC_SetExtendSampleTime(EADC_T *eadc, uint32_t u32ModuleNum, uint32_t u32ExtendSampleTime);
553 /* end of group EADC_EXPORTED_FUNCTIONS */
555 /* end of group EADC_Driver */
557 /* end of group Standard_Driver */
559
560#ifdef __cplusplus
561}
562#endif
563
564#endif //__EADC_H__
565
NuMicro peripheral access layer header file.
void EADC_SetInternalSampleTime(EADC_T *eadc, uint32_t u32SampleTime)
Set ADC internal sample time.
Definition: eadc.c:125
void EADC_Close(EADC_T *eadc)
Disable EADC_module.
Definition: eadc.c:46
void EADC_SetExtendSampleTime(EADC_T *eadc, uint32_t u32ModuleNum, uint32_t u32ExtendSampleTime)
Set ADC extend sample time.
Definition: eadc.c:142
void EADC_SetTriggerDelayTime(EADC_T *eadc, uint32_t u32ModuleNum, uint32_t u32TriggerDelayTime, uint32_t u32DelayClockDivider)
Set trigger delay time.
Definition: eadc.c:107
void EADC_ConfigSampleModule(EADC_T *eadc, uint32_t u32ModuleNum, uint32_t u32TriggerSource, uint32_t u32Channel)
Configure the sample control logic module.
Definition: eadc.c:83
void EADC_Open(EADC_T *eadc, uint32_t u32InputMode)
This function make EADC_module be ready to convert.
Definition: eadc.c:33