sc.c

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/**************************************************************************/
#include "M4521.h"
 
// Below are variables used locally by SC driver and does not want to parse by doxygen unless HIDDEN_SYMBOLS is defined
static uint32_t u32CardStateIgnore[SC_INTERFACE_NUM] = {0};
 
 
int32_t  g_SC_i32ErrCode = 0;
 
uint32_t SC_IsCardInserted(SC_T *sc)
{
    // put conditions into two variable to remove IAR compilation warning
    uint32_t cond1 = ((sc->STATUS & SC_STATUS_CDPINSTS_Msk) >> SC_STATUS_CDPINSTS_Pos);
    uint32_t cond2 = ((sc->CTL & SC_CTL_CDLV_Msk) >> SC_CTL_CDLV_Pos);
 
    if(sc == SC0 && u32CardStateIgnore[0] == 1)
        return TRUE;
#if 0 /* M4521 has only one SC interface */
    else if(sc == SC1 && u32CardStateIgnore[1] == 1)
        return TRUE;
    else if(sc == SC2 && u32CardStateIgnore[2] == 1)
        return TRUE;
    else if(sc == SC3 && u32CardStateIgnore[3] == 1)
        return TRUE;
    else if(sc == SC4 && u32CardStateIgnore[4] == 1)
        return TRUE;
    else if(sc == SC5 && u32CardStateIgnore[5] == 1)
        return TRUE;
#endif
    else if(cond1 != cond2)
        return FALSE;
    else
        return TRUE;
}
 
void SC_ClearFIFO(SC_T *sc)
{
    sc->ALTCTL |= (SC_ALTCTL_TXRST_Msk | SC_ALTCTL_RXRST_Msk);
}
 
void SC_Close(SC_T *sc)
{
    sc->INTEN = 0;
    sc->PINCTL = 0;
    sc->ALTCTL = 0;
    sc->CTL = 0;
}
 
void SC_Open(SC_T *sc, uint32_t u32CD, uint32_t u32PWR)
{
    uint32_t u32Reg = 0, u32Intf;
    uint32_t u32Timeout;
 
    if(sc == SC0)
        u32Intf = 0;
#if 0 /* M4521 has only one SC interface */
    else if(sc == SC1)
        u32Intf = 1;
    else if(sc == SC2)
        u32Intf = 2;
    else if(sc == SC3)
        u32Intf = 3;
    else if(sc == SC4)
        u32Intf = 4;
    else if(sc == SC5)
        u32Intf = 5;
#endif
    else
        return ;
 
    if(u32CD != SC_PIN_STATE_IGNORE)
    {
        u32Reg = u32CD ? 0: SC_CTL_CDLV_Msk;
        u32CardStateIgnore[u32Intf] = 0;
    }
    else
    {
        u32CardStateIgnore[u32Intf] = 1;
    }
 
    g_SC_i32ErrCode = 0;
    u32Timeout = SystemCoreClock;
    while ((sc->PINCTL & SC_PINCTL_SYNC_Msk) && (u32Timeout-- > 0));
    if (sc->PINCTL & SC_PINCTL_SYNC_Msk)
        g_SC_i32ErrCode = -1;
    sc->PINCTL = u32PWR ? 0 : SC_PINCTL_PWRINV_Msk;
 
    u32Timeout = SystemCoreClock;
    while ((sc->CTL & SC_CTL_SYNC_Msk) && (u32Timeout-- > 0));
    if (sc->CTL & SC_CTL_SYNC_Msk)
        g_SC_i32ErrCode = -1;
    sc->CTL = SC_CTL_SCEN_Msk | u32Reg;
}
 
void SC_ResetReader(SC_T *sc)
{
    uint32_t u32Intf;
    uint32_t u32Timeout;
 
    if(sc == SC0)
        u32Intf = 0;
#if 0 /* M4521 has only one SC interface */
    else if(sc == SC1)
        u32Intf = 1;
    else if(sc == SC2)
        u32Intf = 2;
    else if(sc == SC3)
        u32Intf = 3;
    else if(sc == SC4)
        u32Intf = 4;
    else if(sc == SC5)
        u32Intf = 5;
#endif
    else
        return ;
 
    // Reset FIFO, enable auto de-activation while card removal
    sc->ALTCTL |= (SC_ALTCTL_TXRST_Msk | SC_ALTCTL_RXRST_Msk | SC_ALTCTL_ADACEN_Msk);
    // Set Rx trigger level to 1 character, longest card detect debounce period, disable error retry (EMV ATR does not use error retry)
    u32Timeout = SystemCoreClock;
    while ((sc->CTL & SC_CTL_SYNC_Msk) && (u32Timeout-- > 0));
    if (sc->CTL & SC_CTL_SYNC_Msk)
        g_SC_i32ErrCode = -1;
 
    sc->CTL &= ~(SC_CTL_RXTRGLV_Msk | SC_CTL_CDDBSEL_Msk | SC_CTL_TXRTY_Msk | SC_CTL_RXRTY_Msk);
    // Enable auto convention, and all three smartcard internal timers
    sc->CTL |= SC_CTL_AUTOCEN_Msk | SC_CTL_TMRSEL_Msk;
    // Disable Rx timeout
    sc->RXTOUT = 0;
    // 372 clocks per ETU by default
    sc->ETUCTL = 371;
 
    /* Enable necessary interrupt for smartcard operation */
    if(u32CardStateIgnore[u32Intf]) // Do not enable card detect interrupt if card present state ignore
        sc->INTEN = (SC_INTEN_RDAIEN_Msk |
                     SC_INTEN_TERRIEN_Msk |
                     SC_INTEN_TMR0IEN_Msk |
                     SC_INTEN_TMR1IEN_Msk |
                     SC_INTEN_TMR2IEN_Msk |
                     SC_INTEN_BGTIEN_Msk |
                     SC_INTEN_ACERRIEN_Msk);
    else
        sc->INTEN = (SC_INTEN_RDAIEN_Msk |
                     SC_INTEN_TERRIEN_Msk |
                     SC_INTEN_TMR0IEN_Msk |
                     SC_INTEN_TMR1IEN_Msk |
                     SC_INTEN_TMR2IEN_Msk |
                     SC_INTEN_BGTIEN_Msk |
                     SC_INTEN_ACERRIEN_Msk |
                     SC_INTEN_CDIEN_Msk);
 
    return;
}
 
void SC_SetBlockGuardTime(SC_T *sc, uint32_t u32BGT)
{
    sc->CTL = (sc->CTL & ~SC_CTL_BGT_Msk) | ((u32BGT - 1) << SC_CTL_BGT_Pos);
}
 
void SC_SetCharGuardTime(SC_T *sc, uint32_t u32CGT)
{
    u32CGT -= sc->CTL & SC_CTL_NSB_Msk ? 11 : 12;
    sc->EGT = u32CGT;
}
 
void SC_StopAllTimer(SC_T *sc)
{
    sc->ALTCTL &= ~(SC_ALTCTL_CNTEN0_Msk | SC_ALTCTL_CNTEN1_Msk | SC_ALTCTL_CNTEN2_Msk);
}
 
void SC_StartTimer(SC_T *sc, uint32_t u32TimerNum, uint32_t u32Mode, uint32_t u32ETUCount)
{
    uint32_t reg = u32Mode | (SC_TMRCTL0_CNT_Msk & (u32ETUCount - 1));
 
    if(u32TimerNum == 0)
    {
        sc->TMRCTL0 = reg;
        sc->ALTCTL |= SC_ALTCTL_CNTEN0_Msk;
    }
    else if(u32TimerNum == 1)
    {
        sc->TMRCTL1 = reg;
        sc->ALTCTL |= SC_ALTCTL_CNTEN1_Msk;
    }
    else       // timer 2
    {
        sc->TMRCTL2 = reg;
        sc->ALTCTL |= SC_ALTCTL_CNTEN2_Msk;
    }
}
 
void SC_StopTimer(SC_T *sc, uint32_t u32TimerNum)
{
    if(u32TimerNum == 0)
        sc->ALTCTL &= ~SC_ALTCTL_CNTEN0_Msk;
    else if(u32TimerNum == 1)
        sc->ALTCTL &= ~SC_ALTCTL_CNTEN1_Msk;
    else    // timer 2
        sc->ALTCTL &= ~SC_ALTCTL_CNTEN2_Msk;
}
 
 
 /* end of group SC_EXPORTED_FUNCTIONS */
 /* end of group SC_Driver */
 /* end of group Standard_Driver */
 
/*** (C) COPYRIGHT 2022 Nuvoton Technology Corp. ***/