fmc.h

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/**************************************************************************/
#ifndef __FMC_H__
#define __FMC_H__
 
#include "M4521.h"
 
#ifdef __cplusplus
extern "C"
{
#endif
 
 
/*---------------------------------------------------------------------------------------------------------*/
/* Global constant definitions                                                                                     */
/*---------------------------------------------------------------------------------------------------------*/
#define ISBEN   0
 
/*---------------------------------------------------------------------------------------------------------*/
/* Define Base Address                                                                                     */
/*---------------------------------------------------------------------------------------------------------*/
#define FMC_APROM_BASE          0x00000000UL    
#define FMC_LDROM_BASE          0x00100000UL    
#define FMC_SPROM_BASE          0x00200000UL    
#define FMC_CONFIG_BASE         0x00300000UL    
#define FMC_CONFIG0_ADDR        (FMC_CONFIG_BASE)       
#define FMC_CONFIG1_ADDR        (FMC_CONFIG_BASE + 4)   
#define FMC_FLASH_PAGE_SIZE     0x800           
#define FMC_LDROM_SIZE          0x1000          
/*---------------------------------------------------------------------------------------------------------*/
/*  ISPCTL constant definitions                                                                            */
/*---------------------------------------------------------------------------------------------------------*/
#define FMC_ISPCTL_BS_LDROM     0x2     
#define FMC_ISPCTL_BS_APROM     0x0     
/*---------------------------------------------------------------------------------------------------------*/
/*  ISPCMD constant definitions                                                                            */
/*---------------------------------------------------------------------------------------------------------*/
#define FMC_ISPCMD_READ         0x00     
#define FMC_ISPCMD_PROGRAM      0x21     
#define FMC_ISPCMD_WRITE_8      0x61     
#define FMC_ISPCMD_PAGE_ERASE   0x22     
#define FMC_ISPCMD_READ_CID     0x0B     
#define FMC_ISPCMD_READ_UID     0x04     
#define FMC_ISPCMD_READ_DID     0x0C     
#define FMC_ISPCMD_VECMAP       0x2E     
#define FMC_ISPCMD_CHECKSUM     0x0D     
#define FMC_ISPCMD_CAL_CHECKSUM 0x2D     
#define FMC_ISPCMD_MULTI_PROG   0x27     
/*---------------------------------------------------------------------------------------------------------*/
/*  FTCTL constant definitions                                                                            */
/*---------------------------------------------------------------------------------------------------------*/
#define FMC_FTCTL_OPTIMIZE_DISABLE      0x00       
#define FMC_FTCTL_OPTIMIZE_12MHZ        0x01       
#define FMC_FTCTL_OPTIMIZE_36MHZ        0x02       
#define FMC_FTCTL_OPTIMIZE_60MHZ        0x04       
#define FMC_FTCTL_OPTIMIZE_72MHZ        0x05       
#define FMC_TIMEOUT_READ        ((SystemCoreClock/10)*2) 
#define FMC_TIMEOUT_WRITE       ((SystemCoreClock/10)*2) 
#define FMC_TIMEOUT_ERASE       ((SystemCoreClock/10)*4) 
#define FMC_TIMEOUT_CHKSUM      (SystemCoreClock*2)       /* end of group FMC_EXPORTED_CONSTANTS */
 
/*---------------------------------------------------------------------------------------------------------*/
/*  Global variables                                                                                       */
/*---------------------------------------------------------------------------------------------------------*/
extern int32_t  g_FMC_i32ErrCode;
 
/*---------------------------------------------------------------------------------------------------------*/
/*  FMC Macro Definitions                                                                                  */
/*---------------------------------------------------------------------------------------------------------*/
#define FMC_ENABLE_ISP()          (FMC->ISPCTL |=  FMC_ISPCTL_ISPEN_Msk)  
#define FMC_DISABLE_ISP()         (FMC->ISPCTL &= ~FMC_ISPCTL_ISPEN_Msk)  
#define FMC_ENABLE_LD_UPDATE()    (FMC->ISPCTL |=  FMC_ISPCTL_LDUEN_Msk)  
#define FMC_DISABLE_LD_UPDATE()   (FMC->ISPCTL &= ~FMC_ISPCTL_LDUEN_Msk)  
#define FMC_ENABLE_CFG_UPDATE()   (FMC->ISPCTL |=  FMC_ISPCTL_CFGUEN_Msk) 
#define FMC_DISABLE_CFG_UPDATE()  (FMC->ISPCTL &= ~FMC_ISPCTL_CFGUEN_Msk) 
#define FMC_ENABLE_AP_UPDATE()    (FMC->ISPCTL |=  FMC_ISPCTL_APUEN_Msk)  
#define FMC_DISABLE_AP_UPDATE()   (FMC->ISPCTL &= ~FMC_ISPCTL_APUEN_Msk)  
#define FMC_SELECT_NEXT_BOOT(x)   (FMC->ISPCTL = (FMC->ISPCTL & ~FMC_ISPCTL_BS_Msk) | ((x) << FMC_ISPCTL_BS_Pos)) 
#define FMC_GET_BOOT_STATUS()     ((FMC->ISPCTL & FMC_ISPCTL_BS_Msk)?1:0) 
static __INLINE int32_t FMC_SetVectorPageAddr(uint32_t u32PageAddr)
{
    uint32_t  tout = FMC_TIMEOUT_WRITE;
 
    g_FMC_i32ErrCode = 0;
    FMC->ISPCMD = FMC_ISPCMD_VECMAP; /* Set ISP Command Code */
    FMC->ISPADDR = u32PageAddr;       /* The address of specified page which will be map to address 0x0. It must be page alignment. */
    FMC->ISPTRG = 0x1;               /* Trigger to start ISP procedure */
#if ISBEN
    __ISB();
#endif                         /* To make sure ISP/CPU be Synchronized */
    while (tout-- > 0)
    {
        if (!FMC->ISPTRG)             /* Waiting for ISP Done */
            return 0;
    }
    g_FMC_i32ErrCode = -1;
    return -1;
}
 
static __INLINE uint32_t FMC_GetVECMAP(void)
{
    return (FMC->ISPSTS & FMC_ISPSTS_VECMAP_Msk);
}
 
void FMC_Open(void);
void FMC_Close(void);
void FMC_EnableAPUpdate(void);
void FMC_DisableAPUpdate(void);
void FMC_EnableConfigUpdate(void);
void FMC_DisableConfigUpdate(void);
void FMC_EnableLDUpdate(void);
void FMC_DisableLDUpdate(void);
uint32_t FMC_Read(uint32_t u32Addr);
uint32_t FMC_ReadUID(uint8_t u8Index);
uint32_t FMC_ReadCID(void);
uint32_t FMC_ReadPID(void);
uint32_t FMC_ReadUCID(uint32_t u32Index);
int32_t FMC_Write(uint32_t u32Addr, uint32_t u32Data);
int32_t FMC_Write8(uint32_t u32Addr, uint32_t u32Data0, uint32_t u32Data1);
int32_t FMC_Write256(uint32_t u32Addr, uint32_t *pu32Buf);
int32_t FMC_Erase(uint32_t u32Addr);
int32_t FMC_ReadConfig(uint32_t *u32Config, uint32_t u32Count);
int32_t FMC_WriteConfig(uint32_t *u32Config, uint32_t u32Count);
void FMC_SetBootSource(int32_t i32BootSrc);
int32_t FMC_GetBootSource(void);
uint32_t FMC_ReadDataFlashBaseAddr(void);
uint32_t FMC_GetCheckSum(uint32_t u32Addr, int32_t i32Size);
void FMC_EnableFreqOptimizeMode(uint32_t u32Mode);
void FMC_DisableFreqOptimizeMode(void); /* end of group FMC_EXPORTED_FUNCTIONS */
 /* end of group FMC_Driver */
 /* end of group Standard_Driver */
 
#ifdef __cplusplus
}
#endif
 
 
#endif