spi.h File Reference

M4521 SPI driver header file. More...

#include "M4521.h"

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Go to the source code of this file.

Macros
#define	SPI_MODE_0   (SPI_CTL_TXNEG_Msk)
#define	SPI_MODE_1   (SPI_CTL_RXNEG_Msk)
#define	SPI_MODE_2   (SPI_CTL_CLKPOL_Msk | SPI_CTL_RXNEG_Msk)
#define	SPI_MODE_3   (SPI_CTL_CLKPOL_Msk | SPI_CTL_TXNEG_Msk)
#define	SPI_SLAVE   (SPI_CTL_SLAVE_Msk)
#define	SPI_MASTER   (0x0)
#define	SPI_SS   (SPI_SSCTL_SS_Msk)
#define	SPI_SS_ACTIVE_HIGH   (SPI_SSCTL_SSACTPOL_Msk)
#define	SPI_SS_ACTIVE_LOW   (0x0)
#define	SPI_UNIT_INT_MASK   (0x001)
#define	SPI_SSACT_INT_MASK   (0x002)
#define	SPI_SSINACT_INT_MASK   (0x004)
#define	SPI_SLVUR_INT_MASK   (0x008)
#define	SPI_SLVBE_INT_MASK   (0x010)
#define	SPI_SLVTO_INT_MASK   (0x020)
#define	SPI_TXUF_INT_MASK   (0x040)
#define	SPI_FIFO_TXTH_INT_MASK   (0x080)
#define	SPI_FIFO_RXTH_INT_MASK   (0x100)
#define	SPI_FIFO_RXOV_INT_MASK   (0x200)
#define	SPI_FIFO_RXTO_INT_MASK   (0x400)
#define	SPI_BUSY_MASK   (0x01)
#define	SPI_RX_EMPTY_MASK   (0x02)
#define	SPI_RX_FULL_MASK   (0x04)
#define	SPI_TX_EMPTY_MASK   (0x08)
#define	SPI_TX_FULL_MASK   (0x10)
#define	SPI_TXRX_RESET_MASK   (0x20)
#define	SPI_SPIEN_STS_MASK   (0x40)
#define	SPI_SSLINE_STS_MASK   (0x80)
#define	I2S_DATABIT_8   (0 << SPI_I2SCTL_WDWIDTH_Pos)
#define	I2S_DATABIT_16   (1 << SPI_I2SCTL_WDWIDTH_Pos)
#define	I2S_DATABIT_24   (2 << SPI_I2SCTL_WDWIDTH_Pos)
#define	I2S_DATABIT_32   (3 << SPI_I2SCTL_WDWIDTH_Pos)
#define	I2S_MONO   SPI_I2SCTL_MONO_Msk
#define	I2S_STEREO   0
#define	I2S_FORMAT_I2S   (0<<SPI_I2SCTL_FORMAT_Pos)
#define	I2S_FORMAT_MSB   (1<<SPI_I2SCTL_FORMAT_Pos)
#define	I2S_FORMAT_PCMA   (2<<SPI_I2SCTL_FORMAT_Pos)
#define	I2S_FORMAT_PCMB   (3<<SPI_I2SCTL_FORMAT_Pos)
#define	I2S_MODE_SLAVE   SPI_I2SCTL_SLAVE_Msk
#define	I2S_MODE_MASTER   0
#define	I2S_FIFO_TX_LEVEL_WORD_0   0
#define	I2S_FIFO_TX_LEVEL_WORD_1   (1 << SPI_FIFOCTL_TXTH_Pos)
#define	I2S_FIFO_TX_LEVEL_WORD_2   (2 << SPI_FIFOCTL_TXTH_Pos)
#define	I2S_FIFO_TX_LEVEL_WORD_3   (3 << SPI_FIFOCTL_TXTH_Pos)
#define	I2S_FIFO_RX_LEVEL_WORD_1   0
#define	I2S_FIFO_RX_LEVEL_WORD_2   (1 << SPI_FIFOCTL_RXTH_Pos)
#define	I2S_FIFO_RX_LEVEL_WORD_3   (2 << SPI_FIFOCTL_RXTH_Pos)
#define	I2S_FIFO_RX_LEVEL_WORD_4   (3 << SPI_FIFOCTL_RXTH_Pos)
#define	I2S_MONO_RIGHT   0
#define	I2S_MONO_LEFT   SPI_I2SCTL_RXLCH_Msk
#define	I2S_RIGHT   0
#define	I2S_LEFT   1
#define	I2S_FIFO_TXTH_INT_MASK   (0x01)
#define	I2S_FIFO_RXTH_INT_MASK   (0x02)
#define	I2S_FIFO_RXOV_INT_MASK   (0x04)
#define	I2S_FIFO_RXTO_INT_MASK   (0x08)
#define	I2S_TXUF_INT_MASK   (0x10)
#define	I2S_RIGHT_ZC_INT_MASK   (0x20)
#define	I2S_LEFT_ZC_INT_MASK   (0x40)
#define	SPI_CLR_UNIT_TRANS_INT_FLAG(spi)   ((spi)->STATUS = SPI_STATUS_UNITIF_Msk)
	Clear the unit transfer interrupt flag. More...
#define	SPI_DISABLE_2BIT_MODE(spi)   ((spi)->CTL &= ~SPI_CTL_TWOBIT_Msk)
	Disable 2-bit Transfer mode. More...
#define	SPI_DISABLE_3WIRE_MODE(spi)   ((spi)->SSCTL &= ~SPI_SSCTL_SLV3WIRE_Msk)
	Disable Slave 3-wire mode. More...
#define	SPI_DISABLE_DUAL_MODE(spi)   ((spi)->CTL &= ~SPI_CTL_DUALIOEN_Msk)
	Disable Dual I/O mode. More...
#define	SPI_DISABLE_QUAD_MODE(spi)   ((spi)->CTL &= ~SPI_CTL_QUADIOEN_Msk)
	Disable Quad I/O mode. More...
#define	SPI_ENABLE_2BIT_MODE(spi)   ((spi)->CTL |= SPI_CTL_TWOBIT_Msk)
	Enable 2-bit Transfer mode. More...
#define	SPI_ENABLE_3WIRE_MODE(spi)   ((spi)->SSCTL |= SPI_SSCTL_SLV3WIRE_Msk)
	Enable Slave 3-wire mode. More...
#define	SPI_ENABLE_DUAL_INPUT_MODE(spi)   ((spi)->CTL = ((spi)->CTL & (~SPI_CTL_QDIODIR_Msk)) | SPI_CTL_DUALIOEN_Msk)
	Enable Dual input mode. More...
#define	SPI_ENABLE_DUAL_OUTPUT_MODE(spi)   ((spi)->CTL |= (SPI_CTL_QDIODIR_Msk | SPI_CTL_DUALIOEN_Msk))
	Enable Dual output mode. More...
#define	SPI_ENABLE_QUAD_INPUT_MODE(spi)   ((spi)->CTL = ((spi)->CTL & (~SPI_CTL_QDIODIR_Msk)) | SPI_CTL_QUADIOEN_Msk)
	Enable Quad input mode. More...
#define	SPI_ENABLE_QUAD_OUTPUT_MODE(spi)   ((spi)->CTL |= (SPI_CTL_QDIODIR_Msk | SPI_CTL_QUADIOEN_Msk))
	Enable Quad output mode. More...
#define	SPI_TRIGGER_RX_PDMA(spi)   ((spi)->PDMACTL |= SPI_PDMACTL_RXPDMAEN_Msk)
	Trigger RX PDMA function. More...
#define	SPI_TRIGGER_TX_PDMA(spi)   ((spi)->PDMACTL |= SPI_PDMACTL_TXPDMAEN_Msk)
	Trigger TX PDMA function. More...
#define	SPI_DISABLE_RX_PDMA(spi)   ( (spi)->PDMACTL &= ~SPI_PDMACTL_RXPDMAEN_Msk )
	Disable RX PDMA transfer. More...
#define	SPI_DISABLE_TX_PDMA(spi)   ( (spi)->PDMACTL &= ~SPI_PDMACTL_TXPDMAEN_Msk )
	Disable TX PDMA transfer. More...
#define	SPI_GET_RX_FIFO_COUNT(spi)   (((spi)->STATUS & SPI_STATUS_RXCNT_Msk) >> SPI_STATUS_RXCNT_Pos)
	Get the count of available data in RX FIFO. More...
#define	SPI_GET_RX_FIFO_EMPTY_FLAG(spi)   (((spi)->STATUS & SPI_STATUS_RXEMPTY_Msk)>>SPI_STATUS_RXEMPTY_Pos)
	Get the RX FIFO empty flag. More...
#define	SPI_GET_TX_FIFO_EMPTY_FLAG(spi)   (((spi)->STATUS & SPI_STATUS_TXEMPTY_Msk)>>SPI_STATUS_TXEMPTY_Pos)
	Get the TX FIFO empty flag. More...
#define	SPI_GET_TX_FIFO_FULL_FLAG(spi)   (((spi)->STATUS & SPI_STATUS_TXFULL_Msk)>>SPI_STATUS_TXFULL_Pos)
	Get the TX FIFO full flag. More...
#define	SPI_READ_RX(spi)   ((spi)->RX)
	Get the datum read from RX register. More...
#define	SPI_WRITE_TX(spi, u32TxData)   ((spi)->TX = (u32TxData))
	Write datum to TX register. More...
#define	SPI_SET_SS_HIGH(spi)   ((spi)->SSCTL = ((spi)->SSCTL & (~SPI_SSCTL_AUTOSS_Msk)) | (SPI_SSCTL_SSACTPOL_Msk | SPI_SSCTL_SS_Msk))
	Set SPIn_SS pin to high state. More...
#define	SPI_SET_SS_LOW(spi)   ((spi)->SSCTL = ((spi)->SSCTL & (~(SPI_SSCTL_AUTOSS_Msk | SPI_SSCTL_SSACTPOL_Msk))) | SPI_SSCTL_SS_Msk)
	Set SPIn_SS pin to low state. More...
#define	SPI_ENABLE_BYTE_REORDER(spi)   ((spi)->CTL |= SPI_CTL_REORDER_Msk)
	Enable Byte Reorder function. More...
#define	SPI_DISABLE_BYTE_REORDER(spi)   ((spi)->CTL &= ~SPI_CTL_REORDER_Msk)
	Disable Byte Reorder function. More...
#define	SPI_SET_SUSPEND_CYCLE(spi, u32SuspCycle)   ((spi)->CTL = ((spi)->CTL & ~SPI_CTL_SUSPITV_Msk) | ((u32SuspCycle) << SPI_CTL_SUSPITV_Pos))
	Set the length of suspend interval. More...
#define	SPI_SET_LSB_FIRST(spi)   ((spi)->CTL |= SPI_CTL_LSB_Msk)
	Set the SPI transfer sequence with LSB first. More...
#define	SPI_SET_MSB_FIRST(spi)   ((spi)->CTL &= ~SPI_CTL_LSB_Msk)
	Set the SPI transfer sequence with MSB first. More...
#define	SPI_SET_DATA_WIDTH(spi, u32Width)   ((spi)->CTL = ((spi)->CTL & ~SPI_CTL_DWIDTH_Msk) | (((u32Width)&0x1F) << SPI_CTL_DWIDTH_Pos))
	Set the data width of a SPI transaction. More...
#define	SPI_IS_BUSY(spi)   ( ((spi)->STATUS & SPI_STATUS_BUSY_Msk)>>SPI_STATUS_BUSY_Pos )
	Get the SPI busy state. More...
#define	SPI_ENABLE(spi)   ((spi)->CTL |= SPI_CTL_SPIEN_Msk)
	Enable SPI controller. More...
#define	SPI_DISABLE(spi)   ((spi)->CTL &= ~SPI_CTL_SPIEN_Msk)
	Disable SPI controller. More...
#define	I2S_ENABLE_TXDMA(i2s)   ( (i2s)->PDMACTL |= SPI_PDMACTL_TXPDMAEN_Msk )
	Enable I2S TX DMA function. More...
#define	I2S_DISABLE_TXDMA(i2s)   ( (i2s)->PDMACTL &= ~SPI_PDMACTL_TXPDMAEN_Msk )
	Disable I2S TX DMA function. More...
#define	I2S_ENABLE_RXDMA(i2s)   ( (i2s)->PDMACTL |= SPI_PDMACTL_RXPDMAEN_Msk )
	Enable I2S RX DMA function. More...
#define	I2S_DISABLE_RXDMA(i2s)   ( (i2s)->PDMACTL &= ~SPI_PDMACTL_RXPDMAEN_Msk )
	Disable I2S RX DMA function. More...
#define	I2S_ENABLE_TX(i2s)   ( (i2s)->I2SCTL |= SPI_I2SCTL_TXEN_Msk )
	Enable I2S TX function. More...
#define	I2S_DISABLE_TX(i2s)   ( (i2s)->I2SCTL &= ~SPI_I2SCTL_TXEN_Msk )
	Disable I2S TX function. More...
#define	I2S_ENABLE_RX(i2s)   ( (i2s)->I2SCTL |= SPI_I2SCTL_RXEN_Msk )
	Enable I2S RX function. More...
#define	I2S_DISABLE_RX(i2s)   ( (i2s)->I2SCTL &= ~SPI_I2SCTL_RXEN_Msk )
	Disable I2S RX function. More...
#define	I2S_ENABLE_TX_MUTE(i2s)   ( (i2s)->I2SCTL |= SPI_I2SCTL_MUTE_Msk )
	Enable TX Mute function. More...
#define	I2S_DISABLE_TX_MUTE(i2s)   ( (i2s)->I2SCTL &= ~SPI_I2SCTL_MUTE_Msk )
	Disable TX Mute function. More...
#define	I2S_CLR_TX_FIFO(i2s)   ( (i2s)->FIFOCTL |= SPI_FIFOCTL_TXFBCLR_Msk )
	Clear TX FIFO. More...
#define	I2S_CLR_RX_FIFO(i2s)   ( (i2s)->FIFOCTL |= SPI_FIFOCTL_RXFBCLR_Msk )
	Clear RX FIFO. More...
#define	I2S_WRITE_TX_FIFO(i2s, u32Data)   ( (i2s)->TX = (u32Data) )
	Write data to I2S TX FIFO. More...
#define	I2S_READ_RX_FIFO(i2s)   ( (i2s)->RX )
	Read RX FIFO. More...
#define	I2S_GET_INT_FLAG(i2s, u32Mask)   ( (i2s)->I2SSTS & (u32Mask) )
	Get the interrupt flag. More...
#define	I2S_CLR_INT_FLAG(i2s, u32Mask)   ( (i2s)->I2SSTS = (u32Mask) )
	Clear the interrupt flag. More...
#define	I2S_GET_TX_FIFO_LEVEL(i2s)   ( ((i2s)->I2SSTS & SPI_I2SSTS_TXCNT_Msk) >> SPI_I2SSTS_TXCNT_Pos )
	Get transmit FIFO level. More...
#define	I2S_GET_RX_FIFO_LEVEL(i2s)   ( ((i2s)->I2SSTS & SPI_I2SSTS_RXCNT_Msk) >> SPI_I2SSTS_RXCNT_Pos )
	Get receive FIFO level. More...

Functions
static __INLINE void	I2S_ENABLE_TX_ZCD (SPI_T *i2s, uint32_t u32ChMask)
	Enable zero cross detection function. More...
static __INLINE void	I2S_DISABLE_TX_ZCD (SPI_T *i2s, uint32_t u32ChMask)
	Disable zero cross detection function. More...
static __INLINE void	I2S_SET_MONO_RX_CHANNEL (SPI_T *i2s, uint32_t u32Ch)
	This function sets the recording source channel when mono mode is used. More...
uint32_t	SPI_Open (SPI_T *spi, uint32_t u32MasterSlave, uint32_t u32SPIMode, uint32_t u32DataWidth, uint32_t u32BusClock)
	This function make SPI module be ready to transfer. More...
void	SPI_Close (SPI_T *spi)
	Disable SPI controller. More...
void	SPI_ClearRxFIFO (SPI_T *spi)
	Clear RX FIFO buffer. More...
void	SPI_ClearTxFIFO (SPI_T *spi)
	Clear TX FIFO buffer. More...
void	SPI_DisableAutoSS (SPI_T *spi)
	Disable the automatic slave selection function. More...
void	SPI_EnableAutoSS (SPI_T *spi, uint32_t u32SSPinMask, uint32_t u32ActiveLevel)
	Enable the automatic slave selection function. More...
uint32_t	SPI_SetBusClock (SPI_T *spi, uint32_t u32BusClock)
	Set the SPI bus clock. More...
void	SPI_SetFIFO (SPI_T *spi, uint32_t u32TxThreshold, uint32_t u32RxThreshold)
	Configure FIFO threshold setting. More...
uint32_t	SPI_GetBusClock (SPI_T *spi)
	Get the actual frequency of SPI bus clock. Only available in Master mode. More...
void	SPI_EnableInt (SPI_T *spi, uint32_t u32Mask)
	Enable interrupt function. More...
void	SPI_DisableInt (SPI_T *spi, uint32_t u32Mask)
	Disable interrupt function. More...
uint32_t	SPI_GetIntFlag (SPI_T *spi, uint32_t u32Mask)
	Get interrupt flag. More...
void	SPI_ClearIntFlag (SPI_T *spi, uint32_t u32Mask)
	Clear interrupt flag. More...
uint32_t	SPI_GetStatus (SPI_T *spi, uint32_t u32Mask)
	Get SPI status. More...
uint32_t	I2S_Open (SPI_T *i2s, uint32_t u32MasterSlave, uint32_t u32SampleRate, uint32_t u32WordWidth, uint32_t u32Channels, uint32_t u32DataFormat)
	This function configures some parameters of I2S interface for general purpose use. More...
void	I2S_Close (SPI_T *i2s)
	Disable I2S function. More...
void	I2S_EnableInt (SPI_T *i2s, uint32_t u32Mask)
	Enable interrupt function. More...
void	I2S_DisableInt (SPI_T *i2s, uint32_t u32Mask)
	Disable interrupt function. More...
uint32_t	I2S_EnableMCLK (SPI_T *i2s, uint32_t u32BusClock)
	Enable master clock (MCLK). More...
void	I2S_DisableMCLK (SPI_T *i2s)
	Disable master clock (MCLK). More...
void	I2S_SetFIFO (SPI_T *i2s, uint32_t u32TxThreshold, uint32_t u32RxThreshold)
	Configure FIFO threshold setting. More...

Detailed Description

M4521 SPI driver header file.

Version

V0.10

Revision

17

Date

15/08/11 10:26a

Note

SPDX-License-Identifier: Apache-2.0 Copyright (C) 2022 Nuvoton Technology Corp. All rights reserved.

Definition in file spi.h.