Collaboration diagram for SPI Exported Constants:

Modules
	SPI Exported Functions

Macros
#define	SPI_MODE_0 (SPI_CTL_TXNEG_Msk)

#define	SPI_MODE_1 (SPI_CTL_RXNEG_Msk)

#define	SPI_MODE_2 (SPI_CTL_CLKPOL_Msk \| SPI_CTL_RXNEG_Msk)

#define	SPI_MODE_3 (SPI_CTL_CLKPOL_Msk \| SPI_CTL_TXNEG_Msk)

#define	SPI_SLAVE (SPI_CTL_SLAVE_Msk)

#define	SPI_MASTER (0x0)

#define	SPI_SS (SPI_SSCTL_SS_Msk)

#define	SPI_SS_ACTIVE_HIGH (SPI_SSCTL_SSACTPOL_Msk)

#define	SPI_SS_ACTIVE_LOW (0x0)

#define	SPI_UNIT_INT_MASK (0x001)

#define	SPI_SSACT_INT_MASK (0x002)

#define	SPI_SSINACT_INT_MASK (0x004)

#define	SPI_SLVUR_INT_MASK (0x008)

#define	SPI_SLVBE_INT_MASK (0x010)

#define	SPI_SLVTO_INT_MASK (0x020)

#define	SPI_TXUF_INT_MASK (0x040)

#define	SPI_FIFO_TXTH_INT_MASK (0x080)

#define	SPI_FIFO_RXTH_INT_MASK (0x100)

#define	SPI_FIFO_RXOV_INT_MASK (0x200)

#define	SPI_FIFO_RXTO_INT_MASK (0x400)

#define	SPI_BUSY_MASK (0x01)

#define	SPI_RX_EMPTY_MASK (0x02)

#define	SPI_RX_FULL_MASK (0x04)

#define	SPI_TX_EMPTY_MASK (0x08)

#define	SPI_TX_FULL_MASK (0x10)

#define	SPI_TXRX_RESET_MASK (0x20)

#define	SPI_SPIEN_STS_MASK (0x40)

#define	SPI_SSLINE_STS_MASK (0x80)

#define	I2S_DATABIT_8 (0 << SPI_I2SCTL_WDWIDTH_Pos)

#define	I2S_DATABIT_16 (1 << SPI_I2SCTL_WDWIDTH_Pos)

#define	I2S_DATABIT_24 (2 << SPI_I2SCTL_WDWIDTH_Pos)

#define	I2S_DATABIT_32 (3 << SPI_I2SCTL_WDWIDTH_Pos)

#define	I2S_MONO SPI_I2SCTL_MONO_Msk

#define	I2S_STEREO 0

#define	I2S_FORMAT_I2S (0<<SPI_I2SCTL_FORMAT_Pos)

#define	I2S_FORMAT_MSB (1<<SPI_I2SCTL_FORMAT_Pos)

#define	I2S_FORMAT_PCMA (2<<SPI_I2SCTL_FORMAT_Pos)

#define	I2S_FORMAT_PCMB (3<<SPI_I2SCTL_FORMAT_Pos)

#define	I2S_MODE_SLAVE SPI_I2SCTL_SLAVE_Msk

#define	I2S_MODE_MASTER 0

#define	I2S_FIFO_TX_LEVEL_WORD_0 0

#define	I2S_FIFO_TX_LEVEL_WORD_1 (1 << SPI_FIFOCTL_TXTH_Pos)

#define	I2S_FIFO_TX_LEVEL_WORD_2 (2 << SPI_FIFOCTL_TXTH_Pos)

#define	I2S_FIFO_TX_LEVEL_WORD_3 (3 << SPI_FIFOCTL_TXTH_Pos)

#define	I2S_FIFO_RX_LEVEL_WORD_1 0

#define	I2S_FIFO_RX_LEVEL_WORD_2 (1 << SPI_FIFOCTL_RXTH_Pos)

#define	I2S_FIFO_RX_LEVEL_WORD_3 (2 << SPI_FIFOCTL_RXTH_Pos)

#define	I2S_FIFO_RX_LEVEL_WORD_4 (3 << SPI_FIFOCTL_RXTH_Pos)

#define	I2S_MONO_RIGHT 0

#define	I2S_MONO_LEFT SPI_I2SCTL_RXLCH_Msk

#define	I2S_RIGHT 0

#define	I2S_LEFT 1

#define	I2S_FIFO_TXTH_INT_MASK (0x01)

#define	I2S_FIFO_RXTH_INT_MASK (0x02)

#define	I2S_FIFO_RXOV_INT_MASK (0x04)

#define	I2S_FIFO_RXTO_INT_MASK (0x08)

#define	I2S_TXUF_INT_MASK (0x10)

#define	I2S_RIGHT_ZC_INT_MASK (0x20)

#define	I2S_LEFT_ZC_INT_MASK (0x40)

Detailed Description

Macro Definition Documentation

◆ I2S_DATABIT_16

#define I2S_DATABIT_16 (1 << SPI_I2SCTL_WDWIDTH_Pos)

I2S data width is 16-bit

Definition at line 76 of file spi.h.

◆ I2S_DATABIT_24

#define I2S_DATABIT_24 (2 << SPI_I2SCTL_WDWIDTH_Pos)

I2S data width is 24-bit

Definition at line 77 of file spi.h.

◆ I2S_DATABIT_32

#define I2S_DATABIT_32 (3 << SPI_I2SCTL_WDWIDTH_Pos)

I2S data width is 32-bit

Definition at line 78 of file spi.h.

◆ I2S_DATABIT_8

#define I2S_DATABIT_8 (0 << SPI_I2SCTL_WDWIDTH_Pos)

I2S data width is 8-bit

Definition at line 75 of file spi.h.

◆ I2S_FIFO_RX_LEVEL_WORD_1

#define I2S_FIFO_RX_LEVEL_WORD_1 0

RX threshold is 1 word

Definition at line 100 of file spi.h.

◆ I2S_FIFO_RX_LEVEL_WORD_2

#define I2S_FIFO_RX_LEVEL_WORD_2 (1 << SPI_FIFOCTL_RXTH_Pos)

RX threshold is 2 words

Definition at line 101 of file spi.h.

◆ I2S_FIFO_RX_LEVEL_WORD_3

#define I2S_FIFO_RX_LEVEL_WORD_3 (2 << SPI_FIFOCTL_RXTH_Pos)

RX threshold is 3 words

Definition at line 102 of file spi.h.

◆ I2S_FIFO_RX_LEVEL_WORD_4

#define I2S_FIFO_RX_LEVEL_WORD_4 (3 << SPI_FIFOCTL_RXTH_Pos)

RX threshold is 4 words

Definition at line 103 of file spi.h.

◆ I2S_FIFO_RXOV_INT_MASK

#define I2S_FIFO_RXOV_INT_MASK (0x04)

RX FIFO overrun interrupt mask

Definition at line 116 of file spi.h.

◆ I2S_FIFO_RXTH_INT_MASK

#define I2S_FIFO_RXTH_INT_MASK (0x02)

RX FIFO threshold interrupt mask

Definition at line 115 of file spi.h.

◆ I2S_FIFO_RXTO_INT_MASK

#define I2S_FIFO_RXTO_INT_MASK (0x08)

RX FIFO time-out interrupt mask

Definition at line 117 of file spi.h.

◆ I2S_FIFO_TX_LEVEL_WORD_0

#define I2S_FIFO_TX_LEVEL_WORD_0 0

TX threshold is 0 word

Definition at line 95 of file spi.h.

◆ I2S_FIFO_TX_LEVEL_WORD_1

#define I2S_FIFO_TX_LEVEL_WORD_1 (1 << SPI_FIFOCTL_TXTH_Pos)

TX threshold is 1 word

Definition at line 96 of file spi.h.

◆ I2S_FIFO_TX_LEVEL_WORD_2

#define I2S_FIFO_TX_LEVEL_WORD_2 (2 << SPI_FIFOCTL_TXTH_Pos)

TX threshold is 2 words

Definition at line 97 of file spi.h.

◆ I2S_FIFO_TX_LEVEL_WORD_3

#define I2S_FIFO_TX_LEVEL_WORD_3 (3 << SPI_FIFOCTL_TXTH_Pos)

TX threshold is 3 words

Definition at line 98 of file spi.h.

◆ I2S_FIFO_TXTH_INT_MASK

#define I2S_FIFO_TXTH_INT_MASK (0x01)

TX FIFO threshold interrupt mask

Definition at line 114 of file spi.h.

◆ I2S_FORMAT_I2S

#define I2S_FORMAT_I2S (0<<SPI_I2SCTL_FORMAT_Pos)

I2S data format

Definition at line 85 of file spi.h.

◆ I2S_FORMAT_MSB

#define I2S_FORMAT_MSB (1<<SPI_I2SCTL_FORMAT_Pos)

MSB justified data format

Definition at line 86 of file spi.h.

◆ I2S_FORMAT_PCMA

#define I2S_FORMAT_PCMA (2<<SPI_I2SCTL_FORMAT_Pos)

PCM mode A data format

Definition at line 87 of file spi.h.

◆ I2S_FORMAT_PCMB

#define I2S_FORMAT_PCMB (3<<SPI_I2SCTL_FORMAT_Pos)

PCM mode B data format

Definition at line 88 of file spi.h.

◆ I2S_LEFT

#define I2S_LEFT 1

Select left channel

Definition at line 111 of file spi.h.

◆ I2S_LEFT_ZC_INT_MASK

#define I2S_LEFT_ZC_INT_MASK (0x40)

Left channel zero cross interrupt mask

Definition at line 120 of file spi.h.

◆ I2S_MODE_MASTER

#define I2S_MODE_MASTER 0

As master mode

Definition at line 92 of file spi.h.

◆ I2S_MODE_SLAVE

#define I2S_MODE_SLAVE SPI_I2SCTL_SLAVE_Msk

As slave mode

Definition at line 91 of file spi.h.

◆ I2S_MONO

#define I2S_MONO SPI_I2SCTL_MONO_Msk

Monaural channel

Definition at line 81 of file spi.h.

◆ I2S_MONO_LEFT

#define I2S_MONO_LEFT SPI_I2SCTL_RXLCH_Msk

Record mono left channel

Definition at line 107 of file spi.h.

◆ I2S_MONO_RIGHT

#define I2S_MONO_RIGHT 0

Record mono right channel

Definition at line 106 of file spi.h.

◆ I2S_RIGHT

#define I2S_RIGHT 0

Select right channel

Definition at line 110 of file spi.h.

◆ I2S_RIGHT_ZC_INT_MASK

#define I2S_RIGHT_ZC_INT_MASK (0x20)

Right channel zero cross interrupt mask

Definition at line 119 of file spi.h.

◆ I2S_STEREO

#define I2S_STEREO 0

Stereo channel

Definition at line 82 of file spi.h.

◆ I2S_TXUF_INT_MASK

#define I2S_TXUF_INT_MASK (0x10)

TX FIFO underflow interrupt mask

Definition at line 118 of file spi.h.

◆ SPI_BUSY_MASK

#define SPI_BUSY_MASK (0x01)

Busy status mask

Definition at line 64 of file spi.h.

◆ SPI_FIFO_RXOV_INT_MASK

#define SPI_FIFO_RXOV_INT_MASK (0x200)

FIFO RX overrun interrupt mask

Definition at line 60 of file spi.h.

◆ SPI_FIFO_RXTH_INT_MASK

#define SPI_FIFO_RXTH_INT_MASK (0x100)

FIFO RX threshold interrupt mask

Definition at line 59 of file spi.h.

◆ SPI_FIFO_RXTO_INT_MASK

#define SPI_FIFO_RXTO_INT_MASK (0x400)

FIFO RX time-out interrupt mask

Definition at line 61 of file spi.h.

◆ SPI_FIFO_TXTH_INT_MASK

#define SPI_FIFO_TXTH_INT_MASK (0x080)

FIFO TX threshold interrupt mask

Definition at line 58 of file spi.h.

◆ SPI_MASTER

#define SPI_MASTER (0x0)

Set as master

Definition at line 44 of file spi.h.

◆ SPI_MODE_0

#define SPI_MODE_0 (SPI_CTL_TXNEG_Msk)

CLKPOL=0; RXNEG=0; TXNEG=1

Definition at line 38 of file spi.h.

◆ SPI_MODE_1

#define SPI_MODE_1 (SPI_CTL_RXNEG_Msk)

CLKPOL=0; RXNEG=1; TXNEG=0

Definition at line 39 of file spi.h.

◆ SPI_MODE_2

#define SPI_MODE_2 (SPI_CTL_CLKPOL_Msk | SPI_CTL_RXNEG_Msk)

CLKPOL=1; RXNEG=1; TXNEG=0

Definition at line 40 of file spi.h.

◆ SPI_MODE_3

#define SPI_MODE_3 (SPI_CTL_CLKPOL_Msk | SPI_CTL_TXNEG_Msk)

CLKPOL=1; RXNEG=0; TXNEG=1

Definition at line 41 of file spi.h.

◆ SPI_RX_EMPTY_MASK

#define SPI_RX_EMPTY_MASK (0x02)

RX empty status mask

Definition at line 65 of file spi.h.

◆ SPI_RX_FULL_MASK

#define SPI_RX_FULL_MASK (0x04)

RX full status mask

Definition at line 66 of file spi.h.

◆ SPI_SLAVE

#define SPI_SLAVE (SPI_CTL_SLAVE_Msk)

Set as slave

Definition at line 43 of file spi.h.

◆ SPI_SLVBE_INT_MASK

#define SPI_SLVBE_INT_MASK (0x010)

Slave bit count error interrupt mask

Definition at line 55 of file spi.h.

◆ SPI_SLVTO_INT_MASK

#define SPI_SLVTO_INT_MASK (0x020)

Slave time-out interrupt mask

Definition at line 56 of file spi.h.

◆ SPI_SLVUR_INT_MASK

#define SPI_SLVUR_INT_MASK (0x008)

Slave under run interrupt mask

Definition at line 54 of file spi.h.

◆ SPI_SPIEN_STS_MASK

#define SPI_SPIEN_STS_MASK (0x40)

SPIEN status mask

Definition at line 70 of file spi.h.

◆ SPI_SS

#define SPI_SS (SPI_SSCTL_SS_Msk)

Set SS

Definition at line 46 of file spi.h.

◆ SPI_SS_ACTIVE_HIGH

#define SPI_SS_ACTIVE_HIGH (SPI_SSCTL_SSACTPOL_Msk)

SS active high

Definition at line 47 of file spi.h.

◆ SPI_SS_ACTIVE_LOW

#define SPI_SS_ACTIVE_LOW (0x0)

SS active low

Definition at line 48 of file spi.h.

◆ SPI_SSACT_INT_MASK

#define SPI_SSACT_INT_MASK (0x002)

Slave selection signal active interrupt mask

Definition at line 52 of file spi.h.

◆ SPI_SSINACT_INT_MASK

#define SPI_SSINACT_INT_MASK (0x004)

Slave selection signal inactive interrupt mask

Definition at line 53 of file spi.h.

◆ SPI_SSLINE_STS_MASK

#define SPI_SSLINE_STS_MASK (0x80)

SPIn_SS line status mask

Definition at line 71 of file spi.h.

◆ SPI_TX_EMPTY_MASK

#define SPI_TX_EMPTY_MASK (0x08)

TX empty status mask

Definition at line 67 of file spi.h.

◆ SPI_TX_FULL_MASK

#define SPI_TX_FULL_MASK (0x10)

TX full status mask

Definition at line 68 of file spi.h.

◆ SPI_TXRX_RESET_MASK

#define SPI_TXRX_RESET_MASK (0x20)

TX or RX reset status mask

Definition at line 69 of file spi.h.

◆ SPI_TXUF_INT_MASK

#define SPI_TXUF_INT_MASK (0x040)

Slave TX underflow interrupt mask

Definition at line 57 of file spi.h.

◆ SPI_UNIT_INT_MASK

#define SPI_UNIT_INT_MASK (0x001)

Unit transfer interrupt mask

Definition at line 51 of file spi.h.

Modules

Macros