M4521_BSP V3.02.000
The Board Support Package for M4521
usbh_ohci.c
Go to the documentation of this file.
1/*
2 * URB OHCI HCD (Host Controller Driver) for USB.
3 *
4 * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
5 * (C) Copyright 2000 David Brownell <david-b@pacbell.net>
6 *
7 * [ Initialisation is based on Linus' ]
8 * [ uhci code and gregs ohci fragments ]
9 * [ (C) Copyright 1999 Linus Torvalds ]
10 * [ (C) Copyright 1999 Gregory P. Smith]
11 *
12 *
13 * History:
14 *
15 * 2000/09/26 fixed races in removing the private portion of the urb
16 * 2000/09/07 disable bulk and control lists when unlinking the last
17 * endpoint descriptor in order to aVOID unrecoverable errors on
18 * the Lucent chips.
19 * 2000/08/29 use bandwidth claiming hooks (thanks Randy!), fix some
20 * urb unlink probs, indentation fixes
21 * 2000/08/11 various oops fixes mostly affecting iso and cleanup from
22 * device unplugs.
23 * 2000/06/28 use PCI hotplug framework, for better power management
24 * and for Cardbus support (David Brownell)
25 * 2000/earlier: fixes for NEC/Lucent chips; suspend/resume handling
26 * when the controller loses power; handle UE; cleanup; ...
27 *
28 * v5.2 1999/12/07 URB 3rd preview,
29 * v5.1 1999/11/30 URB 2nd preview, cpia, (usb-scsi)
30 * v5.0 1999/11/22 URB Technical preview, Paul Mackerras powerbook susp/resume
31 * i386: HUB, Keyboard, Mouse, Printer
32 *
33 * v4.3 1999/10/27 multiple HCs, bulk_request
34 * v4.2 1999/09/05 ISO API alpha, new dev alloc, neg Error-codes
35 * v4.1 1999/08/27 Randy Dunlap's - ISO API first impl.
36 * v4.0 1999/08/18
37 * v3.0 1999/06/25
38 * v2.1 1999/05/09 code clean up
39 * v2.0 1999/05/04
40 * v1.0 1999/04/27 initial release
41 */
42
43/**************************************************************************/
53#include <stdio.h>
54#include <string.h>
55
56#include "M4521.h"
57#include "usbh_core.h"
58#include "usbh_ohci.h"
59
61
62#ifdef __ICCARM__
63#pragma data_alignment=256
64static uint8_t g_ohci_hcca[256];
65#pragma data_alignment=4
66#else
67static uint8_t g_ohci_hcca[256] __attribute__((aligned(256)));
68#endif
69
70
71USB_BUS_T g_ohci_bus;
72static OHCI_T ohci;
73
74char _is_in_interrupt = 0;
75
76
77/* For initializing controller (mask in an HCFS mode too) */
78#define OHCI_CONTROL_INIT \
79 ((OHCI_CTRL_CBSR & 0x3) | OHCI_CTRL_IE | OHCI_CTRL_PLE)
80
81
82/* #define OHCI_UNLINK_TIMEOUT (HZ / 10) */ /* Linux */
83#define OHCI_UNLINK_TIMEOUT 20 /* 30ms, modified by YCHuang */
84
85
86static OHCI_DEVICE_T g_ohci_dev_pool[DEV_MAX_NUM];
87static uint8_t ohci_dev_alloc_mark[DEV_MAX_NUM];
88
89static void td_submit_urb(URB_T * urb);
90static int rh_submit_urb(URB_T *urb);
91static ED_T *ep_add_ed(USB_DEV_T *usb_dev, uint32_t pipe, int interval, int load);
92static int ep_link(ED_T *edi);
93static void ep_rm_ed(USB_DEV_T *usb_dev, ED_T *ed);
94static int ep_unlink(ED_T *ed);
95static int rh_unlink_urb(URB_T *urb);
96
97
98static int cc_to_error[16] =
99{
100
101 /* mapping of the OHCI CC status to error codes */
102 /* No Error */ USB_OK,
103 /* CRC Error */ CC_ERR_CRC,
104 /* Bit Stuff */ CC_ERR_BITSTUFF,
105 /* Data Togg */ CC_ERR_DATA_TOGGLE,
106 /* Stall */ CC_ERR_STALL,
107 /* DevNotResp */ CC_ERR_NORESPONSE,
108 /* PIDCheck */ CC_ERR_PID_CHECK,
109 /* InvalidPID */ CC_ERR_INVALID_PID,
110 /* DataOver */ CC_ERR_DATAOVERRUN,
111 /* DataUnder */ CC_ERR_DATAUNDERRUN,
112 CC_ERR_NOT_DEFINED,
113 CC_ERR_NOT_DEFINED,
114 /* BufferOver */ CC_ERR_BUFFEROVERRUN,
115 /* BuffUnder */ CC_ERR_BUFFERUNDERRUN,
116 /* Not Access */ CC_ERR_NOT_ACCESS,
117 /* Not Access */ CC_ERR_NOT_ACCESS
118};
119
120
121static void TD_CompletionCode(uint8_t cc)
122{
123 switch(cc)
124 {
125 case TD_CC_NOERROR:
126 USB_debug("NO ERROR");
127 break;
128 case TD_CC_CRC:
129 USB_debug("CRC ERROR");
130 break;
131 case TD_CC_BITSTUFFING:
132 USB_debug("BIT STUFFING");
133 break;
134 case TD_CC_DATATOGGLEM:
135 USB_debug("DATA TOGGLE MISMATCH");
136 break;
137 case TD_CC_STALL:
138 USB_debug("STALL");
139 break;
140 case TD_DEVNOTRESP:
141 USB_debug("DEVICE NOT RESPONDING");
142 break;
143 case TD_PIDCHECKFAIL:
144 USB_debug("PID CHECK FAILURE");
145 break;
146 case TD_UNEXPECTEDPID:
147 USB_debug("UNEXPECTED PID");
148 break;
149 case TD_DATAOVERRUN:
150 USB_debug("DATA OVERRUN");
151 break;
152 case TD_DATAUNDERRUN:
153 USB_debug("DATA UNDERRUN");
154 break;
155 case TD_BUFFEROVERRUN:
156 USB_debug("BUFFER OVERRUN");
157 break;
158 case TD_BUFFERUNDERRUN:
159 USB_debug("BUFFER UNDERRUN");
160 break;
161 case TD_NOTACCESSED:
162 USB_debug("NOT ACCESSED");
163 break;
164 }
165 USB_debug(", [0x%02x]\n", cc);
166}
167
168
169/*-------------------------------------------------------------------------*
170 * URB support functions
171 *-------------------------------------------------------------------------*/
172
173/* free HCD-private data associated with this URB */
174static void urb_free_priv(URB_PRIV_T *urb_priv)
175{
176 int i;
177
178 for(i = 0; i < urb_priv->length; i++)
179 {
180 if(urb_priv->td[i])
181 ohci_free_td(urb_priv->td[i]);
182 }
183}
184
185
186/*-------------------------------------------------------------------------*/
187
188/* debug| print the main components of an URB
189 * small: 0) header + data packets 1) just header */
190#ifdef USB_VERBOSE_DEBUG
191static void urb_print(URB_T * urb, char * str, int small)
192{
193 int len;
194 uint32_t pipe;
195
196 pipe = urb->pipe;
197
198 if(!urb->dev || !urb->dev->bus)
199 {
200 USB_debug("%s URB: no dev\n", str);
201 return;
202 }
203
204 USB_debug("%s - ", str);
205
206 if(urb->status != 0)
207 {
208 USB_debug("URB -");
209 USB_debug("dev:%d, ", usb_pipedevice(pipe));
210 USB_debug("ep:%d<%c>, ", usb_pipeendpoint(pipe), usb_pipeout(pipe) ? 'O' : 'I');
211 //USB_debug("type:%s\n ", usb_pipetype (pipe) < 2? (usb_pipeint (pipe)? "INTR": "ISOC"):
212 // (usb_pipecontrol (pipe)? "CTRL": "BULK"));
213 USB_debug("flags:%04x, ", urb->transfer_flags);
214 USB_debug("len:%d/%d, ", urb->actual_length, urb->transfer_buffer_length);
215 USB_debug("stat:%d(%x)\n", urb->status, urb->status);
216 }
217
218 if(!small)
219 {
220 int i; //, len;
221
222 if(usb_pipecontrol(pipe))
223 {
224 switch(urb->setup_packet[1])
225 {
226 case 0:
227 USB_debug("GET_STATUS");
228 break;
229 case 1:
230 USB_debug("CLEAR_FEATURE");
231 break;
232 case 3:
233 USB_debug("SET_FEATURE");
234 break;
235 case 5:
236 USB_debug("SET_ADDRESS");
237 break;
238 case 6:
239 USB_debug("GET_DESCRIPTOR");
240 break;
241 case 7:
242 USB_debug("SET_DESCRIPTOR");
243 break;
244 case 8:
245 USB_debug("GET_CONFIGURATION");
246 break;
247 case 9:
248 USB_debug("SET_CONFIGURATION");
249 break;
250 case 10:
251 USB_debug("GET_INTERFACE");
252 break;
253 case 11:
254 USB_debug("SET_INTERFACE");
255 break;
256 case 12:
257 USB_debug("SYNC_FRAME");
258 break;
259 default:
260 USB_debug("Command");
261 break;
262 }
263
264 USB_debug("(8):");
265 for(i = 0; i < 8 ; i++)
266 USB_debug(" %02x", ((uint8_t *) urb->setup_packet) [i]);
267 USB_debug("\n");
268 }
269 if(urb->transfer_buffer_length > 0 && urb->transfer_buffer)
270 {
271 USB_debug(": data(%d/%d):", urb->actual_length,
272 urb->transfer_buffer_length);
273 len = usb_pipeout(pipe) ?
274 urb->transfer_buffer_length : urb->actual_length;
275 for(i = 0; i < 16 && i < len; i++)
276 USB_debug(" %02x", ((uint8_t *) urb->transfer_buffer) [i]);
277 USB_debug("%s stat:%d\n", i < len ? "..." : "", urb->status);
278 }
279 USB_debug("\n");
280 }
281 USB_debug("\n");
282}
283#endif
284
285
286#if 0
287/* just for debugging; prints non-empty branches of the int ed tree inclusive iso eds*/
288static void ep_print_int_eds()
289{
290 int i, j;
291 uint32_t *ed_p;
292 ED_T *ed;
293
294 for(i = 0; i < 32; i++)
295 {
296 j = 5;
297 ed_p = &(ohci.hcca->int_table[i]);
298 if(*ed_p == 0)
299 continue;
300 USB_debug("branch %d:", i);
301 while((*ed_p != 0) && (j--))
302 {
303 ed = (ED_T *)(*ed_p);
304 USB_debug(" ed:%4x;", ed->hwINFO);
305 ed_p = &ed->hwNextED;
306 }
307 USB_debug("\n");
308 }
309}
310#endif
311
312
313/*-------------------------------------------------------------------------*
314 * Interface functions (URB)
315 *-------------------------------------------------------------------------*/
316/* return a request to the completion handler */
317
318static int sohci_return_urb(URB_T * urb)
319{
320 URB_PRIV_T *urb_priv;
321
322 urb_priv = &urb->urb_hcpriv;
323
324 /* just to be sure */
325 if(!urb->complete)
326 {
327 urb_free_priv(&urb->urb_hcpriv);
328 return -1;
329 }
330
331#ifdef USB_VERBOSE_DEBUG
332 urb_print(urb, "RET", usb_pipeout(urb->pipe));
333#endif
334
335 switch(usb_pipetype(urb->pipe))
336 {
337 case PIPE_INTERRUPT:
338 urb->complete(urb); /* call complete and re-queue URB */
339 urb->actual_length = 0;
340
341#if 1 // 2013.07.31
342 if((urb_priv->state != URB_DEL) && (urb->status == 0))
343#else
344 if(urb_priv->state != URB_DEL)
345#endif
346 {
347 urb->status = USB_ERR_URB_PENDING;
348 td_submit_urb(urb);
349 }
350 break;
351
352 case PIPE_ISOCHRONOUS:
353#if 0
354 for(urbt = urb->next; urbt && (urbt != urb); urbt = urbt->next);
355 if(urbt)
356 {
357 /* send the reply and re-queue URB */
358 urb->complete(urb);
359 urb->actual_length = 0;
360 urb->status = USB_ERR_URB_PENDING;
361 urb->start_frame = urb_priv->ed->last_iso + 1;
362 if(urb_priv->state != URB_DEL)
363 {
364 for(i = 0; i < urb->number_of_packets; i++)
365 {
366 urb->iso_frame_desc[i].actual_length = 0;
367 urb->iso_frame_desc[i].status = -USB_ERR_XDEV;
368 }
369 td_submit_urb(urb);
370 }
371 }
372 else
373 {
374 /* unlink URB, call complete */
375 urb_free_priv(&urb->urb_hcpriv);
376 urb->complete(urb);
377 }
378#endif
379 urb_free_priv(&urb->urb_hcpriv);
380 urb->complete(urb);
381 break;
382
383 case PIPE_BULK:
384 case PIPE_CONTROL: /* unlink URB, call complete */
385 urb_free_priv(&urb->urb_hcpriv);
386 urb->complete(urb);
387 break;
388 }
389 return 0;
390}
391
392
393/*-------------------------------------------------------------------------*/
394
395/* get a transfer request */
396
397static int sohci_submit_urb(URB_T * urb)
398{
399 URB_PRIV_T *urb_priv;
400 ED_T *ed;
401 uint32_t pipe;
402 int i, size = 0;
403
404 pipe = urb->pipe;
405
406 USB_info("[OHCI] Enter sohci_submit_urb() ...\n");
407
408 if(!urb->dev || !urb->dev->bus)
409 return USB_ERR_NODEV;
410
411 if(usb_endpoint_halted(urb->dev, usb_pipeendpoint(pipe), usb_pipeout(pipe)))
412 return USB_ERR_PIPE;
413
414#ifdef USB_VERBOSE_DEBUG
415 urb_print(urb, "SUB", usb_pipein(pipe));
416#endif
417
418 /* handle a request to the virtual root hub */
419 if(usb_pipedevice(pipe) == ohci.rh.devnum)
420 return rh_submit_urb(urb);
421
422 /* when controller's hung, permit only roothub cleanup attempts
423 * such as powering down ports */
424 if(ohci.disabled)
425 return USB_ERR_SHUTDOWN;
426
427 /* every endpoint has an ed, locate and fill it */
428 ed = ep_add_ed(urb->dev, pipe, urb->interval, 1);
429 if(!ed)
430 return USB_ERR_NOMEM;
431
432 /* for the private part of the URB we need the number of TDs (size) */
433 switch(usb_pipetype(pipe))
434 {
435 case PIPE_BULK: /* one TD for every 4096 Byte */
436 size = (urb->transfer_buffer_length - 1) / 4096 + 1;
437 break;
438
439 case PIPE_ISOCHRONOUS: /* number of packets from URB */
440 size = urb->number_of_packets / ISO_FRAME_COUNT;
441 if(size <= 0)
442 return USB_ERR_INVAL;
443
444 for(i = 0; i < urb->number_of_packets; i++)
445 {
446 urb->iso_frame_desc[i].actual_length = 0;
447 urb->iso_frame_desc[i].status = -USB_ERR_XDEV;
448 }
449 break;
450
451 case PIPE_CONTROL: /* 1 TD for setup, 1 for ACK and 1 for every 4096 B */
452 size = (urb->transfer_buffer_length == 0) ? 2 :
453 (urb->transfer_buffer_length - 1) / 4096 + 3;
454 break;
455
456 case PIPE_INTERRUPT: /* one TD */
457 size = 1;
458 break;
459 }
460
461 if(size > MAX_TD_PER_OHCI_URB)
462 return USB_ERR_NOMEM;
463
464 /* allocate the private part of the URB */
465 urb_priv = &(urb->urb_hcpriv);
466 memset(urb_priv, 0, sizeof(URB_PRIV_T));
467
468 for(i = 0; i < size; i++)
469 {
470 urb_priv->td[i] = ohci_alloc_td(urb->dev);
471 if(!urb_priv->td[i])
472 {
473 urb_free_priv(urb_priv);
474 return USB_ERR_NOMEM;
475 }
476 }
477
478 /* fill the private part of the URB */
479 urb_priv->length = size;
480 urb_priv->ed = ed;
481
482 if(ed->state == ED_NEW || (ed->state & ED_DEL))
483 {
484 urb_free_priv(urb_priv);
485 return USB_ERR_INVAL;
486 }
487
488 if(usb_pipetype(pipe) == PIPE_ISOCHRONOUS)
489 {
490 if(urb->transfer_flags & USB_ISO_ASAP)
491 {
492 urb->start_frame = ((ed->state == ED_OPER) ? (ed->last_iso + 1) : (ohci.hcca->frame_no)) & 0xffff;
493 }
494 }
495
496 urb->actual_length = 0;
497 urb->status = USB_ERR_URB_PENDING;
498
499 if(pipe == PIPE_INTERRUPT)
500 USB_debug("submit: urb: %x, ed: %x\n", (int)urb, (int)ed);
501
502 /* link the ed into a chain if is not already */
503 if(ed->state != ED_OPER)
504 ep_link(ed);
505
506 /* fill the TDs and link it to the ed */
507 td_submit_urb(urb);
508 return 0;
509}
510
511
512/*-------------------------------------------------------------------------*/
513
514/* deactivate all TDs and remove the private part of the URB */
515/* interrupt callers must use async unlink mode */
516
517static int sohci_unlink_urb(URB_T * urb)
518{
519 if(!urb) /* just to be sure */
520 return USB_ERR_INVAL;
521
522 if(!urb->dev || !urb->dev->bus)
523 return USB_ERR_NODEV;
524
525#ifdef USB_VERBOSE_DEBUG
526 urb_print(urb, "UNLINK", 1);
527#endif
528
529 /* handle a request to the virtual root hub */
530 if(usb_pipedevice(urb->pipe) == ohci.rh.devnum)
531 return rh_unlink_urb(urb);
532
533 if(urb->status == USB_ERR_URB_PENDING)
534 {
535 if(!ohci.disabled)
536 {
537 URB_PRIV_T * urb_priv;
538
539 /* interrupt code may not sleep; it must use
540 * async status return to unlink pending urbs.
541 */
542 if(!(urb->transfer_flags & USB_ASYNC_UNLINK) && _is_in_interrupt)
543 {
544 USB_error("bug in call to sohci_unlink_urb!!\n");
545 return EWOULDBLOCK;
546 }
547
548 /* flag the urb and its TDs for deletion in some
549 * upcoming SF interrupt delete list processing
550 */
551 urb_priv = &urb->urb_hcpriv;
552
553 if(urb_priv->state == URB_DEL)
554 return 0;
555
556 urb_priv->state = URB_DEL;
557
558 ep_rm_ed(urb->dev, urb_priv->ed);
559 urb_priv->ed->state |= ED_URB_DEL;
560
561 if(!(urb->transfer_flags & USB_ASYNC_UNLINK))
562 {
563 /* wait until all TDs are deleted */
564 usbh_mdelay(100);
565
566 if(urb->status == USB_ERR_URB_PENDING)
567 {
568 USB_warning("unlink URB timeout\n");
569 return USB_ERR_TIMEOUT;
570 }
571
572 // 2014.07.28, force free TDs
573 urb_free_priv(&urb->urb_hcpriv);
574 }
575 else /* (urb->transfer_flags & USB_ASYNC_UNLINK) */
576 {
577 urb->status = USB_ERR_INPROGRESS;
578 }
579 }
580 else /* ohci->disabled */
581 {
582 urb_free_priv(&urb->urb_hcpriv);
583 if(urb->transfer_flags & USB_ASYNC_UNLINK)
584 {
585 urb->status = USB_ERR_CONNRESET;
586 if(urb->complete)
587 urb->complete(urb);
588 }
589 else
590 urb->status = USB_ERR_NOENT;
591 }
592 }
593 return 0;
594}
595
596/*-------------------------------------------------------------------------*/
597
598/* allocate private data space for a usb device */
599
600static int sohci_alloc_dev(USB_DEV_T *usb_dev)
601{
602 int i;
603 OHCI_DEVICE_T *ohcidev;
604
605 for(i = 0; i < DEV_MAX_NUM; i++)
606 {
607 if(ohci_dev_alloc_mark[i] == 0)
608 {
609 ohci_dev_alloc_mark[i] = 1;
610 ohcidev = &g_ohci_dev_pool[i];
611 memset((char *)ohcidev, 0, sizeof(OHCI_DEVICE_T));
612 usb_dev->hcpriv = ohcidev;
613 return 0;
614 }
615 }
616 USB_error("sohci_alloc_dev - no free memory!\n");
617 return USB_ERR_NOMEM;
618}
619
620/*-------------------------------------------------------------------------*/
621
622/* may be called from interrupt context */
623/* frees private data space of usb device */
624
625static int sohci_free_dev(USB_DEV_T * usb_dev)
626{
627 int i, cnt = 0;
628 ED_T *ed;
629 OHCI_DEVICE_T *dev;
630
631 dev = usb_to_ohci(usb_dev);
632
633 if(!dev)
634 return 0;
635
636 if(usb_dev->devnum >= 0)
637 {
638 /* driver disconnects should have unlinked all urbs
639 * (freeing all the TDs, unlinking EDs) but we need
640 * to defend against bugs that prevent that.
641 */
642 for(i = 0; i < NUM_EDS; i++)
643 {
644 ed = dev->edp[i];
645 if(ed != NULL)
646 {
647 if(ed->state != ED_NEW)
648 {
649 if(ed->state == ED_OPER)
650 {
651 /* driver on that interface didn't unlink an urb */
652 USB_warning("driver dev %d ed 0x%x unfreed URB\n", usb_dev->devnum, i);
653 ep_unlink(ed);
654 }
655 ep_rm_ed(usb_dev, ed);
656 ed->state = ED_DEL;
657 cnt++;
658 }
659 ohci_free_ed(ed);
660 dev->edp[i] = 0;
661 }
662 }
663
664 /* if the controller is running, tds for those unlinked
665 * urbs get freed by dl_del_list at the next SF interrupt
666 */
667 if(cnt > 0)
668 {
669 if(ohci.disabled)
670 {
671 /* FIXME: Something like this should kick in,
672 * though it's currently an exotic case ...
673 * the controller won't ever be touching
674 * these lists again!!
675 * dl_del_list (ohci, le16_to_cpu (ohci->hcca->frame_no) & 1);
676 */
677 USB_warning("Warning! TD leak, %d\n", cnt);
678 }
679 else if(!_is_in_interrupt)
680 {
681 /* SF interrupt handler calls dl_del_list */
682 usbh_mdelay(100);
683
684 if(dev->ed_cnt)
685 {
686 USB_error("Error! - free device %d timeout", usb_dev->devnum);
687 return USB_ERR_TIMEOUT;
688 }
689 }
690 else
691 {
692 /* likely some interface's driver has a refcount bug */
693 USB_error("Error! - devnum %d deletion in interrupt\nSystem Halt!!", usb_dev->devnum);
694 }
695 }
696 }
697
698 ohci_free_dev_td(usb_dev);
699
700 for(i = 0; i < DEV_MAX_NUM; i++)
701 {
702 if(&g_ohci_dev_pool[i] == dev)
703 ohci_dev_alloc_mark[i] = 0;
704 }
705 return 0;
706}
707
708/*-------------------------------------------------------------------------*/
709
710/* tell us the current USB frame number */
711static int sohci_get_current_frame_number(USB_DEV_T *usb_dev)
712{
713 return ohci.hcca->frame_no;
714}
715
716/*-------------------------------------------------------------------------*/
717
718USB_OP_T sohci_device_operations =
719{
720 sohci_alloc_dev,
721 sohci_free_dev,
722 sohci_get_current_frame_number,
723 sohci_submit_urb,
724 sohci_unlink_urb
725};
726
727/*-------------------------------------------------------------------------*
728 * ED handling functions
729 *-------------------------------------------------------------------------*/
730
731/* search for the right branch to insert an interrupt ed into the int tree
732 * do some load balancing;
733 * returns the branch and
734 * sets the interval to interval = 2^integer (ld (interval)) */
735static int ep_int_ballance(int interval, int load)
736{
737 int i, branch = 0;
738
739 /* search for the least loaded interrupt endpoint branch of all 32 branches */
740 for(i = 0; i < 32; i++)
741 if(ohci.ohci_int_load [branch] > ohci.ohci_int_load [i])
742 branch = i;
743
744 branch = branch % interval;
745 for(i = branch; i < 32; i += interval)
746 ohci.ohci_int_load [i] += load;
747
748 return branch;
749}
750
751/*-------------------------------------------------------------------------*/
752
753/* 2^int( ld (inter)) */
754/* depends on <inter>, return a value of 1,2,4,8,16,or 32 */
755static int ep_2_n_interval(int inter)
756{
757 int i;
758
759 for(i = 0; ((inter >> i) > 1) && (i < 5); i++);
760 return 1 << i;
761}
762
763/*-------------------------------------------------------------------------*/
764
765/* the int tree is a binary tree
766 * in order to process it sequentially the indexes of the branches have to be mapped
767 * the mapping reverses the bits of a word of num_bits length */
768
769static int ep_rev(int num_bits, int word)
770{
771 int i, wout = 0;
772
773 for(i = 0; i < num_bits; i++)
774 wout |= (((word >> i) & 1) << (num_bits - i - 1));
775 return wout;
776}
777
778
779
780/*-------------------------------------------------------------------------*/
781
782/* link an ed into one of the HC chains */
783
784static int ep_link(ED_T *edi)
785{
786 int int_branch;
787 int i;
788 int inter;
789 int interval;
790 int load;
791 uint32_t *ed_p;
792 volatile ED_T *ed;
793
794 ed = edi;
795 ed->state = ED_OPER;
796 switch(ed->type)
797 {
798 case PIPE_CONTROL:
799 ed->hwNextED = 0;
800 if(ohci.ed_controltail == NULL)
801 USBH->HcControlHeadED = (uint32_t)ed;
802 else
803 ohci.ed_controltail->hwNextED = (uint32_t)ed;
804 ed->ed_prev = ohci.ed_controltail;
805 if(!ohci.ed_controltail && !ohci.ed_rm_list[0] && (!ohci.ed_rm_list[1]))
806 {
807 ohci.hc_control |= OHCI_CTRL_CLE;
808 USBH->HcControl = ohci.hc_control;
809 }
810 ohci.ed_controltail = edi;
811 break;
812
813 case PIPE_BULK:
814 ed->hwNextED = 0;
815 if(ohci.ed_bulktail == NULL)
816 USBH->HcBulkHeadED = (uint32_t)ed;
817 else
818 ohci.ed_bulktail->hwNextED = (uint32_t)ed;
819 ed->ed_prev = ohci.ed_bulktail;
820 if(!ohci.ed_bulktail && !ohci.ed_rm_list[0] && (!ohci.ed_rm_list[1]))
821 {
822 ohci.hc_control |= OHCI_CTRL_BLE;
823 USBH->HcControl = ohci.hc_control;
824 }
825 ohci.ed_bulktail = edi;
826 break;
827
828 case PIPE_INTERRUPT:
829 load = ed->int_load;
830 interval = ep_2_n_interval(ed->int_period);
831 ed->int_interval = interval;
832 int_branch = ep_int_ballance(interval, load);
833 ed->int_branch = int_branch;
834
835 for(i = 0; i < ep_rev(6, interval); i += inter)
836 {
837 inter = 1;
838
839 for(ed_p = &(ohci.hcca->int_table[ep_rev(5, i) + int_branch]);
840 (*ed_p != 0) && (((ED_T *)(*ed_p))->int_interval >= interval);
841 ed_p = &(((ED_T *)(*ed_p))->hwNextED))
842 inter = ep_rev(6, ((ED_T *)(*ed_p))->int_interval);
843 ed->hwNextED = *ed_p;
844 *ed_p = (uint32_t)ed;
845 }
846 break;
847
848 case PIPE_ISOCHRONOUS:
849 ed->hwNextED = 0;
850 ed->int_interval = 1;
851 if(ohci.ed_isotail != NULL)
852 {
853 ohci.ed_isotail->hwNextED = (uint32_t)ed;
854 ed->ed_prev = ohci.ed_isotail;
855 }
856 else
857 {
858 for(i = 0; i < 32; i += inter)
859 {
860 inter = 1;
861 for(ed_p = &(ohci.hcca->int_table[ep_rev(5, i)]);
862 (*ed_p != 0) && ed_p; ed_p = &(((ED_T *)(*ed_p))->hwNextED))
863 inter = ep_rev(6, ((ED_T *)(*ed_p))->int_interval);
864 *ed_p = (uint32_t)ed;
865 }
866 ed->ed_prev = NULL;
867 }
868 ohci.ed_isotail = edi;
869 break;
870 }
871 return 0;
872}
873
874/*-------------------------------------------------------------------------*/
875
876/* unlink an ed from one of the HC chains.
877 * just the link to the ed is unlinked.
878 * the link from the ed still points to another operational ed or 0
879 * so the HC can eventually finish the processing of the unlinked ed */
880
881static int ep_unlink(ED_T *ed)
882{
883 int i;
884 uint32_t *ed_ptr;
885
886 ed->hwINFO |= OHCI_ED_SKIP;
887 switch(ed->type)
888 {
889 case PIPE_CONTROL:
890 if(ed->ed_prev == NULL)
891 {
892 if(!ed->hwNextED)
893 {
894 ohci.hc_control &= ~OHCI_CTRL_CLE;
895 USBH->HcControl = ohci.hc_control;
896 }
897 USBH->HcControlHeadED = ed->hwNextED;
898 }
899 else
900 ed->ed_prev->hwNextED = ed->hwNextED;
901
902 if(ohci.ed_controltail == ed)
903 ohci.ed_controltail = ed->ed_prev;
904 else
905 ((ED_T *)(ed->hwNextED))->ed_prev = ed->ed_prev;
906 break;
907
908 case PIPE_BULK:
909 if(ed->ed_prev == NULL)
910 {
911 if(!ed->hwNextED)
912 {
913 ohci.hc_control &= ~OHCI_CTRL_BLE;
914 USBH->HcControl = ohci.hc_control;
915 }
916 USBH->HcBulkHeadED = ed->hwNextED;
917 }
918 else
919 ed->ed_prev->hwNextED = ed->hwNextED;
920
921 if(ohci.ed_bulktail == ed)
922 ohci.ed_bulktail = ed->ed_prev;
923 else
924 ((ED_T *)(ed->hwNextED))->ed_prev = ed->ed_prev;
925 break;
926
927 case PIPE_ISOCHRONOUS:
928
929 if(ohci.ed_isotail == ed)
930 ohci.ed_isotail = ed->ed_prev;
931 if(ed->hwNextED != 0)
932 ((ED_T *)ed->hwNextED)->ed_prev = ed->ed_prev;
933
934 if(ed->ed_prev != NULL)
935 {
936 ed->ed_prev->hwNextED = ed->hwNextED;
937 }
938
939 // Isochronous fall through ...
940
941 case PIPE_INTERRUPT:
942 for(i = 0; i < 32; i++)
943 {
944 for(ed_ptr = (uint32_t *) & (ohci.hcca->int_table[i]);
945 (*ed_ptr != 0); ed_ptr = (uint32_t *) & (((ED_T *)(*ed_ptr))->hwNextED))
946 {
947 if(ed_ptr == (uint32_t *) & (((ED_T *)(*ed_ptr))->hwNextED))
948 break;
949
950 if((ED_T *)*ed_ptr == ed)
951 {
952 *ed_ptr = (uint32_t)(((ED_T *)(*ed_ptr))->hwNextED);
953 break;
954 }
955 }
956 }
957 break;
958
959 }
960 ed->state = ED_UNLINK;
961 return 0;
962}
963
964
965/*-------------------------------------------------------------------------*/
966
967/* add/re-init an endpoint; this should be done once at the usb_set_configuration command,
968 * but the USB stack is a little bit stateless so we do it at every transaction
969 * if the state of the ed is ED_NEW then a dummy td is added and the state is changed to ED_UNLINK
970 * in all other cases the state is left unchanged
971 * the ed info fields are setted anyway even though most of them should not change */
972
973static ED_T *ep_add_ed(USB_DEV_T *usb_dev, uint32_t pipe, int interval, int load)
974{
975 TD_T *td;
976 ED_T *ed_ret;
977 OHCI_DEVICE_T *ohci_dev;
978 int ep_num;
979 volatile ED_T *ed;
980
981 ohci_dev = usb_to_ohci(usb_dev);
982 ep_num = (((pipe) >> 15) & 0xf);
983 if(pipe & 0x80)
984 ep_num |= 0x10;
985
986 if(ohci_dev->edp[ep_num] == NULL)
987 ohci_dev->edp[ep_num] = ohci_alloc_ed();
988
989 if(ohci_dev->edp[ep_num] == NULL)
990 {
991 return NULL;
992 }
993
994 ed = ed_ret = ohci_dev->edp[ep_num];
995
996 if((ed->state & ED_DEL) || (ed->state & ED_URB_DEL))
997 return NULL;
998
999 if(ed->state == ED_NEW)
1000 {
1001 ed->hwINFO = OHCI_ED_SKIP; /* skip ed */
1002 /* dummy td; end of td list for ed */
1003 td = ohci_alloc_td(usb_dev);
1004 if(!td)
1005 return NULL;
1006
1007 ed->hwTailP = (uint32_t)td;
1008 ed->hwHeadP = ed->hwTailP;
1009 ed->state = ED_UNLINK;
1010 ed->type = usb_pipetype(pipe);
1011 usb_to_ohci(usb_dev)->ed_cnt++;
1012 }
1013
1014 ohci.dev[usb_pipedevice(pipe)] = usb_dev;
1015
1016 ed->hwINFO = (usb_pipedevice(pipe)
1017 | usb_pipeendpoint(pipe) << 7
1018 | (usb_pipeisoc(pipe) ? 0x8000 : 0)
1019 | (usb_pipecontrol(pipe) ? 0 : (usb_pipeout(pipe) ? 0x800 : 0x1000))
1020 | usb_pipeslow(pipe) << 13
1021 | usb_maxpacket(usb_dev, pipe, usb_pipeout(pipe)) << 16);
1022
1023 if((ed->type == PIPE_INTERRUPT) && (ed->state == ED_UNLINK))
1024 {
1025 ed->int_period = interval;
1026 ed->int_load = load;
1027 }
1028 return ed_ret;
1029}
1030
1031
1032
1033/*-------------------------------------------------------------------------*/
1034
1035/* request the removal of an endpoint
1036 * put the ep on the rm_list and request a stop of the bulk or ctrl list
1037 * real removal is done at the next start frame (SF) hardware interrupt */
1038
1039static void ep_rm_ed(USB_DEV_T *usb_dev, ED_T *ed)
1040{
1041 uint32_t frame;
1042
1043 if((ed->state & ED_DEL) || (ed->state & ED_URB_DEL))
1044 return;
1045
1046 ed->hwINFO |= OHCI_ED_SKIP;
1047
1048 if(!ohci.disabled)
1049 {
1050 switch(ed->type)
1051 {
1052 case PIPE_CONTROL: /* stop control list */
1053 ohci.hc_control &= ~OHCI_CTRL_CLE;
1054 USBH->HcControl = ohci.hc_control;
1055 break;
1056 case PIPE_BULK: /* stop bulk list */
1057 ohci.hc_control &= ~OHCI_CTRL_BLE;
1058 USBH->HcControl = ohci.hc_control;
1059 break;
1060 }
1061 }
1062 frame = ohci.hcca->frame_no & 0x1;
1063 ed->ed_rm_list = ohci.ed_rm_list[frame];
1064 ohci.ed_rm_list[frame] = ed;
1065
1066 if(!ohci.disabled)
1067 {
1068 /* enable SOF interrupt */
1069 USBH->HcInterruptStatus = OHCI_INTR_SF;
1070 USBH->HcInterruptEnable = OHCI_INTR_SF;
1071 }
1072}
1073
1074
1075
1076/*-------------------------------------------------------------------------*
1077 * TD handling functions
1078 *-------------------------------------------------------------------------*/
1079static void iso_td_fill(uint32_t info, void *data, URB_T *urb, int index)
1080{
1081 volatile TD_T *td, *td_pt;
1082 volatile URB_PRIV_T *urb_priv;
1083 int len = 0, i;
1084 uint32_t bufferStart;
1085
1086 urb_priv = &urb->urb_hcpriv;
1087
1088 if(index >= urb_priv->length)
1089 {
1090 USB_error("Error! - internal OHCI error: TD index > length\n");
1091 return;
1092 }
1093
1094 td_pt = urb_priv->td[index];
1095
1096 /*- fill the old dummy TD -*/
1097 td = urb_priv->td[index] = (TD_T *)((uint32_t)urb_priv->ed->hwTailP & 0xfffffff0); /* find the tail of the td list of this URB */
1098
1099 td->ed = urb_priv->ed;
1100 td->ed->last_iso = (info & 0xffff) + ISO_FRAME_COUNT - 1;
1101 info = (info & 0xffff0000) | ((info + OHCI_ISO_DELAY) & 0xffff);
1102 td->next_dl_td = NULL;
1103 td->index = index;
1104 td->urb = urb;
1105
1106 bufferStart = (uint32_t)data + urb->iso_frame_desc[index * ISO_FRAME_COUNT].offset;
1107
1108 /* caculate total length of frames to be filled in this TD */
1109 for(i = index * ISO_FRAME_COUNT; i < (index + 1) * ISO_FRAME_COUNT; i++)
1110 len += urb->iso_frame_desc[i].length;
1111
1112 td->hwINFO = info;
1113 td->hwCBP = (uint32_t)((!bufferStart || !len) ? 0 : bufferStart) & 0xFFFFF000;
1114 td->hwBE = (uint32_t)((!bufferStart || !len) ? 0 : (bufferStart + len - 1));
1115 td->hwNextTD = (uint32_t)td_pt;
1116 td->is_iso_packet = 1;
1117
1118#ifdef DELAY_INTERRUPT
1119 info = (info & 0xFF1FFFFF) | (3 << 21); /* delay 3 frame */
1120#endif
1121
1122 td->hwPSW[0] = (((uint32_t)data + urb->iso_frame_desc[index * ISO_FRAME_COUNT].offset) & 0x0FFF) | 0xE000;
1123 for(i = 0; i < ISO_FRAME_COUNT / 2; i++)
1124 {
1125 td->hwPSW[i] = (((uint32_t)data + urb->iso_frame_desc[index * ISO_FRAME_COUNT + i * 2].offset) & 0x0FFF) |
1126 (((uint32_t)data + urb->iso_frame_desc[index * ISO_FRAME_COUNT + i * 2 + 1].offset & 0x0FFF) << 16);
1127 td->hwPSW[i] |= 0xE000E000;
1128 }
1129
1130 USB_info("Frame:[%x], CBP:[%x], BE:[%x], PSW0:[%x], PSW1:[%x]\n",
1131 td->hwINFO & 0xffff, td->hwCBP, td->hwBE, td->hwPSW[0], td->hwPSW[1]);
1132
1133 /* chaining the new dummy TD */
1134 td_pt->hwNextTD = 0;
1135 td->ed->hwTailP = td->hwNextTD;
1136}
1137
1138
1139/* prepare a TD */
1140static void td_fill(uint32_t info, void *data, int len, URB_T *urb, int index)
1141{
1142 volatile TD_T *td, *td_pt;
1143 volatile URB_PRIV_T *urb_priv;
1144
1145 urb_priv = &urb->urb_hcpriv;
1146
1147 if(index >= urb_priv->length)
1148 {
1149 USB_error("Error! - internal OHCI error: TD index [%d] > length [%d]\n", index, urb_priv->length);
1150 return;
1151 }
1152
1153 td_pt = urb_priv->td[index];
1154
1155 /*- fill the old dummy TD -*/
1156 td = urb_priv->td[index] = (TD_T *)((uint32_t)urb_priv->ed->hwTailP & 0xfffffff0); /* find the tail of the td list of this URB */
1157 td->ed = urb_priv->ed; /* the endpoint(pipe) of this URB */
1158 td->next_dl_td = NULL;
1159 td->index = index;
1160 td->urb = urb;
1161
1162 td->hwINFO = info;
1163 td->hwCBP = (uint32_t)((!data || !len) ? 0 : data);
1164 td->hwBE = (uint32_t)((!data || !len) ? 0 : (uint32_t)data + len - 1);
1165 td->hwNextTD = (uint32_t)td_pt;
1166 td->is_iso_packet = 0;
1167
1168#ifdef DELAY_INTERRUPT
1169 info = (info & 0xFF1FFFFF) | (3 << 21); /* delay 3 frame */
1170#endif
1171
1172 td_pt->hwNextTD = 0;
1173 td->ed->hwTailP = td->hwNextTD;
1174
1175 //USB_info("td_fill ed:[%x] td:[%x] - hwINFO:%08x hwCBP:%08x\n hwNextTD:%08x hwBE:%08x\n",
1176 // (int)td->ed, (int)td, td->hwINFO, td->hwCBP, td->hwNextTD, td->hwBE);
1177}
1178
1179/*-------------------------------------------------------------------------*/
1180
1181/* prepare all TDs of a transfer */
1182static void td_submit_urb(URB_T * urb)
1183{
1184 URB_PRIV_T *urb_priv;
1185 void *ctrl;
1186 void *data;
1187 int data_len;
1188 int cnt = 0;
1189 uint32_t info = 0;
1190 uint32_t toggle = 0;
1191
1192 urb_priv = &urb->urb_hcpriv;
1193 ctrl = urb->setup_packet;
1194 data = urb->transfer_buffer;
1195 data_len = urb->transfer_buffer_length;
1196 /* OHCI handles the DATA-toggles itself, we just use the USB-toggle bits for reseting */
1197 if(usb_gettoggle(urb->dev, usb_pipeendpoint(urb->pipe), usb_pipeout(urb->pipe)))
1198 {
1199 toggle = TD_T_TOGGLE;
1200 }
1201 else
1202 {
1203 toggle = TD_T_DATA0;
1204 usb_settoggle(urb->dev, usb_pipeendpoint(urb->pipe), usb_pipeout(urb->pipe), 1);
1205 }
1206
1207 urb_priv->td_cnt = 0;
1208
1209 switch(usb_pipetype(urb->pipe))
1210 {
1211 case PIPE_BULK:
1212 info = usb_pipeout(urb->pipe) ? (TD_CC | TD_DP_OUT) : (TD_CC | TD_DP_IN);
1213 while(data_len > 4096)
1214 {
1215 td_fill(info | (cnt ? TD_T_TOGGLE : toggle), data, 4096, urb, cnt);
1216 data = (void *)((uint32_t)data + 4096);
1217 data_len -= 4096;
1218 cnt++;
1219 }
1220 info = usb_pipeout(urb->pipe) ? (TD_CC | TD_DP_OUT) : (TD_CC | TD_R | TD_DP_IN);
1221 td_fill(info | (cnt ? TD_T_TOGGLE : toggle), data, data_len, urb, cnt);
1222 cnt++;
1223 USBH->HcCommandStatus = OHCI_BLF; /* start bulk list */
1224 break;
1225
1226 case PIPE_INTERRUPT:
1227 info = usb_pipeout(urb->pipe) ? (TD_CC | TD_DP_OUT | toggle) : (TD_CC | TD_R | TD_DP_IN | toggle);
1228 td_fill(info, data, data_len, urb, cnt++);
1229 break;
1230
1231 case PIPE_CONTROL:
1232 info = TD_CC | TD_DP_SETUP | TD_T_DATA0;
1233 td_fill(info, ctrl, 8, urb, cnt++);
1234 if(data_len > 0)
1235 {
1236 info = usb_pipeout(urb->pipe) ? (TD_CC | TD_R | TD_DP_OUT | TD_T_DATA1) : (TD_CC | TD_R | TD_DP_IN | TD_T_DATA1);
1237 td_fill(info, data, data_len, urb, cnt++);
1238 }
1239 info = usb_pipeout(urb->pipe) ? (TD_CC | TD_DP_IN | TD_T_DATA1) : (TD_CC | TD_DP_OUT | TD_T_DATA1);
1240 td_fill(info, NULL, 0, urb, cnt++);
1241 USBH->HcCommandStatus = OHCI_CLF; /* start Control list */
1242 break;
1243
1244 case PIPE_ISOCHRONOUS:
1245 for(cnt = 0; cnt < urb->number_of_packets / ISO_FRAME_COUNT; cnt++)
1246 {
1247 iso_td_fill(TD_CC | ((ISO_FRAME_COUNT - 1) << 24) | TD_ISO | ((urb->start_frame + cnt * ISO_FRAME_COUNT) & 0xffff),
1248 (uint8_t *) data, urb, cnt);
1249 }
1250 break;
1251 }
1252 if(urb_priv->length != cnt)
1253 USB_error("Error! - TD LENGTH %d != CNT %d", urb_priv->length, cnt);
1254}
1255
1256/*-------------------------------------------------------------------------*
1257 * Done List handling functions
1258 *-------------------------------------------------------------------------*/
1259
1260
1261/* calculate the transfer length and update the urb */
1262
1263static void dl_transfer_length(TD_T * td)
1264{
1265 uint32_t tdBE, tdCBP;
1266 uint16_t tdPSW;
1267 URB_T *urb;
1268 URB_PRIV_T *urb_priv;
1269 int dlen = 0;
1270 int cc = 0;
1271
1272 urb = td->urb;
1273 urb_priv = &urb->urb_hcpriv;
1274
1275 tdBE = (uint32_t)td->hwBE;
1276 tdCBP = (uint32_t)td->hwCBP;
1277
1278 if(td->is_iso_packet)
1279 {
1280 int i, index;
1281
1282
1283 for(i = 0; i < ISO_FRAME_COUNT; i++)
1284 {
1285 index = td->index * ISO_FRAME_COUNT + i;
1286 if(i % 2)
1287 tdPSW = td->hwPSW[i / 2] >> 16;
1288 else
1289 tdPSW = td->hwPSW[i / 2] & 0xffff;
1290
1291 cc = (tdPSW >> 12) & 0xF;
1292 if(cc < 0xE)
1293 {
1294 if(usb_pipeout(urb->pipe))
1295 dlen = urb->iso_frame_desc[index].length;
1296 else
1297 dlen = tdPSW & 0x3ff;
1298
1299 urb->actual_length += dlen;
1300 urb->iso_frame_desc[index].actual_length = dlen;
1301 if(!(urb->transfer_flags & USB_DISABLE_SPD) && (cc == TD_DATAUNDERRUN))
1302 cc = TD_CC_NOERROR;
1303 urb->iso_frame_desc[index].status = cc_to_error[cc];
1304 }
1305 }
1306 }
1307 else
1308 {
1309 /* BULK, int, CONTROL DATA */
1310 if(!(usb_pipetype(urb->pipe) == PIPE_CONTROL &&
1311 ((td->index == 0) || (td->index == urb_priv->length - 1))))
1312 {
1313 if(tdBE != 0)
1314 {
1315 if(td->hwCBP == 0)
1316 urb->actual_length = (uint32_t)tdBE - (uint32_t)urb->transfer_buffer + 1;
1317 else
1318 urb->actual_length = (uint32_t)tdCBP - (uint32_t)urb->transfer_buffer;
1319 }
1320 }
1321 USB_info("td:%x urb->actual_length:%d\n", (int)td, urb->actual_length);
1322 }
1323}
1324
1325
1326/* handle an urb that is being unlinked */
1327
1328static void dl_del_urb(URB_T * urb)
1329{
1330 if(urb->transfer_flags & USB_ASYNC_UNLINK)
1331 {
1332 urb->status = USB_ERR_CONNRESET;
1333 if(urb->complete)
1334 urb->complete(urb);
1335 }
1336 else
1337 {
1338 urb->status = USB_ERR_NOENT;
1339 }
1340}
1341
1342
1343/*-------------------------------------------------------------------------*/
1344
1345/* replies to the request have to be on a FIFO basis so
1346 * we reverse the reversed done-list */
1347
1348static TD_T *dl_reverse_done_list()
1349{
1350 uint32_t td_list_hc;
1351 TD_T *td_rev = NULL;
1352 TD_T *td_list = NULL;
1353 URB_PRIV_T *urb_priv;
1354
1355 td_list_hc = (uint32_t)(ohci.hcca->done_head) & 0xfffffff0; /* mask out WD bit also */
1356 ohci.hcca->done_head = 0;
1357
1358 while(td_list_hc)
1359 {
1360 td_list = (TD_T *)td_list_hc;
1361 USB_info("TD done - 0x%08x, DEV:[%d], ED:[%d] PSW:[%x]\n", (uint32_t)td_list, td_list->urb->dev->devnum, (td_list->ed->hwINFO >> 7) & 0xf, td_list->hwPSW[0] >> 12);
1362
1363#ifdef USB_VERBOSE_DEBUG
1364 if(td_list->ed->hwHeadP & 0x1)
1365 USB_error("!!Halted - DEV:[%d], ED:[%d] PSW0:[%x] PSW1:[%x]\n",
1366 td_list->urb->dev->devnum, (td_list->ed->hwINFO >> 7) & 0xf,
1367 (td_list->hwPSW[0] >> 12) & 0xf, (td_list->hwPSW[0] >> 28) & 0xf);
1368#endif
1369
1370 if(TD_CC_GET((uint32_t)td_list->hwINFO))
1371 {
1372 urb_priv = &(td_list->urb->urb_hcpriv);
1373
1374 if(td_list->ed->type == PIPE_ISOCHRONOUS)
1375 {
1376 if((td_list->hwINFO & 0xE0000000) == 0x80000000)
1377 {
1378 USB_error("!"); //("I N/A: %x\n", td_list->hwINFO);
1379 td_list->ed->last_iso += OHCI_ISO_DELAY;
1380 }
1381 else
1382 USB_error("ISO! - CC:0x%x, PSW:0x%x 0x%x\n", td_list->hwINFO >> 28, td_list->hwPSW[0], td_list->hwPSW[1]);
1383 }
1384 else
1385 {
1386 USB_error("CC Error!! - DEV[%d] ED[%d] - ", td_list->urb->dev->devnum, (td_list->ed->hwINFO >> 7) & 0xf);
1387 TD_CompletionCode(TD_CC_GET((uint32_t)(td_list->hwINFO)));
1388 }
1389
1390 if(td_list->ed->hwHeadP & 0x1)
1391 {
1392 if(urb_priv && ((td_list->index + 1) < urb_priv->length))
1393 {
1394 td_list->ed->hwHeadP = (urb_priv->td[urb_priv->length - 1]->hwNextTD & 0xfffffff0) |
1395 (td_list->ed->hwHeadP & 0x2);
1396 urb_priv->td_cnt += urb_priv->length - td_list->index - 1;
1397 }
1398 else
1399 td_list->ed->hwHeadP &= 0xfffffff2;
1400 }
1401 }
1402
1403 td_list->next_dl_td = td_rev;
1404 td_rev = td_list;
1405 td_list_hc = (uint32_t)(td_list->hwNextTD) & 0xfffffff0;
1406 } /* end of while */
1407 return td_list;
1408}
1409
1410/*-------------------------------------------------------------------------*/
1411
1412/* there are some pending requests to remove
1413 * - some of the eds (if ed->state & ED_DEL (set by sohci_free_dev)
1414 * - some URBs/TDs if urb_priv->state == URB_DEL */
1415
1416static void dl_del_list(uint32_t frame)
1417{
1418 ED_T *ed;
1419 uint32_t edINFO;
1420 uint32_t tdINFO;
1421 TD_T *td = NULL, *td_next = NULL, *tdHeadP = NULL, *tdTailP;
1422 uint32_t *td_p;
1423 int ctrl = 0, bulk = 0;
1424
1425 for(ed = ohci.ed_rm_list[frame]; ed != NULL; ed = ed->ed_rm_list)
1426 {
1427 tdTailP = (TD_T *)((uint32_t)(ed->hwTailP) & 0xfffffff0);
1428 tdHeadP = (TD_T *)((uint32_t)(ed->hwHeadP) & 0xfffffff0);
1429 edINFO = (uint32_t)ed->hwINFO;
1430 td_p = &ed->hwHeadP;
1431
1432 for(td = tdHeadP; td != tdTailP; td = td_next)
1433 {
1434 URB_T * urb = td->urb;
1435 URB_PRIV_T * urb_priv = &(td->urb->urb_hcpriv);
1436
1437 td_next = (TD_T *)((uint32_t)(td->hwNextTD) & 0xfffffff0);
1438 if((urb_priv->state == URB_DEL) || (ed->state & ED_DEL))
1439 {
1440 tdINFO = (uint32_t)td->hwINFO;
1441 if(TD_CC_GET(tdINFO) < 0xE)
1442 dl_transfer_length(td);
1443 *td_p = td->hwNextTD | (*td_p & 0x3);
1444
1445 /* URB is done; clean up */
1446 if(++(urb_priv->td_cnt) == urb_priv->length)
1447 dl_del_urb(urb);
1448 }
1449 else
1450 {
1451 td_p = &td->hwNextTD;
1452 }
1453 }
1454
1455 if(ed->state & ED_DEL)
1456 {
1457 /* set by sohci_free_dev */
1458 OHCI_DEVICE_T * dev = usb_to_ohci(ohci.dev[edINFO & 0x7F]);
1459 ohci_free_td(tdTailP); /* free dummy td */
1460 ed->hwINFO = OHCI_ED_SKIP;
1461 ed->state = ED_NEW;
1462
1463 dev->ed_cnt--; /* This may make task blocked in sohci_free_dev() to be unblocked */
1464 }
1465 else
1466 {
1467 ed->state &= ~ED_URB_DEL;
1468 tdHeadP = (TD_T *)((uint32_t)(ed->hwHeadP) & 0xfffffff0);
1469 if(tdHeadP == tdTailP)
1470 {
1471 if(ed->state == ED_OPER)
1472 ep_unlink(ed);
1473 ohci_free_td(tdTailP);
1474 ed->hwINFO = OHCI_ED_SKIP;
1475 ed->state = ED_NEW;
1476 --(usb_to_ohci(ohci.dev[edINFO & 0x7F]))->ed_cnt;
1477 }
1478 else
1479 ed->hwINFO &= ~OHCI_ED_SKIP;
1480 }
1481
1482 switch(ed->type)
1483 {
1484 case PIPE_CONTROL:
1485 ctrl = 1;
1486 break;
1487 case PIPE_BULK:
1488 bulk = 1;
1489 break;
1490 }
1491 }
1492
1493 /* maybe re-enable control and bulk lists */
1494 if(!ohci.disabled)
1495 {
1496 if(ctrl) /* reset control list */
1497 USBH->HcControlCurrentED = 0;
1498 if(bulk) /* reset bulk list */
1499 USBH->HcBulkCurrentED = 0;
1500 if(!ohci.ed_rm_list[!frame])
1501 {
1502 if(ohci.ed_controltail)
1503 ohci.hc_control |= OHCI_CTRL_CLE;
1504 if(ohci.ed_bulktail)
1505 ohci.hc_control |= OHCI_CTRL_BLE;
1506 USBH->HcControl = ohci.hc_control;
1507 }
1508 }
1509
1510 ohci.ed_rm_list[frame] = NULL;
1511}
1512
1513
1514/*-------------------------------------------------------------------------*/
1515
1516/* td done list */
1517
1518static void dl_done_list(TD_T *td_list)
1519{
1520 TD_T *td_list_next = NULL;
1521 ED_T *ed;
1522 int cc = 0;
1523 URB_T *urb;
1524 URB_PRIV_T *urb_priv;
1525 uint32_t tdINFO, edHeadP, edTailP;
1526
1527 while(td_list)
1528 {
1529 td_list_next = td_list->next_dl_td;
1530
1531 urb = td_list->urb;
1532 urb_priv = &urb->urb_hcpriv;
1533 tdINFO = (uint32_t)(td_list->hwINFO);
1534
1535 ed = td_list->ed;
1536
1537 dl_transfer_length(td_list);
1538
1539 /* error code of transfer */
1540 cc = TD_CC_GET(tdINFO);
1541 if(cc == TD_CC_STALL)
1542 usb_endpoint_halt(urb->dev, usb_pipeendpoint(urb->pipe), usb_pipeout(urb->pipe));
1543
1544 if(!(urb->transfer_flags & USB_DISABLE_SPD) && (cc == TD_DATAUNDERRUN))
1545 cc = TD_CC_NOERROR;
1546
1547 if(++(urb_priv->td_cnt) == urb_priv->length)
1548 {
1549 if((ed->state & (ED_OPER | ED_UNLINK)) && (urb_priv->state != URB_DEL))
1550 {
1551 urb->status = cc_to_error[cc];
1552 sohci_return_urb(urb);
1553 }
1554 else
1555 {
1556 dl_del_urb(urb);
1557 }
1558 }
1559 if(ed->state != ED_NEW)
1560 {
1561 edHeadP = (uint32_t)(ed->hwHeadP) & 0xfffffff0;
1562 edTailP = (uint32_t)(ed->hwTailP);
1563
1564 /* unlink eds if they are not busy */
1565 if((edHeadP == edTailP) && (ed->state == ED_OPER))
1566 {
1567 ep_unlink(ed);
1568 }
1569 }
1570 td_list = td_list_next;
1571 }
1572}
1573
1574
1575/*-------------------------------------------------------------------------*
1576 * Virtual Root Hub
1577 *-------------------------------------------------------------------------*/
1578
1579/* Device descriptor */
1580static uint8_t root_hub_dev_des[] =
1581{
1582 0x12, /* uint8_t bLength; */
1583 0x01, /* uint8_t bDescriptorType; Device */
1584 0x10, /* uint16_t bcdUSB; v1.1 */
1585 0x01,
1586 0x09, /* uint8_t bDeviceClass; HUB_CLASSCODE */
1587 0x00, /* uint8_t bDeviceSubClass; */
1588 0x00, /* uint8_t bDeviceProtocol; */
1589 0x08, /* uint8_t bMaxPacketSize0; 8 Bytes */
1590 0x00, /* uint16_t idVendor; */
1591 0x00,
1592 0x00, /* uint16_t idProduct; */
1593 0x00,
1594 0x00, /* uint16_t bcdDevice; */
1595 0x00,
1596 0x00, /* uint8_t iManufacturer; */
1597 0x02, /* uint8_t iProduct; */
1598 0x01, /* uint8_t iSerialNumber; */
1599 0x01 /* uint8_t bNumConfigurations; */
1600};
1601
1602
1603/* Configuration descriptor */
1604static uint8_t root_hub_config_des[] =
1605{
1606 0x09, /* uint8_t bLength; */
1607 0x02, /* uint8_t bDescriptorType; Configuration */
1608 0x19, /* uint16_t wTotalLength; */
1609 0x00,
1610 0x01, /* uint8_t bNumInterfaces; */
1611 0x01, /* uint8_t bConfigurationValue; */
1612 0x00, /* uint8_t iConfiguration; */
1613 0x40, /* uint8_t bmAttributes;
1614 Bit 7: Bus-powered, 6: Self-powered, 5 Remote-wakeup, 4..0: resvd */
1615 0x00, /* uint8_t MaxPower; */
1616
1617 /* interface */
1618 0x09, /* uint8_t if_bLength; */
1619 0x04, /* uint8_t if_bDescriptorType; Interface */
1620 0x00, /* uint8_t if_bInterfaceNumber; */
1621 0x00, /* uint8_t if_bAlternateSetting; */
1622 0x01, /* uint8_t if_bNumEndpoints; */
1623 0x09, /* uint8_t if_bInterfaceClass; HUB_CLASSCODE */
1624 0x00, /* uint8_t if_bInterfaceSubClass; */
1625 0x00, /* uint8_t if_bInterfaceProtocol; */
1626 0x00, /* uint8_t if_iInterface; */
1627
1628 /* endpoint */
1629 0x07, /* uint8_t ep_bLength; */
1630 0x05, /* uint8_t ep_bDescriptorType; Endpoint */
1631 0x81, /* uint8_t ep_bEndpointAddress; IN Endpoint 1 */
1632 0x03, /* uint8_t ep_bmAttributes; Interrupt */
1633 0x02, /* uint16_t ep_wMaxPacketSize; ((MAX_ROOT_PORTS + 1) / 8 */
1634 0x00,
1635 0xff /* uint8_t ep_bInterval; 255 ms */
1636};
1637
1638/* Hub class-specific descriptor is constructed dynamically */
1639
1640
1641/*-------------------------------------------------------------------------*/
1642
1643/* prepare Interrupt pipe data; HUB INTERRUPT ENDPOINT */
1644
1645static int rh_send_irq(void *rh_data, int rh_len)
1646{
1647 int num_ports;
1648 int i;
1649 int ret;
1650 int len;
1651 uint8_t data[8];
1652
1653 num_ports = USBH->HcRhDescriptorA & RH_A_NDP;
1654
1655 /* YCHuang: prepare the 'Hub change detected' bit, refer to USB 1.1 Spec. p.260 */
1656 *(uint8_t *)data = (USBH->HcRhStatus & (RH_HS_LPSC | RH_HS_OCIC)) ? 1 : 0;
1657 ret = *(uint8_t *)data;
1658
1659 /* YCHuang: prepare the 'Port change detected' bits, refer to USB 1.1 Spec. p.260 */
1660 for(i = 0; i < num_ports; i++)
1661 {
1662 *(uint8_t *)(data + (i + 1) / 8) |= ((USBH->HcRhPortStatus[i] &
1663 (RH_PS_CSC | RH_PS_PESC | RH_PS_PSSC | RH_PS_OCIC | RH_PS_PRSC))
1664 ? 1 : 0) << ((i + 1) % 8);
1665 ret += *(uint8_t *)(data + (i + 1) / 8);
1666 }
1667 len = i / 8 + 1;
1668
1669 if(ret > 0)
1670 {
1671 memcpy(rh_data, data, min(len, min(rh_len, sizeof(data))));
1672 return len;
1673 }
1674 return 0;
1675}
1676
1677/*-------------------------------------------------------------------------*/
1678static URB_T *_OHCI_RH_IRQ;
1679
1680/* Virtual Root Hub INTs are polled by this timer every "interval" ms */
1681
1682void ohci_int_timer_do(int ptr)
1683{
1684 int len;
1685 URB_T *urb = _OHCI_RH_IRQ;
1686
1687 if(ohci.rh.send)
1688 {
1689 len = rh_send_irq(urb->transfer_buffer, urb->transfer_buffer_length);
1690 if(len > 0)
1691 {
1692 urb->actual_length = len;
1693#ifdef USB_VERBOSE_DEBUG
1694 urb_print(urb, "RET-t(rh)", usb_pipeout(urb->pipe));
1695#endif
1696 if(urb->complete)
1697 urb->complete(urb); /* call the hub_irq() in hub.c */
1698 }
1699 }
1700}
1701
1702
1703
1704/* for returning string descriptors in UTF-16LE */
1705static int ascii2utf(char *ascii, uint8_t *utf, int utfmax)
1706{
1707 int retval;
1708
1709 for(retval = 0; *ascii && utfmax > 1; utfmax -= 2, retval += 2)
1710 {
1711 *utf++ = *ascii++ & 0x7f;
1712 *utf++ = 0;
1713 }
1714 return retval;
1715}
1716
1717
1718
1719/*
1720 * root_hub_string is used by each host controller's root hub code,
1721 * so that they're identified consistently throughout the system.
1722 */
1723static int usbh_root_hub_string(int id, int serial, char *type, uint8_t *data, int len)
1724{
1725 char buf[30];
1726
1727 /* language ids */
1728 if(id == 0)
1729 {
1730 *data++ = 4;
1731 *data++ = 3; /* 4 bytes data */
1732 *data++ = 0;
1733 *data++ = 0; /* some language id */
1734 return 4;
1735 // serial number
1736 }
1737 else if(id == 1)
1738 {
1739 sprintf(buf, "%x", serial);
1740 /* product description */
1741 }
1742 else if(id == 2)
1743 {
1744 sprintf(buf, "USB %s Root Hub", type);
1745 /* id 3 == vendor description */
1746 /* unsupported IDs --> "stall" */
1747 }
1748 else
1749 return 0;
1750
1751 data [0] = 2 + ascii2utf(buf, data + 2, len - 2);
1752 data [1] = 3;
1753 return data [0];
1754}
1755
1756
1757/*-------------------------------------------------------------------------*/
1758
1759#define RH_OK(x) len = (x); break
1760#define WR_RH_STAT(x) (USBH->HcRhStatus = (x))
1761#define WR_RH_PORTSTAT(x) (USBH->HcRhPortStatus[wIndex-1] = (x))
1762#define RD_RH_STAT (USBH->HcRhStatus)
1763#define RD_RH_PORTSTAT (USBH->HcRhPortStatus[wIndex-1])
1764
1765/* request to virtual root hub */
1766
1767static int rh_submit_urb(URB_T *urb)
1768{
1769 uint32_t pipe;
1770 DEV_REQ_T *cmd;
1771 void *data;
1772 int leni;
1773 int len = 0;
1774 int status = TD_CC_NOERROR;
1775 uint32_t datab[4];
1776 uint8_t *data_buf;
1777 uint16_t bmRType_bReq;
1778 uint16_t wValue;
1779 uint16_t wIndex;
1780 uint16_t wLength;
1781
1782 pipe = urb->pipe;
1783 cmd = (DEV_REQ_T *) urb->setup_packet;
1784 data = urb->transfer_buffer;
1785 leni = urb->transfer_buffer_length;
1786 data_buf = (uint8_t *) datab;
1787
1788 if(usb_pipeint(pipe)) /* ¦pªG³o­Ó URB ¬OÄÝ©ó interrupt pipe */
1789 {
1790 ohci.rh.urb = urb;
1791 ohci.rh.send = 1;
1792 ohci.rh.interval = urb->interval;
1793 _OHCI_RH_IRQ = urb;
1794
1795 ohci_int_timer_do(0);
1796
1797 urb->status = 0;
1798 return 0;
1799 }
1800
1801 bmRType_bReq = (cmd->requesttype << 8) | cmd->request;
1802 wValue = cmd->value;
1803 wIndex = cmd->index;
1804 wLength = cmd->length;
1805 USB_info("rh_submit_urb, req = 0x%x len=%d\n", bmRType_bReq, wLength);
1806
1807#ifdef USB_VERBOSE_DEBUG /* YCHuang: added for debug */
1808 USB_debug("Command - ");
1809 switch(bmRType_bReq & 0x80FF)
1810 {
1811 case RH_GET_STATUS:
1812 USB_debug("GET_STATUS\n");
1813 break;
1814
1815 case RH_CLEAR_FEATURE:
1816 USB_debug("CLEAR_FEATURE\n");
1817 break;
1818
1819 case RH_SET_FEATURE:
1820 USB_debug("SET_FEATURE\n");
1821 break;
1822
1823 case RH_SET_ADDRESS:
1824 USB_debug("SET_ADDRESS\n");
1825 break;
1826
1827 case RH_GET_DESCRIPTOR:
1828 USB_debug("GET_DESCRIPTOR\n");
1829 break;
1830
1831 case RH_SET_DESCRIPTOR:
1832 USB_debug("SET_DESCRIPTOR\n");
1833 break;
1834
1835 case RH_GET_CONFIGURATION:
1836 USB_debug("GET_CONFIGURATION\n");
1837 break;
1838
1839 case RH_SET_CONFIGURATION:
1840 USB_debug("RH_SET_CONFIGURATION\n");
1841 break;
1842
1843 case RH_GET_STATE:
1844 USB_debug("GET_STATE\n");
1845 break;
1846
1847 case RH_GET_INTERFACE:
1848 USB_debug("GET_INTERFACE\n");
1849 break;
1850
1851 case RH_SET_INTERFACE:
1852 USB_debug("SET_INTERFACE\n");
1853 break;
1854
1855 case RH_SYNC_FRAME:
1856 USB_debug("SYNC_FRAME\n");
1857 break;
1858
1859 case RH_SET_EP:
1860 USB_debug("SET_EP\n");
1861 break;
1862 }
1863#endif
1864
1865 switch(bmRType_bReq)
1866 {
1867 /* Request Destination:
1868 without flags: Device,
1869 RH_INTERFACE: interface,
1870 RH_ENDPOINT: endpoint,
1871 RH_CLASS means HUB here,
1872 RH_OTHER | RH_CLASS almost ever means HUB_PORT here
1873 */
1874
1875 case RH_GET_STATUS:
1876 *(uint16_t *) data_buf = USB_SWAP16(1);
1877 RH_OK(2);
1878
1879 case RH_GET_STATUS | RH_INTERFACE:
1880 *(uint16_t *) data_buf = 0;
1881 RH_OK(2);
1882
1883 case RH_GET_STATUS | RH_ENDPOINT:
1884 *(uint16_t *) data_buf = 0;
1885 RH_OK(2);
1886
1887 case RH_GET_STATUS | RH_CLASS:
1888 /* BIGBIG */
1889 data_buf[0] = RD_RH_STAT & 0xFF;
1890 data_buf[1] = (RD_RH_STAT >> 8) & 0xFF;
1891 data_buf[2] = (RD_RH_STAT >> 16) & 0xFF;
1892 data_buf[3] = (RD_RH_STAT >> 24) & 0xFF;
1893 *(uint32_t *) data_buf = RD_RH_STAT & ~(RH_HS_CRWE | RH_HS_DRWE);
1894 RH_OK(4);
1895
1896 case RH_GET_STATUS | RH_OTHER | RH_CLASS:
1897 *(uint32_t *) data_buf = RD_RH_PORTSTAT;
1898 RH_OK(4);
1899
1900 case RH_CLEAR_FEATURE | RH_ENDPOINT:
1901 switch(wValue)
1902 {
1903 case(RH_ENDPOINT_STALL):
1904 RH_OK(0);
1905 }
1906 break;
1907
1908 case RH_CLEAR_FEATURE | RH_CLASS:
1909 switch(wValue)
1910 {
1911 case RH_C_HUB_LOCAL_POWER:
1912 RH_OK(0);
1913 case(RH_C_HUB_OVER_CURRENT):
1914 WR_RH_STAT(RH_HS_OCIC);
1915 RH_OK(0);
1916 }
1917 break;
1918
1919 case RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS:
1920 switch(wValue)
1921 {
1922 case(RH_PORT_ENABLE):
1923 WR_RH_PORTSTAT(RH_PS_CCS);
1924 RH_OK(0);
1925 case(RH_PORT_SUSPEND):
1926 WR_RH_PORTSTAT(RH_PS_POCI);
1927 RH_OK(0);
1928 case(RH_PORT_POWER):
1929 WR_RH_PORTSTAT(RH_PS_LSDA);
1930 RH_OK(0);
1931 case(RH_C_PORT_CONNECTION):
1932 WR_RH_PORTSTAT(RH_PS_CSC);
1933 RH_OK(0);
1934 case(RH_C_PORT_ENABLE):
1935 WR_RH_PORTSTAT(RH_PS_PESC);
1936 RH_OK(0);
1937 case(RH_C_PORT_SUSPEND):
1938 WR_RH_PORTSTAT(RH_PS_PSSC);
1939 RH_OK(0);
1940 case(RH_C_PORT_OVER_CURRENT):
1941 WR_RH_PORTSTAT(RH_PS_OCIC);
1942 RH_OK(0);
1943 case(RH_C_PORT_RESET):
1944 WR_RH_PORTSTAT(RH_PS_PRSC);
1945 RH_OK(0);
1946 }
1947 break;
1948
1949 case RH_SET_FEATURE | RH_OTHER | RH_CLASS:
1950 switch(wValue)
1951 {
1952 case(RH_PORT_SUSPEND):
1953 WR_RH_PORTSTAT(RH_PS_PSS);
1954 RH_OK(0);
1955
1956 case(RH_PORT_RESET): /* BUG IN HUP CODE *********/
1957 if(RD_RH_PORTSTAT & RH_PS_CCS)
1958 WR_RH_PORTSTAT(RH_PS_PRS);
1959 RH_OK(0);
1960
1961 case(RH_PORT_POWER):
1962 WR_RH_PORTSTAT(RH_PS_PPS);
1963 RH_OK(0);
1964
1965 case(RH_PORT_ENABLE): /* BUG IN HUP CODE *********/
1966 if(RD_RH_PORTSTAT & RH_PS_CCS)
1967 WR_RH_PORTSTAT(RH_PS_PES);
1968 RH_OK(0);
1969 }
1970 break;
1971
1972 case RH_SET_ADDRESS:
1973 ohci.rh.devnum = wValue;
1974 RH_OK(0);
1975
1976 case RH_GET_DESCRIPTOR:
1977 switch((wValue & 0xff00) >> 8)
1978 {
1979 case(0x01): /* device descriptor */
1980 len = min(leni, min(sizeof(root_hub_dev_des), wLength));
1981 data_buf = root_hub_dev_des;
1982 RH_OK(len);
1983
1984 case(0x02): /* configuration descriptor */
1985 len = min(leni, min(sizeof(root_hub_config_des), wLength));
1986 data_buf = root_hub_config_des;
1987 RH_OK(len);
1988
1989 case(0x03): /* string descriptors */
1990 len = usbh_root_hub_string(wValue & 0xff, 0x0, "OHCI", data, wLength);
1991 if(len > 0)
1992 {
1993 data_buf = data;
1994 RH_OK(min(leni, len));
1995 }
1996 // else fallthrough
1997 default:
1998 status = TD_CC_STALL;
1999 }
2000 break;
2001
2002 case RH_GET_DESCRIPTOR | RH_CLASS:
2003 {
2004 uint32_t temp = USBH->HcRhDescriptorA;
2005
2006 data_buf [0] = 9; // min length;
2007 data_buf [1] = 0x29;
2008 data_buf [2] = temp & RH_A_NDP;
2009 data_buf [3] = 0;
2010 if(temp & RH_A_PSM) /* per-port power switching? */
2011 data_buf [3] |= 0x1;
2012 if(temp & RH_A_NOCP) /* no over current reporting? */
2013 data_buf [3] |= 0x10;
2014 else if(temp & RH_A_OCPM) /* per-port over current reporting? */
2015 data_buf [3] |= 0x8;
2016
2017 datab [1] = 0;
2018 data_buf [5] = (temp & RH_A_POTPGT) >> 24;
2019 temp = USBH->HcRhDescriptorB;
2020 data_buf [7] = temp & RH_B_DR;
2021 if(data_buf [2] < 7)
2022 {
2023 data_buf [8] = 0xff;
2024 }
2025 else
2026 {
2027 data_buf [0] += 2;
2028 data_buf [8] = (temp & RH_B_DR) >> 8;
2029 data_buf [10] = data_buf [9] = 0xff;
2030 }
2031 len = min(leni, min(data_buf [0], wLength));
2032 RH_OK(len);
2033 }
2034
2035 case RH_GET_CONFIGURATION:
2036 *(uint8_t *) data_buf = 0x01;
2037 RH_OK(1);
2038
2039 case RH_SET_CONFIGURATION:
2040 WR_RH_STAT(0x10000); /* set global port power */
2041 RH_OK(0);
2042
2043 default:
2044 //USB_error("Error! - unsupported root hub command\n");
2045 status = TD_CC_STALL;
2046 }
2047
2048 len = min(len, leni);
2049 if(data != data_buf)
2050 memcpy(data, data_buf, len);
2051 urb->actual_length = len;
2052 urb->status = cc_to_error[status];
2053
2054 urb->dev = NULL;
2055 if(urb->complete)
2056 urb->complete(urb);
2057
2058 return 0;
2059}
2060
2061/*-------------------------------------------------------------------------*/
2062
2063static int rh_unlink_urb(URB_T *urb)
2064{
2065 if(ohci.rh.urb == urb)
2066 {
2067 ohci.rh.send = 0;
2068 ohci.rh.urb = NULL;
2069
2070 urb->dev = NULL;
2071 if(urb->transfer_flags & USB_ASYNC_UNLINK)
2072 {
2073 urb->status = USB_ERR_CONNRESET;
2074 if(urb->complete)
2075 urb->complete(urb);
2076 }
2077 else
2078 urb->status = USB_ERR_NOENT;
2079 }
2080 return 0;
2081}
2082
2083/*-------------------------------------------------------------------------*
2084 * HC functions
2085 *-------------------------------------------------------------------------*/
2086
2087/* reset the HC and BUS */
2088
2089static int ohci_reset()
2090{
2091 int timeout = 30;
2092
2093 /* Disable HC interrupts */
2094 USBH->HcInterruptDisable = OHCI_INTR_MIE;
2095
2096 /* Reset USB (needed by some controllers) */
2097 USBH->HcControl = 0;
2098
2099 /* HC Reset requires max 10 ms delay */
2100 USBH->HcCommandStatus = OHCI_HCR;
2101
2102 while((USBH->HcCommandStatus & OHCI_HCR) != 0)
2103 {
2104 if(--timeout == 0)
2105 {
2106 USB_error("Error! - USB HC reset timed out!\n");
2107 return -1;
2108 }
2109 usbh_mdelay(10);
2110 }
2111 USBH->HcControl = (USBH->HcControl & 0xffffff3f) | OHCI_USB_RESET;
2112
2113 return 0;
2114}
2115
2116
2117/*-------------------------------------------------------------------------*/
2118void USBH_IRQHandler(void)
2119{
2120 int ints;
2121
2122 _is_in_interrupt = 1;
2123
2124 ints = USBH->HcInterruptStatus;
2125
2126 //printf("[irq-0x%x] 0x%x, 0x%x\n", ints, USBH->HcRhPortStatus[0], USBH->HcRhPortStatus[1]);
2127
2128 if((ohci.hcca->done_head != 0) && !((uint32_t)(ohci.hcca->done_head) & 0x01))
2129 {
2130 ints = OHCI_INTR_WDH;
2131 }
2132
2133 if(ints & OHCI_INTR_UE)
2134 {
2135 ohci.disabled++;
2136 USB_error("Error! - OHCI Unrecoverable Error, controller disabled\n");
2137 /* e.g. due to PCI Master/Target Abort */
2138 /*
2139 * FIXME: be optimistic, hope that bug won't repeat often.
2140 * Make some non-interrupt context restart the controller.
2141 * Count and limit the retries though; either hardware or
2142 * software errors can go forever...
2143 */
2144 ohci_reset();
2145 }
2146
2147 if(ints & OHCI_INTR_OC)
2148 {
2149 USB_debug("Ownership change!!\n");
2150 }
2151
2152 if(ints & OHCI_INTR_WDH)
2153 {
2154 dl_done_list(dl_reverse_done_list());
2155 USBH->HcInterruptStatus = OHCI_INTR_WDH;
2156 }
2157
2158 if(ints & OHCI_INTR_SO)
2159 {
2160 //*(uint32_t *)0x600000 = 0x1;
2161 //while (1);
2162 //USB_error("Error! - USB Schedule overrun, count:%d\n", (USBH->HcCommandStatus >> 16) & 0x3);
2163 USBH->HcInterruptDisable = OHCI_INTR_SO;
2164 USBH->HcInterruptStatus = OHCI_INTR_SO;
2165 }
2166
2167 if(ints & OHCI_INTR_SF)
2168 {
2169 uint32_t frame = ohci.hcca->frame_no & 1;
2170
2171 USBH->HcInterruptDisable = OHCI_INTR_SF;
2172 if(ohci.ed_rm_list[!frame] != NULL)
2173 {
2174 dl_del_list(!frame);
2175 }
2176 if(ohci.ed_rm_list[frame] != NULL)
2177 USBH->HcInterruptEnable = OHCI_INTR_SF;
2178 }
2179
2180 if(ints & OHCI_INTR_RHSC)
2181 {
2182 USBH->HcInterruptDisable = OHCI_INTR_RHSC;
2183 USBH->HcInterruptStatus = OHCI_INTR_RHSC;
2184 }
2185
2186 if(ints & OHCI_INTR_RD)
2187 {
2188 USBH->HcInterruptDisable = OHCI_INTR_RD;
2189 USBH->HcInterruptStatus = OHCI_INTR_RD;
2190 }
2191
2192 ints &= ~OHCI_INTR_WDH;
2193 USBH->HcInterruptEnable = OHCI_INTR_MIE;
2194
2195 /* FIXME: check URB timeouts */
2196 _is_in_interrupt = 0;
2197}
2198
2199
2200/*-------------------------------------------------------------------------*/
2201
2202/* Start an OHCI controller, set the BUS operational
2203 * enable interrupts
2204 * connect the virtual root hub */
2205
2206static int hc_start()
2207{
2208 uint32_t mask;
2209 uint32_t fminterval;
2210 int i;
2211 USB_DEV_T *usb_dev;
2212
2213 ohci.disabled = 1;
2214
2215 /* empty the interrupt branches */
2216 for(i = 0; i < NUM_INTS; i++)
2217 ohci.ohci_int_load[i] = 0;
2218 for(i = 0; i < NUM_INTS; i++)
2219 ohci.hcca->int_table[i] = 0;
2220
2221 /* no EDs to remove */
2222 ohci.ed_rm_list [0] = NULL;
2223 ohci.ed_rm_list [1] = NULL;
2224
2225 /* empty control and bulk lists */
2226 ohci.ed_isotail = NULL;
2227 ohci.ed_controltail = NULL;
2228 ohci.ed_bulktail = NULL;
2229
2230 /* Tell the controller where the control and bulk lists are
2231 * The lists are empty now. */
2232 USBH->HcControlHeadED = 0; /* control ED list head */
2233 USBH->HcBulkHeadED = 0; /* bulk ED list head */
2234
2235 USBH->HcHCCA = (uint32_t)ohci.hcca; /* a reset clears this */
2236
2237 fminterval = 0x2edf; /* 11,999 */
2238
2239 /* periodic start 90% of frame interval */
2240 USBH->HcPeriodicStart = (fminterval * 9) / 10;
2241
2242 /* set FSLargestDataPacket, 10,104 for 0x2edf frame interval */
2243 fminterval |= ((((fminterval - 210) * 6) / 7) << 16);
2244 USBH->HcFmInterval = fminterval;
2245
2246 USBH->HcLSThreshold = 0x628;
2247
2248 /* start controller operations */
2249 ohci.hc_control = OHCI_CONTROL_INIT | OHCI_USB_OPER;
2250 ohci.disabled = 0;
2251 USBH->HcControl = ohci.hc_control;
2252
2253 /* Choose the interrupts we care about now, others later on demand */
2254 mask = OHCI_INTR_MIE | OHCI_INTR_UE | OHCI_INTR_WDH | OHCI_INTR_SO;
2255 USBH->HcInterruptEnable = mask;
2256 USBH->HcInterruptStatus = mask;
2257
2258
2259#ifndef AUTO_POWER_CONTROL
2260 /* Over current status is not reported */
2261 USBH->HcRhDescriptorA |= RH_A_NOCP;
2262#endif
2263
2264 /* global port power mode */
2265 USBH->HcRhDescriptorA = USBH->HcRhDescriptorA & ~(RH_A_PSM | RH_A_OCPM);
2266
2267 USBH->HcRhStatus = RH_HS_LPSC;
2268
2269 /* POTPGT delay is bits 24-31, in 2 ms units. */
2270 usbh_mdelay((USBH->HcRhDescriptorA >> 23) & 0x1fe);
2271
2272 /* connect the virtual root hub */
2273 ohci.rh.devnum = 0;
2274 usb_dev = usbh_alloc_device(NULL, ohci.bus);
2275 if(!usb_dev)
2276 {
2277 ohci.disabled = 1;
2278 return USB_ERR_NOMEM;
2279 }
2280
2281 ohci.bus->root_hub = usb_dev;
2282 usbh_connect_device(usb_dev);
2283 if(usbh_settle_new_device(usb_dev) != 0)
2284 {
2285 usbh_free_device(usb_dev);
2286 ohci.disabled = 1;
2287 return USB_ERR_NODEV;
2288 }
2289 return 0;
2290}
2291
2292
2293#if 0
2294static void hc_restart()
2295{
2296 int temp;
2297 int i;
2298
2299 ohci.disabled = 1;
2300 if(ohci.bus->root_hub)
2301 usbh_disconnect_device(&ohci.bus->root_hub);
2302
2303 /* empty the interrupt branches */
2304 for(i = 0; i < NUM_INTS; i++)
2305 ohci.ohci_int_load[i] = 0;
2306 for(i = 0; i < NUM_INTS; i++)
2307 ohci.hcca->int_table[i] = 0;
2308
2309 /* no EDs to remove */
2310 ohci.ed_rm_list [0] = NULL;
2311 ohci.ed_rm_list [1] = NULL;
2312
2313 /* empty control and bulk lists */
2314 ohci.ed_isotail = NULL;
2315 ohci.ed_controltail = NULL;
2316 ohci.ed_bulktail = NULL;
2317
2318 if((temp = ohci_reset()) < 0 || (temp = hc_start()) < 0)
2319 USB_error("Error! - can't restart usb-%s, %d\n", "ohci->ohci_dev->slot_name", temp);
2320 else
2321 USB_error("Error! - restart usb-%s completed\n", "ohci->ohci_dev->slot_name");
2322}
2323#endif
2324
2325
2326/*-------------------------------------------------------------------------*/
2327
2328int usbh_init_ohci()
2329{
2330 int i;
2331 if(sizeof(ED_T) != 32)
2332 {
2333 USB_error("Wrong ED_T size!!!\n");
2334 return -1;
2335 }
2336
2337 if(sizeof(TD_T) != 64)
2338 {
2339 USB_error("Wrong TD_T size!!!\n");
2340 return -1;
2341 }
2342
2343 memset((char *)&ohci, 0, sizeof(OHCI_T));
2344 ohci.hcca = (OHCI_HCCA_T *)g_ohci_hcca;
2345 memset((char *)ohci.hcca, 0, 256);
2346
2347 for(i = 0; i < DEV_MAX_NUM; i++)
2348 ohci_dev_alloc_mark[i] = 0;
2349
2350 ohci.disabled = 1;
2351
2352 if(ohci_reset() < 0)
2353 return USB_ERR_NODEV;
2354
2355 ohci.hc_control = OHCI_USB_RESET;
2356 USBH->HcControl = ohci.hc_control;
2357
2358 /*- HCD must wait 10ms for HC reset complete -*/
2359 usbh_mdelay(100);
2360
2361 /*
2362 * OHCI bus ...
2363 */
2364 g_ohci_bus.op = &sohci_device_operations;
2365 g_ohci_bus.root_hub = NULL;
2366 g_ohci_bus.hcpriv = &ohci;
2367 ohci.bus = &g_ohci_bus;
2368
2369 if(hc_start() < 0)
2370 {
2371 USB_error("Error! - can't start OHCI!\n");
2372 return USB_ERR_BUSY;
2373 }
2374 return 0;
2375}
2376
2378
__attribute__
void *__dso_handle __attribute__((weak))
Definition: _syscalls.c:35
NULL
#define NULL
Definition: M4521.h:13912
USBH
#define USBH
Definition: M4521.h:13831
urb_t::setup_packet
uint8_t * setup_packet
Definition: usbh_core.h:526
ISO_PACKET_DESCRIPTOR_T::length
uint32_t length
Definition: usbh_core.h:506
urb_t::status
int status
Definition: usbh_core.h:521
urb_t::transfer_buffer
void * transfer_buffer
Definition: usbh_core.h:523
ISO_PACKET_DESCRIPTOR_T::offset
uint32_t offset
Definition: usbh_core.h:505
urb_t::start_frame
int start_frame
Definition: usbh_core.h:527
urb_t::actual_length
int actual_length
Definition: usbh_core.h:525
ISO_PACKET_DESCRIPTOR_T::status
int status
Definition: usbh_core.h:508
urb_t::transfer_buffer_length
int transfer_buffer_length
Definition: usbh_core.h:524
urb_t::pipe
uint32_t pipe
Definition: usbh_core.h:520
urb_t::dev
struct usb_device * dev
Definition: usbh_core.h:519
urb_t::number_of_packets
int number_of_packets
Definition: usbh_core.h:528
urb_t::transfer_flags
uint32_t transfer_flags
Definition: usbh_core.h:522
urb_t::urb_hcpriv
URB_PRIV_T urb_hcpriv
Definition: usbh_core.h:516
urb_t::iso_frame_desc
ISO_PACKET_DESCRIPTOR_T iso_frame_desc[8]
Definition: usbh_core.h:534
urb_t::next
struct urb_t * next
Definition: usbh_core.h:518
usb_device::bus
USB_BUS_T * bus
Definition: usbh_core.h:657
urb_t::complete
void(* complete)(struct urb_t *)
Definition: usbh_core.h:533
ISO_PACKET_DESCRIPTOR_T::actual_length
uint32_t actual_length
Definition: usbh_core.h:507
urb_t::interval
int interval
Definition: usbh_core.h:529
urb_t
Definition: usbh_core.h:515
DEV_MAX_NUM
#define DEV_MAX_NUM
Definition: usbh_config.h:32
MAX_TD_PER_OHCI_URB
#define MAX_TD_PER_OHCI_URB
Definition: usbh_config.h:39
ISO_FRAME_COUNT
#define ISO_FRAME_COUNT
Definition: usbh_config.h:43
OHCI_ISO_DELAY
#define OHCI_ISO_DELAY
Definition: usbh_config.h:44
usbh_core.h
USB Host core driver header file.
DEV_REQ_T
DEV_REQ_T
Definition: usbh_core.h:173
USB_DEV_T
HIDDEN_SYMBOLS struct usb_device USB_DEV_T
CC_ERR_BITSTUFF
#define CC_ERR_BITSTUFF
Definition: usbh_err_code.h:24
CC_ERR_NORESPONSE
#define CC_ERR_NORESPONSE
Definition: usbh_err_code.h:27
USB_ERR_XDEV
#define USB_ERR_XDEV
Definition: usbh_err_code.h:10
USB_ERR_TIMEOUT
#define USB_ERR_TIMEOUT
Definition: usbh_err_code.h:18
USB_OK
#define USB_OK
Definition: usbh_err_code.h:4
CC_ERR_DATAUNDERRUN
#define CC_ERR_DATAUNDERRUN
Definition: usbh_err_code.h:31
USB_ERR_NODEV
#define USB_ERR_NODEV
Definition: usbh_err_code.h:11
CC_ERR_DATA_TOGGLE
#define CC_ERR_DATA_TOGGLE
Definition: usbh_err_code.h:25
USB_ERR_NOENT
#define USB_ERR_NOENT
Definition: usbh_err_code.h:5
EWOULDBLOCK
#define EWOULDBLOCK
Definition: usbh_err_code.h:14
CC_ERR_CRC
#define CC_ERR_CRC
Definition: usbh_err_code.h:23
CC_ERR_NOT_DEFINED
#define CC_ERR_NOT_DEFINED
Definition: usbh_err_code.h:32
CC_ERR_STALL
#define CC_ERR_STALL
Definition: usbh_err_code.h:26
USB_ERR_INPROGRESS
#define USB_ERR_INPROGRESS
Definition: usbh_err_code.h:19
USB_ERR_INVAL
#define USB_ERR_INVAL
Definition: usbh_err_code.h:12
CC_ERR_BUFFERUNDERRUN
#define CC_ERR_BUFFERUNDERRUN
Definition: usbh_err_code.h:34
CC_ERR_NOT_ACCESS
#define CC_ERR_NOT_ACCESS
Definition: usbh_err_code.h:35
USB_ERR_PIPE
#define USB_ERR_PIPE
Definition: usbh_err_code.h:13
USB_ERR_NOMEM
#define USB_ERR_NOMEM
Definition: usbh_err_code.h:8
CC_ERR_PID_CHECK
#define CC_ERR_PID_CHECK
Definition: usbh_err_code.h:28
USB_ERR_BUSY
#define USB_ERR_BUSY
Definition: usbh_err_code.h:9
USB_ERR_SHUTDOWN
#define USB_ERR_SHUTDOWN
Definition: usbh_err_code.h:17
CC_ERR_BUFFEROVERRUN
#define CC_ERR_BUFFEROVERRUN
Definition: usbh_err_code.h:33
USB_ERR_CONNRESET
#define USB_ERR_CONNRESET
Definition: usbh_err_code.h:16
CC_ERR_DATAOVERRUN
#define CC_ERR_DATAOVERRUN
Definition: usbh_err_code.h:30
CC_ERR_INVALID_PID
#define CC_ERR_INVALID_PID
Definition: usbh_err_code.h:29
USB_ERR_URB_PENDING
#define USB_ERR_URB_PENDING
Definition: usbh_err_code.h:21
usbh_ohci.h
usbh_free_device
void usbh_free_device(USB_DEV_T *dev)
Definition: usbh_support.c:252
ohci_free_td
void ohci_free_td(TD_T *td_p)
Definition: usbh_support.c:189
ohci_alloc_td
TD_T * ohci_alloc_td(USB_DEV_T *dev)
Definition: usbh_support.c:169
ohci_free_ed
void ohci_free_ed(ED_T *ed_p)
Definition: usbh_support.c:152
usbh_alloc_device
USB_DEV_T * usbh_alloc_device(USB_DEV_T *parent, USB_BUS_T *bus)
Definition: usbh_support.c:224
usbh_mdelay
void usbh_mdelay(uint32_t msec)
Definition: usbh_support.c:330
ohci_free_dev_td
void ohci_free_dev_td(USB_DEV_T *dev)
Definition: usbh_support.c:205
ohci_alloc_ed
ED_T * ohci_alloc_ed()
Definition: usbh_support.c:133
Generated on Thu Oct 17 2024 09:13:38 for M4521_BSP by doxygen 1.9.3