M4521_BSP V3.02.000
The Board Support Package for M4521
pdma.c
Go to the documentation of this file.
1/**************************************************************************/
12#include "M4521.h"
13
14
15static uint8_t u32ChSelect[PDMA_CH_MAX];
16
39void PDMA_Open(uint32_t u32Mask)
40{
41 int volatile i;
42
43 for(i = 0; i < PDMA_CH_MAX; i++)
44 {
45 PDMA->DSCT[i].CTL = 0;
46 u32ChSelect[i] = 0x1f;
47 }
48
49 PDMA->CHCTL |= u32Mask;
50}
51
61void PDMA_Close(void)
62{
63 PDMA->CHCTL = 0;
64}
65
80void PDMA_SetTransferCnt(uint32_t u32Ch, uint32_t u32Width, uint32_t u32TransCount)
81{
83 PDMA->DSCT[u32Ch].CTL |= (u32Width | ((u32TransCount - 1) << PDMA_DSCT_CTL_TXCNT_Pos));
84}
85
103void PDMA_SetTransferAddr(uint32_t u32Ch, uint32_t u32SrcAddr, uint32_t u32SrcCtrl, uint32_t u32DstAddr, uint32_t u32DstCtrl)
104{
105 PDMA->DSCT[u32Ch].SA = u32SrcAddr;
106 PDMA->DSCT[u32Ch].DA = u32DstAddr;
108 PDMA->DSCT[u32Ch].CTL |= (u32SrcCtrl | u32DstCtrl);
109}
110
143void PDMA_SetTransferMode(uint32_t u32Ch, uint32_t u32Peripheral, uint32_t u32ScatterEn, uint32_t u32DescAddr)
144{
145 u32ChSelect[u32Ch] = u32Peripheral;
146 switch(u32Ch)
147 {
148 case 0:
149 PDMA->REQSEL0_3 = (PDMA->REQSEL0_3 & ~PDMA_REQSEL0_3_REQSRC0_Msk) | u32Peripheral;
150 break;
151 case 1:
152 PDMA->REQSEL0_3 = (PDMA->REQSEL0_3 & ~PDMA_REQSEL0_3_REQSRC1_Msk) | (u32Peripheral << PDMA_REQSEL0_3_REQSRC1_Pos);
153 break;
154 case 2:
155 PDMA->REQSEL0_3 = (PDMA->REQSEL0_3 & ~PDMA_REQSEL0_3_REQSRC2_Msk) | (u32Peripheral << PDMA_REQSEL0_3_REQSRC2_Pos);
156 break;
157 case 3:
158 PDMA->REQSEL0_3 = (PDMA->REQSEL0_3 & ~PDMA_REQSEL0_3_REQSRC3_Msk) | (u32Peripheral << PDMA_REQSEL0_3_REQSRC3_Pos);
159 break;
160 case 4:
161 PDMA->REQSEL4_7 = (PDMA->REQSEL4_7 & ~PDMA_REQSEL4_7_REQSRC4_Msk) | u32Peripheral;
162 break;
163 case 5:
164 PDMA->REQSEL4_7 = (PDMA->REQSEL4_7 & ~PDMA_REQSEL4_7_REQSRC5_Msk) | (u32Peripheral << PDMA_REQSEL4_7_REQSRC5_Pos);
165 break;
166 case 6:
167 PDMA->REQSEL4_7 = (PDMA->REQSEL4_7 & ~PDMA_REQSEL4_7_REQSRC6_Msk) | (u32Peripheral << PDMA_REQSEL4_7_REQSRC6_Pos);
168 break;
169 case 7:
170 PDMA->REQSEL4_7 = (PDMA->REQSEL4_7 & ~PDMA_REQSEL4_7_REQSRC7_Msk) | (u32Peripheral << PDMA_REQSEL4_7_REQSRC7_Pos);
171 break;
172 default:
173 break;
174 }
175
176 if(u32ScatterEn)
177 {
178 PDMA->DSCT[u32Ch].CTL = (PDMA->DSCT[u32Ch].CTL & ~PDMA_DSCT_CTL_OPMODE_Msk) | PDMA_OP_SCATTER;
179 PDMA->DSCT[u32Ch].NEXT = u32DescAddr - (PDMA->SCATBA);
180 }
181 else
182 PDMA->DSCT[u32Ch].CTL = (PDMA->DSCT[u32Ch].CTL & ~PDMA_DSCT_CTL_OPMODE_Msk) | PDMA_OP_BASIC;
183}
184
206void PDMA_SetBurstType(uint32_t u32Ch, uint32_t u32BurstType, uint32_t u32BurstSize)
207{
209 PDMA->DSCT[u32Ch].CTL |= (u32BurstType | u32BurstSize);
210}
211
221void PDMA_EnableTimeout(uint32_t u32Mask)
222{
223 PDMA->TOUTEN |= u32Mask;
224}
225
235void PDMA_DisableTimeout(uint32_t u32Mask)
236{
237 PDMA->TOUTEN &= ~u32Mask;
238}
239
251void PDMA_SetTimeOut(uint32_t u32Ch, uint32_t u32OnOff, uint32_t u32TimeOutCnt)
252{
253 switch(u32Ch)
254 {
255 case 0:
256 PDMA->TOC0_1 = (PDMA->TOC0_1 & ~PDMA_TOC0_1_TOC0_Msk) | u32TimeOutCnt;
257 break;
258 case 1:
259 PDMA->TOC0_1 = (PDMA->TOC0_1 & ~PDMA_TOC0_1_TOC1_Msk) | (u32TimeOutCnt << PDMA_TOC0_1_TOC1_Pos);
260 break;
261 case 2:
262 PDMA->TOC2_3 = (PDMA->TOC2_3 & ~PDMA_TOC2_3_TOC2_Msk) | u32TimeOutCnt;
263 break;
264 case 3:
265 PDMA->TOC2_3 = (PDMA->TOC2_3 & ~PDMA_TOC2_3_TOC3_Msk) | (u32TimeOutCnt << PDMA_TOC2_3_TOC3_Pos);
266 break;
267 case 4:
268 PDMA->TOC4_5 = (PDMA->TOC4_5 & ~PDMA_TOC4_5_TOC4_Msk) | u32TimeOutCnt;
269 break;
270 case 5:
271 PDMA->TOC4_5 = (PDMA->TOC4_5 & ~PDMA_TOC4_5_TOC5_Msk) | (u32TimeOutCnt << PDMA_TOC4_5_TOC5_Pos);
272 break;
273 case 6:
274 PDMA->TOC6_7 = (PDMA->TOC6_7 & ~PDMA_TOC6_7_TOC6_Msk) | u32TimeOutCnt;
275 break;
276 case 7:
277 PDMA->TOC6_7 = (PDMA->TOC6_7 & ~PDMA_TOC6_7_TOC7_Msk) | (u32TimeOutCnt << PDMA_TOC6_7_TOC7_Pos);
278 break;
279
280 default:
281 break;
282 }
283
284 if (u32OnOff)
285 PDMA->TOUTEN |= (1ul << u32Ch);
286 else
287 PDMA->TOUTEN &= ~(1ul << u32Ch);
288}
289
299void PDMA_Trigger(uint32_t u32Ch)
300{
301 if(u32ChSelect[u32Ch] == PDMA_MEM)
302 PDMA->SWREQ = (1 << u32Ch);
303}
304
318void PDMA_EnableInt(uint32_t u32Ch, uint32_t u32Mask)
319{
320 switch(u32Mask)
321 {
323 PDMA->INTEN |= (1 << u32Ch);
324 break;
325 case PDMA_INT_TEMPTY:
326 PDMA->DSCT[u32Ch].CTL &= ~PDMA_DSCT_CTL_TBINTDIS_Msk;
327 break;
328 case PDMA_INT_TIMEOUT:
329 PDMA->TOUTIEN |= (1 << u32Ch);
330 break;
331
332 default:
333 break;
334 }
335}
336
350void PDMA_DisableInt(uint32_t u32Ch, uint32_t u32Mask)
351{
352 switch(u32Mask)
353 {
355 PDMA->INTEN &= ~(1 << u32Ch);
356 break;
357 case PDMA_INT_TEMPTY:
358 PDMA->DSCT[u32Ch].CTL |= PDMA_DSCT_CTL_TBINTDIS_Msk;
359 break;
360 case PDMA_INT_TIMEOUT:
361 PDMA->TOUTIEN &= ~(1 << u32Ch);
362 break;
363
364 default:
365 break;
366 }
367}
368 /* end of group PDMA_EXPORTED_FUNCTIONS */
370 /* end of group PDMA_Driver */
372 /* end of group Standard_Driver */
374
375/*** (C) COPYRIGHT 2022 Nuvoton Technology Corp. ***/
#define PDMA_TOC6_7_TOC7_Pos
Definition: M4521.h:4474
#define PDMA_REQSEL4_7_REQSRC5_Pos
Definition: M4521.h:4492
#define PDMA_REQSEL4_7_REQSRC7_Pos
Definition: M4521.h:4498
#define PDMA_REQSEL4_7_REQSRC6_Pos
Definition: M4521.h:4495
#define PDMA_REQSEL0_3_REQSRC2_Pos
Definition: M4521.h:4483
#define PDMA_DSCT_CTL_TXCNT_Pos
Definition: M4521.h:4384
#define PDMA_TOC2_3_TOC3_Pos
Definition: M4521.h:4462
#define PDMA_REQSEL0_3_REQSRC1_Pos
Definition: M4521.h:4480
#define PDMA_DSCT_CTL_TXTYPE_Msk
Definition: M4521.h:4367
#define PDMA_TOC0_1_TOC1_Pos
Definition: M4521.h:4456
#define PDMA_DSCT_CTL_TXCNT_Msk
Definition: M4521.h:4385
#define PDMA_DSCT_CTL_TBINTDIS_Msk
Definition: M4521.h:4373
#define PDMA_DSCT_CTL_DAINC_Msk
Definition: M4521.h:4379
#define PDMA_DSCT_CTL_BURSIZE_Msk
Definition: M4521.h:4370
#define PDMA_REQSEL0_3_REQSRC3_Pos
Definition: M4521.h:4486
#define PDMA_TOC4_5_TOC5_Pos
Definition: M4521.h:4468
#define PDMA_DSCT_CTL_TXWIDTH_Msk
Definition: M4521.h:4382
#define PDMA_DSCT_CTL_SAINC_Msk
Definition: M4521.h:4376
#define PDMA_OP_BASIC
Definition: pdma.h:38
#define PDMA_INT_TRANS_DONE
Definition: pdma.h:98
#define PDMA_MEM
Definition: pdma.h:93
#define PDMA_OP_SCATTER
Definition: pdma.h:39
#define PDMA_INT_TEMPTY
Definition: pdma.h:99
#define PDMA_CH_MAX
Definition: pdma.h:32
#define PDMA_INT_TIMEOUT
Definition: pdma.h:100
void PDMA_SetTransferAddr(uint32_t u32Ch, uint32_t u32SrcAddr, uint32_t u32SrcCtrl, uint32_t u32DstAddr, uint32_t u32DstCtrl)
Set PDMA Transfer Address.
Definition: pdma.c:103
void PDMA_Trigger(uint32_t u32Ch)
Trigger PDMA.
Definition: pdma.c:299
void PDMA_EnableTimeout(uint32_t u32Mask)
Enable timeout function.
Definition: pdma.c:221
void PDMA_SetTimeOut(uint32_t u32Ch, uint32_t u32OnOff, uint32_t u32TimeOutCnt)
Set PDMA Timeout Count.
Definition: pdma.c:251
void PDMA_EnableInt(uint32_t u32Ch, uint32_t u32Mask)
Enable Interrupt.
Definition: pdma.c:318
void PDMA_Open(uint32_t u32Mask)
PDMA Open.
Definition: pdma.c:39
void PDMA_DisableTimeout(uint32_t u32Mask)
Disable timeout function.
Definition: pdma.c:235
void PDMA_Close(void)
PDMA Close.
Definition: pdma.c:61
void PDMA_DisableInt(uint32_t u32Ch, uint32_t u32Mask)
Disable Interrupt.
Definition: pdma.c:350
void PDMA_SetTransferMode(uint32_t u32Ch, uint32_t u32Peripheral, uint32_t u32ScatterEn, uint32_t u32DescAddr)
Set PDMA Transfer Mode.
Definition: pdma.c:143
void PDMA_SetBurstType(uint32_t u32Ch, uint32_t u32BurstType, uint32_t u32BurstSize)
Set PDMA Burst Type and Size.
Definition: pdma.c:206
void PDMA_SetTransferCnt(uint32_t u32Ch, uint32_t u32Width, uint32_t u32TransCount)
Set PDMA Transfer Count.
Definition: pdma.c:80
#define PDMA
Definition: M4521.h:13830
static uint8_t u32ChSelect[PDMA_CH_MAX]
Definition: pdma.c:15