; generated by Component: ARM Compiler 5.06 update 6 (build 750) Tool: ArmCC [4d3637]
; commandline ArmCC [--list --split_sections --debug -c --asm --interleave -o.\obj\fmc.o --asm_dir=.\lst\ --list_dir=.\lst\ --depend=.\obj\fmc.d --cpu=Cortex-M0 --apcs=interwork -Otime --diag_suppress=9931 -I..\..\..\..\Library\CMSIS\Include -I..\..\..\..\Library\Device\Nuvoton\M0A21\Include -I..\..\..\..\Library\StdDriver\inc -I..\ -IC:\Keil_v5\ARM\RV31\INC -IC:\Keil_v5\ARM\CMSIS\Include -D__MICROLIB -D__UVISION_VERSION=538 --omf_browse=.\obj\fmc.crf ..\..\..\..\Library\StdDriver\src\fmc.c]
                          THUMB

                          AREA ||i.FMC_Close||, CODE, READONLY, ALIGN=2

                  FMC_Close PROC
;;;36       */
;;;37     void FMC_Close(void)
000000  4802              LDR      r0,|L1.12|
;;;38     {
;;;39         FMC->ISPCTL &= ~FMC_ISPCTL_ISPEN_Msk;
000002  6801              LDR      r1,[r0,#0]
000004  0849              LSRS     r1,r1,#1
000006  0049              LSLS     r1,r1,#1
000008  6001              STR      r1,[r0,#0]
;;;40     }
00000a  4770              BX       lr
;;;41     
                          ENDP

                  |L1.12|
                          DCD      0x4000c000

                          AREA ||i.FMC_Erase||, CODE, READONLY, ALIGN=2

                  FMC_Erase PROC
;;;53       */
;;;54     int32_t FMC_Erase(uint32_t u32PageAddr)
000000  b570              PUSH     {r4-r6,lr}
;;;55     {
;;;56         uint32_t  tout;
;;;57     	
;;;58         g_FMC_i32ErrCode = 0;
000002  4d12              LDR      r5,|L2.76|
000004  2100              MOVS     r1,#0
;;;59     	
;;;60         FMC->ISPCMD = FMC_ISPCMD_PAGE_ERASE;
000006  6029              STR      r1,[r5,#0]  ; g_FMC_i32ErrCode
000008  4c11              LDR      r4,|L2.80|
00000a  2122              MOVS     r1,#0x22
00000c  60e1              STR      r1,[r4,#0xc]
;;;61         FMC->ISPADDR = u32PageAddr;
00000e  6060              STR      r0,[r4,#4]
;;;62         FMC->ISPTRG = FMC_ISPTRG_ISPGO_Msk;
000010  2001              MOVS     r0,#1
000012  6120              STR      r0,[r4,#0x10]
;;;63     
;;;64         tout = FMC_TIMEOUT_ERASE;
000014  480f              LDR      r0,|L2.84|
000016  2114              MOVS     r1,#0x14
000018  6800              LDR      r0,[r0,#0]  ; SystemCoreClock
00001a  f7fffffe          BL       __aeabi_uidivmod
;;;65         while ((--tout > 0) && (FMC->ISPTRG & FMC_ISPTRG_ISPGO_Msk)) {}
;;;66         if (tout == 0)
;;;67         {
;;;68             g_FMC_i32ErrCode = -1;
00001e  2200              MOVS     r2,#0
000020  43d2              MVNS     r2,r2
                  |L2.34|
000022  1e40              SUBS     r0,r0,#1
000024  d00c              BEQ      |L2.64|
000026  6921              LDR      r1,[r4,#0x10]         ;65
000028  07c9              LSLS     r1,r1,#31             ;65
00002a  d1fa              BNE      |L2.34|
;;;69             return -1;
;;;70         }
;;;71     
;;;72         if (FMC->ISPCTL & FMC_ISPCTL_ISPFF_Msk)
00002c  6820              LDR      r0,[r4,#0]
00002e  0640              LSLS     r0,r0,#25
000030  d509              BPL      |L2.70|
;;;73         {
;;;74             FMC->ISPCTL |= FMC_ISPCTL_ISPFF_Msk;
000032  6820              LDR      r0,[r4,#0]
000034  2140              MOVS     r1,#0x40
000036  4308              ORRS     r0,r0,r1
000038  6020              STR      r0,[r4,#0]
;;;75             g_FMC_i32ErrCode = -1;
00003a  4610              MOV      r0,r2
;;;76             return -1;
00003c  602a              STR      r2,[r5,#0]  ; g_FMC_i32ErrCode
;;;77         }
;;;78         return 0;
;;;79     }
00003e  bd70              POP      {r4-r6,pc}
                  |L2.64|
000040  4610              MOV      r0,r2                 ;68
000042  602a              STR      r2,[r5,#0]            ;69  ; g_FMC_i32ErrCode
000044  bd70              POP      {r4-r6,pc}
                  |L2.70|
000046  2000              MOVS     r0,#0                 ;78
000048  bd70              POP      {r4-r6,pc}
;;;80     
                          ENDP

00004a  0000              DCW      0x0000
                  |L2.76|
                          DCD      ||.data||
                  |L2.80|
                          DCD      0x4000c000
                  |L2.84|
                          DCD      SystemCoreClock

                          AREA ||i.FMC_GetBootSource||, CODE, READONLY, ALIGN=2

                  FMC_GetBootSource PROC
;;;86       */
;;;87     int32_t FMC_GetBootSource (void)
000000  4903              LDR      r1,|L3.16|
;;;88     {
;;;89         int32_t  ret = 0;
000002  2000              MOVS     r0,#0
;;;90     
;;;91         if (FMC->ISPCTL & FMC_ISPCTL_BS_Msk)
000004  6809              LDR      r1,[r1,#0]
000006  0789              LSLS     r1,r1,#30
000008  d500              BPL      |L3.12|
;;;92         {
;;;93             ret = 1;
00000a  2001              MOVS     r0,#1
                  |L3.12|
;;;94         }
;;;95     
;;;96         return ret;
;;;97     }
00000c  4770              BX       lr
;;;98     
                          ENDP

00000e  0000              DCW      0x0000
                  |L3.16|
                          DCD      0x4000c000

                          AREA ||i.FMC_GetChkSum||, CODE, READONLY, ALIGN=2

                  FMC_GetChkSum PROC
;;;351      */
;;;352    uint32_t  FMC_GetChkSum(uint32_t u32addr, uint32_t u32count)
000000  b4f0              PUSH     {r4-r7}
;;;353    {
;;;354        uint32_t  tout;
;;;355        
;;;356        g_FMC_i32ErrCode = 0;
000002  4c17              LDR      r4,|L4.96|
000004  2200              MOVS     r2,#0
000006  6022              STR      r2,[r4,#0]  ; g_FMC_i32ErrCode
000008  4602              MOV      r2,r0
;;;357    
;;;358        if ((u32addr % 512UL) || (u32count % 512UL))
00000a  430a              ORRS     r2,r2,r1
;;;359        {
;;;360            g_FMC_i32ErrCode = -2;
;;;361            return 0xFFFFFFFF;
00000c  4e15              LDR      r6,|L4.100|
00000e  05d2              LSLS     r2,r2,#23             ;358
000010  d004              BEQ      |L4.28|
000012  0070              LSLS     r0,r6,#1              ;360
000014  6020              STR      r0,[r4,#0]  ; g_FMC_i32ErrCode
000016  4630              MOV      r0,r6
;;;362    
;;;363        }
;;;364        FMC->ISPCMD  = FMC_ISPCMD_RUN_CKS;
;;;365        FMC->ISPADDR = u32addr;
;;;366        FMC->ISPDAT  = u32count;
;;;367        FMC->ISPTRG  = FMC_ISPTRG_ISPGO_Msk;
;;;368    
;;;369        tout = FMC_TIMEOUT_CHKSUM;
;;;370        while ((--tout > 0) && (FMC->ISPSTS & FMC_ISPSTS_ISPBUSY_Msk)) {}
;;;371        if (tout == 0)
;;;372        {
;;;373            g_FMC_i32ErrCode = -1;
;;;374            return 0xFFFFFFFF;
;;;375        }
;;;376    
;;;377        FMC->ISPCMD = FMC_ISPCMD_READ_CKS;
;;;378        FMC->ISPADDR    = u32addr;
;;;379        FMC->ISPTRG = FMC_ISPTRG_ISPGO_Msk;
;;;380    
;;;381        tout = FMC_TIMEOUT_CHKSUM;
;;;382        while ((--tout > 0) && (FMC->ISPSTS & FMC_ISPSTS_ISPBUSY_Msk)) {}
;;;383        if (tout == 0)
;;;384        {
;;;385            g_FMC_i32ErrCode = -1;
;;;386            return 0xFFFFFFFF;
;;;387        }
;;;388    
;;;389        return FMC->ISPDAT;
;;;390    }
000018  bcf0              POP      {r4-r7}
00001a  4770              BX       lr
                  |L4.28|
00001c  4d12              LDR      r5,|L4.104|
00001e  222d              MOVS     r2,#0x2d              ;364
000020  60ea              STR      r2,[r5,#0xc]          ;364
000022  6068              STR      r0,[r5,#4]            ;365
000024  60a9              STR      r1,[r5,#8]            ;366
000026  2101              MOVS     r1,#1                 ;367
000028  6129              STR      r1,[r5,#0x10]         ;367
00002a  4910              LDR      r1,|L4.108|
00002c  4b10              LDR      r3,|L4.112|
00002e  6809              LDR      r1,[r1,#0]            ;369  ; SystemCoreClock
000030  0849              LSRS     r1,r1,#1              ;369
000032  460f              MOV      r7,r1                 ;369
                  |L4.52|
000034  1e49              SUBS     r1,r1,#1              ;370
000036  d00f              BEQ      |L4.88|
000038  681a              LDR      r2,[r3,#0]            ;370
00003a  07d2              LSLS     r2,r2,#31             ;370
00003c  d1fa              BNE      |L4.52|
00003e  210d              MOVS     r1,#0xd               ;377
000040  60e9              STR      r1,[r5,#0xc]          ;377
000042  6068              STR      r0,[r5,#4]            ;378
000044  2001              MOVS     r0,#1                 ;379
000046  6128              STR      r0,[r5,#0x10]         ;379
                  |L4.72|
000048  1e7f              SUBS     r7,r7,#1              ;379
00004a  d005              BEQ      |L4.88|
00004c  6818              LDR      r0,[r3,#0]            ;382
00004e  07c0              LSLS     r0,r0,#31             ;382
000050  d1fa              BNE      |L4.72|
000052  68a8              LDR      r0,[r5,#8]            ;389
000054  bcf0              POP      {r4-r7}
000056  4770              BX       lr
                  |L4.88|
000058  4630              MOV      r0,r6                 ;385
00005a  6026              STR      r6,[r4,#0]            ;385  ; g_FMC_i32ErrCode
00005c  bcf0              POP      {r4-r7}
00005e  4770              BX       lr
;;;391    
                          ENDP

                  |L4.96|
                          DCD      ||.data||
                  |L4.100|
                          DCD      0xffffffff
                  |L4.104|
                          DCD      0x4000c000
                  |L4.108|
                          DCD      SystemCoreClock
                  |L4.112|
                          DCD      0x4000c040

                          AREA ||i.FMC_Open||, CODE, READONLY, ALIGN=2

                  FMC_Open PROC
;;;103      */
;;;104    void FMC_Open(void)
000000  4802              LDR      r0,|L5.12|
;;;105    {
;;;106        FMC->ISPCTL |=  FMC_ISPCTL_ISPEN_Msk;
000002  6801              LDR      r1,[r0,#0]
000004  2201              MOVS     r2,#1
000006  4311              ORRS     r1,r1,r2
000008  6001              STR      r1,[r0,#0]
;;;107    }
00000a  4770              BX       lr
;;;108    
                          ENDP

                  |L5.12|
                          DCD      0x4000c000

                          AREA ||i.FMC_Read||, CODE, READONLY, ALIGN=2

                  FMC_Read PROC
;;;119      */
;;;120    uint32_t FMC_Read(uint32_t u32Addr)
000000  b570              PUSH     {r4-r6,lr}
;;;121    {
;;;122        uint32_t  tout;
;;;123    
;;;124        g_FMC_i32ErrCode = 0;
000002  4d0c              LDR      r5,|L6.52|
000004  2100              MOVS     r1,#0
;;;125        
;;;126        FMC->ISPCMD = FMC_ISPCMD_READ;
000006  4c0c              LDR      r4,|L6.56|
000008  6029              STR      r1,[r5,#0]  ; g_FMC_i32ErrCode
00000a  60e1              STR      r1,[r4,#0xc]
;;;127        FMC->ISPADDR = u32Addr;
00000c  6060              STR      r0,[r4,#4]
;;;128        FMC->ISPTRG = FMC_ISPTRG_ISPGO_Msk;
00000e  2001              MOVS     r0,#1
000010  6120              STR      r0,[r4,#0x10]
;;;129    
;;;130        tout = FMC_TIMEOUT_READ;
000012  480a              LDR      r0,|L6.60|
000014  2128              MOVS     r1,#0x28
000016  6800              LDR      r0,[r0,#0]  ; SystemCoreClock
000018  f7fffffe          BL       __aeabi_uidivmod
                  |L6.28|
00001c  1e40              SUBS     r0,r0,#1
;;;131        
;;;132        while ((--tout > 0) && (FMC->ISPTRG & FMC_ISPTRG_ISPGO_Msk)) {}
00001e  d004              BEQ      |L6.42|
000020  6921              LDR      r1,[r4,#0x10]
000022  07c9              LSLS     r1,r1,#31
000024  d1fa              BNE      |L6.28|
;;;133        
;;;134        if (tout == 0)
;;;135        {
;;;136            g_FMC_i32ErrCode = -1;
;;;137            return 0xFFFFFFFF;
;;;138        }
;;;139        return FMC->ISPDAT;
000026  68a0              LDR      r0,[r4,#8]
;;;140    }
000028  bd70              POP      {r4-r6,pc}
                  |L6.42|
00002a  2000              MOVS     r0,#0                 ;136
00002c  43c0              MVNS     r0,r0                 ;136
00002e  6028              STR      r0,[r5,#0]            ;136  ; g_FMC_i32ErrCode
000030  bd70              POP      {r4-r6,pc}
;;;141    
                          ENDP

000032  0000              DCW      0x0000
                  |L6.52|
                          DCD      ||.data||
                  |L6.56|
                          DCD      0x4000c000
                  |L6.60|
                          DCD      SystemCoreClock

                          AREA ||i.FMC_ReadConfig||, CODE, READONLY, ALIGN=2

                  FMC_ReadConfig PROC
;;;241      */
;;;242    int32_t FMC_ReadConfig(uint32_t u32Config[], uint32_t u32Count)
000000  b5f8              PUSH     {r3-r7,lr}
;;;243    {
000002  4605              MOV      r5,r0
;;;244        int32_t   ret = 0;
;;;245    
;;;246        u32Config[0] = FMC_Read(FMC_CONFIG_BASE);
000004  2003              MOVS     r0,#3
000006  460c              MOV      r4,r1                 ;243
000008  2700              MOVS     r7,#0                 ;244
00000a  0500              LSLS     r0,r0,#20
00000c  f7fffffe          BL       FMC_Read
;;;247    
;;;248        if (g_FMC_i32ErrCode != 0)
000010  4e0e              LDR      r6,|L7.76|
000012  6028              STR      r0,[r5,#0]
000014  6830              LDR      r0,[r6,#0]  ; g_FMC_i32ErrCode
000016  2800              CMP      r0,#0
000018  d117              BNE      |L7.74|
;;;249            return g_FMC_i32ErrCode;
;;;250    
;;;251        if (u32Count > 3UL)
00001a  2c03              CMP      r4,#3
00001c  d902              BLS      |L7.36|
;;;252        {
;;;253    			  g_FMC_i32ErrCode = -2;
00001e  1e87              SUBS     r7,r0,#2
;;;254            ret = -2;
000020  6037              STR      r7,[r6,#0]  ; g_FMC_i32ErrCode
000022  e011              B        |L7.72|
                  |L7.36|
;;;255        }
;;;256        else
;;;257        {
;;;258            if(u32Count > 1UL)
000024  2c01              CMP      r4,#1
000026  d906              BLS      |L7.54|
;;;259            {
;;;260                u32Config[1] = FMC_Read(FMC_CONFIG_BASE+4UL);
000028  4809              LDR      r0,|L7.80|
00002a  f7fffffe          BL       FMC_Read
;;;261                if (g_FMC_i32ErrCode != 0)
00002e  6068              STR      r0,[r5,#4]
000030  6830              LDR      r0,[r6,#0]  ; g_FMC_i32ErrCode
000032  2800              CMP      r0,#0
000034  d109              BNE      |L7.74|
                  |L7.54|
;;;262                    return g_FMC_i32ErrCode;
;;;263            }
;;;264            if(u32Count > 2UL)
000036  2c02              CMP      r4,#2
000038  d906              BLS      |L7.72|
;;;265            {
;;;266                u32Config[2] = FMC_Read(FMC_CONFIG_BASE+8UL);
00003a  4806              LDR      r0,|L7.84|
00003c  f7fffffe          BL       FMC_Read
;;;267                if (g_FMC_i32ErrCode != 0)
000040  60a8              STR      r0,[r5,#8]
000042  6830              LDR      r0,[r6,#0]  ; g_FMC_i32ErrCode
000044  2800              CMP      r0,#0
000046  d100              BNE      |L7.74|
                  |L7.72|
;;;268                    return g_FMC_i32ErrCode;
;;;269            }
;;;270        }
;;;271        return ret;
000048  4638              MOV      r0,r7
                  |L7.74|
;;;272    }
00004a  bdf8              POP      {r3-r7,pc}
;;;273    
                          ENDP

                  |L7.76|
                          DCD      ||.data||
                  |L7.80|
                          DCD      0x00300004
                  |L7.84|
                          DCD      0x00300008

                          AREA ||i.FMC_ReadDataFlashBaseAddr||, CODE, READONLY, ALIGN=2

                  FMC_ReadDataFlashBaseAddr PROC
;;;146      */
;;;147    uint32_t FMC_ReadDataFlashBaseAddr(void)
000000  4801              LDR      r0,|L8.8|
;;;148    {
;;;149        return FMC->DFBA;
000002  6940              LDR      r0,[r0,#0x14]
;;;150    }
000004  4770              BX       lr
;;;151    
                          ENDP

000006  0000              DCW      0x0000
                  |L8.8|
                          DCD      0x4000c000

                          AREA ||i.FMC_SetBootSource||, CODE, READONLY, ALIGN=2

                  FMC_SetBootSource PROC
;;;161      */
;;;162    void FMC_SetBootSource(int32_t i32BootSrc)
000000  4904              LDR      r1,|L9.20|
;;;163    {
;;;164        if(i32BootSrc)
;;;165        {
;;;166            FMC->ISPCTL |= FMC_ISPCTL_BS_Msk; /* Boot from LDROM */
000002  2202              MOVS     r2,#2
000004  2800              CMP      r0,#0                 ;164
;;;167        }
;;;168        else
;;;169        {
;;;170            FMC->ISPCTL &= ~FMC_ISPCTL_BS_Msk;/* Boot from APROM */
000006  6808              LDR      r0,[r1,#0]
000008  d001              BEQ      |L9.14|
00000a  4310              ORRS     r0,r0,r2              ;166
00000c  e000              B        |L9.16|
                  |L9.14|
00000e  4390              BICS     r0,r0,r2
                  |L9.16|
000010  6008              STR      r0,[r1,#0]            ;166
;;;171        }
;;;172    }
000012  4770              BX       lr
;;;173    
                          ENDP

                  |L9.20|
                          DCD      0x4000c000

                          AREA ||i.FMC_Write||, CODE, READONLY, ALIGN=2

                  FMC_Write PROC
;;;185      */
;;;186    int32_t FMC_Write(uint32_t u32Addr, uint32_t u32Data)
000000  b570              PUSH     {r4-r6,lr}
;;;187    {
;;;188        uint32_t  tout;
;;;189    
;;;190        g_FMC_i32ErrCode = 0;
000002  4c19              LDR      r4,|L10.104|
000004  2200              MOVS     r2,#0
;;;191    
;;;192        FMC->ISPCMD = FMC_ISPCMD_PROGRAM;
000006  6022              STR      r2,[r4,#0]  ; g_FMC_i32ErrCode
000008  4d18              LDR      r5,|L10.108|
00000a  2221              MOVS     r2,#0x21
00000c  60ea              STR      r2,[r5,#0xc]
;;;193        FMC->ISPADDR = u32Addr;
00000e  6068              STR      r0,[r5,#4]
;;;194        FMC->ISPDAT = u32Data;
000010  60a9              STR      r1,[r5,#8]
;;;195        FMC->ISPTRG = FMC_ISPTRG_ISPGO_Msk;
000012  2001              MOVS     r0,#1
000014  6128              STR      r0,[r5,#0x10]
;;;196        
;;;197        tout = FMC_TIMEOUT_WRITE;
000016  4816              LDR      r0,|L10.112|
000018  2128              MOVS     r1,#0x28
00001a  6800              LDR      r0,[r0,#0]  ; SystemCoreClock
00001c  f7fffffe          BL       __aeabi_uidivmod
;;;198        
;;;199        while ((--tout > 0) && (FMC->ISPTRG & FMC_ISPTRG_ISPGO_Msk)) {}
;;;200        
;;;201        if (tout == 0)
;;;202        {
;;;203            g_FMC_i32ErrCode = -1;
000020  2100              MOVS     r1,#0
000022  4602              MOV      r2,r0                 ;197
000024  43c9              MVNS     r1,r1
                  |L10.38|
000026  1e40              SUBS     r0,r0,#1
000028  d01a              BEQ      |L10.96|
00002a  692b              LDR      r3,[r5,#0x10]         ;199
00002c  07db              LSLS     r3,r3,#31             ;199
00002e  d1fa              BNE      |L10.38|
;;;204            return -1;
;;;205        }
;;;206    
;;;207        if (FMC->ISPSTS & FMC_ISPSTS_ISPFF_Msk)
000030  4810              LDR      r0,|L10.116|
000032  6803              LDR      r3,[r0,#0]
000034  065b              LSLS     r3,r3,#25
000036  d506              BPL      |L10.70|
;;;208        {
;;;209            FMC->ISPSTS |= FMC_ISPSTS_ISPFF_Msk;
000038  6802              LDR      r2,[r0,#0]
00003a  2340              MOVS     r3,#0x40
00003c  431a              ORRS     r2,r2,r3
00003e  6002              STR      r2,[r0,#0]
;;;210            g_FMC_i32ErrCode = -1;
000040  4608              MOV      r0,r1
;;;211            return -1;
000042  6021              STR      r1,[r4,#0]  ; g_FMC_i32ErrCode
;;;212        }
;;;213        /* Invalidation Cache */
;;;214        FMC->FTCTL |= FMC_FTCTL_CACHEINV_Msk;
;;;215        
;;;216        tout = FMC_TIMEOUT_WRITE;
;;;217        
;;;218        while ((--tout > 0) && (FMC->FTCTL & FMC_FTCTL_CACHEINV_Msk)) {}
;;;219        
;;;220        if (tout == 0)
;;;221        {
;;;222            g_FMC_i32ErrCode = -1;
;;;223            return -1;
;;;224        }
;;;225        return 0;
;;;226    }
000044  bd70              POP      {r4-r6,pc}
                  |L10.70|
000046  69a8              LDR      r0,[r5,#0x18]         ;214
000048  2301              MOVS     r3,#1                 ;214
00004a  025b              LSLS     r3,r3,#9              ;214
00004c  4318              ORRS     r0,r0,r3              ;214
00004e  61a8              STR      r0,[r5,#0x18]         ;214
000050  4610              MOV      r0,r2                 ;214
                  |L10.82|
000052  1e40              SUBS     r0,r0,#1              ;214
000054  d004              BEQ      |L10.96|
000056  69aa              LDR      r2,[r5,#0x18]         ;218
000058  0592              LSLS     r2,r2,#22             ;218
00005a  d4fa              BMI      |L10.82|
00005c  2000              MOVS     r0,#0                 ;225
00005e  bd70              POP      {r4-r6,pc}
                  |L10.96|
000060  4608              MOV      r0,r1                 ;222
000062  6021              STR      r1,[r4,#0]            ;222  ; g_FMC_i32ErrCode
000064  bd70              POP      {r4-r6,pc}
;;;227    
                          ENDP

000066  0000              DCW      0x0000
                  |L10.104|
                          DCD      ||.data||
                  |L10.108|
                          DCD      0x4000c000
                  |L10.112|
                          DCD      SystemCoreClock
                  |L10.116|
                          DCD      0x4000c040

                          AREA ||i.FMC_WriteConfig||, CODE, READONLY, ALIGN=2

                  FMC_WriteConfig PROC
;;;285     */
;;;286    int32_t FMC_WriteConfig(uint32_t u32Config[], uint32_t u32Count)
000000  b5f3              PUSH     {r0,r1,r4-r7,lr}
;;;287    {
000002  4606              MOV      r6,r0
;;;288        uint32_t i;
;;;289    	
;;;290        g_FMC_i32ErrCode = 0;
000004  4d3e              LDR      r5,|L11.256|
000006  b081              SUB      sp,sp,#4              ;287
000008  2000              MOVS     r0,#0
;;;291        
;;;292        FMC_ENABLE_CFG_UPDATE();
00000a  6028              STR      r0,[r5,#0]  ; g_FMC_i32ErrCode
00000c  483d              LDR      r0,|L11.260|
00000e  6801              LDR      r1,[r0,#0]
000010  2210              MOVS     r2,#0x10
000012  4311              ORRS     r1,r1,r2
000014  6001              STR      r1,[r0,#0]
;;;293    
;;;294        if (FMC_Erase(FMC_CONFIG_BASE) != 0)
000016  0187              LSLS     r7,r0,#6
000018  4638              MOV      r0,r7
00001a  f7fffffe          BL       FMC_Erase
00001e  2800              CMP      r0,#0
000020  d004              BEQ      |L11.44|
;;;295        {
;;;296            g_FMC_i32ErrCode = -1;
000022  2000              MOVS     r0,#0
000024  43c0              MVNS     r0,r0
;;;297            return -1;
000026  6028              STR      r0,[r5,#0]  ; g_FMC_i32ErrCode
;;;298        }    
;;;299        if ((FMC_Read(FMC_CONFIG_BASE) != 0xFFFFFFFF) || (FMC_Read(FMC_CONFIG_BASE+4) != 0xFFFFFFFF) ||
;;;300                (FMC_Read(FMC_CONFIG_BASE+8) != 0xFFFFFF5A))
;;;301        {
;;;302            FMC_DISABLE_CFG_UPDATE();
;;;303            g_FMC_i32ErrCode = -1;
;;;304            return -1;
;;;305        }
;;;306        if (g_FMC_i32ErrCode != 0)
;;;307        {
;;;308            FMC_DISABLE_CFG_UPDATE();
;;;309            return -1;
;;;310        }
;;;311    
;;;312        for (i = 0u; i < u32Count; i++)
;;;313        {
;;;314            if (FMC_Write(FMC_CONFIG_BASE+i*4UL, u32Config[i]) != 0)
;;;315            {
;;;316                FMC_DISABLE_CFG_UPDATE();
;;;317                g_FMC_i32ErrCode = -1;
;;;318                return -1;
;;;319            }
;;;320    
;;;321            if (FMC_Read(FMC_CONFIG_BASE+i*4UL) != u32Config[i])
;;;322            {
;;;323                FMC_DISABLE_CFG_UPDATE();
;;;324                g_FMC_i32ErrCode = -1;
;;;325                return -1;
;;;326            }
;;;327            if (g_FMC_i32ErrCode != 0)
;;;328            {
;;;329                FMC_DISABLE_CFG_UPDATE();
;;;330                g_FMC_i32ErrCode = -1;
;;;331                return -1;
;;;332            }  
;;;333        }
;;;334        
;;;335        FMC_DISABLE_CFG_UPDATE();
;;;336    
;;;337        return 0;
;;;338    }
000028  b003              ADD      sp,sp,#0xc
00002a  bdf0              POP      {r4-r7,pc}
                  |L11.44|
00002c  4638              MOV      r0,r7                 ;299
00002e  f7fffffe          BL       FMC_Read
000032  1c40              ADDS     r0,r0,#1              ;299
000034  d109              BNE      |L11.74|
000036  4834              LDR      r0,|L11.264|
000038  f7fffffe          BL       FMC_Read
00003c  1c40              ADDS     r0,r0,#1              ;299
00003e  d104              BNE      |L11.74|
000040  4832              LDR      r0,|L11.268|
000042  f7fffffe          BL       FMC_Read
000046  30a6              ADDS     r0,r0,#0xa6           ;300
000048  d009              BEQ      |L11.94|
                  |L11.74|
00004a  482e              LDR      r0,|L11.260|
00004c  6801              LDR      r1,[r0,#0]            ;302
00004e  2210              MOVS     r2,#0x10              ;302
000050  4391              BICS     r1,r1,r2              ;302
000052  6001              STR      r1,[r0,#0]            ;302
000054  2000              MOVS     r0,#0                 ;303
000056  43c0              MVNS     r0,r0                 ;303
000058  6028              STR      r0,[r5,#0]            ;304  ; g_FMC_i32ErrCode
00005a  b003              ADD      sp,sp,#0xc
00005c  bdf0              POP      {r4-r7,pc}
                  |L11.94|
00005e  6828              LDR      r0,[r5,#0]            ;306  ; g_FMC_i32ErrCode
000060  2800              CMP      r0,#0                 ;306
000062  d008              BEQ      |L11.118|
000064  4927              LDR      r1,|L11.260|
000066  6808              LDR      r0,[r1,#0]            ;308
000068  2210              MOVS     r2,#0x10              ;308
00006a  4390              BICS     r0,r0,r2              ;308
00006c  6008              STR      r0,[r1,#0]            ;308
00006e  2000              MOVS     r0,#0                 ;309
000070  43c0              MVNS     r0,r0                 ;309
000072  b003              ADD      sp,sp,#0xc
000074  bdf0              POP      {r4-r7,pc}
                  |L11.118|
000076  9802              LDR      r0,[sp,#8]            ;312
000078  2400              MOVS     r4,#0                 ;312
00007a  2800              CMP      r0,#0                 ;312
00007c  d938              BLS      |L11.240|
                  |L11.126|
00007e  00a5              LSLS     r5,r4,#2              ;314
000080  2003              MOVS     r0,#3                 ;314
000082  0500              LSLS     r0,r0,#20             ;314
000084  1828              ADDS     r0,r5,r0              ;314
000086  5971              LDR      r1,[r6,r5]            ;314
000088  4607              MOV      r7,r0                 ;314
00008a  f7fffffe          BL       FMC_Write
00008e  2800              CMP      r0,#0                 ;314
000090  d00a              BEQ      |L11.168|
000092  4a1c              LDR      r2,|L11.260|
000094  6810              LDR      r0,[r2,#0]            ;316
000096  2110              MOVS     r1,#0x10              ;316
000098  4388              BICS     r0,r0,r1              ;316
00009a  6010              STR      r0,[r2,#0]            ;316
00009c  2000              MOVS     r0,#0                 ;317
00009e  4918              LDR      r1,|L11.256|
0000a0  43c0              MVNS     r0,r0                 ;317
0000a2  6008              STR      r0,[r1,#0]            ;318  ; g_FMC_i32ErrCode
0000a4  b003              ADD      sp,sp,#0xc
0000a6  bdf0              POP      {r4-r7,pc}
                  |L11.168|
0000a8  4638              MOV      r0,r7                 ;321
0000aa  f7fffffe          BL       FMC_Read
0000ae  5971              LDR      r1,[r6,r5]            ;321
0000b0  4288              CMP      r0,r1                 ;321
0000b2  d00a              BEQ      |L11.202|
0000b4  4913              LDR      r1,|L11.260|
0000b6  6808              LDR      r0,[r1,#0]            ;323
0000b8  2210              MOVS     r2,#0x10              ;323
0000ba  4390              BICS     r0,r0,r2              ;323
0000bc  6008              STR      r0,[r1,#0]            ;323
0000be  2000              MOVS     r0,#0                 ;324
0000c0  490f              LDR      r1,|L11.256|
0000c2  43c0              MVNS     r0,r0                 ;324
0000c4  6008              STR      r0,[r1,#0]            ;325  ; g_FMC_i32ErrCode
0000c6  b003              ADD      sp,sp,#0xc
0000c8  bdf0              POP      {r4-r7,pc}
                  |L11.202|
0000ca  480d              LDR      r0,|L11.256|
0000cc  6800              LDR      r0,[r0,#0]            ;327  ; g_FMC_i32ErrCode
0000ce  2800              CMP      r0,#0                 ;327
0000d0  d00a              BEQ      |L11.232|
0000d2  480c              LDR      r0,|L11.260|
0000d4  6801              LDR      r1,[r0,#0]            ;329
0000d6  2210              MOVS     r2,#0x10              ;329
0000d8  4391              BICS     r1,r1,r2              ;329
0000da  6001              STR      r1,[r0,#0]            ;329
0000dc  2000              MOVS     r0,#0                 ;330
0000de  4908              LDR      r1,|L11.256|
0000e0  43c0              MVNS     r0,r0                 ;330
0000e2  6008              STR      r0,[r1,#0]            ;331  ; g_FMC_i32ErrCode
0000e4  b003              ADD      sp,sp,#0xc
0000e6  bdf0              POP      {r4-r7,pc}
                  |L11.232|
0000e8  9802              LDR      r0,[sp,#8]            ;312
0000ea  1c64              ADDS     r4,r4,#1              ;312
0000ec  4284              CMP      r4,r0                 ;312
0000ee  d3c6              BCC      |L11.126|
                  |L11.240|
0000f0  4904              LDR      r1,|L11.260|
0000f2  6808              LDR      r0,[r1,#0]            ;335
0000f4  2210              MOVS     r2,#0x10              ;335
0000f6  4390              BICS     r0,r0,r2              ;335
0000f8  6008              STR      r0,[r1,#0]            ;335
0000fa  2000              MOVS     r0,#0                 ;337
0000fc  b003              ADD      sp,sp,#0xc
0000fe  bdf0              POP      {r4-r7,pc}
;;;339    
                          ENDP

                  |L11.256|
                          DCD      ||.data||
                  |L11.260|
                          DCD      0x4000c000
                  |L11.264|
                          DCD      0x00300004
                  |L11.268|
                          DCD      0x00300008

                          AREA ||.data||, DATA, ALIGN=2

                  g_FMC_i32ErrCode
                          DCD      0x00000000

;*** Start embedded assembler ***

#line 1 "..\\..\\..\\..\\Library\\StdDriver\\src\\fmc.c"
	AREA ||.rev16_text||, CODE
	THUMB
	EXPORT |__asm___5_fmc_c_65c03504____REV16|
#line 464 "..\\..\\..\\..\\Library\\CMSIS\\Include\\cmsis_armcc.h"
|__asm___5_fmc_c_65c03504____REV16| PROC
#line 465

 rev16 r0, r0
 bx lr
	ENDP
	AREA ||.revsh_text||, CODE
	THUMB
	EXPORT |__asm___5_fmc_c_65c03504____REVSH|
#line 479
|__asm___5_fmc_c_65c03504____REVSH| PROC
#line 480

 revsh r0, r0
 bx lr
	ENDP

;*** End   embedded assembler ***
