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Nuvoton’s N3292 H.264 Codec Series is an ARM926EJ-S running up to 240MHz, hardware H.264 and JPEG codec based product line targeting for IP Camera, Video Baby Monitor, Home Appliance and HMI (Human Machine Interface) applications. The H.264 is baseline profile and the resolution is up to 720P (1280x720) . The N3292 series is 128-pin LQFP package stacked with 32MB or 64MB DRAM.

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Part No. Check Disty Raw NAND I/F, ECC bits NAND Flash, No. of ECC bits CPU Max Speed I Cache D Cache SRAM Stacked SDRAM (bit) SPI Flash I/F SD / SDIO 1.1 Host (12 Mbps) USB 2.0 Host (480 Mbps) Device (FS / HS) 2D GFX JPEG Codec Video Codec RGB Color (bits) Max. Resolution SAR ADC 24-bit Σ-Δ ADC ADC for MIC Input Touch Panel (Wire) Stereo DAC (bits) JTAG Ethernet 10/100 MAC CMOS Sensor1 GPIO (Max) UART I2C SPI RTC PWM TV Output I2S Core Voltage (V) I/O Voltage (V) Package Status I/O I2S/ AC97 ADC Operating Temp. Range (°C ) SDRAM NOR Flash SPI Flash, No. of I/O Pins ATAPI USB 2.0 HS Device 2D Graphics TFT LCD Speed (Samples per second) Touch Screen Controller LVD/LVR External Bus Interface KPI PS2 PCI Master
N32925U3DN Check Disty 24   926 240 MHz 8K 8K 8K 16Mx16 DDR2 Y 3(two hardware host controllers) 1 1 HS   Y H.264 Codec MJPEG Codec 24 XGA(1024 x 768) Y(supports 12-bit SARADC)   Y(support optional channel for audio line-in) 4/5 16 Y Y Y(CCIR601 / CCIR656 I/F, 3M pixel) 80 2 1 2(Only one hardware SPI controller to support two SPI device with two chip selection signals) Y 4 Y Y 1.2 3.3 LQFP-128 (MCP) Mass Production                                    
N32926U1DN Check Disty 24   926 240 MHz 8K 8K 8K 32Mx16 DDR2 Y 3(two hardware host controllers) 1 1 HS   Y H.264 Codec MJPEG Codec 24 XGA(1024 x 768) Y(supports 12-bit SARADC)   Y(support optional channel for audio line-in) 4/5 16 Y Y Y(CCIR601 / CCIR656 I/F, 3M pixel) 80 2 1 2(Only one hardware SPI controller to support two SPI device with two chip selection signals) Y 4 Y Y 1.2 3.3 LQFP-128 (MCP) Mass Production                                    

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