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NUC472_NUC442_BSP V3.03.005
The Board Support Package for NUC472/NUC442
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Modules | |
NUC472/NUC442 Peripheral Pointer | |
Memory Mapped Structure for NUC472/NUC442 Peripheral
#define ACMP_BASE (APBPERIPH_BASE + 0x05000) |
Definition at line 28767 of file NUC472_442.h.
#define ADC_BASE (APBPERIPH_BASE + 0x03000) |
Definition at line 28765 of file NUC472_442.h.
#define AHBPERIPH_BASE PERIPH_BASE |
AHB Base Address
Definition at line 28711 of file NUC472_442.h.
#define APBPERIPH_BASE (PERIPH_BASE + 0x00040000) |
APB Base Address AHB peripherals
Definition at line 28714 of file NUC472_442.h.
#define CAN0_BASE (APBPERIPH_BASE + 0x60000) |
Definition at line 28758 of file NUC472_442.h.
#define CAN1_BASE (APBPERIPH_BASE + 0x61000) |
Definition at line 28784 of file NUC472_442.h.
#define CAP_BASE (AHBPERIPH_BASE + 0x30000) |
Definition at line 28735 of file NUC472_442.h.
#define CLK_BASE (AHBPERIPH_BASE + 0x00200) |
Definition at line 28716 of file NUC472_442.h.
#define CRC_BASE (AHBPERIPH_BASE + 0x31000) |
APB2 peripherals
Definition at line 28738 of file NUC472_442.h.
#define CRPT_BASE (0x50080000UL) |
Definition at line 28787 of file NUC472_442.h.
#define EADC_BASE (APBPERIPH_BASE + 0x04000) |
Definition at line 28766 of file NUC472_442.h.
#define EBI_BASE (AHBPERIPH_BASE + 0x10000) |
Definition at line 28733 of file NUC472_442.h.
#define ECAP0_BASE (APBPERIPH_BASE + 0x74000) |
Definition at line 28760 of file NUC472_442.h.
#define ECAP1_BASE (APBPERIPH_BASE + 0x75000) |
Definition at line 28786 of file NUC472_442.h.
#define EMAC_BASE (AHBPERIPH_BASE + 0x0B000) |
Definition at line 28730 of file NUC472_442.h.
#define EPWM0_BASE (APBPERIPH_BASE + 0x1C000) |
Definition at line 28746 of file NUC472_442.h.
#define EPWM1_BASE (APBPERIPH_BASE + 0x1D000) |
Definition at line 28773 of file NUC472_442.h.
#define FLASH_BASE ((uint32_t)0x00000000) |
Flash base address
Definition at line 28708 of file NUC472_442.h.
#define FMC_BASE (AHBPERIPH_BASE + 0x0C000) |
Definition at line 28731 of file NUC472_442.h.
#define GPIO_DBCTL_BASE (AHBPERIPH_BASE + 0x04440) |
Definition at line 28726 of file NUC472_442.h.
#define GPIO_PIN_DATA_BASE (AHBPERIPH_BASE + 0x04800) |
Definition at line 28727 of file NUC472_442.h.
#define GPIOA_BASE (AHBPERIPH_BASE + 0x04000) |
Definition at line 28717 of file NUC472_442.h.
#define GPIOB_BASE (AHBPERIPH_BASE + 0x04040) |
Definition at line 28718 of file NUC472_442.h.
#define GPIOC_BASE (AHBPERIPH_BASE + 0x04080) |
Definition at line 28719 of file NUC472_442.h.
#define GPIOD_BASE (AHBPERIPH_BASE + 0x040C0) |
Definition at line 28720 of file NUC472_442.h.
#define GPIOE_BASE (AHBPERIPH_BASE + 0x04100) |
Definition at line 28721 of file NUC472_442.h.
#define GPIOF_BASE (AHBPERIPH_BASE + 0x04140) |
Definition at line 28722 of file NUC472_442.h.
#define GPIOG_BASE (AHBPERIPH_BASE + 0x04180) |
Definition at line 28723 of file NUC472_442.h.
#define GPIOH_BASE (AHBPERIPH_BASE + 0x041C0) |
Definition at line 28724 of file NUC472_442.h.
#define GPIOI_BASE (AHBPERIPH_BASE + 0x04200) |
Definition at line 28725 of file NUC472_442.h.
#define I2C0_BASE (APBPERIPH_BASE + 0x40000) |
Definition at line 28752 of file NUC472_442.h.
#define I2C1_BASE (APBPERIPH_BASE + 0x41000) |
Definition at line 28779 of file NUC472_442.h.
#define I2C2_BASE (APBPERIPH_BASE + 0x42000) |
Definition at line 28753 of file NUC472_442.h.
#define I2C3_BASE (APBPERIPH_BASE + 0x43000) |
Definition at line 28780 of file NUC472_442.h.
#define I2C4_BASE (APBPERIPH_BASE + 0x44000) |
Definition at line 28754 of file NUC472_442.h.
#define I2S0_BASE (APBPERIPH_BASE + 0x08000) |
Definition at line 28742 of file NUC472_442.h.
#define I2S1_BASE (APBPERIPH_BASE + 0x09000) |
Definition at line 28768 of file NUC472_442.h.
#define OPA_BASE (APBPERIPH_BASE + 0x06000) |
Definition at line 28741 of file NUC472_442.h.
#define OTG_BASE (APBPERIPH_BASE + 0x0D000) |
Definition at line 28769 of file NUC472_442.h.
#define PDMA_BASE (AHBPERIPH_BASE + 0x08000) |
Definition at line 28728 of file NUC472_442.h.
#define PERIPH_BASE ((uint32_t)0x40000000) |
Peripheral Base Address
Definition at line 28710 of file NUC472_442.h.
#define PS2D_BASE (APBPERIPH_BASE + 0xA0000) |
APB1 peripherals
Definition at line 28763 of file NUC472_442.h.
#define PWM0_BASE (APBPERIPH_BASE + 0x18000) |
Definition at line 28745 of file NUC472_442.h.
#define PWM1_BASE (APBPERIPH_BASE + 0x19000) |
Definition at line 28772 of file NUC472_442.h.
#define QEI0_BASE (APBPERIPH_BASE + 0x70000) |
Definition at line 28759 of file NUC472_442.h.
#define QEI1_BASE (APBPERIPH_BASE + 0x71000) |
Definition at line 28785 of file NUC472_442.h.
#define RTC_BASE (APBPERIPH_BASE + 0x01000) |
Definition at line 28764 of file NUC472_442.h.
#define SC0_BASE (APBPERIPH_BASE + 0x50000) |
Definition at line 28755 of file NUC472_442.h.
#define SC1_BASE (APBPERIPH_BASE + 0x51000) |
Definition at line 28781 of file NUC472_442.h.
#define SC2_BASE (APBPERIPH_BASE + 0x52000) |
Definition at line 28756 of file NUC472_442.h.
#define SC3_BASE (APBPERIPH_BASE + 0x53000) |
Definition at line 28782 of file NUC472_442.h.
#define SC4_BASE (APBPERIPH_BASE + 0x54000) |
Definition at line 28757 of file NUC472_442.h.
#define SC5_BASE (APBPERIPH_BASE + 0x55000) |
Definition at line 28783 of file NUC472_442.h.
#define SD_BASE (AHBPERIPH_BASE + 0x0D000) |
Definition at line 28732 of file NUC472_442.h.
#define SPI0_BASE (APBPERIPH_BASE + 0x20000) |
Definition at line 28747 of file NUC472_442.h.
#define SPI1_BASE (APBPERIPH_BASE + 0x21000) |
Definition at line 28774 of file NUC472_442.h.
#define SPI2_BASE (APBPERIPH_BASE + 0x22000) |
Definition at line 28748 of file NUC472_442.h.
#define SPI3_BASE (APBPERIPH_BASE + 0x23000) |
Definition at line 28775 of file NUC472_442.h.
#define SRAM_BASE ((uint32_t)0x20000000) |
SRAM Base Address
Definition at line 28709 of file NUC472_442.h.
#define SYS_BASE (AHBPERIPH_BASE + 0x00000) |
Definition at line 28715 of file NUC472_442.h.
#define TIMER0_BASE (APBPERIPH_BASE + 0x10000) |
Definition at line 28743 of file NUC472_442.h.
#define TIMER1_BASE (APBPERIPH_BASE + 0x10020) |
Definition at line 28744 of file NUC472_442.h.
#define TIMER2_BASE (APBPERIPH_BASE + 0x11000) |
Definition at line 28770 of file NUC472_442.h.
#define TIMER3_BASE (APBPERIPH_BASE + 0x11020) |
Definition at line 28771 of file NUC472_442.h.
#define UART0_BASE (APBPERIPH_BASE + 0x30000) |
Definition at line 28749 of file NUC472_442.h.
#define UART1_BASE (APBPERIPH_BASE + 0x31000) |
Definition at line 28776 of file NUC472_442.h.
#define UART2_BASE (APBPERIPH_BASE + 0x32000) |
Definition at line 28750 of file NUC472_442.h.
#define UART3_BASE (APBPERIPH_BASE + 0x33000) |
Definition at line 28777 of file NUC472_442.h.
#define UART4_BASE (APBPERIPH_BASE + 0x34000) |
Definition at line 28751 of file NUC472_442.h.
#define UART5_BASE (APBPERIPH_BASE + 0x35000) |
Definition at line 28778 of file NUC472_442.h.
#define UDC20_BASE (AHBPERIPH_BASE + 0x19000) |
Definition at line 28734 of file NUC472_442.h.
#define USBH_BASE (AHBPERIPH_BASE + 0x09000) |
Definition at line 28729 of file NUC472_442.h.
#define WDT_BASE (APBPERIPH_BASE + 0x00000) |
Definition at line 28739 of file NUC472_442.h.
#define WWDT_BASE (APBPERIPH_BASE + 0x00100) |
Definition at line 28740 of file NUC472_442.h.