![]() |
NUC472_NUC442_BSP V3.03.005
The Board Support Package for NUC472/NUC442
|
Modules | |
CLK Exported Functions | |
Variables | |
int32_t | g_CLK_i32ErrCode |
#define CLK_CLKDIV0_ADC | ( | x | ) |
#define CLK_CLKDIV0_HCLK | ( | x | ) |
#define CLK_CLKDIV0_SDH | ( | x | ) |
#define CLK_CLKDIV0_UART | ( | x | ) |
#define CLK_CLKDIV0_USB | ( | x | ) |
#define CLK_CLKDIV1_SC0 | ( | x | ) |
#define CLK_CLKDIV1_SC1 | ( | x | ) |
#define CLK_CLKDIV1_SC2 | ( | x | ) |
#define CLK_CLKDIV1_SC3 | ( | x | ) |
#define CLK_CLKDIV2_SC4 | ( | x | ) |
#define CLK_CLKDIV2_SC5 | ( | x | ) |
#define CLK_CLKDIV3_CAP | ( | x | ) |
#define CLK_CLKDIV3_EMAC | ( | x | ) |
#define CLK_CLKDIV3_VSENSE | ( | x | ) |
#define CLK_CLKSEL0_CAPSEL_HIRC |
#define CLK_CLKSEL0_CAPSEL_HXT |
#define CLK_CLKSEL0_HCLKSEL_HIRC |
#define CLK_CLKSEL0_HCLKSEL_HXT |
#define CLK_CLKSEL0_HCLKSEL_LIRC |
#define CLK_CLKSEL0_HCLKSEL_LXT |
#define CLK_CLKSEL0_HCLKSEL_PLL |
#define CLK_CLKSEL0_HCLKSEL_PLL2 |
#define CLK_CLKSEL0_ICAPSEL_HIRC |
#define CLK_CLKSEL0_ICAPSEL_HXT |
#define CLK_CLKSEL0_PCLKSEL_HCLK_DIV2 |
#define CLK_CLKSEL0_SDHSEL_HIRC |
#define CLK_CLKSEL0_SDHSEL_HXT |
#define CLK_CLKSEL0_STCLKSEL_HCLK (0x01UL<<SysTick_CTRL_CLKSOURCE_Pos) |
#define CLK_CLKSEL0_STCLKSEL_HCLK_DIV2 |
#define CLK_CLKSEL0_STCLKSEL_HIRC_DIV2 |
#define CLK_CLKSEL0_STCLKSEL_HXT |
#define CLK_CLKSEL0_STCLKSEL_HXT_DIV2 |
#define CLK_CLKSEL0_STCLKSEL_LXT |
#define CLK_CLKSEL1_ADCSEL_HIRC |
#define CLK_CLKSEL1_ADCSEL_HXT |
#define CLK_CLKSEL1_ADCSEL_PCLK |
#define CLK_CLKSEL1_ADCSEL_PLL |
#define CLK_CLKSEL1_CLKOSEL_HCLK |
#define CLK_CLKSEL1_CLKOSEL_HIRC |
#define CLK_CLKSEL1_CLKOSEL_HXT |
#define CLK_CLKSEL1_CLKOSEL_LXT |
#define CLK_CLKSEL1_EADCSEL_HIRC |
#define CLK_CLKSEL1_EADCSEL_HXT |
#define CLK_CLKSEL1_EADCSEL_PCLK |
#define CLK_CLKSEL1_EADCSEL_PLL |
#define CLK_CLKSEL1_SPI0SEL_PCLK |
#define CLK_CLKSEL1_SPI0SEL_PLL |
#define CLK_CLKSEL1_SPI1SEL_PCLK |
#define CLK_CLKSEL1_SPI1SEL_PLL |
#define CLK_CLKSEL1_SPI2SEL_PCLK |
#define CLK_CLKSEL1_SPI2SEL_PLL |
#define CLK_CLKSEL1_SPI3SEL_PCLK |
#define CLK_CLKSEL1_SPI3SEL_PLL |
#define CLK_CLKSEL1_TMR0SEL_EXT |
#define CLK_CLKSEL1_TMR0SEL_HIRC |
#define CLK_CLKSEL1_TMR0SEL_HXT |
#define CLK_CLKSEL1_TMR0SEL_LIRC |
#define CLK_CLKSEL1_TMR0SEL_LXT |
#define CLK_CLKSEL1_TMR0SEL_PCLK |
#define CLK_CLKSEL1_TMR1SEL_EXT |
#define CLK_CLKSEL1_TMR1SEL_HIRC |
#define CLK_CLKSEL1_TMR1SEL_HXT |
#define CLK_CLKSEL1_TMR1SEL_LIRC |
#define CLK_CLKSEL1_TMR1SEL_LXT |
#define CLK_CLKSEL1_TMR1SEL_PCLK |
#define CLK_CLKSEL1_TMR2SEL_EXT |
#define CLK_CLKSEL1_TMR2SEL_HIRC |
#define CLK_CLKSEL1_TMR2SEL_HXT |
#define CLK_CLKSEL1_TMR2SEL_LIRC |
#define CLK_CLKSEL1_TMR2SEL_LXT |
#define CLK_CLKSEL1_TMR2SEL_PCLK |
#define CLK_CLKSEL1_TMR3SEL_EXT |
#define CLK_CLKSEL1_TMR3SEL_HIRC |
#define CLK_CLKSEL1_TMR3SEL_HXT |
#define CLK_CLKSEL1_TMR3SEL_LIRC |
#define CLK_CLKSEL1_TMR3SEL_LXT |
#define CLK_CLKSEL1_TMR3SEL_PCLK |
#define CLK_CLKSEL1_UARTSEL_HIRC |
#define CLK_CLKSEL1_UARTSEL_HXT |
#define CLK_CLKSEL1_UARTSEL_PLL |
#define CLK_CLKSEL1_WDTSEL_HCLK_DIV2048 |
#define CLK_CLKSEL1_WDTSEL_HXT |
#define CLK_CLKSEL1_WDTSEL_LIRC |
#define CLK_CLKSEL1_WDTSEL_LXT |
#define CLK_CLKSEL1_WWDTSEL_HCLK_DIV2048 |
#define CLK_CLKSEL1_WWDTSEL_LIRC |
#define CLK_CLKSEL2_PWM0CH01SEL_HIRC |
#define CLK_CLKSEL2_PWM0CH01SEL_HXT |
#define CLK_CLKSEL2_PWM0CH01SEL_LIRC |
#define CLK_CLKSEL2_PWM0CH01SEL_LXT |
#define CLK_CLKSEL2_PWM0CH01SEL_PCLK |
#define CLK_CLKSEL2_PWM0CH23SEL_HIRC |
#define CLK_CLKSEL2_PWM0CH23SEL_HXT |
#define CLK_CLKSEL2_PWM0CH23SEL_LIRC |
#define CLK_CLKSEL2_PWM0CH23SEL_LXT |
#define CLK_CLKSEL2_PWM0CH23SEL_PCLK |
#define CLK_CLKSEL2_PWM0CH45SEL_HIRC |
#define CLK_CLKSEL2_PWM0CH45SEL_HXT |
#define CLK_CLKSEL2_PWM0CH45SEL_LIRC |
#define CLK_CLKSEL2_PWM0CH45SEL_LXT |
#define CLK_CLKSEL2_PWM0CH45SEL_PCLK |
#define CLK_CLKSEL2_PWM1CH01SEL_HIRC |
#define CLK_CLKSEL2_PWM1CH01SEL_HXT |
#define CLK_CLKSEL2_PWM1CH01SEL_LIRC |
#define CLK_CLKSEL2_PWM1CH01SEL_LXT |
#define CLK_CLKSEL2_PWM1CH01SEL_PCLK |
#define CLK_CLKSEL2_PWM1CH23SEL_HIRC |
#define CLK_CLKSEL2_PWM1CH23SEL_HXT |
#define CLK_CLKSEL2_PWM1CH23SEL_LIRC |
#define CLK_CLKSEL2_PWM1CH23SEL_LXT |
#define CLK_CLKSEL2_PWM1CH23SEL_PCLK |
#define CLK_CLKSEL2_PWM1CH45SEL_HIRC |
#define CLK_CLKSEL2_PWM1CH45SEL_HXT |
#define CLK_CLKSEL2_PWM1CH45SEL_LIRC |
#define CLK_CLKSEL2_PWM1CH45SEL_LXT |
#define CLK_CLKSEL2_PWM1CH45SEL_PCLK |
#define CLK_CLKSEL3_I2S0SEL_HIRC |
#define CLK_CLKSEL3_I2S0SEL_HXT |
#define CLK_CLKSEL3_I2S0SEL_PCLK |
#define CLK_CLKSEL3_I2S0SEL_PLL |
#define CLK_CLKSEL3_I2S1SEL_HIRC |
#define CLK_CLKSEL3_I2S1SEL_HXT |
#define CLK_CLKSEL3_I2S1SEL_PCLK |
#define CLK_CLKSEL3_I2S1SEL_PLL |
#define CLK_CLKSEL3_SC0SEL_HIRC |
#define CLK_CLKSEL3_SC0SEL_HXT |
#define CLK_CLKSEL3_SC0SEL_PCLK |
#define CLK_CLKSEL3_SC0SEL_PLL |
#define CLK_CLKSEL3_SC1SEL_HIRC |
#define CLK_CLKSEL3_SC1SEL_HXT |
#define CLK_CLKSEL3_SC1SEL_PCLK |
#define CLK_CLKSEL3_SC1SEL_PLL |
#define CLK_CLKSEL3_SC2SEL_HIRC |
#define CLK_CLKSEL3_SC2SEL_HXT |
#define CLK_CLKSEL3_SC2SEL_PCLK |
#define CLK_CLKSEL3_SC2SEL_PLL |
#define CLK_CLKSEL3_SC3SEL_HIRC |
#define CLK_CLKSEL3_SC3SEL_HXT |
#define CLK_CLKSEL3_SC3SEL_PCLK |
#define CLK_CLKSEL3_SC3SEL_PLL |
#define CLK_CLKSEL3_SC4SEL_HIRC |
#define CLK_CLKSEL3_SC4SEL_HXT |
#define CLK_CLKSEL3_SC4SEL_PCLK |
#define CLK_CLKSEL3_SC4SEL_PLL |
#define CLK_CLKSEL3_SC5SEL_HIRC |
#define CLK_CLKSEL3_SC5SEL_HXT |
#define CLK_CLKSEL3_SC5SEL_PCLK |
#define CLK_CLKSEL3_SC5SEL_PLL |
#define CLK_PLL2CTL_PLL2DIV | ( | x | ) |
#define CLK_PLLCTL_24MHz_HIRC |
#define CLK_PLLCTL_32MHz_HIRC |
#define CLK_PLLCTL_36MHz_HIRC |
#define CLK_PLLCTL_48MHz_HIRC |
#define CLK_PLLCTL_50MHz_HIRC |
#define CLK_PLLCTL_NF | ( | x | ) |
#define CLK_PLLCTL_NR | ( | x | ) |
#define CLK_PLLCTL_PLLSRC_HIRC |
#define CLK_PLLCTL_PLLSRC_HXT |
#define I2C4_MODULE ((2UL<<30)|(0<<28)|(0<<25) |( 0<<20)|(0<<18)|(MODULE_NoMsk<<10)|( 0<<5)|CLK_APBCLK1_I2C4CKEN_Pos) |
#define MODULE_APBCLK | ( | x | ) |
#define MODULE_APBCLK_ENC | ( | x | ) | (((x) & 0x03) << 30) |
#define MODULE_CLKDIV | ( | x | ) |
#define MODULE_CLKDIV_ENC | ( | x | ) | (((x) & 0x03) << 18) |
#define MODULE_CLKDIV_Msk | ( | x | ) |
#define MODULE_CLKDIV_Msk_ENC | ( | x | ) | (((x) & 0xff) << 10) |
#define MODULE_CLKDIV_Pos | ( | x | ) |
#define MODULE_CLKDIV_Pos_ENC | ( | x | ) | (((x) & 0x1f) << 5) |
#define MODULE_CLKSEL | ( | x | ) |
#define MODULE_CLKSEL_ENC | ( | x | ) | (((x) & 0x03) << 28) |
#define MODULE_CLKSEL_Msk | ( | x | ) |
#define MODULE_CLKSEL_Msk_ENC | ( | x | ) | (((x) & 0x07) << 25) |
#define MODULE_CLKSEL_Pos | ( | x | ) |
#define MODULE_CLKSEL_Pos_ENC | ( | x | ) | (((x) & 0x1f) << 20) |
#define MODULE_IP_EN_Pos | ( | x | ) |
#define MODULE_IP_EN_Pos_ENC | ( | x | ) | (((x) & 0x1f) << 0) |