MINI55_BSP V3.02.004
The Board Support Package for Mini55 Series MCU
adc.c
Go to the documentation of this file.
1/**************************************************************************/
12#include "Mini55Series.h"
13
38void ADC_Open(ADC_T *adc,
39 uint32_t u32InputMode,
40 uint32_t u32OpMode,
41 uint32_t u32ChMask)
42{
43
44 ADC->CTL = 0; // A clean start.
45 ADC->CHEN = (ADC->CHEN & ~(ADC_CHEN_CHEN0_Msk |
52 ADC_CHEN_CHEN7_Msk)) | u32ChMask;
53 return;
54}
55
61void ADC_Close(ADC_T *adc)
62{
63 SYS->IPRST1 |= SYS_IPRST1_ADCRST_Msk;
64 SYS->IPRST1 &= ~SYS_IPRST1_ADCRST_Msk;
65 return;
66
67}
68
84 uint32_t u32Source,
85 uint32_t u32Param)
86{
88 if(u32Source == ADC_TRIGGER_BY_EXT_PIN)
89 {
90 ADC->CTL |= u32Source | u32Param | ADC_CTL_HWTRGEN_Msk;
91 }
92 else
93 {
94 ADC->TRGDLY = (ADC->TRGDLY & ~ADC_TRGDLY_DELAY_Msk) | u32Param;
95 ADC->CTL |= u32Source | ADC_CTL_HWTRGEN_Msk;
96 }
97 return;
98}
99
106{
108 return;
109}
110
131 uint32_t u32ChNum,
132 uint32_t u32SampleTime)
133{
134 ADC->EXTSMPT = (ADC->EXTSMPT & ~ADC_EXTSMPT_EXTSMPT_Msk) | u32SampleTime;
135}
136
148void ADC_EnableInt(ADC_T *adc, uint32_t u32Mask)
149{
150 if(u32Mask & ADC_ADIF_INT)
151 ADC->CTL |= ADC_CTL_ADCIEN_Msk;
152 if(u32Mask & ADC_CMP0_INT)
153 ADC->CMP[0] |= ADC_CMP_ADCMPIE_Msk;
154 if(u32Mask & ADC_CMP1_INT)
155 ADC->CMP[1] |= ADC_CMP_ADCMPIE_Msk;
156
157 return;
158}
159
171void ADC_DisableInt(ADC_T *adc, uint32_t u32Mask)
172{
173 if(u32Mask & ADC_ADIF_INT)
174 ADC->CTL &= ~ADC_CTL_ADCIEN_Msk;
175 if(u32Mask & ADC_CMP0_INT)
176 ADC->CMP[0] &= ~ADC_CMP_ADCMPIE_Msk;
177 if(u32Mask & ADC_CMP1_INT)
178 ADC->CMP[1] &= ~ADC_CMP_ADCMPIE_Msk;
179
180 return;
181}
182
195void ADC_SeqModeEnable(ADC_T *adc, uint32_t u32SeqTYPE, uint32_t u32ModeSel)
196{
197 // Enable ADC Sequential Mode
198 ADC->SEQCTL = ADC->SEQCTL | ADC_SEQCTL_SEQEN_Msk;
199
200 // Select ADC Sequential Mode Type
201 ADC->SEQCTL = (ADC->SEQCTL & ~(ADC_SEQCTL_SEQTYPE_Msk)) | (u32SeqTYPE << ADC_SEQCTL_SEQTYPE_Pos);
202
203 // Select ADC Sequential Mode Type
204 ADC->SEQCTL = (ADC->SEQCTL & ~(ADC_SEQCTL_MODESEL_Msk)) | (u32ModeSel << ADC_SEQCTL_MODESEL_Pos);
205
206 return;
207}
208
219void ADC_SeqModeTriggerSrc(ADC_T *adc, uint32_t u32SeqModeTrgSrc1, uint32_t u32Trg1Type, uint32_t u32SeqModeTrgSrc2, uint32_t u32Trg2Type)
220{
221 // Select PWM Trigger Source Selection for TRG1CTL or TRG2CTL
223 ADC->SEQCTL = (u32SeqModeTrgSrc1 << ADC_SEQCTL_TRG1SRC_Pos) | (u32Trg1Type << ADC_SEQCTL_TRG1TYPE_Pos) |
224 (u32SeqModeTrgSrc2 << ADC_SEQCTL_TRG2SRC_Pos) | (u32Trg2Type << ADC_SEQCTL_TRG2TYPE_Pos);
225 return;
226}
227 /* end of group MINI55_ADC_EXPORTED_FUNCTIONS */
229 /* end of group MINI55_ADC_Driver */
231 /* end of group MINI55_Device_Driver */
233
234/*** (C) COPYRIGHT 2014 Nuvoton Technology Corp. ***/
Mini55 series peripheral access layer header file. This file contains all the peripheral register's d...
#define SYS_IPRST1_ADCRST_Msk
#define ADC_CMP0_INT
Definition: adc.h:42
#define ADC_TRIGGER_BY_PWM
Definition: adc.h:38
#define ADC_ADIF_INT
Definition: adc.h:41
#define ADC_TRIGGER_BY_EXT_PIN
Definition: adc.h:37
#define ADC_CMP1_INT
Definition: adc.h:43
#define ADC_RISING_EDGE_TRIGGER
Definition: adc.h:40
void ADC_EnableHWTrigger(ADC_T *adc, uint32_t u32Source, uint32_t u32Param)
Configure the hardware trigger condition and enable hardware trigger.
Definition: adc.c:83
void ADC_Close(ADC_T *adc)
Disable ADC module.
Definition: adc.c:61
void ADC_SeqModeEnable(ADC_T *adc, uint32_t u32SeqTYPE, uint32_t u32ModeSel)
ADC PWM Sequential Mode Control.
Definition: adc.c:195
void ADC_SetExtraSampleTime(ADC_T *adc, uint32_t u32ChNum, uint32_t u32SampleTime)
Set ADC sample time for designated channel.
Definition: adc.c:130
void ADC_Open(ADC_T *adc, uint32_t u32InputMode, uint32_t u32OpMode, uint32_t u32ChMask)
This API configures ADC module to be ready for convert the input from selected channel.
Definition: adc.c:38
void ADC_DisableInt(ADC_T *adc, uint32_t u32Mask)
Disable the interrupt(s) selected by u32Mask parameter.
Definition: adc.c:171
void ADC_DisableHWTrigger(ADC_T *adc)
Disable hardware trigger ADC function.
Definition: adc.c:105
void ADC_EnableInt(ADC_T *adc, uint32_t u32Mask)
Enable the interrupt(s) selected by u32Mask parameter.
Definition: adc.c:148
void ADC_SeqModeTriggerSrc(ADC_T *adc, uint32_t u32SeqModeTrgSrc1, uint32_t u32Trg1Type, uint32_t u32SeqModeTrgSrc2, uint32_t u32Trg2Type)
ADC PWM Sequential Mode PWM Trigger Source and type.
Definition: adc.c:219
#define ADC_SEQCTL_TRG1TYPE_Pos
Definition: Mini55Series.h:778
#define ADC_SEQCTL_SEQEN_Msk
Definition: Mini55Series.h:770
#define ADC_CHEN_CHEN2_Msk
Definition: Mini55Series.h:689
#define ADC_CHEN_CHEN5_Msk
Definition: Mini55Series.h:698
#define ADC_CHEN_CHEN3_Msk
Definition: Mini55Series.h:692
#define ADC_CHEN_CHEN4_Msk
Definition: Mini55Series.h:695
#define ADC_SEQCTL_TRG2SRC_Msk
Definition: Mini55Series.h:788
#define ADC_SEQCTL_TRG1TYPE_Msk
Definition: Mini55Series.h:779
#define ADC_CHEN_CHEN0_Msk
Definition: Mini55Series.h:683
#define ADC_SEQCTL_TRG2TYPE_Msk
Definition: Mini55Series.h:785
#define ADC_SEQCTL_SEQTYPE_Msk
Definition: Mini55Series.h:773
#define ADC_CHEN_CHEN1_Msk
Definition: Mini55Series.h:686
#define ADC_SEQCTL_TRG2SRC_Pos
Definition: Mini55Series.h:787
#define ADC_SEQCTL_TRG2TYPE_Pos
Definition: Mini55Series.h:784
#define ADC_SEQCTL_TRG1SRC_Msk
Definition: Mini55Series.h:782
#define ADC_SEQCTL_MODESEL_Msk
Definition: Mini55Series.h:776
#define ADC_CMP_ADCMPIE_Msk
Definition: Mini55Series.h:728
#define ADC_CTL_HWTRGEN_Msk
Definition: Mini55Series.h:674
#define ADC_CTL_ADCIEN_Msk
Definition: Mini55Series.h:665
#define ADC_CHEN_CHEN6_Msk
Definition: Mini55Series.h:701
#define ADC_SEQCTL_SEQTYPE_Pos
Definition: Mini55Series.h:772
#define ADC_SEQCTL_TRG1SRC_Pos
Definition: Mini55Series.h:781
#define ADC_CHEN_CHEN7_Msk
Definition: Mini55Series.h:704
#define ADC_SEQCTL_MODESEL_Pos
Definition: Mini55Series.h:775
#define ADC
Pointer to ADC register structure.
#define SYS
Pointer to SYS register structure.