56void EBI_Open(uint32_t u32Bank, uint32_t u32DataWidth, uint32_t u32TimingClass, uint32_t u32BusMode, uint32_t u32CSActiveLevel)
58 uint32_t u32Index0 = (uint32_t)&
EBI->CTL0 + (uint32_t)u32Bank * 0x10U;
59 uint32_t u32Index1 = (uint32_t)&
EBI->TCTL0 + (uint32_t)u32Bank * 0x10U;
60 volatile uint32_t *pu32EBICTL = (uint32_t *)( u32Index0 );
61 volatile uint32_t *pu32EBITCTL = (uint32_t *)( u32Index1 );
65 *pu32EBICTL &= ~EBI_CTL_DW16_Msk;
72 *pu32EBICTL |= u32BusMode;
74 switch(u32TimingClass)
88 *pu32EBITCTL = 0x03003318U;
103 *pu32EBITCTL = 0x03003318U;
111 *pu32EBITCTL = 0x07007738U;
119 *pu32EBITCTL = 0x07007738U;
127 *pu32EBITCTL = 0x07007738U;
131 *pu32EBICTL &= ~EBI_CTL_EN_Msk;
150 uint32_t u32Index = (uint32_t)&
EBI->CTL0 + u32Bank * 0x10U;
151 volatile uint32_t *pu32EBICTL = (uint32_t *)( u32Index );
153 *pu32EBICTL &= ~EBI_CTL_EN_Msk;
180 uint32_t u32Index0 = (uint32_t)&
EBI->CTL0 + (uint32_t)u32Bank * 0x10U;
181 uint32_t u32Index1 = (uint32_t)&
EBI->TCTL0 + (uint32_t)u32Bank * 0x10U;
182 volatile uint32_t *pu32EBICTL = (uint32_t *)( u32Index0 );
183 volatile uint32_t *pu32EBITCTL = (uint32_t *)( u32Index1 );
186 *pu32EBITCTL = u32TimingConfig;
NuMicro peripheral access layer header file.
#define EBI_TIMING_VERYFAST
#define EBI_TIMING_FASTEST
#define EBI_BUSWIDTH_8BIT
#define EBI_TIMING_VERYSLOW
#define EBI_TIMING_NORMAL
#define EBI_TIMING_SLOWEST
void EBI_Close(uint32_t u32Bank)
Disable EBI on specify Bank.
void EBI_Open(uint32_t u32Bank, uint32_t u32DataWidth, uint32_t u32TimingClass, uint32_t u32BusMode, uint32_t u32CSActiveLevel)
Initialize EBI for specify Bank.
void EBI_SetBusTiming(uint32_t u32Bank, uint32_t u32TimingConfig, uint32_t u32MclkDiv)
Set EBI Bus Timing for specify Bank.
#define EBI_CTL_MCLKDIV_Pos
#define EBI_CTL_MCLKDIV_Msk
#define EBI_CTL_CSPOLINV_Pos